diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/DSDT.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/DSDT.dsl new file mode 100644 index 0000000..263cc14 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/DSDT.dsl @@ -0,0 +1,35385 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of DSDT.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00026DC4 (159172) + * Revision 0x02 + * Checksum 0x81 + * OEM ID "LENOVO" + * OEM Table ID "SKL " + * OEM Revision 0x00000000 (0) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "DSDT", 2, "LENOVO", "SKL ", 0x00000000) +{ + External (_GPE.TBNF, MethodObj) // 0 Arguments + External (_PR_.BGIA, UnknownObj) + External (_PR_.BGMA, UnknownObj) + External (_PR_.BGMS, UnknownObj) + External (_PR_.CFGD, UnknownObj) + External (_PR_.CLVL, UnknownObj) + External (_PR_.CPPC, IntObj) + External (_PR_.DSAE, UnknownObj) + External (_PR_.DTS1, UnknownObj) + External (_PR_.DTS2, UnknownObj) + External (_PR_.DTS3, UnknownObj) + External (_PR_.DTS4, UnknownObj) + External (_PR_.DTSE, UnknownObj) + External (_PR_.DTSF, UnknownObj) + External (_PR_.ELNG, UnknownObj) + External (_PR_.EMNA, UnknownObj) + External (_PR_.EPCS, UnknownObj) + External (_PR_.PDTS, UnknownObj) + External (_PR_.PKGA, UnknownObj) + External (_PR_.POWS, UnknownObj) + External (_PR_.PR00, DeviceObj) + External (_PR_.PR00.LPSS, PkgObj) + External (_PR_.PR00.TPSS, PkgObj) + External (_PR_.TRPD, UnknownObj) + External (_PR_.TRPF, UnknownObj) + External (_SB_.GGIV, MethodObj) // 1 Arguments + External (_SB_.GGOV, MethodObj) // 1 Arguments + External (_SB_.IETM, DeviceObj) + External (_SB_.IETM.DPTE, UnknownObj) + External (_SB_.PCI0.B0D4.NPCC, PkgObj) + External (_SB_.PCI0.CTCD, MethodObj) // 0 Arguments + External (_SB_.PCI0.CTCN, MethodObj) // 0 Arguments + External (_SB_.PCI0.GFX0, DeviceObj) + External (_SB_.PCI0.GFX0.AINT, MethodObj) // 2 Arguments + External (_SB_.PCI0.GFX0.ALSI, UnknownObj) + External (_SB_.PCI0.GFX0.CBLV, UnknownObj) + External (_SB_.PCI0.GFX0.CDCK, UnknownObj) + External (_SB_.PCI0.GFX0.CLID, UnknownObj) + External (_SB_.PCI0.GFX0.DD1F, DeviceObj) + External (_SB_.PCI0.GFX0.DRDY, UnknownObj) + External (_SB_.PCI0.GFX0.GSCI, MethodObj) // 0 Arguments + External (_SB_.PCI0.GFX0.GSSE, UnknownObj) + External (_SB_.PCI0.GFX0.IUEH, MethodObj) // 1 Arguments + External (_SB_.PCI0.GFX0.STAT, UnknownObj) + External (_SB_.PCI0.GFX0.TCHE, UnknownObj) + External (_SB_.PCI0.GFX0.VLOC, MethodObj) // 1 Arguments + External (_SB_.PCI0.HDAS.PPMS, MethodObj) // 1 Arguments + External (_SB_.PCI0.HDAS.PS0X, MethodObj) // 0 Arguments + External (_SB_.PCI0.HDAS.PS3X, MethodObj) // 0 Arguments + External (_SB_.PCI0.HIDW, MethodObj) // 4 Arguments + External (_SB_.PCI0.HIWC, MethodObj) // 1 Arguments + External (_SB_.PCI0.ISP0, DeviceObj) + External (_SB_.PCI0.LPCB.EC__.HKEY.DYTC, MethodObj) // 1 Arguments + External (_SB_.PCI0.LPCB.H_EC.XDAT, MethodObj) // 0 Arguments + External (_SB_.PCI0.PAUD.PUAM, MethodObj) // 0 Arguments + External (_SB_.PCI0.PEG0, DeviceObj) + External (_SB_.PCI0.PEG0.PEGP, DeviceObj) + External (_SB_.PCI0.PEG0.PG00.PEGP, DeviceObj) + External (_SB_.PCI0.PEG1, DeviceObj) + External (_SB_.PCI0.PEG1.PG01.PEGP, DeviceObj) + External (_SB_.PCI0.PEG2, DeviceObj) + External (_SB_.PCI0.PEG2.PG02.PEGP, DeviceObj) + External (_SB_.PCI0.PTDP, UnknownObj) + External (_SB_.PCI0.RP01.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP01.PXSX, DeviceObj) + External (_SB_.PCI0.RP01.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP01.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP02.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP02.PXSX, DeviceObj) + External (_SB_.PCI0.RP02.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP02.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP03.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP03.PXSX, DeviceObj) + External (_SB_.PCI0.RP03.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP03.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP04.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP04.PXSX, DeviceObj) + External (_SB_.PCI0.RP04.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP04.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP05.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP05.PWRG, UnknownObj) + External (_SB_.PCI0.RP05.PXSX, DeviceObj) + External (_SB_.PCI0.RP05.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP05.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP05.RSTG, UnknownObj) + External (_SB_.PCI0.RP05.SCLK, UnknownObj) + External (_SB_.PCI0.RP06.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP06.PXSX, DeviceObj) + External (_SB_.PCI0.RP06.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP06.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP07.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP07.PXSX, DeviceObj) + External (_SB_.PCI0.RP07.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP07.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP08.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP08.PXSX, DeviceObj) + External (_SB_.PCI0.RP08.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP08.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP09.PEGP.NVST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP09.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP09.PWRG, UnknownObj) + External (_SB_.PCI0.RP09.PXSX, DeviceObj) + External (_SB_.PCI0.RP09.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP09.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP09.RSTG, UnknownObj) + External (_SB_.PCI0.RP09.SCLK, UnknownObj) + External (_SB_.PCI0.RP10.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP10.PXSX, DeviceObj) + External (_SB_.PCI0.RP10.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP10.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP11.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP11.PXSX, DeviceObj) + External (_SB_.PCI0.RP11.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP11.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP12.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP12.PXSX, DeviceObj) + External (_SB_.PCI0.RP12.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP12.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP13.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP13.PWRG, UnknownObj) + External (_SB_.PCI0.RP13.PXSX, DeviceObj) + External (_SB_.PCI0.RP13.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP13.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP13.RSTG, UnknownObj) + External (_SB_.PCI0.RP13.SCLK, UnknownObj) + External (_SB_.PCI0.RP14.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP14.PXSX, DeviceObj) + External (_SB_.PCI0.RP14.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP14.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP15.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP15.PXSX, DeviceObj) + External (_SB_.PCI0.RP15.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP15.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP16.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP16.PXSX, DeviceObj) + External (_SB_.PCI0.RP16.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP16.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP17.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP17.PWRG, UnknownObj) + External (_SB_.PCI0.RP17.PXSX, DeviceObj) + External (_SB_.PCI0.RP17.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP17.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP17.RSTG, UnknownObj) + External (_SB_.PCI0.RP17.SCLK, UnknownObj) + External (_SB_.PCI0.RP18.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP18.PXSX, DeviceObj) + External (_SB_.PCI0.RP18.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP18.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP19.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP19.PXSX, DeviceObj) + External (_SB_.PCI0.RP19.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP19.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP20.PON_, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP20.PXSX, DeviceObj) + External (_SB_.PCI0.RP20.PXSX.WGST, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP20.PXSX.WIST, MethodObj) // 0 Arguments + External (_SB_.PCI0.SAT0.NVM1.VLPM, UnknownObj) + External (_SB_.PCI0.SAT0.NVM2.VLPM, UnknownObj) + External (_SB_.PCI0.SAT0.NVM3.VLPM, UnknownObj) + External (_SB_.PCI0.SAT0.PRIM, DeviceObj) + External (_SB_.PCI0.SAT0.PRIM.GTME, IntObj) + External (_SB_.PCI0.SAT0.SCND, DeviceObj) + External (_SB_.PCI0.SAT0.SCND.GTME, IntObj) + External (_SB_.PCI0.SAT0.SCND.MSTR, DeviceObj) + External (_SB_.PCI0.SAT0.SDSM, MethodObj) // 4 Arguments + External (_SB_.PCI0.XHC_.DUAM, MethodObj) // 0 Arguments + External (_SB_.PCI0.XHC_.PS0X, MethodObj) // 0 Arguments + External (_SB_.PCI0.XHC_.PS3X, MethodObj) // 0 Arguments + External (_SB_.PCI0.XHC_.RHUB.INIR, MethodObj) // 0 Arguments + External (_SB_.PCI0.XHC_.RHUB.PS0X, MethodObj) // 0 Arguments + External (_SB_.PCI0.XHC_.RHUB.PS2X, MethodObj) // 0 Arguments + External (_SB_.PCI0.XHC_.RHUB.PS3X, MethodObj) // 0 Arguments + External (_SB_.SGOV, MethodObj) // 2 Arguments + External (_SB_.TBFP, MethodObj) // 1 Arguments + External (_SB_.TPM_.PTS_, MethodObj) // 1 Arguments + External (_SB_.UBTC.NTFY, MethodObj) // 0 Arguments + External (_TZ_.ETMD, IntObj) + External (_TZ_.TZ00, DeviceObj) + External (_TZ_.TZ01, DeviceObj) + External (ADBG, MethodObj) // 1 Arguments + External (ALSE, UnknownObj) + External (BNUM, UnknownObj) + External (BRTL, UnknownObj) + External (CFGD, UnknownObj) + External (DIDX, UnknownObj) + External (DX2H, MethodObj) // 2 Arguments + External (GSMI, UnknownObj) + External (IGDS, UnknownObj) + External (LHIH, UnknownObj) + External (LIDS, UnknownObj) + External (LLOW, UnknownObj) + External (M32B, UnknownObj) + External (M32L, UnknownObj) + External (M64B, UnknownObj) + External (M64L, UnknownObj) + External (MBGS, MethodObj) // 1 Arguments + External (MMRP, MethodObj) // 1 Arguments + External (MMTB, MethodObj) // 1 Arguments + External (ODV0, IntObj) + External (ODV1, IntObj) + External (ODV2, IntObj) + External (ODV3, IntObj) + External (ODV4, IntObj) + External (ODV5, IntObj) + External (ODV6, IntObj) + External (ODV7, IntObj) + External (ODV8, IntObj) + External (ODV9, IntObj) + External (ODVA, IntObj) + External (ODVB, IntObj) + External (ODVC, IntObj) + External (ODVD, IntObj) + External (ODVE, IntObj) + External (ODVF, IntObj) + External (ODVG, IntObj) + External (ODVH, IntObj) + External (ODVI, IntObj) + External (ODVJ, IntObj) + External (PC00, IntObj) + External (PC01, UnknownObj) + External (PC02, UnknownObj) + External (PC03, UnknownObj) + External (PC04, UnknownObj) + External (PC05, UnknownObj) + External (PC06, UnknownObj) + External (PC07, UnknownObj) + External (PC08, UnknownObj) + External (PC09, UnknownObj) + External (PC10, UnknownObj) + External (PC11, UnknownObj) + External (PC12, UnknownObj) + External (PC13, UnknownObj) + External (PC14, UnknownObj) + External (PC15, UnknownObj) + External (PTTB, UnknownObj) + External (RTBT, IntObj) + External (SGMD, UnknownObj) + External (STDV, IntObj) + External (TBTD, MethodObj) // 1 Arguments + External (TBTF, MethodObj) // 1 Arguments + External (TBTS, IntObj) + External (XBAS, UnknownObj) + + Name (MBUF, Buffer (0x4000){}) + OperationRegion (MDBR, SystemMemory, 0x5B535018, 0x00004008) + Field (MDBR, AnyAcc, Lock, Preserve) + { + ASLD, 1, + LDBG, 7, + BUFN, 16, + Offset (0x04), + MDG0, 131072 + } + + Method (DX2H, 2, Serialized) + { + If (ASLD) + { + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + DB2H (Arg1) + } + Case (0x01) + { + DW2H (Arg1) + } + Case (0x02) + { + DD2H (Arg1) + } + + } + } + } + + Method (DB2H, 1, Serialized) + { + SHOW (Arg0) + MDGC (0x20) + Store (MBUF, MDG0) /* \MDG0 */ + } + + Method (DW2H, 1, Serialized) + { + Store (Arg0, Local0) + ShiftRight (Arg0, 0x08, Local1) + And (Local0, 0xFF, Local0) + And (Local1, 0xFF, Local1) + DB2H (Local1) + Decrement (BUFN) + DB2H (Local0) + } + + Method (DD2H, 1, Serialized) + { + Store (Arg0, Local0) + ShiftRight (Arg0, 0x10, Local1) + And (Local0, 0xFFFF, Local0) + And (Local1, 0xFFFF, Local1) + DW2H (Local1) + Decrement (BUFN) + DW2H (Local0) + } + + Method (MBGS, 1, Serialized) + { + If (ASLD) + { + Store (SizeOf (Arg0), Local0) + Name (BUFS, Buffer (Local0){}) + Store (Arg0, BUFS) /* \MBGS.BUFS */ + MDGC (0x20) + While (Local0) + { + MDGC (DerefOf (Index (BUFS, Subtract (SizeOf (Arg0), Local0)))) + Decrement (Local0) + } + + Store (MBUF, MDG0) /* \MDG0 */ + } + } + + Method (SHOW, 1, Serialized) + { + MDGC (NTOC (ShiftRight (Arg0, 0x04))) + MDGC (NTOC (Arg0)) + } + + Method (LINE, 0, Serialized) + { + Store (BUFN, Local0) + And (Local0, 0x0F, Local0) + While (Local0) + { + MDGC (0x00) + Increment (Local0) + And (Local0, 0x0F, Local0) + } + } + + Method (MDGC, 1, Serialized) + { + Store (Arg0, Index (MBUF, BUFN)) + Add (BUFN, 0x01, BUFN) /* \BUFN */ + If (LGreater (BUFN, Subtract (0x4000, 0x01))) + { + Store (0x00, BUFN) /* \BUFN */ + } + } + + Method (UP_L, 1, Serialized) + { + Store (Arg0, Local2) + ShiftLeft (Local2, 0x04, Local2) + MOVE (Local2) + Subtract (0x4000, Local2, Local3) + While (Local2) + { + Store (0x00, Index (MBUF, Local3)) + Increment (Local3) + Decrement (Local2) + } + } + + Method (MOVE, 1, Serialized) + { + Store (Arg0, Local4) + Store (0x00, BUFN) /* \BUFN */ + Subtract (0x4000, Local4, Local5) + While (Local5) + { + Decrement (Local5) + Store (DerefOf (Index (MBUF, Local4)), Index (MBUF, BUFN)) + Increment (BUFN) + Increment (Local4) + } + } + + Method (NTOC, 1, Serialized) + { + And (Arg0, 0x0F, Local0) + If (LLess (Local0, 0x0A)) + { + Add (Local0, 0x30, Local0) + } + Else + { + Add (Local0, 0x37, Local0) + } + + Return (Local0) + } + + Name (SS1, 0x00) + Name (SS2, 0x00) + Name (SS3, One) + One + Name (SS4, One) + One + OperationRegion (GNVS, SystemMemory, 0x5B557000, 0x0792) + Field (GNVS, AnyAcc, Lock, Preserve) + { + OSYS, 16, + SMIF, 8, + PRM0, 8, + PRM1, 8, + SCIF, 8, + PRM2, 8, + PRM3, 8, + LCKF, 8, + PRM4, 8, + PRM5, 8, + P80D, 32, + PWRS, 8, + DBGS, 8, + THOF, 8, + ACT1, 8, + ACTT, 8, + PSVT, 8, + TC1V, 8, + TC2V, 8, + TSPV, 8, + CRTT, 8, + DTSE, 8, + DTS1, 8, + DTS2, 8, + DTSF, 8, + Offset (0x1E), + BNUM, 8, + Offset (0x20), + Offset (0x21), + Offset (0x22), + Offset (0x23), + Offset (0x24), + Offset (0x25), + REVN, 8, + APIC, 8, + TCNT, 8, + PCP0, 8, + PCP1, 8, + PPCM, 8, + PPMF, 32, + C67L, 8, + NATP, 8, + CMAP, 8, + CMBP, 8, + LPTP, 8, + FDCP, 8, + CMCP, 8, + CIRP, 8, + SMSC, 8, + W381, 8, + SMC1, 8, + EMAE, 8, + EMAP, 16, + EMAL, 16, + MEFE, 8, + DSTS, 8, + MORD, 8, + TCGP, 8, + PPRP, 32, + PPRQ, 8, + LPPR, 8, + IDEM, 8, + PLID, 8, + BTYP, 8, + OSCC, 8, + NEXP, 8, + SBV1, 8, + SBV2, 8, + ECON, 8, + DSEN, 8, + GPIC, 8, + CTYP, 8, + L01C, 8, + VFN0, 8, + VFN1, 8, + VFN2, 8, + VFN3, 8, + VFN4, 8, + VFN5, 8, + VFN6, 8, + VFN7, 8, + VFN8, 8, + VFN9, 8, + ATMC, 8, + PTMC, 8, + PNHM, 32, + TBAL, 32, + TBAH, 32, + RTIP, 8, + TSOD, 8, + PFLV, 8, + BREV, 8, + PDTS, 8, + PKGA, 8, + PAMT, 8, + AC0F, 8, + AC1F, 8, + DTS3, 8, + DTS4, 8, + LTR1, 8, + LTR2, 8, + LTR3, 8, + LTR4, 8, + LTR5, 8, + LTR6, 8, + LTR7, 8, + LTR8, 8, + LTR9, 8, + LTRA, 8, + LTRB, 8, + LTRC, 8, + LTRD, 8, + LTRE, 8, + LTRF, 8, + LTRG, 8, + LTRH, 8, + LTRI, 8, + LTRJ, 8, + LTRK, 8, + LTRL, 8, + LTRM, 8, + LTRN, 8, + LTRO, 8, + OBF1, 8, + OBF2, 8, + OBF3, 8, + OBF4, 8, + OBF5, 8, + OBF6, 8, + OBF7, 8, + OBF8, 8, + OBF9, 8, + OBFA, 8, + OBFB, 8, + OBFC, 8, + OBFD, 8, + OBFE, 8, + OBFF, 8, + OBFG, 8, + OBFH, 8, + OBFI, 8, + OBFJ, 8, + OBFK, 8, + OBFL, 8, + OBFM, 8, + OBFN, 8, + OBFO, 8, + XTUB, 32, + XTUS, 32, + XMPB, 32, + DDRF, 8, + RTD3, 8, + PEP0, 8, + PEP3, 8, + DPTF, 8, + DCFE, 16, + SADE, 8, + SACR, 8, + SAHT, 8, + CPUS, 8, + CTDP, 8, + LPMP, 8, + LPMV, 8, + ECEU, 8, + TGFG, 16, + MEMD, 8, + ATRA, 8, + PTRA, 8, + MEMC, 8, + MEMH, 8, + FND1, 8, + FND2, 8, + AMBD, 8, + AMAT, 8, + AMPT, 8, + AMCT, 8, + AMHT, 8, + SKDE, 8, + SKAT, 8, + SKPT, 8, + SKCT, 8, + SKHT, 8, + EFDE, 8, + EFAT, 8, + EFPT, 8, + EFCT, 8, + EFHT, 8, + VRDE, 8, + VRAT, 8, + VRPT, 8, + VRCT, 8, + VRHT, 8, + DPAP, 8, + DPPP, 8, + DPCP, 8, + DCMP, 8, + TRTV, 8, + LPOE, 8, + LPOP, 8, + LPOS, 8, + LPOW, 8, + LPER, 8, + PPSZ, 32, + DISE, 8, + BGMA, 64, + BGMS, 8, + BGIA, 16, + IRMC, 8, + NFCE, 8, + CHEN, 8, + S0ID, 8, + CTDB, 8, + DKSM, 8, + SIO1, 16, + SIO2, 16, + SPBA, 16, + SEC0, 32, + SEC1, 32, + SEC2, 32, + SEC3, 32, + SEC4, 32, + SEC5, 32, + SEC6, 32, + SEC7, 32, + SEC8, 32, + Offset (0x1F4), + WIFD, 8, + WFAT, 8, + WFPT, 8, + WFCT, 8, + WFHT, 8, + PWRE, 8, + Offset (0x1FC), + PPPR, 16, + PBPE, 8, + VSPE, 8, + Offset (0x203), + XHPR, 8, + RIC0, 8, + GBSX, 8, + IUBE, 8, + IUCE, 8, + IUDE, 8, + ECNO, 8, + AUDD, 16, + IC0D, 16, + IC1D, 16, + IC1S, 16, + VRRD, 16, + PSCP, 8, + I20D, 16, + I21D, 16, + RCG0, 16, + RCG1, 16, + ECDB, 8, + P2ME, 8, + P2MK, 8, + SSH0, 16, + SSL0, 16, + SSD0, 16, + FMH0, 16, + FML0, 16, + FMD0, 16, + FPH0, 16, + FPL0, 16, + FPD0, 16, + SSH1, 16, + SSL1, 16, + SSD1, 16, + FMH1, 16, + FML1, 16, + FMD1, 16, + FPH1, 16, + FPL1, 16, + FPD1, 16, + M0C0, 16, + M1C0, 16, + M2C0, 16, + M0C1, 16, + M1C1, 16, + M2C1, 16, + M0C2, 16, + M1C2, 16, + M0C3, 16, + M1C3, 16, + M0C4, 16, + M1C4, 16, + M0C5, 16, + M1C5, 16, + TBSF, 8, + GIRQ, 32, + DMTP, 8, + DMTD, 8, + DMSH, 8, + SHSB, 8, + PLCS, 8, + PLVL, 16, + GN1E, 8, + G1AT, 8, + G1PT, 8, + G1CT, 8, + G1HT, 8, + GN2E, 8, + G2AT, 8, + G2PT, 8, + G2CT, 8, + G2HT, 8, + WWSD, 8, + CVSD, 8, + SSDD, 8, + INLD, 8, + IFAT, 8, + IFPT, 8, + IFCT, 8, + IFHT, 8, + SDWE, 8, + USBH, 8, + BCV4, 8, + WTV0, 8, + WTV1, 8, + APFU, 8, + SOHP, 8, + GP5F, 8, + NOHP, 8, + TBSE, 8, + WKFN, 8, + PEPC, 32, + VRSD, 16, + PB1E, 8, + GNID, 8, + WAND, 8, + WWAT, 8, + WWPT, 8, + WWCT, 8, + WWHT, 8, + Offset (0x2A3), + MPL0, 16, + CHGE, 8, + SAC3, 8, + MEM3, 8, + AMC3, 8, + SKC3, 8, + EFC3, 8, + VRC3, 8, + WFC3, 8, + G1C3, 8, + G2C3, 8, + IFC3, 8, + WWC3, 8, + WGC3, 8, + SPST, 8, + PERE, 8, + PEAT, 8, + PEPV, 8, + PECR, 8, + PEC3, 8, + PEHT, 8, + GN3E, 8, + G3AT, 8, + G3PT, 8, + G3CT, 8, + G3HT, 8, + GN4E, 8, + G4AT, 8, + G4PT, 8, + G4CT, 8, + G4HT, 8, + GN5E, 8, + G5AT, 8, + G5PT, 8, + G5CT, 8, + G5HT, 8, + GN6E, 8, + G6AT, 8, + G6PT, 8, + G6CT, 8, + G6HT, 8, + ECLP, 8, + G3C3, 8, + G4C3, 8, + G5C3, 8, + G6C3, 8, + TSP1, 8, + TSP2, 8, + TSP3, 8, + TSP4, 8, + TSP5, 8, + TSP6, 8, + TSP7, 8, + TSP8, 8, + SSP1, 8, + SSP2, 8, + SSP3, 8, + SSP4, 8, + SSP5, 8, + SSP6, 8, + SSP7, 8, + SSP8, 8, + MEMS, 8, + STGE, 8, + STAT, 8, + STPT, 8, + STCT, 8, + STC3, 8, + STHT, 8, + VSP1, 8, + V1AT, 8, + V1PV, 8, + V1CR, 8, + V1C3, 8, + V1HT, 8, + VSP2, 8, + V2AT, 8, + V2PV, 8, + V2CR, 8, + V2C3, 8, + V2HT, 8, + S1DE, 8, + S1AT, 8, + S1PT, 8, + S1CT, 8, + S1HT, 8, + S2DE, 8, + S2AT, 8, + S2PT, 8, + S2CT, 8, + S2HT, 8, + S3DE, 8, + S3AT, 8, + S3PT, 8, + S3CT, 8, + S3HT, 8, + S4DE, 8, + S4AT, 8, + S4PT, 8, + S4CT, 8, + S4HT, 8, + S5DE, 8, + S5AT, 8, + S5PT, 8, + S5CT, 8, + S5HT, 8, + S6DE, 8, + S6AT, 8, + S6PT, 8, + S6CT, 8, + S6HT, 8, + S7DE, 8, + S7AT, 8, + S7PT, 8, + S7CT, 8, + S7HT, 8, + S1S3, 8, + S2S3, 8, + S3S3, 8, + S4S3, 8, + S5S3, 8, + S6S3, 8, + S7S3, 8, + ICAE, 8, + PSME, 8, + PDT1, 8, + PLM1, 32, + PTW1, 32, + PDT2, 8, + PLM2, 32, + PTW2, 32, + DDT1, 8, + DDP1, 8, + DLI1, 16, + DPL1, 16, + DTW1, 32, + DMI1, 16, + DMA1, 16, + DMT1, 16, + DDT2, 8, + DDP2, 8, + DLI2, 16, + DPL2, 16, + DTW2, 32, + DMI2, 16, + DMA2, 16, + DMT2, 16, + WIFE, 8, + DOM1, 8, + LIM1, 16, + TIM1, 32, + DOM2, 8, + LIM2, 16, + TIM2, 32, + DOM3, 8, + LIM3, 16, + TIM3, 32, + TRD0, 8, + TRL0, 8, + TRD1, 8, + TRL1, 8, + WDM1, 8, + CID1, 16, + WDM2, 8, + CID2, 16, + Offset (0x378), + APPE, 8, + MPL1, 16, + MPL2, 16, + SDS0, 8, + SDS1, 8, + SDS2, 8, + SDS3, 8, + SDS4, 8, + SDS5, 8, + SDS6, 8, + SDS7, 8, + SDS8, 8, + SDS9, 8, + SDSA, 8, + TPLB, 8, + TPLH, 16, + WTVX, 8, + WITX, 8, + GPTD, 8, + GDBT, 16, + UTKX, 8, + SPTD, 8, + GEXN, 8, + TBTS, 8, + TBWS, 8, + AICS, 8, + TARS, 8, + FPAT, 8, + FPEN, 8, + FPGN, 32, + FPLV, 8, + CPAD, 16, + CPAB, 8, + TNAT, 8, + CPGN, 32, + CF2T, 8, + TDGS, 8, + DCSC, 8, + DCKE, 8, + UDCK, 8, + SUDK, 8, + OHPN, 8, + GHPN, 8, + EGPC, 32, + EGPV, 8, + TBDT, 32, + ATLB, 32, + SDM0, 8, + SDM1, 8, + SDM2, 8, + SDM3, 8, + SDM4, 8, + SDM5, 8, + SDM6, 8, + SDM7, 8, + SDM8, 8, + SDM9, 8, + SDMA, 8, + USTP, 8, + SSHI, 16, + SSLI, 16, + SSDI, 16, + FMHI, 16, + FMLI, 16, + FMDI, 16, + FPHI, 16, + FPLI, 16, + FPDI, 16, + M0CI, 16, + M1CI, 16, + M0CS, 16, + M1CS, 16, + M0CU, 16, + M1CU, 16, + CAMT, 8, + IVDF, 8, + IFWG, 64, + IVWS, 8, + IVPR, 8, + DIVO, 16, + DIVF, 16, + IVAD, 8, + IVRS, 8, + IVDG, 64, + DSPR, 8, + DDSO, 16, + DDSF, 16, + DSAD, 8, + DSRS, 8, + DVDG, 64, + EIDF, 8, + GFPS, 32, + GFPI, 32, + GNSM, 8, + GNSC, 8, + GGNR, 32, + GBTW, 32, + GBTK, 32, + GBTI, 32, + GPDI, 32, + GPLI, 32, + CL00, 8, + CL01, 8, + CL02, 8, + CL03, 8, + L0EN, 8, + L1EN, 8, + L2EN, 8, + L3EN, 8, + CDIV, 8, + C0TP, 8, + C0CV, 8, + C0GP, 8, + C0IB, 8, + C0IA, 16, + C0P0, 8, + C0P1, 8, + C0P2, 8, + C0P3, 8, + C0G0, 8, + C0G1, 8, + C0G2, 8, + C0G3, 8, + C0F0, 8, + C0F1, 8, + C0F2, 8, + C0F3, 8, + C0A0, 8, + C0A1, 8, + C0A2, 8, + C0A3, 8, + C0I0, 8, + C0I1, 8, + C0I2, 8, + C0I3, 8, + C0PL, 8, + C1TP, 8, + C1CV, 8, + C1GP, 8, + C1IB, 8, + C1IA, 16, + C1P0, 8, + C1P1, 8, + C1P2, 8, + C1P3, 8, + C1G0, 8, + C1G1, 8, + C1G2, 8, + C1G3, 8, + C1F0, 8, + C1F1, 8, + C1F2, 8, + C1F3, 8, + C1A0, 8, + C1A1, 8, + C1A2, 8, + C1A3, 8, + C1I0, 8, + C1I1, 8, + C1I2, 8, + C1I3, 8, + C1PL, 8, + C2TP, 8, + C2CV, 8, + C2GP, 8, + C2IB, 8, + C2IA, 16, + C2P0, 8, + C2P1, 8, + C2P2, 8, + C2P3, 8, + C2G0, 8, + C2G1, 8, + C2G2, 8, + C2G3, 8, + C2F0, 8, + C2F1, 8, + C2F2, 8, + C2F3, 8, + C2A0, 8, + C2A1, 8, + C2A2, 8, + C2A3, 8, + C2I0, 8, + C2I1, 8, + C2I2, 8, + C2I3, 8, + C2PL, 8, + C3TP, 8, + C3CV, 8, + C3GP, 8, + C3IB, 8, + C3IA, 16, + C3P0, 8, + C3P1, 8, + C3P2, 8, + C3P3, 8, + C3G0, 8, + C3G1, 8, + C3G2, 8, + C3G3, 8, + C3F0, 8, + C3F1, 8, + C3F2, 8, + C3F3, 8, + C3A0, 8, + C3A1, 8, + C3A2, 8, + C3A3, 8, + C3I0, 8, + C3I1, 8, + C3I2, 8, + C3I3, 8, + C3PL, 8, + L0SM, 8, + L0H0, 8, + L0H1, 8, + L0H2, 8, + L0H3, 8, + L0H4, 8, + L0H5, 8, + L0H6, 8, + L0H7, 8, + L0H8, 8, + L0PL, 8, + L0M0, 8, + L0M1, 8, + L0M2, 8, + L0M3, 8, + L0M4, 8, + L0M5, 8, + L0M6, 8, + L0M7, 8, + L0M8, 8, + L0M9, 8, + L0MA, 8, + L0MB, 8, + L0MC, 8, + L0MD, 8, + L0ME, 8, + L0MF, 8, + L0DI, 8, + L0BS, 8, + L0A0, 16, + L0A1, 16, + L0A2, 16, + L0A3, 16, + L0A4, 16, + L0A5, 16, + L0A6, 16, + L0A7, 16, + L0A8, 16, + L0A9, 16, + L0AA, 16, + L0AB, 16, + L0D0, 8, + L0D1, 8, + L0D2, 8, + L0D3, 8, + L0D4, 8, + L0D5, 8, + L0D6, 8, + L0D7, 8, + L0D8, 8, + L0D9, 8, + L0DA, 8, + L0DB, 8, + L0DV, 8, + L0CV, 8, + L0LU, 8, + L0NL, 8, + L0EE, 8, + L0VC, 8, + L0FS, 8, + L0DG, 8, + L0C0, 8, + L0C1, 8, + L0C2, 8, + L0C3, 8, + L0CK, 32, + L0CL, 8, + L1SM, 8, + L1H0, 8, + L1H1, 8, + L1H2, 8, + L1H3, 8, + L1H4, 8, + L1H5, 8, + L1H6, 8, + L1H7, 8, + L1H8, 8, + L1PL, 8, + L1M0, 8, + L1M1, 8, + L1M2, 8, + L1M3, 8, + L1M4, 8, + L1M5, 8, + L1M6, 8, + L1M7, 8, + L1M8, 8, + L1M9, 8, + L1MA, 8, + L1MB, 8, + L1MC, 8, + L1MD, 8, + L1ME, 8, + L1MF, 8, + L1DI, 8, + L1BS, 8, + L1A0, 16, + L1A1, 16, + L1A2, 16, + L1A3, 16, + L1A4, 16, + L1A5, 16, + L1A6, 16, + L1A7, 16, + L1A8, 16, + L1A9, 16, + L1AA, 16, + L1AB, 16, + L1D0, 8, + L1D1, 8, + L1D2, 8, + L1D3, 8, + L1D4, 8, + L1D5, 8, + L1D6, 8, + L1D7, 8, + L1D8, 8, + L1D9, 8, + L1DA, 8, + L1DB, 8, + L1DV, 8, + L1CV, 8, + L1LU, 8, + L1NL, 8, + L1EE, 8, + L1VC, 8, + L1FS, 8, + L1DG, 8, + L1C0, 8, + L1C1, 8, + L1C2, 8, + L1C3, 8, + L1CK, 32, + L1CL, 8, + L2SM, 8, + L2H0, 8, + L2H1, 8, + L2H2, 8, + L2H3, 8, + L2H4, 8, + L2H5, 8, + L2H6, 8, + L2H7, 8, + L2H8, 8, + L2PL, 8, + L2M0, 8, + L2M1, 8, + L2M2, 8, + L2M3, 8, + L2M4, 8, + L2M5, 8, + L2M6, 8, + L2M7, 8, + L2M8, 8, + L2M9, 8, + L2MA, 8, + L2MB, 8, + L2MC, 8, + L2MD, 8, + L2ME, 8, + L2MF, 8, + L2DI, 8, + L2BS, 8, + L2A0, 16, + L2A1, 16, + L2A2, 16, + L2A3, 16, + L2A4, 16, + L2A5, 16, + L2A6, 16, + L2A7, 16, + L2A8, 16, + L2A9, 16, + L2AA, 16, + L2AB, 16, + L2D0, 8, + L2D1, 8, + L2D2, 8, + L2D3, 8, + L2D4, 8, + L2D5, 8, + L2D6, 8, + L2D7, 8, + L2D8, 8, + L2D9, 8, + L2DA, 8, + L2DB, 8, + L2DV, 8, + L2CV, 8, + L2LU, 8, + L2NL, 8, + L2EE, 8, + L2VC, 8, + L2FS, 8, + L2DG, 8, + L2C0, 8, + L2C1, 8, + L2C2, 8, + L2C3, 8, + L2CK, 32, + L2CL, 8, + L3SM, 8, + L3H0, 8, + L3H1, 8, + L3H2, 8, + L3H3, 8, + L3H4, 8, + L3H5, 8, + L3H6, 8, + L3H7, 8, + L3H8, 8, + L3PL, 8, + L3M0, 8, + L3M1, 8, + L3M2, 8, + L3M3, 8, + L3M4, 8, + L3M5, 8, + L3M6, 8, + L3M7, 8, + L3M8, 8, + L3M9, 8, + L3MA, 8, + L3MB, 8, + L3MC, 8, + L3MD, 8, + L3ME, 8, + L3MF, 8, + L3DI, 8, + L3BS, 8, + L3A0, 16, + L3A1, 16, + L3A2, 16, + L3A3, 16, + L3A4, 16, + L3A5, 16, + L3A6, 16, + L3A7, 16, + L3A8, 16, + L3A9, 16, + L3AA, 16, + L3AB, 16, + L3D0, 8, + L3D1, 8, + L3D2, 8, + L3D3, 8, + L3D4, 8, + L3D5, 8, + L3D6, 8, + L3D7, 8, + L3D8, 8, + L3D9, 8, + L3DA, 8, + L3DB, 8, + L3DV, 8, + L3CV, 8, + L3LU, 8, + L3NL, 8, + L3EE, 8, + L3VC, 8, + L3FS, 8, + L3DG, 8, + L3C0, 8, + L3C1, 8, + L3C2, 8, + L3C3, 8, + L3CK, 32, + L3CL, 8, + ECR1, 8, + Offset (0x60E), + I2SC, 8, + ODV0, 8, + ODV1, 8, + ODV2, 8, + ODV3, 8, + ODV4, 8, + ODV5, 8, + UBCB, 32, + EMOD, 8, + WIFC, 8, + Offset (0x622), + TPLS, 8, + TPDB, 8, + TPDH, 16, + TPDS, 8, + ADPM, 32, + AG1L, 64, + AG1H, 64, + AG2L, 64, + AG2H, 64, + AG3L, 64, + AG3H, 64, + HEFE, 8, + XDCE, 8, + STXE, 8, + STX0, 8, + STX1, 8, + STX2, 8, + STX3, 8, + STX4, 8, + STX5, 8, + STX6, 8, + STX7, 8, + STX8, 8, + STX9, 8, + RTVM, 8, + USTC, 8, + BATP, 8, + TSDB, 8, + DEPC, 8, + PDFC, 8, + IVCM, 8, + HEB1, 32, + RBY1, 8, + RBY2, 8, + SCSS, 8, + HAID, 8, + NCTC, 8, + NCTI, 8, + NCTH, 8, + HSIO, 8, + TPPT, 8, + SHAP, 8, + EIAP, 8, + ZPOD, 8, + SRSP, 32, + CEDS, 8, + EHK3, 8, + EHK4, 8, + EHK5, 8, + EHK6, 8, + EHK7, 8, + EHK8, 8, + VBVP, 8, + VBVD, 8, + VBHB, 8, + VBRL, 8, + SMSS, 8, + VBST, 8, + ADAS, 8, + PPBG, 32, + AEAB, 8, + AHDB, 8, + PBSD, 8, + DPLL, 8, + DPHL, 8, + PWIG, 8, + MESE, 8, + ICAT, 8, + ICPV, 8, + ICCR, 8, + ICC3, 8, + ICHT, 8, + XSMI, 32, + PAPE, 32, + PSTW, 32, + MWLR, 32, + UP8P, 32, + MS2R, 32, + MS2P, 32, + UCSI, 8, + UCG1, 32, + UCG2, 32, + WGUR, 32, + WRFE, 8, + WRC1, 8, + WRC2, 8, + WRC3, 8, + WRC4, 8, + AWVI, 32, + Offset (0x6E0), + WTSP, 8, + WGWS, 8, + PIDE, 8, + C0VE, 8, + C0W0, 8, + C0W1, 8, + C0W2, 8, + C0W3, 8, + C0W4, 8, + C0W5, 8, + C1VE, 8, + C1W0, 8, + C1W1, 8, + C1W2, 8, + C1W3, 8, + C1W4, 8, + C1W5, 8, + C2VE, 8, + C2W0, 8, + C2W1, 8, + C2W2, 8, + C2W3, 8, + C2W4, 8, + C2W5, 8, + C3VE, 8, + C3W0, 8, + C3W1, 8, + C3W2, 8, + C3W3, 8, + C3W4, 8, + C3W5, 8, + L0LE, 8, + L0PP, 8, + L0VR, 8, + L1LE, 8, + L1PP, 8, + L1VR, 8, + L2LE, 8, + L2PP, 8, + L2VR, 8, + L3LE, 8, + L3PP, 8, + L3VR, 8, + WLRP, 8, + SSRP, 8, + WIPR, 8, + TBS1, 8, + TBMP, 8, + FPA1, 8, + FPE1, 8, + FPG1, 32, + FP1L, 8, + CPD1, 16, + CPB1, 8, + CPG1, 32, + UTCM, 8, + USME, 8, + UPT1, 8, + UPT2, 8, + TWIN, 8, + TRWA, 8, + PEWE, 8, + ODV6, 8, + ODV7, 8, + ODV8, 8, + ODV9, 8, + ODVA, 8, + ODVB, 8, + ODVC, 8, + ODVD, 8, + ODVE, 8, + ODVF, 8, + ODVG, 8, + ODVH, 8, + ODVI, 8, + ODVJ, 8, + Offset (0x74E), + ELPM, 32, + ELPS, 32, + Offset (0x758), + UCRT, 8, + TBOD, 16, + TSXW, 8, + VRGP, 32, + PVSC, 8, + RTBT, 8, + RTBC, 8, + TBCD, 16, + TBTE, 8, + RWAN, 8, + WDCT, 16, + WLCT, 16, + WDC2, 16, + WMXS, 16, + WMNS, 16, + STY0, 8 + } + + Scope (\_SB) + { + Name (PR00, Package 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0x00004000, // Length + ,, _Y07, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000DC000, // Range Minimum + 0x000DFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y08, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000E0000, // Range Minimum + 0x000E3FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y09, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000E4000, // Range Minimum + 0x000E7FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y0A, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000E8000, // Range Minimum + 0x000EBFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y0B, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000EC000, // Range Minimum + 0x000EFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y0C, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000F0000, // Range Minimum + 0x000FFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00010000, // Length + ,, _Y0D, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xDFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xE0000000, // Length + ,, _Y0E, AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000010000, // Range Minimum + 0x000000000001FFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000000010000, // Length + ,, _Y0F, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xFD000000, // Range Minimum + 0xFE7FFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x01800000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + If (LGreaterEqual (TLUD, 0x0404)) + { + Device (SRRE) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_UID, "SARESV") // _UID: Unique ID + Name (_STA, 0x03) // _STA: Status + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadOnly, + 0x40000000, // Address Base + 0x00400000, // Address Length + ) + }) + Return (BUF0) /* \_SB_.PCI0.SRRE._CRS.BUF0 */ + } + } + } + + Name (EP_B, 0x00) + Name (MH_B, 0x00) + Name (PC_B, 0x00) + Name (PC_L, 0x00) + Name (DM_B, 0x00) + Method (GEPB, 0, Serialized) + { + If (LEqual (EP_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.EPBR, 0x0C, EP_B) /* \_SB_.PCI0.EP_B */ + } + + Return (EP_B) /* \_SB_.PCI0.EP_B */ + } + + Method (GMHB, 0, Serialized) + { + If (LEqual (MH_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.MHBR, 0x0F, MH_B) /* \_SB_.PCI0.MH_B */ + } + + Return (MH_B) /* \_SB_.PCI0.MH_B */ + } + + Method (GPCB, 0, Serialized) + { + If (LEqual (PC_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.PXBR, 0x1A, PC_B) /* \_SB_.PCI0.PC_B */ + } + + Return (PC_B) /* \_SB_.PCI0.PC_B */ + } + + Method (GPCL, 0, Serialized) + { + If (LEqual (PC_L, 0x00)) + { + ShiftRight (0x10000000, \_SB.PCI0.PXSZ, PC_L) /* \_SB_.PCI0.PC_L */ + } + + Return (PC_L) /* \_SB_.PCI0.PC_L */ + } + + Method (GDMB, 0, Serialized) + { + If (LEqual (DM_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.DIBR, 0x0C, DM_B) /* \_SB_.PCI0.DM_B */ + } + + Return (DM_B) /* \_SB_.PCI0.DM_B */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Store (\_SB.PCI0.GPCL (), Local0) + CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address + Store (Subtract (ShiftRight (Local0, 0x14), 0x02), PBMX) /* \_SB_.PCI0._CRS.PBMX */ + CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length + Store (Subtract (ShiftRight (Local0, 0x14), 0x01), PBLN) /* \_SB_.PCI0._CRS.PBLN */ + If (PM1L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length + Store (Zero, C0LN) /* \_SB_.PCI0._CRS.C0LN */ + } + + If (LEqual (PM1L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status + Store (Zero, C0RW) /* \_SB_.PCI0._CRS.C0RW */ + } + + If (PM1H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length + Store (Zero, C4LN) /* \_SB_.PCI0._CRS.C4LN */ + } + + If (LEqual (PM1H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status + Store (Zero, C4RW) /* \_SB_.PCI0._CRS.C4RW */ + } + + If (PM2L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length + Store (Zero, C8LN) /* \_SB_.PCI0._CRS.C8LN */ + } + + If (LEqual (PM2L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status + Store (Zero, C8RW) /* \_SB_.PCI0._CRS.C8RW */ + } + + If (PM2H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length + Store (Zero, CCLN) /* \_SB_.PCI0._CRS.CCLN */ + } + + If (LEqual (PM2H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status + Store (Zero, CCRW) /* \_SB_.PCI0._CRS.CCRW */ + } + + If (PM3L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length + Store (Zero, D0LN) /* \_SB_.PCI0._CRS.D0LN */ + } + + If (LEqual (PM3L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status + Store (Zero, D0RW) /* \_SB_.PCI0._CRS.D0RW */ + } + + If (PM3H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length + Store (Zero, D4LN) /* \_SB_.PCI0._CRS.D4LN */ + } + + If (LEqual (PM3H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status + Store (Zero, D4RW) /* \_SB_.PCI0._CRS.D4RW */ + } + + If (PM4L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length + Store (Zero, D8LN) /* \_SB_.PCI0._CRS.D8LN */ + } + + If (LEqual (PM4L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status + Store (Zero, D8RW) /* \_SB_.PCI0._CRS.D8RW */ + } + + If (PM4H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length + Store (Zero, DCLN) /* \_SB_.PCI0._CRS.DCLN */ + } + + If (LEqual (PM4H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status + Store (Zero, DCRW) /* \_SB_.PCI0._CRS.DCRW */ + } + + If (PM5L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length + Store (Zero, E0LN) /* \_SB_.PCI0._CRS.E0LN */ + } + + If (LEqual (PM5L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status + Store (Zero, E0RW) /* \_SB_.PCI0._CRS.E0RW */ + } + + If (PM5H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length + Store (Zero, E4LN) /* \_SB_.PCI0._CRS.E4LN */ + } + + If (LEqual (PM5H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status + Store (Zero, E4RW) /* \_SB_.PCI0._CRS.E4RW */ + } + + If (PM6L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length + Store (Zero, E8LN) /* \_SB_.PCI0._CRS.E8LN */ + } + + If (LEqual (PM6L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status + Store (Zero, E8RW) /* \_SB_.PCI0._CRS.E8RW */ + } + + If (PM6H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length + Store (Zero, ECLN) /* \_SB_.PCI0._CRS.ECLN */ + } + + If (LEqual (PM6H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status + Store (Zero, ECRW) /* \_SB_.PCI0._CRS.ECRW */ + } + + If (PM0H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length + Store (Zero, F0LN) /* \_SB_.PCI0._CRS.F0LN */ + } + + If (LEqual (PM0H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status + Store (Zero, F0RW) /* \_SB_.PCI0._CRS.F0RW */ + } + + CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address + CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address + CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length + Store (M32L, M1LN) /* \_SB_.PCI0._CRS.M1LN */ + Store (M32B, M1MN) /* \_SB_.PCI0._CRS.M1MN */ + Subtract (Add (M1MN, M1LN), 0x01, M1MX) /* \_SB_.PCI0._CRS.M1MX */ + If (LEqual (M64L, 0x00)) + { + CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, MSLN) // _LEN: Length + Store (0x00, MSLN) /* \_SB_.PCI0._CRS.MSLN */ + } + Else + { + CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, M2LN) // _LEN: Length + CreateQWordField (BUF0, \_SB.PCI0._Y0F._MIN, M2MN) // _MIN: Minimum Base Address + CreateQWordField (BUF0, \_SB.PCI0._Y0F._MAX, M2MX) // _MAX: Maximum Base Address + Store (M64L, M2LN) /* \_SB_.PCI0._CRS.M2LN */ + Store (M64B, M2MN) /* \_SB_.PCI0._CRS.M2MN */ + Subtract (Add (M2MN, M2LN), 0x01, M2MX) /* \_SB_.PCI0._CRS.M2MX */ + } + + Return (BUF0) /* \_SB_.PCI0.BUF0 */ + } + + Name (GUID, ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */) + Name (SUPP, 0x00) + Name (CTRL, 0x00) + Name (XCNT, 0x00) + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Store (Arg3, Local0) + CreateDWordField (Local0, 0x00, CDW1) + CreateDWordField (Local0, 0x04, CDW2) + CreateDWordField (Local0, 0x08, CDW3) + If (LEqual (Arg0, GUID)) + { + Store (CDW2, SUPP) /* \_SB_.PCI0.SUPP */ + Store (CDW3, CTRL) /* \_SB_.PCI0.CTRL */ + If (LEqual (NEXP, 0x00)) + { + And (CTRL, 0xFFFFFFE0, CTRL) /* \_SB_.PCI0.CTRL */ + } + ElseIf (LEqual (TBTS, 0x01)) + { + And (CTRL, 0xFFFFFFF7, CTRL) /* \_SB_.PCI0.CTRL */ + } + + If (Not (And (CDW1, 0x01))) + { + If (And (CTRL, 0x01)) + { + NHPG () + } + + If (And (CTRL, 0x04)) + { + NPME () + } + } + + If (LNotEqual (Arg1, One)) + { + Or (CDW1, 0x08, CDW1) /* \_SB_.PCI0._OSC.CDW1 */ + } + + If (LNotEqual (CDW3, CTRL)) + { + Or (CDW1, 0x10, CDW1) /* \_SB_.PCI0._OSC.CDW1 */ + } + + Store (CTRL, CDW3) /* \_SB_.PCI0._OSC.CDW3 */ + Store (CTRL, OSCC) /* \OSCC */ + Return (Local0) + } + Else + { + Or (CDW1, 0x04, CDW1) /* \_SB_.PCI0._OSC.CDW1 */ + Return (Local0) + } + } + + Scope (\_SB.PCI0) + { + Method (AR00, 0, NotSerialized) + { + Return (\_SB.AR00) + } + + Method (PR00, 0, NotSerialized) + { + Return (\_SB.PR00) + } + + Method (AR02, 0, NotSerialized) + { + Return (\_SB.AR02) + } + + Method (PR02, 0, NotSerialized) + { + Return (\_SB.PR02) + } + + Method (AR04, 0, NotSerialized) + { + Return (\_SB.AR04) + } + + Method (PR04, 0, NotSerialized) + { + Return (\_SB.PR04) + } + + Method (AR05, 0, NotSerialized) + { + Return (\_SB.AR05) + } + + Method (PR05, 0, NotSerialized) + { + Return (\_SB.PR05) + } + + Method (AR06, 0, NotSerialized) + { + Return (\_SB.AR06) + } + + Method (PR06, 0, NotSerialized) + { + Return (\_SB.PR06) + } + + Method (AR07, 0, NotSerialized) + { + Return (\_SB.AR07) + } + + Method (PR07, 0, NotSerialized) + { + Return (\_SB.PR07) + } + + Method (AR08, 0, NotSerialized) + { + Return (\_SB.AR08) + } + + Method (PR08, 0, NotSerialized) + { + Return (\_SB.PR08) + } + + Method (AR09, 0, NotSerialized) + { + Return (\_SB.AR09) + } + + Method (PR09, 0, NotSerialized) + { + Return (\_SB.PR09) + } + + Method (AR0A, 0, NotSerialized) + { + Return (\_SB.AR0A) + } + + Method (PR0A, 0, NotSerialized) + { + Return (\_SB.PR0A) + } + + Method (AR0B, 0, NotSerialized) + { + Return (\_SB.AR0B) + } + + Method (PR0B, 0, NotSerialized) + { + Return (\_SB.PR0B) + } + + Device (PEG0) + { + Name (_ADR, 0x00010000) // _ADR: Address + Device (PEGP) + { + Name (_ADR, 0x00) // _ADR: Address + } + } + + Device (PEG1) + { + Name (_ADR, 0x00010001) // _ADR: Address + Device (PEGP) + { + Name (_ADR, 0x00) // _ADR: Address + } + } + + Device (PEG2) + { + Name (_ADR, 0x00010002) // _ADR: Address + Device (PEGP) + { + Name (_ADR, 0x00) // _ADR: Address + } + } + + Device (GFX0) + { + Name (_ADR, 0x00020000) // _ADR: Address + } + + Device (B0D4) + { + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Name (_ADR, 0x00040000) // _ADR: Address + } + + Device (ISP0) + { + Name (_ADR, 0x00050000) // _ADR: Address + } + } + } + } + + If (LEqual (ECR1, 0x01)) + { + Scope (\_SB.PCI0) + { + Name (PCIG, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */) + Method (PCID, 4, Serialized) + { + If (LEqual (Arg0, PCIG)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + If (LEqual (Arg2, 0x00)) + { + Return (Buffer (0x02) + { + 0x01, 0x03 // .. + }) + } + + If (LEqual (Arg2, 0x08)) + { + Return (0x01) + } + + If (LEqual (Arg2, 0x09)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + + Scope (\_SB.PCI0) + { + Method (PCIC, 1, Serialized) + { + If (LEqual (ECR1, 0x01)) + { + If (LEqual (Arg0, PCIG)) + { + Return (0x01) + } + } + + Return (0x00) + } + } + + Name (PNVB, 0x5B567018) + Name (PNVL, 0x0287) + OperationRegion (PNVA, SystemMemory, PNVB, PNVL) + Field (PNVA, AnyAcc, Lock, Preserve) + { + PCHS, 16, + PCHG, 16, + RPA1, 32, + RPA2, 32, + RPA3, 32, + RPA4, 32, + RPA5, 32, + RPA6, 32, + RPA7, 32, + RPA8, 32, + RPA9, 32, + RPAA, 32, + RPAB, 32, + RPAC, 32, + RPAD, 32, + RPAE, 32, + RPAF, 32, + RPAG, 32, + RPAH, 32, + RPAI, 32, + RPAJ, 32, + RPAK, 32, + RPAL, 32, + RPAM, 32, + RPAN, 32, + RPAO, 32, + NHLA, 64, + NHLL, 32, + ADFM, 32, + SBRG, 32, + GPEM, 32, + G2L0, 32, + G2L1, 32, + G2L2, 32, + G2L3, 32, + G2L4, 32, + G2L5, 32, + G2L6, 32, + G2L7, 32, + G2L8, 32, + G2L9, 32, + PML1, 16, + PML2, 16, + PML3, 16, + PML4, 16, + PML5, 16, + PML6, 16, + PML7, 16, + PML8, 16, + PML9, 16, + PMLA, 16, + PMLB, 16, + PMLC, 16, + PMLD, 16, + PMLE, 16, + PMLF, 16, + PMLG, 16, + PMLH, 16, + PMLI, 16, + PMLJ, 16, + PMLK, 16, + PMLL, 16, + PMLM, 16, + PMLN, 16, + PMLO, 16, + PNL1, 16, + PNL2, 16, + PNL3, 16, + PNL4, 16, + PNL5, 16, + PNL6, 16, + PNL7, 16, + PNL8, 16, + PNL9, 16, + PNLA, 16, + PNLB, 16, + PNLC, 16, + PNLD, 16, + PNLE, 16, + PNLF, 16, + PNLG, 16, + PNLH, 16, + PNLI, 16, + PNLJ, 16, + PNLK, 16, + PNLL, 16, + PNLM, 16, + PNLN, 16, + PNLO, 16, + U0C0, 32, + U1C0, 32, + XHPC, 8, + XRPC, 8, + XSPC, 8, + XSPA, 8, + HPTB, 32, + HPTE, 8, + SMD0, 8, + SMD1, 8, + SMD2, 8, + SMD3, 8, + SMD4, 8, + SMD5, 8, + SMD6, 8, + SMD7, 8, + SMD8, 8, + SMD9, 8, + SMDA, 8, + SIR0, 8, + SIR1, 8, + SIR2, 8, + SIR3, 8, + SIR4, 8, + SIR5, 8, + SIR6, 8, + SIR7, 8, + SIR8, 8, + SIR9, 8, + SIRA, 8, + SB00, 64, + SB01, 64, + SB02, 64, + SB03, 64, + SB04, 64, + SB05, 64, + SB06, 64, + SB07, 64, + SB08, 64, + SB09, 64, + SB0A, 64, + SB10, 64, + SB11, 64, + SB12, 64, + SB13, 64, + SB14, 64, + SB15, 64, + SB16, 64, + SB17, 64, + SB18, 64, + SB19, 64, + SB1A, 64, + GPEN, 8, + SGIR, 8, + NIT1, 8, + NIT2, 8, + NIT3, 8, + NPM1, 8, + NPM2, 8, + NPM3, 8, + NPC1, 8, + NPC2, 8, + NPC3, 8, + NL11, 16, + NL12, 16, + NL13, 16, + ND21, 8, + ND22, 8, + ND23, 8, + ND11, 32, + ND12, 32, + ND13, 32, + NLR1, 16, + NLR2, 16, + NLR3, 16, + NLD1, 32, + NLD2, 32, + NLD3, 32, + NEA1, 16, + NEA2, 16, + NEA3, 16, + NEB1, 16, + NEB2, 16, + NEB3, 16, + NEC1, 16, + NEC2, 16, + NEC3, 16, + NRA1, 16, + NRA2, 16, + NRA3, 16, + NMB1, 32, + NMB2, 32, + NMB3, 32, + NMV1, 32, + NMV2, 32, + NMV3, 32, + NPB1, 32, + NPB2, 32, + NPB3, 32, + NPV1, 32, + NPV2, 32, + NPV3, 32, + NRP1, 32, + NRP2, 32, + NRP3, 32, + Offset (0x262), + SXRB, 32, + SXRS, 32, + CIOE, 8, + CIOI, 8, + TAEN, 8, + TIRQ, 8, + XWMB, 32, + EMH4, 8, + EMDS, 8, + CSKU, 8, + ITA0, 16, + ITA1, 16, + ITA2, 16, + ITA3, 16, + ITS0, 8, + ITS1, 8, + ITS2, 8, + ITS3, 8, + PMBS, 16, + PWRM, 32 + } + + Scope (\_SB) + { + Name (GPCL, Package (0x08) + { + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x04C0, + 0xD4, + 0x30, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x04C0, + 0xD4, + 0x30, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0580, + 0xD8, + 0x40, + 0x0148 + }, + + Package (0x06) + { + 0x00AC0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AC0000, + 0x08, + 0x04C0, + 0xD4, + 0x30, + 0x0144 + }, + + Package (0x06) + { + 0x00AD0000, + 0x0C, + 0x0400, + 0xD0, + 0x20, + 0x0140 + } + }) + Name (GPCH, Package (0x0A) + { + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x04C0, + 0xD4, + 0x2C, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x04C0, + 0xD4, + 0x2C, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x0D, + 0x0580, + 0xD8, + 0x38, + 0x0148 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x05E8, + 0xDC, + 0x40, + 0x014C + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x06A8, + 0xE0, + 0x4C, + 0x0150 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0768, + 0xE4, + 0x58, + 0x0154 + }, + + Package (0x06) + { + 0x00AC0000, + 0x0B, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AD0000, + 0x0C, + 0x0400, + 0xD0, + 0x20, + 0x0140 + } + }) + Name (RXEV, Package (0x0A) + { + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x0B){}, + Buffer (0x0C){} + }) + } + + Scope (\_SB) + { + Method (GINF, 2, NotSerialized) + { + If (LEqual (PCHS, SPTL)) + { + Return (DerefOf (Index (DerefOf (Index (GPCL, Arg0)), Arg1))) + } + Else + { + Return (DerefOf (Index (DerefOf (Index (GPCH, Arg0)), Arg1))) + } + } + + Method (GMXG, 0, NotSerialized) + { + If (LEqual (PCHS, SPTL)) + { + Return (0x08) + } + Else + { + Return (0x0A) + } + } + + Method (GADR, 2, NotSerialized) + { + Store (Add (GINF (Arg0, 0x00), SBRG), Local0) + Store (GINF (Arg0, Arg1), Local1) + Return (Add (Local0, Local1)) + } + + Method (GNUM, 1, NotSerialized) + { + Store (GNMB (Arg0), Local0) + Store (GGRP (Arg0), Local1) + Return (Add (Local0, Multiply (Local1, 0x18))) + } + + Method (INUM, 1, NotSerialized) + { + Store (GNMB (Arg0), Local1) + Store (GGRP (Arg0), Local2) + Store (0x00, Local3) + While (LLess (Local3, Local2)) + { + Add (GINF (Local3, 0x01), Local1, Local1) + Increment (Local3) + } + + Return (Add (0x18, Mod (Local1, 0x60))) + } + + Method (GGRP, 1, Serialized) + { + ShiftRight (And (Arg0, 0x00FF0000), 0x10, Local0) + Return (Local0) + } + + Method (GNMB, 1, Serialized) + { + Return (And (Arg0, 0xFFFF)) + } + + Method (GGPE, 1, NotSerialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + If (LEqual (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03), + 0x00)) + { + Return (0x6F) + } + Else + { + Store (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03), Local2) + Return (Add (Multiply (Subtract (Local2, 0x01), 0x20), Local1)) + } + } + + Method (GPC0, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) /* \_SB_.GPC0.TEMP */ + } + + Method (SPC0, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg1, TEMP) /* \_SB_.SPC0.TEMP */ + } + + Method (GPC1, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), 0x04 + ), Local2) + OperationRegion (PDW1, SystemMemory, Local2, 0x04) + Field (PDW1, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) /* \_SB_.GPC1.TEMP */ + } + + Method (SPC1, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), 0x04 + ), Local2) + OperationRegion (PDW1, SystemMemory, Local2, 0x04) + Field (PDW1, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg1, TEMP) /* \_SB_.SPC1.TEMP */ + } + + Method (SRXO, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 28, + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) /* \_SB_.SRXO.TEMP */ + } + + Method (GGIV, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 1, + TEMP, 1, + Offset (0x04) + } + + Return (TEMP) /* \_SB_.GGIV.TEMP */ + } + + Method (GGOV, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 1, + Offset (0x04) + } + + Return (TEMP) /* \_SB_.GGOV.TEMP */ + } + + Method (SGOV, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) /* \_SB_.SGOV.TEMP */ + } + + Method (GGII, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 23, + TEMP, 1, + Offset (0x04) + } + + Return (TEMP) /* \_SB_.GGII.TEMP */ + } + + Method (SGII, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 23, + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) /* \_SB_.SGII.TEMP */ + } + + Method (GPMV, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 10, + TEMP, 3, + Offset (0x04) + } + + Return (TEMP) /* \_SB_.GPMV.TEMP */ + } + + Method (SPMV, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 10, + TEMP, 3, + Offset (0x04) + } + + Store (Arg1, TEMP) /* \_SB_.SPMV.TEMP */ + } + + Method (GHPO, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Add (GADR (Local0, 0x03), Multiply (ShiftRight (Local1, 0x05), 0x04), Local3) + And (Local1, 0x1F, Local4) + OperationRegion (PREG, SystemMemory, Local3, 0x04) + Field (PREG, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (And (ShiftRight (TEMP, Local4), 0x01)) + } + + Method (SHPO, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Add (GADR (Local0, 0x03), Multiply (ShiftRight (Local1, 0x05), 0x04), Local3) + And (Local1, 0x1F, Local4) + OperationRegion (PREG, SystemMemory, Local3, 0x04) + Field (PREG, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + If (Arg1) + { + Or (TEMP, ShiftLeft (0x01, Local4), TEMP) /* \_SB_.SHPO.TEMP */ + } + Else + { + And (TEMP, Not (ShiftLeft (0x01, Local4)), TEMP) /* \_SB_.SHPO.TEMP */ + } + } + + Method (GGPO, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x04), Multiply (ShiftRight (Local1, 0x03), 0x04) + ), Local2) + OperationRegion (PREG, SystemMemory, Local2, 0x04) + Field (PREG, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (And (ShiftRight (TEMP, Multiply (And (Local1, 0x07), 0x04)), + 0x03)) + } + + Method (SGRA, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 20, + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) /* \_SB_.SGRA.TEMP */ + } + + Method (SGWP, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), 0x04 + ), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 10, + TEMP, 4, + Offset (0x04) + } + + Store (Arg1, TEMP) /* \_SB_.SGWP.TEMP */ + } + + Method (UGPS, 0, Serialized) + { + } + + Method (CGPS, 0, Serialized) + { + } + + Method (CGLS, 0, Serialized) + { + } + + Method (CAGS, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Multiply (ShiftRight (Local1, 0x05), 0x04, Local4) + If (LEqual (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03), + 0x00)) + { + OperationRegion (GPPX, SystemMemory, Add (GADR (Local0, 0x05), Local4), 0x04) + Field (GPPX, AnyAcc, NoLock, Preserve) + { + STSX, 32 + } + + ShiftLeft (0x01, Mod (Local1, 0x20), Local2) + Store (Local2, STSX) /* \_SB_.CAGS.STSX */ + } + } + + Method (ISME, 1, NotSerialized) + { + If (LNotEqual (And (ShiftRight (GPEM, Multiply (Arg0, 0x02)), 0x03 + ), 0x00)) + { + Return (0x00) + } + + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Add (GADR (Local0, 0x05), Multiply (ShiftRight (Local1, 0x05), 0x04), Local2) + And (Local1, 0x1F, Local3) + OperationRegion (GPPX, SystemMemory, Local2, 0x24) + Field (GPPX, AnyAcc, NoLock, Preserve) + { + STSX, 32, + Offset (0x20), + GENX, 32 + } + + Return (And (ShiftRight (And (STSX, GENX), Local3), 0x01)) + } + + Method (DIPI, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 9, + RDIS, 1, + , 15, + RCFG, 2, + Offset (0x04) + } + + If (LNotEqual (RCFG, 0x02)) + { + Store (RCFG, Index (DerefOf (Index (RXEV, Local0)), Local1)) + Store (0x02, RCFG) /* \_SB_.DIPI.RCFG */ + Store (0x01, RDIS) /* \_SB_.DIPI.RDIS */ + } + } + + Method (UIPI, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 9, + RDIS, 1, + , 15, + RCFG, 2, + Offset (0x04) + } + + Store (DerefOf (Index (DerefOf (Index (RXEV, Local0)), Local1)), Local3) + If (LNotEqual (Local3, 0x02)) + { + Store (0x00, RDIS) /* \_SB_.UIPI.RDIS */ + Store (Local3, RCFG) /* \_SB_.UIPI.RCFG */ + } + } + } + + Scope (\) + { + Method (THEN, 0, Serialized) + { + OperationRegion (THBA, SystemMemory, 0xFE200000, 0x10) + Field (THBA, DWordAcc, NoLock, Preserve) + { + DO00, 32 + } + + Return (LNotEqual (DO00, 0xFFFFFFFF)) + } + + Method (THDA, 2, Serialized) + { + Store (0xFE200000, Local0) + Add (Local0, Multiply (0x40, Multiply (0x80, Subtract (Arg0, 0x20))), + Local0) + Add (Local0, Multiply (0x40, Arg1), Local0) + Return (Local0) + } + + Method (STRD, 3, Serialized) + { + If (LGreater (Add (Arg1, Arg2), SizeOf (Arg0))) + { + Return (0x00) + } + + ToBuffer (Arg0, Local3) + Store (0x00, Local0) + Store (0x00, Local1) + While (LLess (Local1, Arg2)) + { + Store (DerefOf (Index (Local3, Add (Arg1, Local1))), Local2) + Add (Local0, ShiftLeft (Local2, Multiply (0x08, Local1)), Local0) + Increment (Local1) + } + + Return (Local0) + } + + Method (THDS, 1, Serialized) + { + If (LNot (THEN ())) + { + Return (Zero) + } + + Concatenate (Arg0, "\n", Local2) + Store (SizeOf (Local2), Local0) + Store (THDA (0x20, 0x16), Local1) + OperationRegion (THBA, SystemMemory, Local1, 0x40) + Field (THBA, QWordAcc, NoLock, Preserve) + { + QO00, 64 + } + + Field (THBA, DWordAcc, NoLock, Preserve) + { + DO00, 32, + Offset (0x10), + DO10, 32, + Offset (0x30), + DO30, 32 + } + + Field (THBA, WordAcc, NoLock, Preserve) + { + WO00, 16 + } + + Field (THBA, ByteAcc, NoLock, Preserve) + { + BO00, 8 + } + + Store (0x01000242, DO10) /* \THDS.DO10 */ + Store (Local0, WO00) /* \THDS.WO00 */ + Store (0x00, Local6) + Store (Local0, Local7) + While (LGreaterEqual (Local7, 0x08)) + { + Store (STRD (Local2, Local6, 0x08), QO00) /* \THDS.QO00 */ + Add (Local6, 0x08, Local6) + Subtract (Local7, 0x08, Local7) + } + + If (LGreaterEqual (Local7, 0x04)) + { + Store (STRD (Local2, Local6, 0x04), DO00) /* \THDS.DO00 */ + Add (Local6, 0x04, Local6) + Subtract (Local7, 0x04, Local7) + } + + If (LGreaterEqual (Local7, 0x02)) + { + Store (STRD (Local2, Local6, 0x02), WO00) /* \THDS.WO00 */ + Add (Local6, 0x02, Local6) + Subtract (Local7, 0x02, Local7) + } + + If (LGreaterEqual (Local7, 0x01)) + { + Store (STRD (Local2, Local6, 0x01), BO00) /* \THDS.BO00 */ + Add (Local6, 0x01, Local6) + Subtract (Local7, 0x01, Local7) + } + + Store (0x00, DO30) /* \THDS.DO30 */ + } + + Method (THDH, 1, Serialized) + { + THDS (ToHexString (Arg0)) + } + + Method (THDD, 1, Serialized) + { + THDS (ToDecimalString (Arg0)) + } + } + + Name (SPTH, 0x01) + Name (SPTL, 0x02) + Method (PCHV, 0, NotSerialized) + { + If (LEqual (PCHS, 0x01)) + { + Return (SPTH) /* \SPTH */ + } + + If (LEqual (PCHS, 0x02)) + { + Return (SPTL) /* \SPTL */ + } + + Return (0x00) + } + + Scope (\_GPE) + { + Method (_L6D, 0, Serialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + \_SB.PCI0.XHC.GPEH () + \_SB.PCI0.HDAS.GPEH () + \_SB.PCI0.GLAN.GPEH () + \_SB.PCI0.XDCI.GPEH () + } + } + + Scope (\_SB.PCI0) + { + Name (TEMP, 0x00) + Device (PRRE) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_UID, "PCHRESV") // _UID: Unique ID + Name (_STA, 0x03) // _STA: Status + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0xFD000000, // Address Base + 0x00AC0000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFDAD0000, // Address Base + 0x00010000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFDB00000, // Address Base + 0x00500000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE000000, // Address Base + 0x00020000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE036000, // Address Base + 0x00006000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE03D000, // Address Base + 0x003C3000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE410000, // Address Base + 0x003F0000, // Address Length + ) + }) + Return (BUF0) /* \_SB_.PCI0.PRRE._CRS.BUF0 */ + } + } + + Device (IOTR) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_UID, "IoTraps") // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Store (Buffer (0x02) + { + 0x79, 0x00 // y. + }, Local0) + Name (BUF0, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y10) + }) + Name (BUF1, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y11) + }) + Name (BUF2, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y12) + }) + Name (BUF3, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y13) + }) + CreateWordField (BUF0, \_SB.PCI0.IOTR._CRS._Y10._MIN, AMI0) // _MIN: Minimum Base Address + CreateWordField (BUF0, \_SB.PCI0.IOTR._CRS._Y10._MAX, AMA0) // _MAX: Maximum Base Address + CreateWordField (BUF1, \_SB.PCI0.IOTR._CRS._Y11._MIN, AMI1) // _MIN: Minimum Base Address + CreateWordField (BUF1, \_SB.PCI0.IOTR._CRS._Y11._MAX, AMA1) // _MAX: Maximum Base Address + CreateWordField (BUF2, \_SB.PCI0.IOTR._CRS._Y12._MIN, AMI2) // _MIN: Minimum Base Address + CreateWordField (BUF2, \_SB.PCI0.IOTR._CRS._Y12._MAX, AMA2) // _MAX: Maximum Base Address + CreateWordField (BUF3, \_SB.PCI0.IOTR._CRS._Y13._MIN, AMI3) // _MIN: Minimum Base Address + CreateWordField (BUF3, \_SB.PCI0.IOTR._CRS._Y13._MAX, AMA3) // _MAX: Maximum Base Address + Store (ITA0, AMI0) /* \_SB_.PCI0.IOTR._CRS.AMI0 */ + Store (ITA0, AMA0) /* \_SB_.PCI0.IOTR._CRS.AMA0 */ + Store (ITA1, AMI1) /* \_SB_.PCI0.IOTR._CRS.AMI1 */ + Store (ITA1, AMA1) /* \_SB_.PCI0.IOTR._CRS.AMA1 */ + Store (ITA2, AMI2) /* \_SB_.PCI0.IOTR._CRS.AMI2 */ + Store (ITA2, AMA2) /* \_SB_.PCI0.IOTR._CRS.AMA2 */ + Store (ITA3, AMI3) /* \_SB_.PCI0.IOTR._CRS.AMI3 */ + Store (ITA3, AMA3) /* \_SB_.PCI0.IOTR._CRS.AMA3 */ + If (LEqual (ITS0, 0x01)) + { + ConcatenateResTemplate (Local0, BUF0, Local1) + Store (Local1, Local0) + } + + If (LEqual (ITS1, 0x01)) + { + ConcatenateResTemplate (Local0, BUF1, Local1) + Store (Local1, Local0) + } + + If (LEqual (ITS2, 0x01)) + { + ConcatenateResTemplate (Local0, BUF2, Local1) + Store (Local1, Local0) + } + + If (LEqual (ITS3, 0x01)) + { + ConcatenateResTemplate (Local0, BUF3, Local1) + Store (Local1, Local0) + } + + Return (Local0) + } + } + + Device (LPCB) + { + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + OperationRegion (LPC, PCI_Config, 0x00, 0x0100) + Field (LPC, AnyAcc, NoLock, Preserve) + { + Offset (0x02), + CDID, 16, + Offset (0x08), + CRID, 8, + Offset (0x80), + IOD0, 8, + IOD1, 8, + Offset (0xA0), + , 9, + PRBL, 1, + Offset (0xDC), + , 2, + ESPI, 1 + } + } + + Device (PPMC) + { + Name (_ADR, 0x001F0002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + + Device (SBUS) + { + Name (_ADR, 0x001F0004) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + + Scope (\_SB) + { + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PARC, 0x80, \_SB.PARC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSA) /* \_SB_.PRSA */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLA, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y14) + {} + }) + CreateWordField (RTLA, \_SB.LNKA._CRS._Y14._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKA._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PARC, 0x0F), IRQ0) /* \_SB_.LNKA._CRS.IRQ0 */ + Return (RTLA) /* \_SB_.LNKA._CRS.RTLA */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PARC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PARC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PBRC, 0x80, \_SB.PBRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSB) /* \_SB_.PRSB */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLB, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y15) + {} + }) + CreateWordField (RTLB, \_SB.LNKB._CRS._Y15._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKB._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PBRC, 0x0F), IRQ0) /* \_SB_.LNKB._CRS.IRQ0 */ + Return (RTLB) /* \_SB_.LNKB._CRS.RTLB */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PBRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PBRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PCRC, 0x80, \_SB.PCRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSC) /* \_SB_.PRSC */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLC, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y16) + {} + }) + CreateWordField (RTLC, \_SB.LNKC._CRS._Y16._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKC._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PCRC, 0x0F), IRQ0) /* \_SB_.LNKC._CRS.IRQ0 */ + Return (RTLC) /* \_SB_.LNKC._CRS.RTLC */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PCRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PCRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PDRC, 0x80, \_SB.PDRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSD) /* \_SB_.PRSD */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLD, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y17) + {} + }) + CreateWordField (RTLD, \_SB.LNKD._CRS._Y17._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKD._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PDRC, 0x0F), IRQ0) /* \_SB_.LNKD._CRS.IRQ0 */ + Return (RTLD) /* \_SB_.LNKD._CRS.RTLD */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PDRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PDRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PERC, 0x80, \_SB.PERC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSE) /* \_SB_.PRSE */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLE, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y18) + {} + }) + CreateWordField (RTLE, \_SB.LNKE._CRS._Y18._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKE._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PERC, 0x0F), IRQ0) /* \_SB_.LNKE._CRS.IRQ0 */ + Return (RTLE) /* \_SB_.LNKE._CRS.RTLE */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PERC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PERC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PFRC, 0x80, \_SB.PFRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSF) /* \_SB_.PRSF */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLF, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y19) + {} + }) + CreateWordField (RTLF, \_SB.LNKF._CRS._Y19._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKF._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PFRC, 0x0F), IRQ0) /* \_SB_.LNKF._CRS.IRQ0 */ + Return (RTLF) /* \_SB_.LNKF._CRS.RTLF */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PFRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PFRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PGRC, 0x80, \_SB.PGRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSG) /* \_SB_.PRSG */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLG, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y1A) + {} + }) + CreateWordField (RTLG, \_SB.LNKG._CRS._Y1A._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKG._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PGRC, 0x0F), IRQ0) /* \_SB_.LNKG._CRS.IRQ0 */ + Return (RTLG) /* \_SB_.LNKG._CRS.RTLG */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PGRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PGRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x08) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PHRC, 0x80, \_SB.PHRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSH) /* \_SB_.PRSH */ + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLH, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y1B) + {} + }) + CreateWordField (RTLH, \_SB.LNKH._CRS._Y1B._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) /* \_SB_.LNKH._CRS.IRQ0 */ + ShiftLeft (0x01, And (\_SB.PHRC, 0x0F), IRQ0) /* \_SB_.LNKH._CRS.IRQ0 */ + Return (RTLH) /* \_SB_.LNKH._CRS.RTLH */ + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PHRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PHRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + } + + Scope (\) + { + Method (PCRR, 2, Serialized) + { + Add (ShiftLeft (Arg0, 0x10), Arg1, Local0) + Add (SBRG, Local0, Local0) + OperationRegion (PCR0, SystemMemory, Local0, 0x04) + Field (PCR0, DWordAcc, Lock, Preserve) + { + DAT0, 32 + } + + Return (DAT0) /* \PCRR.DAT0 */ + } + + Method (PCRW, 3, Serialized) + { + Add (ShiftLeft (Arg0, 0x10), Arg1, Local0) + Add (SBRG, Local0, Local0) + OperationRegion (PCR0, SystemMemory, Local0, 0x04) + Field (PCR0, DWordAcc, Lock, Preserve) + { + DAT0, 32 + } + + Store (Arg2, DAT0) /* \PCRW.DAT0 */ + Store (PCRR (0xC7, 0x3418), Local0) + } + + Method (PCRO, 3, Serialized) + { + Store (PCRR (Arg0, Arg1), Local0) + Store (Or (Local0, Arg2), Local1) + PCRW (Arg0, Arg1, Local1) + } + + Method (PCRA, 3, Serialized) + { + Store (PCRR (Arg0, Arg1), Local0) + Store (And (Local0, Arg2), Local1) + PCRW (Arg0, Arg1, Local1) + } + + Method (PCAO, 4, Serialized) + { + Store (PCRR (Arg0, Arg1), Local0) + Store (Or (And (Local0, Arg2), Arg3), Local1) + PCRW (Arg0, Arg1, Local1) + } + + Name (TCBV, 0x00) + Method (TCBS, 0, NotSerialized) + { + If (LEqual (TCBV, 0x00)) + { + Store (PCRR (0xEF, 0x2778), Local0) + And (Local0, 0xFFE0, TCBV) /* \TCBV */ + } + + Return (TCBV) /* \TCBV */ + } + + OperationRegion (PMIO, SystemIO, PMBS, 0x60) + Field (PMIO, ByteAcc, NoLock, Preserve) + { + Offset (0x01), + PBSS, 1, + Offset (0x40), + , 17, + GPEC, 1 + } + + OperationRegion (TCBA, SystemIO, TCBS (), 0x10) + Field (TCBA, ByteAcc, NoLock, Preserve) + { + Offset (0x04), + , 9, + CPSC, 1 + } + + OperationRegion (PWMR, SystemMemory, \PWRM, 0x0800) + Field (PWMR, AnyAcc, NoLock, Preserve) + { + ACWA, 32, + DCWA, 32, + ACET, 32, + DCET, 32, + Offset (0xE0), + Offset (0xE2), + DWLE, 1, + HWLE, 1, + Offset (0x31C), + , 13, + SLS0, 1, + , 8, + XSQD, 1 + } + + OperationRegion (PMST, SystemMemory, PWRM, 0x80) + Field (PMST, DWordAcc, NoLock, Preserve) + { + Offset (0x18), + , 25, + USBP, 1, + Offset (0x1C), + Offset (0x1F), + PMFS, 1, + Offset (0x20), + MPMC, 32, + , 20, + UWAB, 1 + } + } + + Scope (\_SB.PCI0) + { + Device (GLAN) + { + Name (_ADR, 0x001F0006) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + OperationRegion (GLBA, PCI_Config, 0x00, 0x0100) + Field (GLBA, AnyAcc, NoLock, Preserve) + { + DVID, 16 + } + + Field (GLBA, ByteAcc, NoLock, Preserve) + { + Offset (0xCC), + Offset (0xCD), + PMEE, 1, + , 6, + PMES, 1 + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x6D, 0x04)) + } + + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) /* \_SB_.PCI0.GLAN.PMEE */ + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (DVID, 0xFFFF)) + { + Return (Zero) + } + + If (LAnd (PMEE, PMES)) + { + Store (0x01, PMES) /* \_SB_.PCI0.GLAN.PMES */ + Notify (GLAN, 0x02) // Device Wake + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (XHC) + { + Name (_ADR, 0x00140000) // _ADR: Address + OperationRegion (XPRT, PCI_Config, 0x00, 0x0100) + Field (XPRT, AnyAcc, NoLock, Preserve) + { + DVID, 16, + Offset (0x10), + XADL, 32, + XADH, 32, + Offset (0x50), + , 2, + STGE, 1, + Offset (0xA2), + , 2, + D3HE, 1 + } + + Field (XPRT, ByteAcc, NoLock, Preserve) + { + Offset (0x74), + D0D3, 2, + Offset (0x75), + PMEE, 1, + , 6, + PMES, 1 + } + + Name (XFLT, 0x00) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + ADBG ("_DSM") + ShiftLeft (XADH, 0x20, Local0) + Or (Local0, XADL, Local0) + And (Local0, 0xFFFFFFFFFFFFFFF0, Local0) + OperationRegion (XMIO, SystemMemory, Local0, 0x9000) + Field (XMIO, AnyAcc, Lock, Preserve) + { + Offset (0x550), + PCCS, 1, + , 4, + PPLS, 4, + PTPP, 1, + Offset (0x8420), + PRTM, 2 + } + + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("ac340cb7-e901-45bf-b7e6-2b34ec931e23"))) + { + If (LEqual (Arg1, 0x03)) + { + Store (Arg1, XFLT) /* \_SB_.PCI0.XHC_.XFLT */ + } + + If (LAnd (LGreater (PRTM, 0x00), LOr (LEqual (Arg1, 0x05), LEqual (Arg1, 0x06)))) + { + ADBG ("SSIC") + If (LOr (LOr (LEqual (PCCS, 0x00), LEqual (PTPP, 0x00)), LAnd (LGreaterEqual ( + PPLS, 0x04), LLessEqual (PPLS, 0x0F)))) + { + If (LEqual (PPLS, 0x08)) + { + Store (One, D3HE) /* \_SB_.PCI0.XHC_.D3HE */ + } + Else + { + Store (Zero, D3HE) /* \_SB_.PCI0.XHC_.D3HE */ + } + } + Else + { + Store (One, D3HE) /* \_SB_.PCI0.XHC_.D3HE */ + } + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State + { + Return (0x03) + } + + Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State + { + Return (0x03) + } + + Method (_S4W, 0, NotSerialized) // _S4W: S4 Device Wake State + { + Return (0x03) + } + + Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State + { + If (LEqual (XFLT, Zero)) + { + Return (0x00) + } + Else + { + Return (0x03) + } + } + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + \_SB.PCI0.LPCB.EC.PUBS + }) + Name (_PR1, Package (0x01) // _PR1: Power Resources for D1 + { + \_SB.PCI0.LPCB.EC.PUBS + }) + Name (_PR2, Package (0x01) // _PR2: Power Resources for D2 + { + \_SB.PCI0.LPCB.EC.PUBS + }) + Name (_PRW, Package (0x03) // _PRW: Power Resources for Wake + { + 0x6D, + 0x03, + \_SB.PCI0.LPCB.EC.PUBS + }) + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) /* \_SB_.PCI0.XHC_.PMEE */ + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (CondRefOf (\_SB.PCI0.XHC.RHUB.INIR)) + { + \_SB.PCI0.XHC.RHUB.INIR () + } + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (PMES, Local0) + Store (0x01, PMES) /* \_SB_.PCI0.XHC_.PMES */ + If (LAnd (PMEE, Local0)) + { + Notify (XHC, 0x02) // Device Wake + } + } + + OperationRegion (XHCP, SystemMemory, Add (\_SB.PCI0.GPCB (), 0x000A0000), 0x0100) + Field (XHCP, AnyAcc, Lock, Preserve) + { + Offset (0x04), + PDBM, 16, + Offset (0x10), + MEMB, 64 + } + + Method (USRA, 0, Serialized) + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x0F) + } + Else + { + Return (0x0B) + } + } + + Method (SSPA, 0, Serialized) + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x11) + } + Else + { + Return (0x0D) + } + } + + Name (XRST, Zero) + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + If (LEqual (^DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (^MEMB, Local2) + Store (^PDBM, Local1) + And (^PDBM, Not (0x06), ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + Store (0x00, D3HE) /* \_SB_.PCI0.XHC_.D3HE */ + Store (0x00, STGE) /* \_SB_.PCI0.XHC_.STGE */ + Store (0x00, ^D0D3) /* \_SB_.PCI0.XHC_.D0D3 */ + Store (\XWMB, ^MEMB) /* \_SB_.PCI0.XHC_.MEMB */ + Or (Local1, 0x02, ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + OperationRegion (MC11, SystemMemory, \XWMB, 0x9000) + Field (MC11, DWordAcc, Lock, Preserve) + { + Offset (0x81C4), + , 2, + UPSW, 2 + } + + Store (0x00, UPSW) /* \_SB_.PCI0.XHC_._PS0.UPSW */ + And (^PDBM, Not (0x02), ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + Store (Local2, ^MEMB) /* \_SB_.PCI0.XHC_.MEMB */ + Store (Local1, ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + If (CondRefOf (\_SB.PCI0.XHC.PS0X)) + { + \_SB.PCI0.XHC.PS0X () + } + + If (LAnd (UWAB, LOr (LEqual (D0D3, 0x00), LEqual (\_SB.PCI0.XDCI.D0I3, 0x00)))) + { + Store (0x01, MPMC) /* \MPMC */ + While (PMFS) + { + Sleep (0x0A) + } + } + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + If (LEqual (^DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (^MEMB, Local2) + Store (^PDBM, Local1) + And (^PDBM, Not (0x06), ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + Store (0x00, ^D0D3) /* \_SB_.PCI0.XHC_.D0D3 */ + Store (\XWMB, ^MEMB) /* \_SB_.PCI0.XHC_.MEMB */ + Or (Local1, 0x02, ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + OperationRegion (MC11, SystemMemory, \XWMB, 0x9000) + Field (MC11, DWordAcc, Lock, Preserve) + { + Offset (0x81A0), + LFU3, 6, + Offset (0x81C4), + , 2, + UPSW, 2 + } + + Name (U3PS, Zero) + If (LEqual (PCHV (), SPTL)) + { + Store (0x0540, U3PS) /* \_SB_.PCI0.XHC_._PS3.U3PS */ + } + Else + { + Store (0x0580, U3PS) /* \_SB_.PCI0.XHC_._PS3.U3PS */ + } + + OperationRegion (UPSC, SystemMemory, Add (\XWMB, U3PS), 0x0100) + Field (UPSC, DWordAcc, Lock, Preserve) + { + , 5, + PLS1, 4, + , 13, + PLC1, 1, + Offset (0x03), + CAS1, 1, + Offset (0x10), + , 5, + PLS2, 4, + , 13, + PLC2, 1, + Offset (0x13), + CAS2, 1, + Offset (0x20), + , 5, + PLS3, 4, + , 13, + PLC3, 1, + Offset (0x23), + CAS3, 1, + Offset (0x30), + , 5, + PLS4, 4, + , 13, + PLC4, 1, + Offset (0x33), + CAS4, 1, + Offset (0x40), + , 5, + PLS5, 4, + , 13, + PLC5, 1, + Offset (0x43), + CAS5, 1, + Offset (0x50), + , 5, + PLS6, 4, + , 13, + PLC6, 1, + Offset (0x53), + CAS6, 1, + Offset (0x60), + Offset (0x63), + CAS7, 1, + Offset (0x70), + Offset (0x73), + CAS8, 1, + Offset (0x80), + Offset (0x83), + CAS9, 1, + Offset (0x90), + Offset (0x93), + CASA, 1 + } + + Field (UPSC, DWordAcc, Lock, Preserve) + { + PSC1, 32, + Offset (0x10), + PSC2, 32, + Offset (0x20), + PSC3, 32, + Offset (0x30), + PSC4, 32, + Offset (0x40), + PSC5, 32, + Offset (0x50), + PSC6, 32 + } + + Store (0x03, UPSW) /* \_SB_.PCI0.XHC_._PS3.UPSW */ + Store (0x01, STGE) /* \_SB_.PCI0.XHC_.STGE */ + Store (0x3F, LFU3) /* \_SB_.PCI0.XHC_._PS3.LFU3 */ + Name (PSCO, 0xFFFFFFFF) + Sleep (0x01) + If (LAnd (LEqual (PLS1, 0x03), PLC1)) + { + And (0xFFFFFFFD, PSC1, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Or (0x00400000, PSCO, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Store (PSCO, PSC1) /* \_SB_.PCI0.XHC_._PS3.PSC1 */ + } + + If (LAnd (LEqual (PLS2, 0x03), PLC2)) + { + And (0xFFFFFFFD, PSC2, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Or (0x00400000, PSCO, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Store (PSCO, PSC2) /* \_SB_.PCI0.XHC_._PS3.PSC2 */ + } + + If (LAnd (LEqual (PLS3, 0x03), PLC3)) + { + And (0xFFFFFFFD, PSC3, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Or (0x00400000, PSCO, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Store (PSCO, PSC3) /* \_SB_.PCI0.XHC_._PS3.PSC3 */ + } + + If (LAnd (LEqual (PLS4, 0x03), PLC4)) + { + And (0xFFFFFFFD, PSC4, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Or (0x00400000, PSCO, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Store (PSCO, PSC4) /* \_SB_.PCI0.XHC_._PS3.PSC4 */ + } + + If (LAnd (LEqual (PLS5, 0x03), PLC5)) + { + And (0xFFFFFFFD, PSC5, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Or (0x00400000, PSCO, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Store (PSCO, PSC5) /* \_SB_.PCI0.XHC_._PS3.PSC5 */ + } + + If (LAnd (LEqual (PLS6, 0x03), PLC6)) + { + And (0xFFFFFFFD, PSC6, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Or (0x00400000, PSCO, PSCO) /* \_SB_.PCI0.XHC_._PS3.PSCO */ + Store (PSCO, PSC6) /* \_SB_.PCI0.XHC_._PS3.PSC6 */ + } + + Store (0x01, STGE) /* \_SB_.PCI0.XHC_.STGE */ + If (LOr (LOr (LOr (LOr (LOr (LOr (CAS1, CAS2), CAS3), CAS4), CAS5), + CAS6), LAnd (LEqual (PCHV (), SPTH), LOr (LOr (LOr (CAS7, CAS8), CAS9), CASA)))) + { + Store (0x00, D3HE) /* \_SB_.PCI0.XHC_.D3HE */ + Sleep (0x01) + } + Else + { + Store (0x01, D3HE) /* \_SB_.PCI0.XHC_.D3HE */ + } + + Store (0x00, LFU3) /* \_SB_.PCI0.XHC_._PS3.LFU3 */ + And (^PDBM, Not (0x02), ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + Store (0x03, ^D0D3) /* \_SB_.PCI0.XHC_.D0D3 */ + Store (Local2, ^MEMB) /* \_SB_.PCI0.XHC_.MEMB */ + Store (Local1, ^PDBM) /* \_SB_.PCI0.XHC_.PDBM */ + If (CondRefOf (\_SB.PCI0.XHC.PS3X)) + { + \_SB.PCI0.XHC.PS3X () + } + + If (LAnd (UWAB, LAnd (LEqual (D0D3, 0x03), LOr (LEqual (\_SB.PCI0.XDCI.D0I3, 0x03), LEqual ( + \_SB.PCI0.XDCI.DVID, 0xFFFF))))) + { + Store (0x03, MPMC) /* \MPMC */ + While (PMFS) + { + Sleep (0x0A) + } + } + } + + Method (CUID, 1, Serialized) + { + If (LEqual (Arg0, ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) + { + Return (0x01) + } + + Return (0x00) + } + + Device (RHUB) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + If (LEqual (\_SB.PCI0.XHC.DVID, 0xFFFF)) + { + Return (Zero) + } + + If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS0X)) + { + \_SB.PCI0.XHC.RHUB.PS0X () + } + } + + Method (_PS2, 0, Serialized) // _PS2: Power State 2 + { + If (LEqual (\_SB.PCI0.XHC.DVID, 0xFFFF)) + { + Return (Zero) + } + + If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS2X)) + { + \_SB.PCI0.XHC.RHUB.PS2X () + } + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + If (LEqual (\_SB.PCI0.XHC.DVID, 0xFFFF)) + { + Return (Zero) + } + + If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS3X)) + { + \_SB.PCI0.XHC.RHUB.PS3X () + } + } + + Device (HS01) + { + Name (_ADR, 0x01) // _ADR: Address + } + + Device (HS02) + { + Name (_ADR, 0x02) // _ADR: Address + } + + Device (HS03) + { + Name (_ADR, 0x03) // _ADR: Address + } + + Device (HS04) + { + Name (_ADR, 0x04) // _ADR: Address + } + + Device (HS05) + { + Name (_ADR, 0x05) // _ADR: Address + } + + Device (HS06) + { + Name (_ADR, 0x06) // _ADR: Address + } + + Device (HS07) + { + Name (_ADR, 0x07) // _ADR: Address + } + + Device (HS08) + { + Name (_ADR, 0x08) // _ADR: Address + } + + Device (HS09) + { + Name (_ADR, 0x09) // _ADR: Address + } + + Device (HS10) + { + Name (_ADR, 0x0A) // _ADR: Address + } + + Device (USR1) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (USRA (), 0x00)) + } + } + + Device (USR2) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (USRA (), 0x01)) + } + } + + Device (SS01) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x00)) + } + } + + Device (SS02) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x01)) + } + } + + Device (SS03) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x02)) + } + } + + Device (SS04) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x03)) + } + } + + Device (SS05) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x04)) + } + } + + Device (SS06) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x05)) + } + } + } + } + } + + If (LEqual (PCHV (), SPTH)) + { + Scope (\_SB.PCI0.XHC.RHUB) + { + Device (HS11) + { + Name (_ADR, 0x0B) // _ADR: Address + } + + Device (HS12) + { + Name (_ADR, 0x0C) // _ADR: Address + } + + Device (HS13) + { + Name (_ADR, 0x0D) // _ADR: Address + } + + Device (HS14) + { + Name (_ADR, 0x0E) // _ADR: Address + } + + Device (SS07) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x06)) + } + } + + Device (SS08) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x07)) + } + } + + Device (SS09) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x08)) + } + } + + Device (SS10) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x09)) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (XDCI) + { + Name (_ADR, 0x00140001) // _ADR: Address + OperationRegion (OTGD, PCI_Config, 0x00, 0x0100) + Field (OTGD, DWordAcc, NoLock, Preserve) + { + DVID, 16, + Offset (0x10), + XDCB, 64 + } + + Field (OTGD, ByteAcc, NoLock, Preserve) + { + Offset (0x84), + D0I3, 2, + Offset (0x85), + PMEE, 1, + , 6, + PMES, 1 + } + + Method (XDBA, 0, NotSerialized) + { + Return (And (^XDCB, 0xFFFFFFFFFFFFFF00)) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"))) + { + If (LEqual (Arg1, 0x01)) + { + Method (SPPS, 2, Serialized) + { + OperationRegion (XDBW, SystemMemory, XDBA (), 0x00110000) + Field (XDBW, WordAcc, NoLock, Preserve) + { + Offset (0x10F810), + Offset (0x10F811), + U2CP, 2, + U3CP, 2, + Offset (0x10F818), + PUPS, 2, + , 1, + PURC, 1, + Offset (0x10F81A), + Offset (0x10F81C), + , 3, + UXPE, 2, + Offset (0x10F81E) + } + + Store (Arg0, Local1) + Store (Arg1, Local2) + If (LEqual (Local1, 0x00)) + { + Store (0x00, UXPE) /* \_SB_.PCI0.XDCI._DSM.SPPS.UXPE */ + Store (0x00, Local0) + While (LLess (Local0, 0x0A)) + { + Stall (0x64) + Increment (Local0) + } + + Store (0x00, PUPS) /* \_SB_.PCI0.XDCI._DSM.SPPS.PUPS */ + Store (0x00, Local0) + While (LLess (Local0, 0x07D0)) + { + Stall (0x64) + If (LAnd (LEqual (U2CP, 0x00), LEqual (U3CP, 0x00))) + { + Break + } + + Increment (Local0) + } + + If (LNotEqual (U2CP, 0x00)){} + If (LNotEqual (U3CP, 0x00)){} + Return (0x00) + } + + If (LEqual (Local1, 0x03)) + { + If (LNotEqual (U2CP, 0x00)){} + If (LNotEqual (U3CP, 0x00)){} + Store (0x03, PUPS) /* \_SB_.PCI0.XDCI._DSM.SPPS.PUPS */ + Store (0x00, Local0) + While (LLess (Local0, 0x07D0)) + { + Stall (0x64) + If (LAnd (LEqual (U2CP, 0x03), LEqual (U3CP, 0x03))) + { + Break + } + + Increment (Local0) + } + + If (LNotEqual (U2CP, 0x03)){} + If (LNotEqual (U3CP, 0x03)){} + Store (Local2, UXPE) /* \_SB_.PCI0.XDCI._DSM.SPPS.UXPE */ + Return (0x00) + } + + Return (0x00) + } + + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Return (Buffer (0x01) + { + 0xF3 // . + }) + } + Case (0x01) + { + Return (0x01) + } + Case (0x04) + { + Store (DerefOf (Index (Arg3, 0x00)), Local1) + SPPS (Local1, 0x00) + } + Case (0x05) + { + If (CondRefOf (\_SB.PCI0.LPCB.H_EC.XDAT)) + { + If (LEqual (\_SB.PCI0.LPCB.H_EC.XDAT (), 0x01)) + { + Notify (\_SB.PCI0.XDCI, 0x80) // Status Change + } + Else + { + Notify (\_SB.PCI0.XDCI, 0x81) // Information Change + } + } + + Return (0x00) + } + Case (0x06) + { + OperationRegion (XDBD, SystemMemory, XDBA (), 0x00110000) + Field (XDBD, DWordAcc, NoLock, Preserve) + { + Offset (0xC704), + , 30, + CSFR, 1, + Offset (0xC708) + } + + OperationRegion (XDW2, SystemMemory, XDBA (), 0x00110000) + Field (XDW2, WordAcc, NoLock, Preserve) + { + Offset (0x10F820), + , 13, + OTHC, 1 + } + + If (LEqual (OTHC, 0x00)) + { + Store (0x01, CSFR) /* \_SB_.PCI0.XDCI._DSM.CSFR */ + Store (0x00, Local0) + While (LLess (Local0, 0x64)) + { + If (LEqual (CSFR, 0x00)) + { + Break + } + + Sleep (0x01) + } + } + + Return (0x00) + } + Case (0x07) + { + OperationRegion (XD22, SystemMemory, XDBA (), 0x00110000) + Field (XD22, WordAcc, NoLock, Preserve) + { + Offset (0x10F818), + P2PS, 2, + Offset (0x10F81A) + } + + Store (P2PS, Local0) + Return (Local0) + } + + } + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Name (_DDN, "SPT XHCI controller") // _DDN: DOS Device Name + Name (_STR, Unicode ("SPT XHCI controller")) // _STR: Description String + Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State + { + Return (0x03) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (DVID, 0xFFFFFFFF)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x6D, 0x04)) + } + + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) /* \_SB_.PCI0.XDCI.PMEE */ + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (PMES, Local0) + Store (0x01, PMES) /* \_SB_.PCI0.XDCI.PMES */ + If (LAnd (PMEE, Local0)) + { + Notify (XDCI, 0x02) // Device Wake + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (HDAS) + { + Name (_ADR, 0x001F0003) // _ADR: Address + OperationRegion (HDAR, PCI_Config, 0x00, 0x0100) + Field (HDAR, WordAcc, NoLock, Preserve) + { + VDID, 32 + } + + Field (HDAR, ByteAcc, NoLock, Preserve) + { + Offset (0x54), + Offset (0x55), + PMEE, 1, + , 6, + PMES, 1 + } + + Name (_S0W, 0x03) // _S0W: S0 Device Wake State + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) /* \_SB_.PCI0.HDAS.PMEE */ + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x6D, 0x04)) + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (VDID, 0xFFFFFFFF)) + { + Return (Zero) + } + + If (LAnd (PMEE, PMES)) + { + ADBG ("HDAS GPEH") + Store (0x01, PMES) /* \_SB_.PCI0.HDAS.PMES */ + Notify (HDAS, 0x02) // Device Wake + } + } + + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + If (LNotEqual (VDID, 0xFFFFFFFF)) + { + \_SB.VMMH (0x00, 0x01) + } + + If (CondRefOf (\_SB.PCI0.HDAS.PS0X)) + { + \_SB.PCI0.HDAS.PS0X () + } + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + If (LNotEqual (VDID, 0xFFFFFFFF)) + { + \_SB.VMMH (0x00, 0x00) + } + + If (CondRefOf (\_SB.PCI0.HDAS.PS3X)) + { + \_SB.PCI0.HDAS.PS3X () + } + } + + Name (NBUF, ResourceTemplate () + { + QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadOnly, + 0x0000000000000001, // Granularity + 0x0000000000000000, // Range Minimum + 0x0000000000000000, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000000000000, // Length + ,, _Y1C, AddressRangeACPI, TypeStatic) + }) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + ADBG ("HDAS _INI") + CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y1C._MIN, NBAS) // _MIN: Minimum Base Address + CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y1C._MAX, NMAS) // _MAX: Maximum Base Address + CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y1C._LEN, NLEN) // _LEN: Length + Store (NHLA, NBAS) /* \_SB_.PCI0.HDAS._INI.NBAS */ + Add (NHLA, Subtract (NHLL, 0x01), NMAS) /* \_SB_.PCI0.HDAS._INI.NMAS */ + Store (NHLL, NLEN) /* \_SB_.PCI0.HDAS._INI.NLEN */ + If (LNotEqual (VDID, 0xFFFFFFFF)) + { + \_SB.VMMH (0x00, 0x01) + } + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + ADBG ("HDAS _DSM") + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("a69f886e-6ceb-4594-a41f-7b5dce24c553"))) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + ADBG ("_DSM Fun 0") + Return (Buffer (One) + { + 0x0F // . + }) + } + Case (0x01) + { + ADBG ("_DSM Fun 1 NHLT") + Return (NBUF) /* \_SB_.PCI0.HDAS.NBUF */ + } + Case (0x02) + { + ADBG ("_DSM Fun 2 FMSK") + ADBG ("ADFM:") + ADBG (ADFM) + Return (ADFM) /* \ADFM */ + } + Case (0x03) + { + ADBG ("_DSM Fun 3 PPMS") + If (CondRefOf (\_SB.PCI0.HDAS.PPMS)) + { + ADBG ("PPMS:") + ADBG (Arg3) + Return (\_SB.PCI0.HDAS.PPMS (Arg3)) + } + + ADBG ("BUGBUG") + Return (0x00) + } + Default + { + ADBG ("_DSM Fun NOK") + Return (Buffer (One) + { + 0x00 // . + }) + } + + } + } + + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + ADBG ("_DSM UUID NOK") + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + + Device (RP01) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA1, 0x00)) + { + Return (RPA1) /* \RPA1 */ + } + Else + { + Return (0x001C0000) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR1, LTRZ) /* \_SB_.PCI0.RP01.LTRZ */ + Store (PML1, LMSL) /* \_SB_.PCI0.RP01.LMSL */ + Store (PNL1, LNSL) /* \_SB_.PCI0.RP01.LNSL */ + Store (OBF1, OBFZ) /* \_SB_.PCI0.RP01.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP01._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP01._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP01._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP01._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP01._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP01._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP01.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP01.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP01.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP01.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP01.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP01.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP01.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP02) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA2, 0x00)) + { + Return (RPA2) /* \RPA2 */ + } + Else + { + Return (0x001C0001) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR2, LTRZ) /* \_SB_.PCI0.RP02.LTRZ */ + Store (PML2, LMSL) /* \_SB_.PCI0.RP02.LMSL */ + Store (PNL2, LNSL) /* \_SB_.PCI0.RP02.LNSL */ + Store (OBF2, OBFZ) /* \_SB_.PCI0.RP02.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP02._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP02._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP02._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP02._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP02._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP02._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP02.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP02.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP02.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP02.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP02.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP02.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP02.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP03) + { + Name (RID, 0x00) + Method (XPRW, 0, NotSerialized) + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA3, 0x00)) + { + Return (RPA3) /* \RPA3 */ + } + Else + { + Return (0x001C0002) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR3, LTRZ) /* \_SB_.PCI0.RP03.LTRZ */ + Store (PML3, LMSL) /* \_SB_.PCI0.RP03.LMSL */ + Store (PNL3, LNSL) /* \_SB_.PCI0.RP03.LNSL */ + Store (OBF3, OBFZ) /* \_SB_.PCI0.RP03.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP03._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP03._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP03._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP03._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP03._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP03._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP03.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP03.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP03.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP03.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP03.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP03.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP03.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP04) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA4, 0x00)) + { + Return (RPA4) /* \RPA4 */ + } + Else + { + Return (0x001C0003) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR4, LTRZ) /* \_SB_.PCI0.RP04.LTRZ */ + Store (PML4, LMSL) /* \_SB_.PCI0.RP04.LMSL */ + Store (PNL4, LNSL) /* \_SB_.PCI0.RP04.LNSL */ + Store (OBF4, OBFZ) /* \_SB_.PCI0.RP04.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP04._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP04._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP04._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP04._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP04._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP04._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP04.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP04.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP04.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP04.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP04.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP04.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP04.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP05) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA5, 0x00)) + { + Return (RPA5) /* \RPA5 */ + } + Else + { + Return (0x001C0004) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR5, LTRZ) /* \_SB_.PCI0.RP05.LTRZ */ + Store (PML5, LMSL) /* \_SB_.PCI0.RP05.LMSL */ + Store (PNL5, LNSL) /* \_SB_.PCI0.RP05.LNSL */ + Store (OBF5, OBFZ) /* \_SB_.PCI0.RP05.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP05._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP05._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP05._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP05._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP05._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP05._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP05.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP05.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP05.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP05.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP05.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP05.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP05.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP06) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA6, 0x00)) + { + Return (RPA6) /* \RPA6 */ + } + Else + { + Return (0x001C0005) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR6, LTRZ) /* \_SB_.PCI0.RP06.LTRZ */ + Store (PML6, LMSL) /* \_SB_.PCI0.RP06.LMSL */ + Store (PNL6, LNSL) /* \_SB_.PCI0.RP06.LNSL */ + Store (OBF6, OBFZ) /* \_SB_.PCI0.RP06.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP06._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP06._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP06._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP06._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP06._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP06._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP06.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP06.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP06.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP06.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP06.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP06.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP06.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP07) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA7, 0x00)) + { + Return (RPA7) /* \RPA7 */ + } + Else + { + Return (0x001C0006) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR7, LTRZ) /* \_SB_.PCI0.RP07.LTRZ */ + Store (PML7, LMSL) /* \_SB_.PCI0.RP07.LMSL */ + Store (PNL7, LNSL) /* \_SB_.PCI0.RP07.LNSL */ + Store (OBF7, OBFZ) /* \_SB_.PCI0.RP07.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP07._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP07._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP07._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP07._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP07._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP07._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP07.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP07.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP07.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP07.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP07.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP07.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP07.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP08) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA8, 0x00)) + { + Return (RPA8) /* \RPA8 */ + } + Else + { + Return (0x001C0007) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR8, LTRZ) /* \_SB_.PCI0.RP08.LTRZ */ + Store (PML8, LMSL) /* \_SB_.PCI0.RP08.LMSL */ + Store (PNL8, LNSL) /* \_SB_.PCI0.RP08.LNSL */ + Store (OBF8, OBFZ) /* \_SB_.PCI0.RP08.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP08._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP08._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP08._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP08._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP08._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP08._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP08.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP08.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP08.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP08.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP08.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP08.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP08.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP09) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x27, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA9, 0x00)) + { + Return (RPA9) /* \RPA9 */ + } + Else + { + Return (0x001D0000) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR9, LTRZ) /* \_SB_.PCI0.RP09.LTRZ */ + Store (PML9, LMSL) /* \_SB_.PCI0.RP09.LMSL */ + Store (PNL9, LNSL) /* \_SB_.PCI0.RP09.LNSL */ + Store (OBF9, OBFZ) /* \_SB_.PCI0.RP09.OBFZ */ + } + + OperationRegion (PXCS, SystemMemory, 0xF00E8000, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP09._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP09._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP09._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP09._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP09._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP09._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP09.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP09.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP09.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP09.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP09.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP09.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP09.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP10) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAA, 0x00)) + { + Return (RPAA) /* \RPAA */ + } + Else + { + Return (0x001D0001) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRA, LTRZ) /* \_SB_.PCI0.RP10.LTRZ */ + Store (PMLA, LMSL) /* \_SB_.PCI0.RP10.LMSL */ + Store (PNLA, LNSL) /* \_SB_.PCI0.RP10.LNSL */ + Store (OBFA, OBFZ) /* \_SB_.PCI0.RP10.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP10._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP10._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP10._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP10._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP10._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP10._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP10.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP10.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP10.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP10.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP10.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP10.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP10.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP11) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAB, 0x00)) + { + Return (RPAB) /* \RPAB */ + } + Else + { + Return (0x001D0002) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRB, LTRZ) /* \_SB_.PCI0.RP11.LTRZ */ + Store (PMLB, LMSL) /* \_SB_.PCI0.RP11.LMSL */ + Store (PNLB, LNSL) /* \_SB_.PCI0.RP11.LNSL */ + Store (OBFB, OBFZ) /* \_SB_.PCI0.RP11.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP11._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP11._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP11._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP11._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP11._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP11._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP11.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP11.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP11.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP11.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP11.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP11.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP11.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP12) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAC, 0x00)) + { + Return (RPAC) /* \RPAC */ + } + Else + { + Return (0x001D0003) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRC, LTRZ) /* \_SB_.PCI0.RP12.LTRZ */ + Store (PMLC, LMSL) /* \_SB_.PCI0.RP12.LMSL */ + Store (PNLC, LNSL) /* \_SB_.PCI0.RP12.LNSL */ + Store (OBFC, OBFZ) /* \_SB_.PCI0.RP12.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP12._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP12._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP12._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP12._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP12._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP12._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP12.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP12.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP12.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP12.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP12.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP12.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP12.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP13) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAD, 0x00)) + { + Return (RPAD) /* \RPAD */ + } + Else + { + Return (0x001D0004) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRD, LTRZ) /* \_SB_.PCI0.RP13.LTRZ */ + Store (PMLD, LMSL) /* \_SB_.PCI0.RP13.LMSL */ + Store (PNLD, LNSL) /* \_SB_.PCI0.RP13.LNSL */ + Store (OBFD, OBFZ) /* \_SB_.PCI0.RP13.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP13._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP13._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP13._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP13._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP13._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP13._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP13.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP13.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP13.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP13.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP13.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP13.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP13.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP14) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAE, 0x00)) + { + Return (RPAE) /* \RPAE */ + } + Else + { + Return (0x001D0005) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRE, LTRZ) /* \_SB_.PCI0.RP14.LTRZ */ + Store (PMLE, LMSL) /* \_SB_.PCI0.RP14.LMSL */ + Store (PNLE, LNSL) /* \_SB_.PCI0.RP14.LNSL */ + Store (OBFE, OBFZ) /* \_SB_.PCI0.RP14.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP14._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP14._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP14._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP14._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP14._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP14._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP14.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP14.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP14.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP14.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP14.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP14.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP14.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP15) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAF, 0x00)) + { + Return (RPAF) /* \RPAF */ + } + Else + { + Return (0x001D0006) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRF, LTRZ) /* \_SB_.PCI0.RP15.LTRZ */ + Store (PMLF, LMSL) /* \_SB_.PCI0.RP15.LMSL */ + Store (PNLF, LNSL) /* \_SB_.PCI0.RP15.LNSL */ + Store (OBFF, OBFZ) /* \_SB_.PCI0.RP15.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP15._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP15._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP15._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP15._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP15._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP15._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP15.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP15.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP15.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP15.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP15.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP15.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP15.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP16) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAG, 0x00)) + { + Return (RPAG) /* \RPAG */ + } + Else + { + Return (0x001D0007) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRG, LTRZ) /* \_SB_.PCI0.RP16.LTRZ */ + Store (PMLG, LMSL) /* \_SB_.PCI0.RP16.LMSL */ + Store (PNLG, LNSL) /* \_SB_.PCI0.RP16.LNSL */ + Store (OBFG, OBFZ) /* \_SB_.PCI0.RP16.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP16._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP16._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP16._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP16._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP16._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP16._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP16.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP16.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP16.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP16.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP16.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP16.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP16.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP17) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAH, 0x00)) + { + Return (RPAH) /* \RPAH */ + } + Else + { + Return (0x001B0000) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRH, LTRZ) /* \_SB_.PCI0.RP17.LTRZ */ + Store (PMLH, LMSL) /* \_SB_.PCI0.RP17.LMSL */ + Store (PNLH, LNSL) /* \_SB_.PCI0.RP17.LNSL */ + Store (OBFH, OBFZ) /* \_SB_.PCI0.RP17.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP17._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP17._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP17._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP17._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP17._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP17._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP17.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP17.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP17.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP17.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP17.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP17.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP17.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP18) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAI, 0x00)) + { + Return (RPAI) /* \RPAI */ + } + Else + { + Return (0x001B0001) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRI, LTRZ) /* \_SB_.PCI0.RP18.LTRZ */ + Store (PMLI, LMSL) /* \_SB_.PCI0.RP18.LMSL */ + Store (PNLI, LNSL) /* \_SB_.PCI0.RP18.LNSL */ + Store (OBFI, OBFZ) /* \_SB_.PCI0.RP18.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP18._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP18._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP18._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP18._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP18._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP18._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP18.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP18.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP18.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP18.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP18.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP18.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP18.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP19) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAJ, 0x00)) + { + Return (RPAJ) /* \RPAJ */ + } + Else + { + Return (0x001B0002) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRJ, LTRZ) /* \_SB_.PCI0.RP19.LTRZ */ + Store (PMLJ, LMSL) /* \_SB_.PCI0.RP19.LMSL */ + Store (PNLJ, LNSL) /* \_SB_.PCI0.RP19.LNSL */ + Store (OBFJ, OBFZ) /* \_SB_.PCI0.RP19.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP19._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP19._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP19._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP19._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP19._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP19._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP19.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP19.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP19.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP19.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP19.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP19.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP19.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP20) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAK, 0x00)) + { + Return (RPAK) /* \RPAK */ + } + Else + { + Return (0x001B0003) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRK, LTRZ) /* \_SB_.PCI0.RP20.LTRZ */ + Store (PMLK, LMSL) /* \_SB_.PCI0.RP20.LMSL */ + Store (PNLK, LNSL) /* \_SB_.PCI0.RP20.LNSL */ + Store (OBFK, OBFZ) /* \_SB_.PCI0.RP20.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP20._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP20._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP20._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP20._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP20._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP20._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP20.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP20.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP20.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP20.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP20.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP20.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP20.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP21) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAL, 0x00)) + { + Return (RPAL) /* \RPAL */ + } + Else + { + Return (0x001B0004) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRL, LTRZ) /* \_SB_.PCI0.RP21.LTRZ */ + Store (PMLL, LMSL) /* \_SB_.PCI0.RP21.LMSL */ + Store (PNLL, LNSL) /* \_SB_.PCI0.RP21.LNSL */ + Store (OBFL, OBFZ) /* \_SB_.PCI0.RP21.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP21._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP21._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP21._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP21._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP21._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP21._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP21.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP21.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP21.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP21.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP21.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP21.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP21.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP22) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAM, 0x00)) + { + Return (RPAM) /* \RPAM */ + } + Else + { + Return (0x001B0005) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRM, LTRZ) /* \_SB_.PCI0.RP22.LTRZ */ + Store (PMLM, LMSL) /* \_SB_.PCI0.RP22.LMSL */ + Store (PNLM, LNSL) /* \_SB_.PCI0.RP22.LNSL */ + Store (OBFM, OBFZ) /* \_SB_.PCI0.RP22.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP22._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP22._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP22._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP22._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP22._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP22._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP22.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP22.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP22.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP22.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP22.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP22.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP22.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP23) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAN, 0x00)) + { + Return (RPAN) /* \RPAN */ + } + Else + { + Return (0x001B0006) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRN, LTRZ) /* \_SB_.PCI0.RP23.LTRZ */ + Store (PMLN, LMSL) /* \_SB_.PCI0.RP23.LMSL */ + Store (PNLN, LNSL) /* \_SB_.PCI0.RP23.LNSL */ + Store (OBFN, OBFZ) /* \_SB_.PCI0.RP23.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP23._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP23._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP23._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP23._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP23._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP23._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP23.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP23.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP23.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP23.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP23.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP23.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP23.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP24) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAO, 0x00)) + { + Return (RPAO) /* \RPAO */ + } + Else + { + Return (0x001B0007) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRO, LTRZ) /* \_SB_.PCI0.RP24.LTRZ */ + Store (PMLO, LMSL) /* \_SB_.PCI0.RP24.LMSL */ + Store (PNLO, LNSL) /* \_SB_.PCI0.RP24.LNSL */ + Store (OBFO, OBFZ) /* \_SB_.PCI0.RP24.OBFZ */ + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) /* \_SB_.PCI0.RP24._DSM.FUN0 */ + If (LTRZ) + { + Store (0x01, FUN6) /* \_SB_.PCI0.RP24._DSM.FUN6 */ + } + + If (OBFZ) + { + Store (0x01, FUN4) /* \_SB_.PCI0.RP24._DSM.FUN4 */ + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) /* \_SB_.PCI0.RP24._DSM.FUN8 */ + Store (0x01, FUN9) /* \_SB_.PCI0.RP24._DSM.FUN9 */ + } + } + } + + Return (OPTS) /* \_SB_.PCI0.RP24._DSM.OPTS */ + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) /* \_SB_.PCI0.RP24.LMSL */ + Store (0x0846, LNSL) /* \_SB_.PCI0.RP24.LNSL */ + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) /* \_SB_.PCI0.RP24.LMSL */ + Store (0x1003, LNSL) /* \_SB_.PCI0.RP24.LNSL */ + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) /* \_SB_.PCI0.RP24.LTRV */ + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) // Device Wake + Store (0x01, PMSX) /* \_SB_.PCI0.RP24.PMSX */ + Store (0x01, PSPX) /* \_SB_.PCI0.RP24.PSPX */ + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (SAT0) + { + Name (_ADR, 0x00170000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (CondRefOf (\_SB.PCI0.SAT0.SDSM)) + { + Return (\_SB.PCI0.SAT0.SDSM (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (PRT0) + { + Name (_ADR, 0xFFFF) // _ADR: Address + } + + Device (PRT1) + { + Name (_ADR, 0x0001FFFF) // _ADR: Address + } + + Device (PRT2) + { + Name (_ADR, 0x0002FFFF) // _ADR: Address + } + + Device (PRT3) + { + Name (_ADR, 0x0003FFFF) // _ADR: Address + } + + Device (PRT4) + { + Name (_ADR, 0x0004FFFF) // _ADR: Address + } + + Device (PRT5) + { + Name (_ADR, 0x0005FFFF) // _ADR: Address + } + + Device (VOL0) + { + Name (_ADR, 0x0080FFFF) // _ADR: Address + } + + Device (VOL1) + { + Name (_ADR, 0x0081FFFF) // _ADR: Address + } + + Device (VOL2) + { + Name (_ADR, 0x0082FFFF) // _ADR: Address + } + + Method (RDCA, 5, Serialized) + { + OperationRegion (RPAL, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (Add (0x000B8000, 0x0100), Arg1)), 0x04) + Field (RPAL, DWordAcc, Lock, Preserve) + { + RPCD, 32 + } + + OperationRegion (EPAC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x0308)), 0x08) + Field (EPAC, DWordAcc, Lock, Preserve) + { + CAIR, 32, + CADR, 32 + } + + OperationRegion (NCRG, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x0FC0)), 0x04) + Field (NCRG, DWordAcc, Lock, Preserve) + { + CRGC, 32 + } + + If (LGreater (Arg0, 0x02)) + { + Return (0x00) + } + Else + { + Store (Arg0, CRGC) /* \_SB_.PCI0.SAT0.RDCA.CRGC */ + } + + Switch (ToInteger (Arg4)) + { + Case (0x00) + { + Return (RPCD) /* \_SB_.PCI0.SAT0.RDCA.RPCD */ + } + Case (0x02) + { + Store (Arg1, CAIR) /* \_SB_.PCI0.SAT0.RDCA.CAIR */ + Return (CADR) /* \_SB_.PCI0.SAT0.RDCA.CADR */ + } + Case (0x01) + { + And (Arg2, RPCD, Local0) + Or (Arg3, Local0, Local0) + Store (Local0, RPCD) /* \_SB_.PCI0.SAT0.RDCA.RPCD */ + } + Case (0x03) + { + Store (Arg1, CAIR) /* \_SB_.PCI0.SAT0.RDCA.CAIR */ + And (Arg2, CADR, Local0) + Or (Arg3, Local0, Local0) + Store (Local0, CADR) /* \_SB_.PCI0.SAT0.RDCA.CADR */ + } + Default + { + Return (0x00) + } + + } + + Return (0x00) + } + + Method (ARPC, 4, Serialized) + { + ADBG (Concatenate ("NRPN: ", ToHexString (Arg0))) + Switch (ToInteger (Arg0)) + { + Case (0x04) + { + If (CondRefOf (\_SB.PCI0.RP05.PWRG)) + { + CopyObject (\_SB.PCI0.RP05.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP05.RSTG)) + { + CopyObject (\_SB.PCI0.RP05.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP05.SCLK)) + { + CopyObject (\_SB.PCI0.RP05.SCLK, Arg3) + } + } + Case (0x08) + { + If (CondRefOf (\_SB.PCI0.RP09.PWRG)) + { + CopyObject (\_SB.PCI0.RP09.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP09.RSTG)) + { + CopyObject (\_SB.PCI0.RP09.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP09.SCLK)) + { + CopyObject (\_SB.PCI0.RP09.SCLK, Arg3) + } + } + Case (0x0C) + { + If (CondRefOf (\_SB.PCI0.RP13.PWRG)) + { + CopyObject (\_SB.PCI0.RP13.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP13.RSTG)) + { + CopyObject (\_SB.PCI0.RP13.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP13.SCLK)) + { + CopyObject (\_SB.PCI0.RP13.SCLK, Arg3) + } + } + Case (0x10) + { + If (CondRefOf (\_SB.PCI0.RP17.PWRG)) + { + CopyObject (\_SB.PCI0.RP17.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP17.RSTG)) + { + CopyObject (\_SB.PCI0.RP17.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP17.SCLK)) + { + CopyObject (\_SB.PCI0.RP17.SCLK, Arg3) + } + } + Default + { + ADBG (Concatenate ("ERR!NRPN: ", ToHexString (Arg0))) + } + + } + } + + Device (NVM1) + { + Name (_ADR, 0x00C1FFFF) // _ADR: Address + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (NIT1, NITV) /* \_SB_.PCI0.SAT0.NVM1.NITV */ + Store (NPM1, NPMV) /* \_SB_.PCI0.SAT0.NVM1.NPMV */ + Store (NPC1, NPCV) /* \_SB_.PCI0.SAT0.NVM1.NPCV */ + Store (NL11, NL1V) /* \_SB_.PCI0.SAT0.NVM1.NL1V */ + Store (ND21, ND2V) /* \_SB_.PCI0.SAT0.NVM1.ND2V */ + Store (ND11, ND1V) /* \_SB_.PCI0.SAT0.NVM1.ND1V */ + Store (NLR1, NLRV) /* \_SB_.PCI0.SAT0.NVM1.NLRV */ + Store (NLD1, NLDV) /* \_SB_.PCI0.SAT0.NVM1.NLDV */ + Store (NEA1, NEAV) /* \_SB_.PCI0.SAT0.NVM1.NEAV */ + Store (NEB1, NEBV) /* \_SB_.PCI0.SAT0.NVM1.NEBV */ + Store (NEC1, NECV) /* \_SB_.PCI0.SAT0.NVM1.NECV */ + Store (NRA1, NRAV) /* \_SB_.PCI0.SAT0.NVM1.NRAV */ + Store (NMB1, NMBV) /* \_SB_.PCI0.SAT0.NVM1.NMBV */ + Store (NMV1, NMVV) /* \_SB_.PCI0.SAT0.NVM1.NMVV */ + Store (NPB1, NPBV) /* \_SB_.PCI0.SAT0.NVM1.NPBV */ + Store (NPV1, NPVV) /* \_SB_.PCI0.SAT0.NVM1.NPVV */ + Store (NRP1, NRPN) /* \_SB_.PCI0.SAT0.NVM1.NRPN */ + Store (0x00, NCRN) /* \_SB_.PCI0.SAT0.NVM1.NCRN */ + ARPC (NRPN, RefOf (PWRG), RefOf (RSTG), RefOf (SCLK)) + } + + Name (PRBI, 0x00) + Name (PRBD, 0x00) + Name (PCMD, 0x00) + Name (RSTG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x00, + 0x00, + 0x00 + }) + Name (NCRN, 0x00) + Name (NITV, 0x00) + Name (NPMV, 0x00) + Name (NPCV, 0x00) + Name (NL1V, 0x00) + Name (ND2V, 0x00) + Name (ND1V, 0x00) + Name (NLRV, 0x00) + Name (NLDV, 0x00) + Name (NEAV, 0x00) + Name (NEBV, 0x00) + Name (NECV, 0x00) + Name (NRAV, 0x00) + Name (NMBV, 0x00) + Name (NMVV, 0x00) + Name (NPBV, 0x00) + Name (NPVV, 0x00) + Name (NRPN, 0x00) + Name (MXIE, 0x00) + Name (ISD3, 0x00) + Method (RPPC, 1, Serialized) + { + If (LEqual (Arg0, 0x00)) + { + RPOF () + } + Else + { + RPON () + } + } + + Method (RPON, 0, Serialized) + { + If (LEqual (ISD3, 0x00)) + { + Return (Zero) + } + + Store (0x00, ISD3) /* \_SB_.PCI0.SAT0.NVM1.ISD3 */ + ADBG (Concatenate ("RPONs: ", ToHexString (NRPN))) + \_SB.PCI0.SAT0.PON (PWRG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.PON (RSTG) + RDCA (NCRN, 0x0420, 0xBFFFFFFF, 0x00, 0x01) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x08, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x08)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0420, 0xFFFFFFFF, 0x40000000, 0x01) + Store (0x00, Local0) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFF7, 0x00, 0x01) + Sleep (0x07D0) + NVD0 () + ADBG (Concatenate ("RPONe: ", ToHexString (NRPN))) + } + + Method (RPOF, 0, Serialized) + { + If (LEqual (NVD3 (), 0x00)) + { + Return (Zero) + } + + ADBG (Concatenate ("POFF NRPN: ", ToHexString (NRPN))) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x04, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x04)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFFF, 0x08, 0x01) + \_SB.PCI0.SAT0.POFF (RSTG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.POFF (PWRG) + RDCA (NCRN, 0x50, 0xFFFFFFFF, 0x10, 0x01) + RDCA (NCRN, 0x50, 0xFFFFFFEF, 0x00, 0x01) + Store (0x03, ISD3) /* \_SB_.PCI0.SAT0.NVM1.ISD3 */ + } + + Method (NVD3, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + Store (RDCA (NCRN, 0x04, 0x00, 0x00, 0x02), PCMD) /* \_SB_.PCI0.SAT0.NVM1.PCMD */ + If (LEqual (NITV, 0x01)) + { + Store (0x24, PRBI) /* \_SB_.PCI0.SAT0.NVM1.PRBI */ + Store (RDCA (NCRN, 0x24, 0x00, 0x00, 0x02), PRBD) /* \_SB_.PCI0.SAT0.NVM1.PRBD */ + } + ElseIf (LEqual (NITV, 0x02)) + { + Store (0x10, PRBI) /* \_SB_.PCI0.SAT0.NVM1.PRBI */ + Store (RDCA (NCRN, 0x10, 0x00, 0x00, 0x02), PRBD) /* \_SB_.PCI0.SAT0.NVM1.PRBD */ + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + Store (RDCA (NCRN, TCSO, 0x00, 0x00, 0x02), MXIE) /* \_SB_.PCI0.SAT0.NVM1.MXIE */ + } + + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03) + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x03, 0x01) + Return (0x01) + } + + Method (NVD0, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x00, 0x01) + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x00, 0x03) + CNRS () + If (LEqual (NITV, 0x02)) + { + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + RDCA (NCRN, TCSO, 0xFFFFFFFF, And (MXIE, 0x80000000), 0x03) + ADBG ("NVD0: MSIXe") + } + Else + { + } + + Return (0x01) + } + + Method (CNRS, 0, Serialized) + { + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |start", Debug) + ADBG (Concatenate ("CNRSs ", ToDecimalString (Timer))) + If (LEqual (NITV, 0x00)) + { + Return (Zero) + } + + RDCA (NCRN, 0x10, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x14, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x18, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x1C, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x20, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x24, 0x00, 0x00, 0x03) + RDCA (NCRN, PRBI, 0x00, PRBD, 0x03) + RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03) + If (LNotEqual (NL1V, 0x00)) + { + RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0), 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03) + } + + If (LNotEqual (NLRV, 0x00)) + { + RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03) + } + + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC), 0x03) + RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03) + RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03) + RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, 0x01) + If (LEqual (And (NEAV, 0x40), 0x40)) + { + RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, 0x01) + ADBG (Concatenate ("CNRSw ", ToDecimalString (Timer))) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + Stall (0x0A) + } + } + + ADBG (Concatenate ("CNRSx ", ToDecimalString (Timer))) + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03), 0x03) + If (LNotEqual (NMVV, 0x00)) + { + RDCA (NCRN, NMBV, 0x00, NMVV, 0x03) + } + + If (LNotEqual (NPVV, 0x00)) + { + RDCA (NCRN, NPBV, 0x00, NPVV, 0x03) + } + + ADBG (Concatenate ("CNRSe ", ToDecimalString (Timer))) + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |complete", Debug) + } + } + + Device (NVM2) + { + Name (_ADR, 0x00C2FFFF) // _ADR: Address + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (NIT2, NITV) /* \_SB_.PCI0.SAT0.NVM2.NITV */ + Store (NPM2, NPMV) /* \_SB_.PCI0.SAT0.NVM2.NPMV */ + Store (NPC2, NPCV) /* \_SB_.PCI0.SAT0.NVM2.NPCV */ + Store (NL12, NL1V) /* \_SB_.PCI0.SAT0.NVM2.NL1V */ + Store (ND22, ND2V) /* \_SB_.PCI0.SAT0.NVM2.ND2V */ + Store (ND12, ND1V) /* \_SB_.PCI0.SAT0.NVM2.ND1V */ + Store (NLR2, NLRV) /* \_SB_.PCI0.SAT0.NVM2.NLRV */ + Store (NLD2, NLDV) /* \_SB_.PCI0.SAT0.NVM2.NLDV */ + Store (NEA2, NEAV) /* \_SB_.PCI0.SAT0.NVM2.NEAV */ + Store (NEB2, NEBV) /* \_SB_.PCI0.SAT0.NVM2.NEBV */ + Store (NEC2, NECV) /* \_SB_.PCI0.SAT0.NVM2.NECV */ + Store (NRA2, NRAV) /* \_SB_.PCI0.SAT0.NVM2.NRAV */ + Store (NMB2, NMBV) /* \_SB_.PCI0.SAT0.NVM2.NMBV */ + Store (NMV2, NMVV) /* \_SB_.PCI0.SAT0.NVM2.NMVV */ + Store (NPB2, NPBV) /* \_SB_.PCI0.SAT0.NVM2.NPBV */ + Store (NPV2, NPVV) /* \_SB_.PCI0.SAT0.NVM2.NPVV */ + Store (NRP2, NRPN) /* \_SB_.PCI0.SAT0.NVM2.NRPN */ + Store (0x01, NCRN) /* \_SB_.PCI0.SAT0.NVM2.NCRN */ + ARPC (NRPN, RefOf (PWRG), RefOf (RSTG), RefOf (SCLK)) + } + + Name (PRBI, 0x00) + Name (PRBD, 0x00) + Name (PCMD, 0x00) + Name (RSTG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x00, + 0x00, + 0x00 + }) + Name (NCRN, 0x00) + Name (NITV, 0x00) + Name (NPMV, 0x00) + Name (NPCV, 0x00) + Name (NL1V, 0x00) + Name (ND2V, 0x00) + Name (ND1V, 0x00) + Name (NLRV, 0x00) + Name (NLDV, 0x00) + Name (NEAV, 0x00) + Name (NEBV, 0x00) + Name (NECV, 0x00) + Name (NRAV, 0x00) + Name (NMBV, 0x00) + Name (NMVV, 0x00) + Name (NPBV, 0x00) + Name (NPVV, 0x00) + Name (NRPN, 0x00) + Name (MXIE, 0x00) + Name (ISD3, 0x00) + Method (RPPC, 1, Serialized) + { + If (LEqual (Arg0, 0x00)) + { + RPOF () + } + Else + { + RPON () + } + } + + Method (RPON, 0, Serialized) + { + If (LEqual (ISD3, 0x00)) + { + Return (Zero) + } + + Store (0x00, ISD3) /* \_SB_.PCI0.SAT0.NVM2.ISD3 */ + ADBG (Concatenate ("RPONs: ", ToHexString (NRPN))) + \_SB.PCI0.SAT0.PON (PWRG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.PON (RSTG) + RDCA (NCRN, 0x0420, 0xBFFFFFFF, 0x00, 0x01) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x08, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x08)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0420, 0xFFFFFFFF, 0x40000000, 0x01) + Store (0x00, Local0) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFF7, 0x00, 0x01) + Sleep (0x07D0) + NVD0 () + ADBG (Concatenate ("RPONe: ", ToHexString (NRPN))) + } + + Method (RPOF, 0, Serialized) + { + If (LEqual (NVD3 (), 0x00)) + { + Return (Zero) + } + + ADBG (Concatenate ("POFF NRPN: ", ToHexString (NRPN))) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x04, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x04)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFFF, 0x08, 0x01) + \_SB.PCI0.SAT0.POFF (RSTG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.POFF (PWRG) + RDCA (NCRN, 0x50, 0xFFFFFFFF, 0x10, 0x01) + RDCA (NCRN, 0x50, 0xFFFFFFEF, 0x00, 0x01) + Store (0x03, ISD3) /* \_SB_.PCI0.SAT0.NVM2.ISD3 */ + } + + Method (NVD3, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + Store (RDCA (NCRN, 0x04, 0x00, 0x00, 0x02), PCMD) /* \_SB_.PCI0.SAT0.NVM2.PCMD */ + If (LEqual (NITV, 0x01)) + { + Store (0x24, PRBI) /* \_SB_.PCI0.SAT0.NVM2.PRBI */ + Store (RDCA (NCRN, 0x24, 0x00, 0x00, 0x02), PRBD) /* \_SB_.PCI0.SAT0.NVM2.PRBD */ + } + ElseIf (LEqual (NITV, 0x02)) + { + Store (0x10, PRBI) /* \_SB_.PCI0.SAT0.NVM2.PRBI */ + Store (RDCA (NCRN, 0x10, 0x00, 0x00, 0x02), PRBD) /* \_SB_.PCI0.SAT0.NVM2.PRBD */ + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + Store (RDCA (NCRN, TCSO, 0x00, 0x00, 0x02), MXIE) /* \_SB_.PCI0.SAT0.NVM2.MXIE */ + } + + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03) + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x03, 0x01) + Return (0x01) + } + + Method (NVD0, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x00, 0x01) + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x00, 0x03) + CNRS () + If (LEqual (NITV, 0x02)) + { + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + RDCA (NCRN, TCSO, 0xFFFFFFFF, And (MXIE, 0x80000000), 0x03) + ADBG ("NVD0: MSIXe") + } + Else + { + } + + Return (0x01) + } + + Method (CNRS, 0, Serialized) + { + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |start", Debug) + ADBG (Concatenate ("CNRSs ", ToDecimalString (Timer))) + If (LEqual (NITV, 0x00)) + { + Return (Zero) + } + + RDCA (NCRN, 0x10, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x14, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x18, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x1C, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x20, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x24, 0x00, 0x00, 0x03) + RDCA (NCRN, PRBI, 0x00, PRBD, 0x03) + RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03) + If (LNotEqual (NL1V, 0x00)) + { + RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0), 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03) + } + + If (LNotEqual (NLRV, 0x00)) + { + RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03) + } + + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC), 0x03) + RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03) + RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03) + RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, 0x01) + If (LEqual (And (NEAV, 0x40), 0x40)) + { + RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, 0x01) + ADBG (Concatenate ("CNRSw ", ToDecimalString (Timer))) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + Stall (0x0A) + } + } + + ADBG (Concatenate ("CNRSx ", ToDecimalString (Timer))) + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03), 0x03) + If (LNotEqual (NMVV, 0x00)) + { + RDCA (NCRN, NMBV, 0x00, NMVV, 0x03) + } + + If (LNotEqual (NPVV, 0x00)) + { + RDCA (NCRN, NPBV, 0x00, NPVV, 0x03) + } + + ADBG (Concatenate ("CNRSe ", ToDecimalString (Timer))) + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |complete", Debug) + } + } + + Device (NVM3) + { + Name (_ADR, 0x00C3FFFF) // _ADR: Address + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (NIT3, NITV) /* \_SB_.PCI0.SAT0.NVM3.NITV */ + Store (NPM3, NPMV) /* \_SB_.PCI0.SAT0.NVM3.NPMV */ + Store (NPC3, NPCV) /* \_SB_.PCI0.SAT0.NVM3.NPCV */ + Store (NL13, NL1V) /* \_SB_.PCI0.SAT0.NVM3.NL1V */ + Store (ND23, ND2V) /* \_SB_.PCI0.SAT0.NVM3.ND2V */ + Store (ND13, ND1V) /* \_SB_.PCI0.SAT0.NVM3.ND1V */ + Store (NLR3, NLRV) /* \_SB_.PCI0.SAT0.NVM3.NLRV */ + Store (NLD3, NLDV) /* \_SB_.PCI0.SAT0.NVM3.NLDV */ + Store (NEA3, NEAV) /* \_SB_.PCI0.SAT0.NVM3.NEAV */ + Store (NEB3, NEBV) /* \_SB_.PCI0.SAT0.NVM3.NEBV */ + Store (NEC3, NECV) /* \_SB_.PCI0.SAT0.NVM3.NECV */ + Store (NRA3, NRAV) /* \_SB_.PCI0.SAT0.NVM3.NRAV */ + Store (NMB3, NMBV) /* \_SB_.PCI0.SAT0.NVM3.NMBV */ + Store (NMV3, NMVV) /* \_SB_.PCI0.SAT0.NVM3.NMVV */ + Store (NPB3, NPBV) /* \_SB_.PCI0.SAT0.NVM3.NPBV */ + Store (NPV3, NPVV) /* \_SB_.PCI0.SAT0.NVM3.NPVV */ + Store (NRP3, NRPN) /* \_SB_.PCI0.SAT0.NVM3.NRPN */ + Store (0x02, NCRN) /* \_SB_.PCI0.SAT0.NVM3.NCRN */ + ARPC (NRPN, RefOf (PWRG), RefOf (RSTG), RefOf (SCLK)) + } + + Name (PRBI, 0x00) + Name (PRBD, 0x00) + Name (PCMD, 0x00) + Name (RSTG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x00, + 0x00, + 0x00 + }) + Name (NCRN, 0x00) + Name (NITV, 0x00) + Name (NPMV, 0x00) + Name (NPCV, 0x00) + Name (NL1V, 0x00) + Name (ND2V, 0x00) + Name (ND1V, 0x00) + Name (NLRV, 0x00) + Name (NLDV, 0x00) + Name (NEAV, 0x00) + Name (NEBV, 0x00) + Name (NECV, 0x00) + Name (NRAV, 0x00) + Name (NMBV, 0x00) + Name (NMVV, 0x00) + Name (NPBV, 0x00) + Name (NPVV, 0x00) + Name (NRPN, 0x00) + Name (MXIE, 0x00) + Name (ISD3, 0x00) + Method (RPPC, 1, Serialized) + { + If (LEqual (Arg0, 0x00)) + { + RPOF () + } + Else + { + RPON () + } + } + + Method (RPON, 0, Serialized) + { + If (LEqual (ISD3, 0x00)) + { + Return (Zero) + } + + Store (0x00, ISD3) /* \_SB_.PCI0.SAT0.NVM3.ISD3 */ + ADBG (Concatenate ("RPONs: ", ToHexString (NRPN))) + \_SB.PCI0.SAT0.PON (PWRG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.PON (RSTG) + RDCA (NCRN, 0x0420, 0xBFFFFFFF, 0x00, 0x01) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x08, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x08)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0420, 0xFFFFFFFF, 0x40000000, 0x01) + Store (0x00, Local0) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFF7, 0x00, 0x01) + Sleep (0x07D0) + NVD0 () + ADBG (Concatenate ("RPONe: ", ToHexString (NRPN))) + } + + Method (RPOF, 0, Serialized) + { + If (LEqual (NVD3 (), 0x00)) + { + Return (Zero) + } + + ADBG (Concatenate ("POFF NRPN: ", ToHexString (NRPN))) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x04, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x04)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFFF, 0x08, 0x01) + \_SB.PCI0.SAT0.POFF (RSTG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.POFF (PWRG) + RDCA (NCRN, 0x50, 0xFFFFFFFF, 0x10, 0x01) + RDCA (NCRN, 0x50, 0xFFFFFFEF, 0x00, 0x01) + Store (0x03, ISD3) /* \_SB_.PCI0.SAT0.NVM3.ISD3 */ + } + + Method (NVD3, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + Store (RDCA (NCRN, 0x04, 0x00, 0x00, 0x02), PCMD) /* \_SB_.PCI0.SAT0.NVM3.PCMD */ + If (LEqual (NITV, 0x01)) + { + Store (0x24, PRBI) /* \_SB_.PCI0.SAT0.NVM3.PRBI */ + Store (RDCA (NCRN, 0x24, 0x00, 0x00, 0x02), PRBD) /* \_SB_.PCI0.SAT0.NVM3.PRBD */ + } + ElseIf (LEqual (NITV, 0x02)) + { + Store (0x10, PRBI) /* \_SB_.PCI0.SAT0.NVM3.PRBI */ + Store (RDCA (NCRN, 0x10, 0x00, 0x00, 0x02), PRBD) /* \_SB_.PCI0.SAT0.NVM3.PRBD */ + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + Store (RDCA (NCRN, TCSO, 0x00, 0x00, 0x02), MXIE) /* \_SB_.PCI0.SAT0.NVM3.MXIE */ + } + + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03) + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x03, 0x01) + Return (0x01) + } + + Method (NVD0, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x00, 0x01) + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x00, 0x03) + CNRS () + If (LEqual (NITV, 0x02)) + { + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + RDCA (NCRN, TCSO, 0xFFFFFFFF, And (MXIE, 0x80000000), 0x03) + ADBG ("NVD0: MSIXe") + } + Else + { + } + + Return (0x01) + } + + Method (CNRS, 0, Serialized) + { + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |start", Debug) + ADBG (Concatenate ("CNRSs ", ToDecimalString (Timer))) + If (LEqual (NITV, 0x00)) + { + Return (Zero) + } + + RDCA (NCRN, 0x10, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x14, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x18, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x1C, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x20, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x24, 0x00, 0x00, 0x03) + RDCA (NCRN, PRBI, 0x00, PRBD, 0x03) + RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03) + If (LNotEqual (NL1V, 0x00)) + { + RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0), 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03) + } + + If (LNotEqual (NLRV, 0x00)) + { + RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03) + } + + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC), 0x03) + RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03) + RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03) + RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, 0x01) + If (LEqual (And (NEAV, 0x40), 0x40)) + { + RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, 0x01) + ADBG (Concatenate ("CNRSw ", ToDecimalString (Timer))) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + Stall (0x0A) + } + } + + ADBG (Concatenate ("CNRSx ", ToDecimalString (Timer))) + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03), 0x03) + If (LNotEqual (NMVV, 0x00)) + { + RDCA (NCRN, NMBV, 0x00, NMVV, 0x03) + } + + If (LNotEqual (NPVV, 0x00)) + { + RDCA (NCRN, NPBV, 0x00, NPVV, 0x03) + } + + ADBG (Concatenate ("CNRSe ", ToDecimalString (Timer))) + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |complete", Debug) + } + } + + Method (PSTA, 1, Serialized) + { + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x00)) + { + Return (0x01) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x01)) + { + If (LEqual (\_SB.GGOV (DerefOf (Index (Arg0, 0x02))), DerefOf (Index (Arg0, 0x03 + )))) + { + Return (0x01) + } + + Return (0x00) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x02)) + { + If (LEqual (\_SB.PCI0.GEXP.GEPS (DerefOf (Index (Arg0, 0x01)), DerefOf (Index (Arg0, 0x02 + ))), DerefOf (Index (Arg0, 0x03)))) + { + Return (0x01) + } + + Return (0x00) + } + + Return (0x00) + } + + Method (PON, 1, Serialized) + { + If (LNotEqual (DerefOf (Index (Arg0, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x01)) + { + ADBG (Concatenate ("PON GPIO=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.SGOV (DerefOf (Index (Arg0, 0x02)), DerefOf (Index (Arg0, 0x03))) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x02)) + { + ADBG (Concatenate ("PON IOEX=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (Arg0, 0x01)), DerefOf (Index (Arg0, 0x02)), DerefOf ( + Index (Arg0, 0x03))) + } + } + } + + Method (POFF, 1, Serialized) + { + If (LNotEqual (DerefOf (Index (Arg0, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x01)) + { + ADBG (Concatenate ("POFF GPIO=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.SGOV (DerefOf (Index (Arg0, 0x02)), XOr (DerefOf (Index (Arg0, 0x03)), + 0x01)) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x02)) + { + ADBG (Concatenate ("POFF IOEX=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (Arg0, 0x01)), DerefOf (Index (Arg0, 0x02)), XOr ( + DerefOf (Index (Arg0, 0x03)), 0x01)) + } + } + } + } + + Device (CIO2) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + If (LEqual (CIOE, 0x01)) + { + Name (_HID, "INT343E") // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (CBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y1D) + { + 0x00000010, + } + Memory32Fixed (ReadWrite, + 0xFE400000, // Address Base + 0x00010000, // Address Length + ) + }) + CreateDWordField (CBUF, \_SB.PCI0.CIO2._CRS._Y1D._INT, CIOV) // _INT: Interrupts + Store (CIOI, CIOV) /* \_SB_.PCI0.CIO2._CRS.CIOV */ + Return (CBUF) /* \_SB_.PCI0.CIO2._CRS.CBUF */ + } + } + Else + { + Name (_ADR, 0x00140003) // _ADR: Address + } + } + + Device (TERM) + { + Name (_HID, "INT343D") // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0xFE03C000, // Address Base + 0x00001000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y1E) + { + 0x00000012, + } + }) + CreateDWordField (RBUF, \_SB.PCI0.TERM._CRS._Y1E._INT, IRQN) // _INT: Interrupts + Store (TIRQ, IRQN) /* \_SB_.PCI0.TERM._CRS.IRQN */ + Return (RBUF) /* \_SB_.PCI0.TERM._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (TAEN, 0x00)) + { + Return (0x00) + } + + If (LEqual (TIRQ, 0x00)) + { + Return (0x00) + } + + Return (0x0F) + } + } + } + + Scope (\_SB) + { + Name (HDAA, 0x00) + Name (DISA, 0x01) + Method (DION, 0, NotSerialized) + { + VMMH (0x01, 0x01) + } + + Method (DIOF, 0, NotSerialized) + { + VMMH (0x01, 0x00) + } + + Method (VMMH, 2, Serialized) + { + If (LOr (LNot (CondRefOf (\_SB.VMON)), LNot (CondRefOf (\_SB.VMOF)))) + { + Return (Zero) + } + + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + Store (Arg1, HDAA) /* \_SB_.HDAA */ + } + Case (0x01) + { + Store (Arg1, DISA) /* \_SB_.DISA */ + } + Default + { + Return (Zero) + } + + } + + If (LAnd (LNot (DISA), LNot (HDAA))) + { + Store (0x00, XSQD) /* \XSQD */ + Store (0x01, SLS0) /* \SLS0 */ + \_SB.VMON () + } + Else + { + Store (0x01, XSQD) /* \XSQD */ + Store (0x00, SLS0) /* \SLS0 */ + \_SB.VMOF () + } + } + } + + Scope (\_SB.PCI0) + { + Method (LPD3, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + PMEC, 32 + } + + Store (0x03, PMEC) /* \_SB_.PCI0.LPD3.PMEC */ + Store (PMEC, TEMP) /* \_SB_.PCI0.TEMP */ + } + + Method (LPD0, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + PMEC, 32 + } + + And (PMEC, 0xFFFF7FFC, PMEC) /* \_SB_.PCI0.LPD0.PMEC */ + Store (PMEC, TEMP) /* \_SB_.PCI0.TEMP */ + } + + Method (LHRV, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x08), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + HRV, 8 + } + + Return (HRV) /* \_SB_.PCI0.LHRV.HRV_ */ + } + + Method (GETD, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + PMEC, 32 + } + + Return (And (PMEC, 0x03)) + } + + Method (LCRS, 3, Serialized) + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y1F) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y20) + { + 0x00000014, + } + }) + CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y1F._BAS, BVAL) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y1F._LEN, BLEN) // _LEN: Length + CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y20._INT, IRQN) // _INT: Interrupts + Store (Arg1, BVAL) /* \_SB_.PCI0.LCRS.BVAL */ + Store (Arg2, IRQN) /* \_SB_.PCI0.LCRS.IRQN */ + If (LEqual (Arg0, 0x04)) + { + Store (0x08, BLEN) /* \_SB_.PCI0.LCRS.BLEN */ + } + + Return (RBUF) /* \_SB_.PCI0.LCRS.RBUF */ + } + + Method (LSTA, 1, Serialized) + { + If (LOr (LEqual (Arg0, 0x00), LEqual (Arg0, 0x03))) + { + Return (0x00) + } + + If (LLess (OSYS, 0x07DC)) + { + Return (0x00) + } + + Return (0x0F) + } + + Method (GIRQ, 1, Serialized) + { + Return (Add (0x18, Mod (Arg0, 0x60))) + } + } + + Scope (\_SB.PCI0) + { + Device (SIRC) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_STA, 0x03) // _STA: Status + Name (_UID, 0x05) // _UID: Unique ID + Method (ADDB, 3, Serialized) + { + Name (BUFF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y21) + }) + CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y21._BAS, ADDR) // _BAS: Base Address + CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y21._LEN, LENG) // _LEN: Length + Store (Buffer (0x02) + { + 0x79, 0x00 // y. + }, Local0) + If (LOr (LOr (LEqual (Arg0, 0x01), LEqual (Arg0, 0x03)), LEqual (Arg0, 0x04))) + { + Store (Arg2, ADDR) /* \_SB_.PCI0.SIRC.ADDB.ADDR */ + ConcatenateResTemplate (Local0, BUFF, Local1) + Store (Local1, Local0) + } + + If (LEqual (Arg0, 0x03)) + { + Store (Arg1, ADDR) /* \_SB_.PCI0.SIRC.ADDB.ADDR */ + ConcatenateResTemplate (Local0, BUFF, Local1) + Store (Local1, Local0) + } + + If (LEqual (Arg0, 0x04)) + { + Store (Add (0x08, Arg1), ADDR) /* \_SB_.PCI0.SIRC.ADDB.ADDR */ + Store (0x0FF8, LENG) /* \_SB_.PCI0.SIRC.ADDB.LENG */ + ConcatenateResTemplate (Local0, BUFF, Local1) + Store (Local1, Local0) + } + + Return (Local0) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Store (Buffer (0x02) + { + 0x79, 0x00 // y. + }, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD0, SB00, SB10), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD1, SB01, SB11), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD2, SB02, SB12), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD3, SB03, SB13), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD4, SB04, SB14), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD5, SB05, SB15), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD6, SB06, SB16), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD7, SB07, SB17), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD8, SB08, SB18), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD9, SB09, SB19), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMDA, SB0A, SB1A), Local1) + Store (Local1, Local0) + If (LEqual (\_SB.PCI0.GPI0._STA (), 0x00)) + { + ConcatenateResTemplate (Local0, \_SB.PCI0.GPI0._CRS (), Local1) + Store (Local1, Local0) + } + + Return (Local0) + } + } + + Device (GPI0) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (PCHV (), SPTH)) + { + If (LEqual (PCHG, 0x02)) + { + Return ("INT3451") + } + + Return ("INT345D") + } + + Return ("INT344B") + } + + Name (LINK, "\\_SB.PCI0.GPI0") + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00010000, // Address Length + _Y22) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00010000, // Address Length + _Y23) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00010000, // Address Length + _Y25) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y24) + { + 0x0000000E, + } + }) + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y22._BAS, COM0) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y23._BAS, COM1) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y24._INT, IRQN) // _INT: Interrupts + Store (Add (SBRG, 0x00AF0000), COM0) /* \_SB_.PCI0.GPI0._CRS.COM0 */ + Store (Add (SBRG, 0x00AE0000), COM1) /* \_SB_.PCI0.GPI0._CRS.COM1 */ + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y25._BAS, COM3) // _BAS: Base Address + Store (Add (SBRG, 0x00AC0000), COM3) /* \_SB_.PCI0.GPI0._CRS.COM3 */ + Store (SGIR, IRQN) /* \_SB_.PCI0.GPI0._CRS.IRQN */ + Return (RBUF) /* \_SB_.PCI0.GPI0._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (SBRG, 0x00)) + { + Return (0x00) + } + + If (LEqual (GPEN, 0x00)) + { + Return (0x00) + } + + Return (0x0F) + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C0) + { + Name (LINK, "\\_SB.PCI0.I2C0") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB10)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB10) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB10) + } + + If (LNotEqual (SMD0, 0x02)) + { + Name (_HID, "INT3442") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB10)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD0, SB00, SIR0)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD0)) + } + } + + If (LEqual (SMD0, 0x02)) + { + Name (_ADR, 0x00150000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C1) + { + Name (LINK, "\\_SB.PCI0.I2C1") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB11)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB11) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB11) + } + + If (LNotEqual (SMD1, 0x02)) + { + Name (_HID, "INT3443") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB11)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD1, SB01, SIR1)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD1)) + } + } + + If (LEqual (SMD1, 0x02)) + { + Name (_ADR, 0x00150001) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C2) + { + Name (LINK, "\\_SB.PCI0.I2C2") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB12)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB12) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB12) + } + + If (LNotEqual (SMD2, 0x02)) + { + Name (_HID, "INT3444") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB12)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD2, SB02, SIR2)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD2)) + } + } + + If (LEqual (SMD2, 0x02)) + { + Name (_ADR, 0x00150002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C3) + { + Name (LINK, "\\_SB.PCI0.I2C3") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB13)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB13) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB13) + } + + If (LNotEqual (SMD3, 0x02)) + { + Name (_HID, "INT3445") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB13)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD3, SB03, SIR3)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD3)) + } + } + + If (LEqual (SMD3, 0x02)) + { + Name (_ADR, 0x00150003) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C4) + { + Name (LINK, "\\_SB.PCI0.I2C4") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB14)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB14) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB14) + } + + If (LNotEqual (SMD4, 0x02)) + { + Name (_HID, "INT3446") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB14)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD4, SB04, SIR4)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD4)) + } + } + + If (LEqual (SMD4, 0x02)) + { + Name (_ADR, 0x00190002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C5) + { + Name (LINK, "\\_SB.PCI0.I2C5") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB15)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB15) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB15) + } + + If (LNotEqual (SMD5, 0x02)) + { + Name (_HID, "INT3447") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB15)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD5, SB05, SIR5)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD5)) + } + } + + If (LEqual (SMD5, 0x02)) + { + Name (_ADR, 0x00190001) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (SPI0) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB16)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB16) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB16) + } + + If (LNotEqual (SMD6, 0x02)) + { + Name (_HID, "INT3440") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB16)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD6, SB06, SIR6)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD6)) + } + } + + If (LEqual (SMD6, 0x02)) + { + Name (_ADR, 0x001E0002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (SPI1) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB17)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB17) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB17) + } + + If (LNotEqual (SMD7, 0x02)) + { + Name (_HID, "INT3441") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB17)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD7, SB07, SIR7)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD7)) + } + } + + If (LEqual (SMD7, 0x02)) + { + Name (_ADR, 0x001E0003) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (UA00) + { + If (LNotEqual (SMD8, 0x02)) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SMD8, 0x04)) + { + Return (0x020CD041) + } + Else + { + Return ("INT3448") + } + } + + Name (_UID, "SerialIoUart0") // _UID: Unique ID + Name (_DDN, "SerialIoUart0") // _DDN: DOS Device Name + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB18)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD8, SB08, SIR8)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD8)) + } + } + + If (LEqual (SMD8, 0x02)) + { + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + + If (LNotEqual (SMD8, 0x04)) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB18)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB18) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB18) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (UA01) + { + If (LNotEqual (SMD9, 0x02)) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SMD9, 0x04)) + { + Return (0x020CD041) + } + Else + { + Return ("INT3449") + } + } + + Name (_UID, "SerialIoUart1") // _UID: Unique ID + Name (_DDN, "SerialIoUart1") // _DDN: DOS Device Name + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB19)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD9, SB09, SIR9)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD9)) + } + } + + If (LEqual (SMD9, 0x02)) + { + Name (_ADR, 0x001E0001) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + + If (LNotEqual (SMD9, 0x04)) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB19)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB19) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB19) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (UA02) + { + If (LNotEqual (SMDA, 0x02)) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SMDA, 0x04)) + { + Return (0x020CD041) + } + Else + { + Return ("INT344A") + } + } + + Name (_UID, "SerialIoUart2") // _UID: Unique ID + Name (_DDN, "SerialIoUart2") // _DDN: DOS Device Name + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB1A)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMDA, SB0A, SIRA)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMDA)) + } + } + + If (LEqual (SMDA, 0x02)) + { + Name (_ADR, 0x00190000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + + If (LNotEqual (SMDA, 0x04)) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB1A)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB1A) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB1A) + } + } + } + } + + Scope (\_SB.PCI0) + { + Name (HIDG, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */) + Name (TP7G, ToUUID ("ef87eb82-f951-46da-84ec-14871ac6f84b")) + Method (HIDD, 5, Serialized) + { + If (LEqual (Arg0, HIDG)) + { + If (LEqual (Arg2, Zero)) + { + If (LEqual (Arg1, One)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + } + + If (LEqual (Arg2, One)) + { + Return (Arg4) + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Method (TP7D, 6, Serialized) + { + If (LEqual (Arg0, TP7G)) + { + If (LEqual (Arg2, Zero)) + { + If (LEqual (Arg1, One)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + } + + If (LEqual (Arg2, One)) + { + Return (ConcatenateResTemplate (Arg4, Arg5)) + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + + Scope (\_SB.PCI0.I2C0) + { + Device (TPD0) + { + Name (HID2, 0x00) + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x0020, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, _Y26, Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y27) + { + 0x00000000, + } + }) + Name (SBFG, ResourceTemplate () + { + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y26._ADR, BADR) // _ADR: Address + CreateDWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y26._SPE, SPED) // _SPE: Speed + CreateWordField (SBFG, 0x17, INT1) + CreateDWordField (SBFI, \_SB.PCI0.I2C0.TPD0._Y27._INT, INT2) // _INT: Interrupts + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (LLess (OSYS, 0x07DC)) + { + SRXO (GPDI, 0x01) + } + + Store (GNUM (GPDI), INT1) /* \_SB_.PCI0.I2C0.TPD0.INT1 */ + Store (INUM (GPDI), INT2) /* \_SB_.PCI0.I2C0.TPD0.INT2 */ + If (LEqual (SDM0, 0x00)) + { + SHPO (GPDI, 0x01) + } + + If (LEqual (SDS0, 0x01)) + { + Store ("SYNA2393", _HID) /* \_SB_.PCI0.I2C0.TPD0._HID */ + Store (0x20, HID2) /* \_SB_.PCI0.I2C0.TPD0.HID2 */ + Return (Zero) + } + + If (LEqual (SDS0, 0x02)) + { + Store ("06CB2846", _HID) /* \_SB_.PCI0.I2C0.TPD0._HID */ + Store (0x20, HID2) /* \_SB_.PCI0.I2C0.TPD0.HID2 */ + Return (Zero) + } + + If (LEqual (SDS0, 0x06)) + { + Store ("ALPS0000", _HID) /* \_SB_.PCI0.I2C0.TPD0._HID */ + Store (0x20, HID2) /* \_SB_.PCI0.I2C0.TPD0.HID2 */ + Store (0x2C, BADR) /* \_SB_.PCI0.I2C0.TPD0.BADR */ + Return (Zero) + } + + If (LEqual (SDS0, 0x05)) + { + Store ("CUST0001", _HID) /* \_SB_.PCI0.I2C0.TPD0._HID */ + Store (TPDH, HID2) /* \_SB_.PCI0.I2C0.TPD0.HID2 */ + Store (TPDB, BADR) /* \_SB_.PCI0.I2C0.TPD0.BADR */ + If (LEqual (TPDS, 0x00)) + { + Store (0x000186A0, SPED) /* \_SB_.PCI0.I2C0.TPD0.SPED */ + } + + If (LEqual (TPDS, 0x01)) + { + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C0.TPD0.SPED */ + } + + If (LEqual (TPDS, 0x02)) + { + Store (0x000F4240, SPED) /* \_SB_.PCI0.I2C0.TPD0.SPED */ + } + + Return (Zero) + } + } + + Name (_HID, "XXXX0000") // _HID: Hardware ID + Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID + Name (_S0W, 0x03) // _S0W: S0 Device Wake State + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, HIDG)) + { + Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2)) + } + + If (LEqual (Arg0, TP7G)) + { + Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LOr (LEqual (SDS0, 0x05), LOr (LEqual (SDS0, 0x01), LOr (LEqual (SDS0, + 0x02), LEqual (SDS0, 0x06))))) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + If (LLess (OSYS, 0x07DC)) + { + Return (SBFI) /* \_SB_.PCI0.I2C0.TPD0.SBFI */ + } + + If (LEqual (SDM0, 0x00)) + { + Return (ConcatenateResTemplate (SBFB, SBFG)) + } + + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + } + + Device (HDAC) + { + Name (_HID, "INT0000") // _HID: Hardware ID + Name (_CID, "INT0000") // _CID: Compatible ID + Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec") // _DDN: DOS Device Name + Name (_UID, 0x01) // _UID: Unique ID + Name (CADR, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (LOr (LEqual (I2SC, 0x01), LEqual (I2SC, 0x02))) + { + Store ("INT343A", _HID) /* \_SB_.PCI0.I2C0.HDAC._HID */ + Store ("INT343A", _CID) /* \_SB_.PCI0.I2C0.HDAC._CID */ + Store (0x1C, CADR) /* \_SB_.PCI0.I2C0.HDAC.CADR */ + Return (Zero) + } + + If (LEqual (I2SC, 0x03)) + { + Store ("INT343B", _HID) /* \_SB_.PCI0.I2C0.HDAC._HID */ + Store ("INT343B", _CID) /* \_SB_.PCI0.I2C0.HDAC._CID */ + Store (0x34, CADR) /* \_SB_.PCI0.I2C0.HDAC.CADR */ + Return (Zero) + } + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x0000, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, _Y28, Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y29) + { + 0x00000000, + } + }) + CreateWordField (SBFB, \_SB.PCI0.I2C0.HDAC._CRS._Y28._ADR, ADR) // _ADR: Address + Store (CADR, ADR) /* \_SB_.PCI0.I2C0.HDAC._CRS.ADR_ */ + CreateDWordField (SBFI, \_SB.PCI0.I2C0.HDAC._CRS._Y29._INT, AINT) // _INT: Interrupts + Store (INUM (0x02040016), AINT) /* \_SB_.PCI0.I2C0.HDAC._CRS.AINT */ + If (LEqual (HAID, 0x01)) + { + Return (SBFB) /* \_SB_.PCI0.I2C0.HDAC._CRS.SBFB */ + } + + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (I2SC, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + } + + Device (UCM1) + { + Name (_HID, "INT3515") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x0038, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2A) + { + 0x00000000, + } + }) + CreateDWordField (SBFI, \_SB.PCI0.I2C0.UCM1._CRS._Y2A._INT, GINT) // _INT: Interrupts + Store (INUM (UCG1), GINT) /* \_SB_.PCI0.I2C0.UCM1._CRS.GINT */ + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (UCSI, 0x01)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + } + + Device (UCM2) + { + Name (_HID, "INT3515") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x003F, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2B) + { + 0x00000000, + } + }) + CreateDWordField (SBFI, \_SB.PCI0.I2C0.UCM2._CRS._Y2B._INT, GINT) // _INT: Interrupts + Store (INUM (UCG2), GINT) /* \_SB_.PCI0.I2C0.UCM2._CRS.GINT */ + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (UCSI, 0x01)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + } + } + + Scope (\_SB.PCI0.I2C1) + { + Device (TPL1) + { + Name (HID2, 0x00) + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x004C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C1", + 0x00, ResourceConsumer, _Y2C, Exclusive, + ) + }) + Name (SBFG, ResourceTemplate () + { + GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2D) + { + 0x00000000, + } + }) + CreateWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y2C._ADR, BADR) // _ADR: Address + CreateDWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y2C._SPE, SPED) // _SPE: Speed + CreateDWordField (SBFI, \_SB.PCI0.I2C1.TPL1._Y2D._INT, INT2) // _INT: Interrupts + CreateWordField (SBFG, 0x17, INT1) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (LLess (OSYS, 0x07DC)) + { + SRXO (GPLI, 0x01) + } + + Store (GNUM (GPLI), INT1) /* \_SB_.PCI0.I2C1.TPL1.INT1 */ + Store (INUM (GPLI), INT2) /* \_SB_.PCI0.I2C1.TPL1.INT2 */ + If (LEqual (SDM1, 0x00)) + { + SHPO (GPLI, 0x01) + } + + If (LEqual (SDS1, 0x01)) + { + Store ("ATML3432", _HID) /* \_SB_.PCI0.I2C1.TPL1._HID */ + Store (0x00, HID2) /* \_SB_.PCI0.I2C1.TPL1.HID2 */ + Store (0x4C, BADR) /* \_SB_.PCI0.I2C1.TPL1.BADR */ + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + Return (Zero) + } + + If (LEqual (SDS1, 0x02)) + { + Store ("ATML2952", _HID) /* \_SB_.PCI0.I2C1.TPL1._HID */ + Store (0x00, HID2) /* \_SB_.PCI0.I2C1.TPL1.HID2 */ + Store (0x4A, BADR) /* \_SB_.PCI0.I2C1.TPL1.BADR */ + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + Return (Zero) + } + + If (LEqual (SDS1, 0x03)) + { + Store ("ELAN2097", _HID) /* \_SB_.PCI0.I2C1.TPL1._HID */ + Store (0x01, HID2) /* \_SB_.PCI0.I2C1.TPL1.HID2 */ + Store (0x10, BADR) /* \_SB_.PCI0.I2C1.TPL1.BADR */ + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + Return (Zero) + } + + If (LEqual (SDS1, 0x04)) + { + Store ("NTRG0001", _HID) /* \_SB_.PCI0.I2C1.TPL1._HID */ + Store (0x01, HID2) /* \_SB_.PCI0.I2C1.TPL1.HID2 */ + Store (0x07, BADR) /* \_SB_.PCI0.I2C1.TPL1.BADR */ + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + Return (Zero) + } + + If (LEqual (SDS1, 0x05)) + { + Store ("NTRG0002", _HID) /* \_SB_.PCI0.I2C1.TPL1._HID */ + Store (0x01, HID2) /* \_SB_.PCI0.I2C1.TPL1.HID2 */ + Store (0x64, BADR) /* \_SB_.PCI0.I2C1.TPL1.BADR */ + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + Return (Zero) + } + + If (LEqual (SDS1, 0x06)) + { + Store ("WCOM508E", _HID) /* \_SB_.PCI0.I2C1.TPL1._HID */ + Store (0x01, HID2) /* \_SB_.PCI0.I2C1.TPL1.HID2 */ + Store (0x0A, BADR) /* \_SB_.PCI0.I2C1.TPL1.BADR */ + If (LEqual (TPLS, 0x00)) + { + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + } + + If (LEqual (TPLS, 0x01)) + { + Store (0x000F4240, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + } + + Return (Zero) + } + + If (LEqual (SDS1, 0x07)) + { + Store ("CUST0000", _HID) /* \_SB_.PCI0.I2C1.TPL1._HID */ + Store (TPLH, HID2) /* \_SB_.PCI0.I2C1.TPL1.HID2 */ + Store (TPLB, BADR) /* \_SB_.PCI0.I2C1.TPL1.BADR */ + If (LEqual (TPLS, 0x00)) + { + Store (0x000186A0, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + } + + If (LEqual (TPLS, 0x01)) + { + Store (0x00061A80, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + } + + If (LEqual (TPLS, 0x02)) + { + Store (0x000F4240, SPED) /* \_SB_.PCI0.I2C1.TPL1.SPED */ + } + + Return (Zero) + } + } + + Name (_HID, "XXXX0000") // _HID: Hardware ID + Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID + Name (_S0W, 0x04) // _S0W: S0 Device Wake State + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, HIDG)) + { + Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2)) + } + + If (LEqual (Arg0, TP7G)) + { + Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG)) + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (SDS1, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + If (LLess (OSYS, 0x07DC)) + { + Return (SBFI) /* \_SB_.PCI0.I2C1.TPL1.SBFI */ + } + + If (LEqual (SDM1, 0x00)) + { + Return (ConcatenateResTemplate (SBFB, SBFG)) + } + + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + } + + Device (IMP3) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "IMPJ0003") // _HID: Hardware ID + Name (_CID, "IMPJ0003") // _CID: Compatible ID + Name (_UID, One) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (HAID, 0x01)) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x006E, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C1", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Return (SBUF) /* \_SB_.PCI0.I2C1.IMP3._CRS.SBUF */ + } + } + } + + Scope (\_SB.PCI0.SPI1) + { + Device (FPNT) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SDS7, 0x01)) + { + Return ("FPC1011") + } + + If (LEqual (SDS7, 0x02)) + { + Return ("FPC1020") + } + + If (LEqual (SDS7, 0x03)) + { + Return ("VFSI6101") + } + + If (LEqual (SDS7, 0x04)) + { + Return ("VFSI7500") + } + + If (LEqual (SDS7, 0x05)) + { + Return ("EGIS0300") + } + + If (LEqual (SDS7, 0x06)) + { + Return ("FPC1021") + } + + Return ("FPNT_DIS") + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + SHPO (GFPI, 0x01) + SHPO (GFPS, 0x01) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (SDS7, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (BBUF, ResourceTemplate () + { + SpiSerialBusV2 (0x0000, PolarityLow, FourWireMode, 0x08, + ControllerInitiated, 0x00989680, ClockPolarityLow, + ClockPhaseFirst, "\\_SB.PCI0.SPI1", + 0x00, ResourceConsumer, _Y2E, Exclusive, + ) + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0008 + } + }) + Name (IBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y2F) + { + 0x00000000, + } + }) + Name (GBUF, ResourceTemplate () + { + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, _Y30, + ) + { // Pin list + 0x0000 + } + }) + Name (UBUF, ResourceTemplate () + { + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateDWordField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2E._SPE, SPEX) // _SPE: Speed + CreateByteField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2E._PHA, PHAX) // _PHA: Clock Phase + CreateWordField (BBUF, 0x3B, SPIN) + CreateWordField (GBUF, 0x17, GPIN) + CreateDWordField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2F._INT, IPIN) // _INT: Interrupts + CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2F._LL, ILVL) // _LL_: Low Level + CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2F._HE, ITRG) // _HE_: High-Edge + CreateField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y30._POL, 0x02, GLVL) // _POL: Polarity + CreateBitField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y30._MOD, GTRG) // _MOD: Mode + CreateBitField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2E._DPL, SCSP) // _DPL: Device Selection Polarity + CreateWordField (UBUF, 0x17, UPIN) + Store (GNUM (GFPS), SPIN) /* \_SB_.PCI0.SPI1.FPNT._CRS.SPIN */ + Store (GNUM (GFPI), GPIN) /* \_SB_.PCI0.SPI1.FPNT._CRS.GPIN */ + Store (INUM (GFPI), IPIN) /* \_SB_.PCI0.SPI1.FPNT._CRS.IPIN */ + Store (GNUM (GFPI), UPIN) /* \_SB_.PCI0.SPI1.FPNT._CRS.UPIN */ + If (LOr (LEqual (SDS7, 0x02), LEqual (SDS7, 0x06))) + { + Store (0x00, ILVL) /* \_SB_.PCI0.SPI1.FPNT._CRS.ILVL */ + Store (0x01, ITRG) /* \_SB_.PCI0.SPI1.FPNT._CRS.ITRG */ + Store (0x00, GLVL) /* \_SB_.PCI0.SPI1.FPNT._CRS.GLVL */ + Store (0x01, GTRG) /* \_SB_.PCI0.SPI1.FPNT._CRS.GTRG */ + } + + If (LEqual (SDS7, 0x04)) + { + Store (0x00, ILVL) /* \_SB_.PCI0.SPI1.FPNT._CRS.ILVL */ + Store (0x01, ITRG) /* \_SB_.PCI0.SPI1.FPNT._CRS.ITRG */ + } + + Switch (ToInteger (SDS7)) + { + Case (0x01) + { + Store (0x00989680, SPEX) /* \_SB_.PCI0.SPI1.FPNT._CRS.SPEX */ + Store (0x00, PHAX) /* \_SB_.PCI0.SPI1.FPNT._CRS.PHAX */ + } + Case (0x02) + { + Store (0x002DC6C0, SPEX) /* \_SB_.PCI0.SPI1.FPNT._CRS.SPEX */ + Store (0x00, PHAX) /* \_SB_.PCI0.SPI1.FPNT._CRS.PHAX */ + } + Case (0x03) + { + Store (0x007A1200, SPEX) /* \_SB_.PCI0.SPI1.FPNT._CRS.SPEX */ + Store (0x01, PHAX) /* \_SB_.PCI0.SPI1.FPNT._CRS.PHAX */ + } + Case (0x04) + { + Store (0x007A1200, SPEX) /* \_SB_.PCI0.SPI1.FPNT._CRS.SPEX */ + Store (0x00, PHAX) /* \_SB_.PCI0.SPI1.FPNT._CRS.PHAX */ + } + Case (0x05) + { + Store (0x00F42400, SPEX) /* \_SB_.PCI0.SPI1.FPNT._CRS.SPEX */ + Store (0x00, PHAX) /* \_SB_.PCI0.SPI1.FPNT._CRS.PHAX */ + } + Case (0x06) + { + Store (0x002DC6C0, SPEX) /* \_SB_.PCI0.SPI1.FPNT._CRS.SPEX */ + Store (0x00, PHAX) /* \_SB_.PCI0.SPI1.FPNT._CRS.PHAX */ + } + Default + { + } + + } + + If (LEqual (SDS7, 0x01)) + { + Return (BBUF) /* \_SB_.PCI0.SPI1.FPNT._CRS.BBUF */ + } + + If (LAnd (LEqual (SDS7, 0x04), LEqual (SDM7, 0x00))) + { + Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, GBUF))) + } + + If (LAnd (LEqual (SDS7, 0x04), LNotEqual (SDM7, 0x00))) + { + Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, IBUF))) + } + + If (LEqual (SDM7, 0x00)) + { + Return (ConcatenateResTemplate (BBUF, GBUF)) + } + + Return (ConcatenateResTemplate (BBUF, IBUF)) + } + } + } + + Scope (\_SB.PCI0.UA00) + { + Device (BTH0) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SDS8, 0x01)) + { + Return ("INT33E1") + } + + If (LEqual (SDS8, 0x02)) + { + Return ("BCM2E40") + } + + Return ("INT33E1") + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + SHPO (GBTI, 0x01) + SHPO (GBTW, 0x01) + SHPO (GBTK, 0x01) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFG, ResourceTemplate () + { + UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, + 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware, + 0x0020, 0x0020, "\\_SB.PCI0.UA00", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateWordField (SBFG, 0x8C, INT3) + CreateWordField (SBFG, 0x3C, WAK3) + CreateWordField (SBFG, 0x64, KIL3) + Store (GNUM (GBTI), INT3) /* \_SB_.PCI0.UA00.BTH0._CRS.INT3 */ + Store (GNUM (GBTW), WAK3) /* \_SB_.PCI0.UA00.BTH0._CRS.WAK3 */ + Store (GNUM (GBTK), KIL3) /* \_SB_.PCI0.UA00.BTH0._CRS.KIL3 */ + Name (SBFI, ResourceTemplate () + { + UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, + 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware, + 0x0020, 0x0020, "\\_SB.PCI0.UA00", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + Interrupt (ResourceConsumer, Edge, ActiveLow, ExclusiveAndWake, ,, _Y31) + { + 0x00000000, + } + }) + CreateDWordField (SBFI, \_SB.PCI0.UA00.BTH0._CRS._Y31._INT, INT4) // _INT: Interrupts + CreateWordField (SBFI, 0x3C, WAK4) + CreateWordField (SBFI, 0x64, KIL4) + Store (INUM (GBTI), INT4) /* \_SB_.PCI0.UA00.BTH0._CRS.INT4 */ + Store (GNUM (GBTW), WAK4) /* \_SB_.PCI0.UA00.BTH0._CRS.WAK4 */ + Store (GNUM (GBTK), KIL4) /* \_SB_.PCI0.UA00.BTH0._CRS.KIL4 */ + If (LEqual (SDM8, 0x00)) + { + Return (SBFG) /* \_SB_.PCI0.UA00.BTH0._CRS.SBFG */ + } + Else + { + Return (SBFI) /* \_SB_.PCI0.UA00.BTH0._CRS.SBFI */ + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (SDS8, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + + Name (_S0W, 0x02) // _S0W: S0 Device Wake State + } + } + + Scope (\_SB.PCI0) + { + Device (GNSS) + { + Name (_HID, "INT33A2") // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (BUF1, ResourceTemplate () + { + UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, + 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware, + 0x0040, 0x0040, "\\_SB.PCI0.UA01", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Name (BUF2, ResourceTemplate () + { + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateWordField (BUF2, 0x17, RPIN) + Store (GNUM (GGNR), RPIN) /* \_SB_.PCI0.GNSS._CRS.RPIN */ + If (LEqual (GNSC, 0x01)) + { + Return (ConcatenateResTemplate (BUF1, BUF2)) + } + Else + { + Return (BUF2) /* \_SB_.PCI0.GNSS._CRS.BUF2 */ + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (GNSC, 0x00)) + { + Return (0x00) + } + + Return (0x0F) + } + } + } + + Scope (\_SB.PCI0) + { + Device (GEXP) + { + Name (_ADR, 0x01) // _ADR: Address + Name (_STA, 0x0B) // _STA: Status + OperationRegion (BAR0, SystemMemory, SB04, 0x0208) + Field (BAR0, DWordAcc, NoLock, Preserve) + { + ICON, 32, + TAR, 32, + Offset (0x10), + DATA, 32, + HCNT, 32, + LCNT, 32, + Offset (0x2C), + , 5, + ABRT, 1, + Offset (0x40), + RBCK, 32, + Offset (0x54), + CLR, 32, + Offset (0x6C), + ENB, 1, + Offset (0x70), + ACTV, 1, + TFNF, 1, + , 1, + RFNE, 1, + Offset (0x7C), + HOLD, 32, + Offset (0x9C), + ENSB, 1, + Offset (0x204), + RST, 32 + } + + Method (SGEP, 3, Serialized) + { + CSER (GEXN, Arg0, Arg1, Arg2, 0x00) + } + + Method (SGED, 3, Serialized) + { + CSER (GEXN, Arg0, Arg1, Arg2, 0x01) + } + + Method (GEPS, 2, Serialized) + { + Return (CSER (GEXN, Arg0, Arg1, 0x00, 0x02)) + } + + Method (SGEI, 3, Serialized) + { + CSER (GEXN, Arg0, Arg1, Arg2, 0x03) + } + + Method (INVC, 0, NotSerialized) + { + Store (0x00, Local0) + While (LLess (Local0, 0x10)) + { + If (LEqual (R3DC (0x00, Local0, 0x00), 0x02)) + { + W3DC (0x00, Local0, 0x00, 0x01) + } + + If (LEqual (R3DC (0x01, Local0, 0x00), 0x02)) + { + W3DC (0x01, Local0, 0x00, 0x01) + } + + Add (Local0, 0x01, Local0) + } + } + + Name (PPR, 0x08) + Name (INR, Package (0x03) + { + 0x00, + 0x01, + 0x02 + }) + Name (OUTR, Package (0x03) + { + 0x04, + 0x05, + 0x06 + }) + Name (CFGR, Package (0x03) + { + 0x0C, + 0x0D, + 0x0E + }) + Name (POLR, Package (0x03) + { + 0x08, + 0x09, + 0x0A + }) + Name (EXPA, 0x22) + Name (UCCH, 0x01) + Name (END, 0x0200) + Name (READ, 0x0100) + Name (TEMP, 0x00) + Name (CACH, Package (0x02) + { + Package (0x10) + { + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + } + }, + + Package (0x10) + { + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + } + } + }) + Method (W3DC, 4, NotSerialized) + { + Store (Arg3, Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)), Arg1)), + Arg2)) + } + + Method (R3DC, 3, NotSerialized) + { + Return (DerefOf (Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)), Arg1)), + Arg2))) + } + + Method (WREG, 4, Serialized) + { + Store (Add (Timer, 0xC350), Local1) + Store (0x07, RST) /* \_SB_.PCI0.GEXP.RST_ */ + Store (0x00, ENB) /* \_SB_.PCI0.GEXP.ENB_ */ + Store (RBCK, TEMP) /* \_SB_.PCI0.GEXP.TEMP */ + Store (CLR, TEMP) /* \_SB_.PCI0.GEXP.TEMP */ + Store (0x001C001C, HOLD) /* \_SB_.PCI0.GEXP.HOLD */ + Store (0x0210, HCNT) /* \_SB_.PCI0.GEXP.HCNT */ + Store (0x0280, LCNT) /* \_SB_.PCI0.GEXP.LCNT */ + Store (Add (EXPA, Arg1), TAR) /* \_SB_.PCI0.GEXP.TAR_ */ + Store (0x65, ICON) /* \_SB_.PCI0.GEXP.ICON */ + Store (0x01, ENB) /* \_SB_.PCI0.GEXP.ENB_ */ + While (LNotEqual (ENSB, 0x01)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (Arg2, DATA) /* \_SB_.PCI0.GEXP.DATA */ + Store (Add (END, Arg3), DATA) /* \_SB_.PCI0.GEXP.DATA */ + While (LNotEqual (ACTV, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (0x00, ENB) /* \_SB_.PCI0.GEXP.ENB_ */ + While (LNotEqual (ENSB, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + W3DC (Arg1, Arg2, 0x01, Arg3) + If (LEqual (R3DC (Arg1, Arg2, 0x00), 0x01)) + { + W3DC (Arg1, Arg2, 0x00, 0x02) + } + + Return (0x00) + } + + Method (RREG, 3, Serialized) + { + If (LEqual (UCCH, 0x01)) + { + If (LEqual (R3DC (Arg1, Arg2, 0x00), 0x02)) + { + Return (R3DC (Arg1, Arg2, 0x01)) + } + } + + Store (Add (Timer, 0xC350), Local1) + Store (0x07, RST) /* \_SB_.PCI0.GEXP.RST_ */ + Store (0x00, ENB) /* \_SB_.PCI0.GEXP.ENB_ */ + Store (RBCK, TEMP) /* \_SB_.PCI0.GEXP.TEMP */ + Store (CLR, TEMP) /* \_SB_.PCI0.GEXP.TEMP */ + Store (0x001C001C, HOLD) /* \_SB_.PCI0.GEXP.HOLD */ + Store (0x0210, HCNT) /* \_SB_.PCI0.GEXP.HCNT */ + Store (0x0280, LCNT) /* \_SB_.PCI0.GEXP.LCNT */ + Store (Add (EXPA, Arg1), TAR) /* \_SB_.PCI0.GEXP.TAR_ */ + Store (0x65, ICON) /* \_SB_.PCI0.GEXP.ICON */ + Store (0x01, ENB) /* \_SB_.PCI0.GEXP.ENB_ */ + While (LNotEqual (ENSB, 0x01)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (Arg2, DATA) /* \_SB_.PCI0.GEXP.DATA */ + Store (Add (END, READ), DATA) /* \_SB_.PCI0.GEXP.DATA */ + While (LNotEqual (ACTV, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (DATA, Local0) + Store (0x00, ENB) /* \_SB_.PCI0.GEXP.ENB_ */ + While (LNotEqual (ENSB, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Return (Local0) + } + + Method (PS0, 1, Serialized) + { + OperationRegion (BAR1, SystemMemory, Arg0, 0x88) + Field (BAR1, DWordAcc, NoLock, Preserve) + { + Offset (0x84), + D0D3, 2 + } + + Store (0x00, D0D3) /* \_SB_.PCI0.GEXP.PS0_.D0D3 */ + Store (D0D3, TEMP) /* \_SB_.PCI0.GEXP.TEMP */ + } + + Method (PS3, 1, Serialized) + { + OperationRegion (BAR1, SystemMemory, Arg0, 0x88) + Field (BAR1, DWordAcc, NoLock, Preserve) + { + Offset (0x84), + D0D3, 2 + } + + Store (0x03, D0D3) /* \_SB_.PCI0.GEXP.PS3_.D0D3 */ + Store (D0D3, TEMP) /* \_SB_.PCI0.GEXP.TEMP */ + } + + Method (CSER, 5, Serialized) + { + Name (SB1X, 0x00) + Name (SB0X, 0x00) + Name (SMDX, 0x00) + Name (PINN, 0x00) + Name (REGN, 0x00) + Name (REGA, 0x00) + Name (OLDV, 0x00) + Name (NEWV, 0x00) + Name (RETV, 0x00) + If (LGreater (Arg0, 0x05)) + { + Return (0x00) + } + + If (LEqual (Arg0, 0x00)) + { + Store (SB10, SB1X) /* \_SB_.PCI0.GEXP.CSER.SB1X */ + Store (SB00, SB0X) /* \_SB_.PCI0.GEXP.CSER.SB0X */ + Store (SMD0, SMDX) /* \_SB_.PCI0.GEXP.CSER.SMDX */ + } + + If (LEqual (Arg0, 0x01)) + { + Store (SB11, SB1X) /* \_SB_.PCI0.GEXP.CSER.SB1X */ + Store (SB01, SB0X) /* \_SB_.PCI0.GEXP.CSER.SB0X */ + Store (SMD1, SMDX) /* \_SB_.PCI0.GEXP.CSER.SMDX */ + } + + If (LEqual (Arg0, 0x02)) + { + Store (SB12, SB1X) /* \_SB_.PCI0.GEXP.CSER.SB1X */ + Store (SB02, SB0X) /* \_SB_.PCI0.GEXP.CSER.SB0X */ + Store (SMD2, SMDX) /* \_SB_.PCI0.GEXP.CSER.SMDX */ + } + + If (LEqual (Arg0, 0x03)) + { + Store (SB13, SB1X) /* \_SB_.PCI0.GEXP.CSER.SB1X */ + Store (SB03, SB0X) /* \_SB_.PCI0.GEXP.CSER.SB0X */ + Store (SMD3, SMDX) /* \_SB_.PCI0.GEXP.CSER.SMDX */ + } + + If (LEqual (Arg0, 0x04)) + { + Store (SB14, SB1X) /* \_SB_.PCI0.GEXP.CSER.SB1X */ + Store (SB04, SB0X) /* \_SB_.PCI0.GEXP.CSER.SB0X */ + Store (SMD4, SMDX) /* \_SB_.PCI0.GEXP.CSER.SMDX */ + } + + If (LEqual (Arg0, 0x05)) + { + Store (SB15, SB1X) /* \_SB_.PCI0.GEXP.CSER.SB1X */ + Store (SB05, SB0X) /* \_SB_.PCI0.GEXP.CSER.SB0X */ + Store (SMD5, SMDX) /* \_SB_.PCI0.GEXP.CSER.SMDX */ + } + + If (LGreater (Arg0, 0x05)) + { + Return (0x00) + } + + If (LGreater (Arg1, 0x01)) + { + Return (0x00) + } + + If (LGreater (Arg2, 0x17)) + { + Return (0x00) + } + + If (LGreater (Arg3, 0x01)) + { + Return (0x00) + } + + If (LGreater (Arg4, 0x02)) + { + Return (0x00) + } + + If (LNotEqual (SMDX, 0x03)) + { + Return (0x00) + } + + If (LEqual (Arg4, 0x00)) + { + Store (OUTR, Local0) + } + + If (LEqual (Arg4, 0x01)) + { + Store (CFGR, Local0) + } + + If (LEqual (Arg4, 0x02)) + { + Store (INR, Local0) + } + + If (LEqual (Arg4, 0x03)) + { + Store (POLR, Local0) + } + + PS0 (SB1X) + Divide (Arg2, PPR, PINN, REGN) /* \_SB_.PCI0.GEXP.CSER.REGN */ + Store (DerefOf (Index (Local0, REGN)), REGA) /* \_SB_.PCI0.GEXP.CSER.REGA */ + Store (RREG (SB0X, Arg1, REGA), OLDV) /* \_SB_.PCI0.GEXP.CSER.OLDV */ + If (LEqual (Arg4, 0x02)) + { + Store (And (0x01, ShiftRight (OLDV, PINN)), RETV) /* \_SB_.PCI0.GEXP.CSER.RETV */ + } + Else + { + And (OLDV, Not (ShiftLeft (0x01, PINN)), NEWV) /* \_SB_.PCI0.GEXP.CSER.NEWV */ + Or (ShiftLeft (Arg3, PINN), NEWV, NEWV) /* \_SB_.PCI0.GEXP.CSER.NEWV */ + If (LNotEqual (NEWV, OLDV)) + { + WREG (SB0X, Arg1, REGA, NEWV) + } + } + + PS3 (SB1X) + Return (RETV) /* \_SB_.PCI0.GEXP.CSER.RETV */ + } + } + } + + If (LEqual (PCHV (), SPTL)) + { + Scope (\_SB.PCI0) + { + Method (DLLR, 5, Serialized) + { + ADBG ("SD DLL restore flow") + Name (TEMP, 0x00) + Name (EMPB, 0x00) + Store (\XBAS, EMPB) /* \_SB_.PCI0.DLLR.EMPB */ + Or (EMPB, ShiftLeft (Arg0, 0x14), EMPB) /* \_SB_.PCI0.DLLR.EMPB */ + Or (EMPB, ShiftLeft (Arg1, 0x0F), EMPB) /* \_SB_.PCI0.DLLR.EMPB */ + Or (EMPB, ShiftLeft (Arg2, 0x0C), EMPB) /* \_SB_.PCI0.DLLR.EMPB */ + OperationRegion (EMPC, SystemMemory, EMPB, 0x0100) + Field (EMPC, DWordAcc, NoLock, Preserve) + { + Offset (0x04), + , 1, + MSE, 1, + Offset (0x10), + BAR0, 64, + Offset (0x84), + PSTA, 32 + } + + Name (OPST, 0x00) + Store (PSTA, OPST) /* \_SB_.PCI0.DLLR.OPST */ + And (PSTA, 0xFFFFFFFC, PSTA) /* \_SB_.PCI0.DLLR.PSTA */ + Store (PSTA, TEMP) /* \_SB_.PCI0.DLLR.TEMP */ + Name (OMSE, 0x00) + Store (MSE, OMSE) /* \_SB_.PCI0.DLLR.OMSE */ + Store (0x00, MSE) /* \_SB_.PCI0.DLLR.MSE_ */ + Name (OBAR, 0x00) + Store (BAR0, OBAR) /* \_SB_.PCI0.DLLR.OBAR */ + Store (Arg3, BAR0) /* \_SB_.PCI0.DLLR.BAR0 */ + Store (BAR0, TEMP) /* \_SB_.PCI0.DLLR.TEMP */ + Store (0x01, MSE) /* \_SB_.PCI0.DLLR.MSE_ */ + OperationRegion (EMMI, SystemMemory, Arg3, Arg4) + Field (EMMI, DWordAcc, NoLock, Preserve) + { + Offset (0x834), + FDLL, 8, + Offset (0x840), + ADLL, 8 + } + + Name (FDLV, 0x00) + Name (ADLV, 0x00) + Store (FDLL, FDLV) /* \_SB_.PCI0.DLLR.FDLV */ + Store (ADLL, ADLV) /* \_SB_.PCI0.DLLR.ADLV */ + ADBG (Concatenate ("Fixed DLL value ", ToHexString (FDLV))) + ADBG (Concatenate ("Auto DLL Value ", ToHexString (ADLV))) + If (LNotEqual (ADLV, 0x00)) + { + ADBG ("Auto tuning executed, restoring values") + Multiply (ADLV, 0x02, ADLV) /* \_SB_.PCI0.DLLR.ADLV */ + Store (ADLV, FDLL) /* \_SB_.PCI0.DLLR.FDLL */ + } + + Store (0x00, MSE) /* \_SB_.PCI0.DLLR.MSE_ */ + Store (OBAR, BAR0) /* \_SB_.PCI0.DLLR.BAR0 */ + Store (OMSE, MSE) /* \_SB_.PCI0.DLLR.MSE_ */ + Store (OPST, PSTA) /* \_SB_.PCI0.DLLR.PSTA */ + Store (PSTA, TEMP) /* \_SB_.PCI0.DLLR.TEMP */ + } + + Device (PEMC) + { + Name (_ADR, 0x001E0004) // _ADR: Address + OperationRegion (SCSR, PCI_Config, 0x00, 0x0100) + Field (SCSR, WordAcc, NoLock, Preserve) + { + Offset (0x84), + PSTA, 32, + Offset (0xA2), + , 2, + PGEN, 1 + } + + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + Store (0x00, PGEN) /* \_SB_.PCI0.PEMC.PGEN */ + PCRA (0xC0, 0x0600, 0x7FFFFFBA) + Sleep (0x02) + PCRO (0xC0, 0x0600, 0x80000045) + And (PSTA, 0xFFFFFFFC, PSTA) /* \_SB_.PCI0.PEMC.PSTA */ + Store (PSTA, TEMP) /* \_SB_.PCI0.TEMP */ + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + DLLR (0x00, 0x1E, 0x04, 0xFE0B0000, 0x00010000) + Store (0x01, PGEN) /* \_SB_.PCI0.PEMC.PGEN */ + Or (PSTA, 0x03, PSTA) /* \_SB_.PCI0.PEMC.PSTA */ + Store (PSTA, TEMP) /* \_SB_.PCI0.TEMP */ + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + ADBG (Concatenate ("EMH4=", ToDecimalString (EMH4))) + If (LEqual (Arg0, ToUUID ("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))) + { + If (LGreaterEqual (Arg1, Zero)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + If (LEqual (EMH4, 0x01)) + { + Return (Buffer (0x02) + { + 0x61, 0x02 // a. + }) + } + + Return (Buffer (0x02) + { + 0x21, 0x02 // !. + }) + } + Case (0x05) + { + Return (Buffer (0x01) + { + 0x03 // . + }) + } + Case (0x06) + { + Return (Buffer (0x01) + { + 0x05 // . + }) + } + Case (0x09) + { + Switch (EMDS) + { + Case (0x00) + { + Return (Buffer (0x01) + { + 0x00 // . + }) + } + Case (0x01) + { + Return (Buffer (0x01) + { + 0x01 // . + }) + } + Case (0x04) + { + Return (Buffer (0x01) + { + 0x04 // . + }) + } + + } + } + + } + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + Device (CARD) + { + Name (_ADR, 0x08) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (0x00) + } + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (ISHD) + { + Name (_ADR, 0x00130000) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + + Scope (\_SB.PCI0) + { + Device (HECI) + { + Name (_ADR, 0x00160000) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + + Scope (\_SB.PCI0.LPCB) + { + Device (EC) + { + Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_GPE, 0x16) // _GPE: General Purpose Events + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If (LEqual (Arg0, 0x03)) + { + Store (Arg1, \H8DR) + } + } + + OperationRegion (ECOR, EmbeddedControl, 0x00, 0x0100) + Field (ECOR, ByteAcc, NoLock, Preserve) + { + HDBM, 1, + , 1, + , 1, + HFNE, 1, + , 1, + , 1, + HLDM, 1, + Offset (0x01), + BBLS, 1, + BTCM, 1, + , 1, + , 1, + , 1, + HBPR, 1, + BTPC, 1, + Offset (0x02), + HDUE, 1, + , 4, + SNLK, 1, + Offset (0x03), + , 5, + HAUM, 2, + Offset (0x05), + HSPA, 1, + Offset (0x06), + HSUN, 8, + HSRP, 8, + Offset (0x0C), + HLCL, 8, + , 4, + CALM, 1, + Offset (0x0E), + HFNS, 2, + Offset (0x0F), + , 6, + NULS, 1, + Offset (0x10), + HAM0, 8, + HAM1, 8, + HAM2, 8, + HAM3, 8, + HAM4, 8, + HAM5, 8, + HAM6, 8, + HAM7, 8, + HAM8, 8, + HAM9, 8, + HAMA, 8, + HAMB, 8, + HAMC, 8, + HAMD, 8, + HAME, 8, + HAMF, 8, + Offset (0x23), + HANT, 8, + Offset (0x26), + , 2, + HANA, 2, + Offset (0x27), + Offset (0x28), + , 1, + SKEM, 1, + Offset (0x29), + Offset (0x2A), + HATR, 8, + HT0H, 8, + HT0L, 8, + HT1H, 8, + HT1L, 8, + HFSP, 8, + , 6, + HMUT, 1, + Offset (0x31), + , 2, + HUWB, 1, + , 3, + VPON, 1, + VRST, 1, + HWPM, 1, + HWLB, 1, + HWLO, 1, + HWDK, 1, + HWFN, 1, + HWBT, 1, + HWRI, 1, + HWBU, 1, + HWLU, 1, + Offset (0x34), + , 3, + PIBS, 1, + , 3, + HPLO, 1, + Offset (0x36), + HWAC, 16, + HB0S, 7, + HB0A, 1, + HB1S, 7, + HB1A, 1, + HCMU, 1, + , 2, + OVRQ, 1, + DCBD, 1, + DCWL, 1, + DCWW, 1, + HB1I, 1, + , 1, + KBLT, 1, + BTPW, 1, + FNKC, 1, + HUBS, 1, + BDPW, 1, + BDDT, 1, + HUBB, 1, + Offset (0x46), + , 1, + BTWK, 1, + HPLD, 1, + , 1, + HPAC, 1, + BTST, 1, + PSST, 1, + Offset (0x47), + HPBU, 1, + , 1, + HBID, 1, + , 3, + HBCS, 1, + HPNF, 1, + , 1, + GSTS, 1, + , 2, + HLBU, 1, + DOCD, 1, + HCBL, 1, + Offset (0x49), + SLUL, 1, + , 1, + ACAT, 1, + , 4, + ELNK, 1, + Offset (0x4C), + HTMH, 8, + HTML, 8, + HWAK, 16, + HMPR, 8, + , 7, + HMDN, 1, + Offset (0x78), + TMP0, 8, + Offset (0x80), + Offset (0x81), + HIID, 8, + Offset (0x83), + HFNI, 8, + HSPD, 16, + Offset (0x88), + TSL0, 7, + TSR0, 1, + TSL1, 7, + TSR1, 1, + TSL2, 7, + TSR2, 1, + TSL3, 7, + TSR3, 1, + GPUT, 1, + Offset (0x8D), + HDAA, 3, + HDAB, 3, + HDAC, 2, + Offset (0xB0), + HDEN, 32, + HDEP, 32, + HDEM, 8, + HDES, 8, + Offset (0xC4), + SDKL, 1, + Offset (0xC5), + Offset (0xC8), + ATMX, 8, + HWAT, 8, + Offset (0xCC), + PWMH, 8, + PWML, 8, + Offset (0xCF), + , 6, + ESLP, 1, + Offset (0xD0), + Offset (0xED), + , 4, + HDDD, 1 + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + ADBG ("H8 _INI") + If (\H8DR) + { + Store (0x00, HSPA) /* \_SB_.PCI0.LPCB.EC__.HSPA */ + } + Else + { + \MBEC (0x05, 0xFE, 0x00) + } + + \_SB.PCI0.LPCB.EC.HKEY.WGIN () + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, DCWL) /* \_SB_.PCI0.LPCB.EC__.DCWL */ + } + Else + { + Store (0x01, DCWL) /* \_SB_.PCI0.LPCB.EC__.DCWL */ + } + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0062, // Range Minimum + 0x0062, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0066, // Range Minimum + 0x0066, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + }) + Method (LED, 2, NotSerialized) + { + Or (Arg0, Arg1, Local0) + If (\H8DR) + { + Store (Local0, HLCL) /* \_SB_.PCI0.LPCB.EC__.HLCL */ + } + Else + { + \WBEC (0x0C, Local0) + } + } + + Name (BAON, 0x00) + Name (WBON, 0x00) + Method (BEEP, 1, NotSerialized) + { + If (LEqual (Arg0, 0x05)) + { + Store (0x00, WBON) /* \_SB_.PCI0.LPCB.EC__.WBON */ + } + + Store (WBON, Local2) + If (BAON) + { + If (LEqual (Arg0, 0x00)) + { + Store (0x00, BAON) /* \_SB_.PCI0.LPCB.EC__.BAON */ + If (WBON) + { + Store (0x03, Local0) + Store (0x08, Local1) + } + Else + { + Store (0x00, Local0) + Store (0x00, Local1) + } + } + Else + { + Store (0xFF, Local0) + Store (0xFF, Local1) + If (LEqual (Arg0, 0x11)) + { + Store (0x00, WBON) /* \_SB_.PCI0.LPCB.EC__.WBON */ + } + + If (LEqual (Arg0, 0x10)) + { + Store (0x01, WBON) /* \_SB_.PCI0.LPCB.EC__.WBON */ + } + } + } + Else + { + Store (Arg0, Local0) + Store (0xFF, Local1) + If (LEqual (Arg0, 0x0F)) + { + Store (Arg0, Local0) + Store (0x08, Local1) + Store (0x01, BAON) /* \_SB_.PCI0.LPCB.EC__.BAON */ + } + + If (LEqual (Arg0, 0x11)) + { + Store (0x00, Local0) + Store (0x00, Local1) + Store (0x00, WBON) /* \_SB_.PCI0.LPCB.EC__.WBON */ + } + + If (LEqual (Arg0, 0x10)) + { + Store (0x03, Local0) + Store (0x08, Local1) + Store (0x01, WBON) /* \_SB_.PCI0.LPCB.EC__.WBON */ + } + } + + If (LEqual (Arg0, 0x03)) + { + Store (0x00, WBON) /* \_SB_.PCI0.LPCB.EC__.WBON */ + If (Local2) + { + Store (0x07, Local0) + If (LOr (LEqual (\SPS, 0x03), LEqual (\SPS, 0x04))) + { + Store (0x00, Local2) + Store (0xFF, Local0) + Store (0xFF, Local1) + } + } + } + + If (LEqual (Arg0, 0x07)) + { + If (Local2) + { + Store (0x00, Local2) + Store (0xFF, Local0) + Store (0xFF, Local1) + } + } + + If (\H8DR) + { + If (LAnd (Local2, LNot (WBON))) + { + Store (0x00, HSRP) /* \_SB_.PCI0.LPCB.EC__.HSRP */ + Store (0x00, HSUN) /* \_SB_.PCI0.LPCB.EC__.HSUN */ + Sleep (0x64) + } + + If (LNotEqual (Local1, 0xFF)) + { + Store (Local1, HSRP) /* \_SB_.PCI0.LPCB.EC__.HSRP */ + } + + If (LNotEqual (Local0, 0xFF)) + { + Store (Local0, HSUN) /* \_SB_.PCI0.LPCB.EC__.HSUN */ + } + } + Else + { + If (LAnd (Local2, LNot (WBON))) + { + \WBEC (0x07, 0x00) + \WBEC (0x06, 0x00) + Sleep (0x64) + } + + If (LNotEqual (Local1, 0xFF)) + { + \WBEC (0x07, Local1) + } + + If (LNotEqual (Local0, 0xFF)) + { + \WBEC (0x06, Local0) + } + } + + If (LEqual (Arg0, 0x03)){} + If (LEqual (Arg0, 0x07)) + { + Sleep (0x01F4) + } + } + + Method (EVNT, 1, NotSerialized) + { + If (\H8DR) + { + If (Arg0) + { + Or (HAM5, 0x04, HAM5) /* \_SB_.PCI0.LPCB.EC__.HAM5 */ + } + Else + { + And (HAM5, 0xFB, HAM5) /* \_SB_.PCI0.LPCB.EC__.HAM5 */ + } + } + ElseIf (Arg0) + { + \MBEC (0x15, 0xFF, 0x04) + } + Else + { + \MBEC (0x15, 0xFB, 0x00) + } + } + + Name (USPS, 0x00) + PowerResource (PUBS, 0x03, 0x0000) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\H8DR) + { + Store (HUBS, Local0) + } + Else + { + And (\RBEC (0x3B), 0x10, Local0) + } + + If (Local0) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + Store (0x64, Local0) + While (LAnd (USPS, Local0)) + { + Sleep (0x01) + Decrement (Local0) + } + + If (\H8DR) + { + Store (0x01, HUBS) /* \_SB_.PCI0.LPCB.EC__.HUBS */ + } + Else + { + \MBEC (0x3B, 0xFF, 0x10) + } + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + Store (0x01, USPS) /* \_SB_.PCI0.LPCB.EC__.USPS */ + If (\H8DR) + { + Store (0x00, HUBS) /* \_SB_.PCI0.LPCB.EC__.HUBS */ + } + Else + { + \MBEC (0x3B, 0xEF, 0x00) + } + + Sleep (0x14) + Store (0x00, USPS) /* \_SB_.PCI0.LPCB.EC__.USPS */ + } + } + + Method (CHKS, 0, NotSerialized) + { + Store (0x03E8, Local0) + While (HMPR) + { + Sleep (0x01) + Decrement (Local0) + If (LNot (Local0)) + { + Return (0x8080) + } + } + + If (HMDN) + { + Return (Zero) + } + + Return (0x8081) + } + + Method (LPMD, 0, NotSerialized) + { + Store (0x00, Local0) + Store (0x00, Local1) + Store (0x00, Local2) + If (\H8DR) + { + If (HPAC) + { + If (HPLO) + { + Store (\LPST, Local0) + } + ElseIf (LLess (HWAT, 0x5A)) + { + If (HB0A) + { + If (LOr (And (HB0S, 0x10), LLess (And (HB0S, 0x07), 0x02))) + { + Store (0x01, Local1) + } + } + Else + { + Store (0x01, Local1) + } + + If (HB1A) + { + If (LOr (And (HB1S, 0x10), LLess (And (HB1S, 0x07), 0x02))) + { + Store (0x01, Local2) + } + } + Else + { + Store (0x01, Local2) + } + + If (LAnd (Local1, Local2)) + { + Store (\LPST, Local0) + } + } + } + } + ElseIf (And (\RBEC (0x46), 0x10)) + { + If (And (\RBEC (0x34), 0x80)) + { + Store (\LPST, Local0) + } + ElseIf (LLess (\RBEC (0xC9), 0x5A)) + { + Store (\RBEC (0x38), Local3) + If (And (Local3, 0x80)) + { + If (LOr (And (Local3, 0x10), LLess (And (Local3, 0x07), 0x02))) + { + Store (0x01, Local1) + } + } + Else + { + Store (0x01, Local2) + } + + Store (\RBEC (0x39), Local3) + If (And (Local3, 0x80)) + { + If (LOr (And (Local3, 0x10), LLess (And (Local3, 0x07), 0x02))) + { + Store (0x01, Local1) + } + } + Else + { + Store (0x01, Local2) + } + + If (LAnd (Local1, Local2)) + { + Store (\LPST, Local0) + } + } + } + + Return (Local0) + } + + Method (CLPM, 0, NotSerialized) + { + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + Else + { + Store (LPMD (), Local0) + If (Local0) + { + \STEP (0x04) + } + Else + { + \STEP (0x05) + } + } + } + } + + Method (ECNT, 1, Serialized) + { + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + Store (0x00, SDKL) /* \_SB_.PCI0.LPCB.EC__.SDKL */ + ADBG ("EC Exit CS") + \_SB.PCI0.LPCB.EC.LED (0x07, 0x00) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + Return (0x00) + } + Case (0x01) + { + Store (0x01, SDKL) /* \_SB_.PCI0.LPCB.EC__.SDKL */ + P8XH (0x00, 0xC5) + ADBG ("EC Enter CS") + \_SB.PCI0.LPCB.EC.LED (0x07, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x00, 0xA0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xA0) + Return (0x00) + } + Case (0x02) + { + Store (0x00, ESLP) /* \_SB_.PCI0.LPCB.EC__.ESLP */ + ADBG ("Resiliency Exit") + \_SB.SGOV (0x0203000F, 0x01) + \_SB.SGOV (0x02010003, 0x00) + Sleep (0x0A) + Return (0x00) + } + Case (0x03) + { + Store (0x01, ESLP) /* \_SB_.PCI0.LPCB.EC__.ESLP */ + ADBG ("Resiliency Entry") + \_SB.SGOV (0x0203000F, 0x00) + \_SB.SGOV (0x02010003, 0x01) + ADBG ("Clr PSC") + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000FD001) + Return (0x00) + } + Default + { + Return (0xFF) + } + + } + } + + Device (HKEY) + { + Name (_HID, EisaId ("LEN0268")) // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + ADBG ("HKEY _INI") + ADBG ("_INI0") + Store (0x00, \_SB.PCI0.LPCB.EC.HKEY.ANGN) + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F0001) + ADBG ("_INI1") + } + + Method (MHKV, 0, NotSerialized) + { + Return (0x0200) + } + + Name (DHKC, 0x00) + Name (DHKB, 0x01) + Name (DHKH, 0x00) + Name (DHKW, 0x00) + Name (DHKS, 0x00) + Name (DHKD, 0x00) + Name (DHKN, 0x0808) + Name (DHKE, 0x00) + Name (DHKF, 0x001F0000) + Name (DHKT, 0x00) + Name (DHWW, 0x00) + Mutex (XDHK, 0x00) + Method (MHKA, 1, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + Return (0x03) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Return (0xFFFFFFFB) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (0x00) + } + ElseIf (LEqual (Arg0, 0x03)) + { + Return (0x001F0000) + } + Else + { + Return (0x00) + } + } + + Method (MHKN, 1, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + Return (0x03) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Return (DHKN) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKN */ + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (DHKE) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKE */ + } + ElseIf (LEqual (Arg0, 0x03)) + { + Return (DHKF) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKF */ + } + Else + { + Return (0x00) + } + } + + Method (MHKK, 2, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + Return (0x03) + } + ElseIf (DHKC) + { + If (LEqual (Arg0, 0x01)) + { + Return (And (DHKN, Arg1)) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (And (DHKE, Arg1)) + } + ElseIf (LEqual (Arg0, 0x03)) + { + Return (And (DHKF, Arg1)) + } + Else + { + Return (0x00) + } + } + Else + { + Return (Zero) + } + } + + Method (MHKM, 2, NotSerialized) + { + Acquire (XDHK, 0xFFFF) + If (LGreater (Arg0, 0x60)) + { + Noop + } + ElseIf (LLessEqual (Arg0, 0x20)) + { + ShiftLeft (One, Decrement (Arg0), Local0) + If (And (Local0, 0xFFFFFFFB)) + { + If (Arg1) + { + Or (Local0, DHKN, DHKN) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKN */ + } + Else + { + And (DHKN, XOr (Local0, 0xFFFFFFFF), DHKN) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKN */ + } + } + Else + { + Noop + } + } + ElseIf (LLessEqual (Arg0, 0x40)) + { + Noop + } + ElseIf (LLessEqual (Arg0, 0x60)) + { + Subtract (Arg0, 0x40, Arg0) + ShiftLeft (One, Decrement (Arg0), Local0) + If (And (Local0, 0x001F0000)) + { + If (Arg1) + { + Or (Local0, DHKF, DHKF) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKF */ + } + Else + { + And (DHKF, XOr (Local0, 0xFFFFFFFF), DHKF) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKF */ + } + } + Else + { + Noop + } + } + + Release (XDHK) + } + + Method (MHKS, 0, NotSerialized) + { + Notify (\_SB.SLPB, 0x80) // Status Change + } + + Method (MHKC, 1, NotSerialized) + { + Store (Arg0, DHKC) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKC */ + } + + Method (MHKP, 0, NotSerialized) + { + Acquire (XDHK, 0xFFFF) + If (DHWW) + { + Store (DHWW, Local1) + Store (Zero, DHWW) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHWW */ + } + ElseIf (DHKW) + { + Store (DHKW, Local1) + Store (Zero, DHKW) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKW */ + } + ElseIf (DHKD) + { + Store (DHKD, Local1) + Store (Zero, DHKD) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKD */ + } + ElseIf (DHKS) + { + Store (DHKS, Local1) + Store (Zero, DHKS) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKS */ + } + ElseIf (DHKT) + { + Store (DHKT, Local1) + Store (Zero, DHKT) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKT */ + } + Else + { + Store (DHKH, Local1) + Store (Zero, DHKH) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKH */ + } + + Release (XDHK) + Return (Local1) + } + + Method (MHKE, 1, Serialized) + { + Store (Arg0, DHKB) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKB */ + Acquire (XDHK, 0xFFFF) + Store (Zero, DHKH) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKH */ + Store (Zero, DHKW) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKW */ + Store (Zero, DHKS) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKS */ + Store (Zero, DHKD) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKD */ + Store (Zero, DHKT) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKT */ + Store (Zero, DHWW) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHWW */ + Release (XDHK) + } + + Method (MHKQ, 1, Serialized) + { + If (DHKB) + { + If (DHKC) + { + Acquire (XDHK, 0xFFFF) + If (LLess (Arg0, 0x1000)){} + ElseIf (LLess (Arg0, 0x2000)) + { + Store (Arg0, DHKH) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKH */ + } + ElseIf (LLess (Arg0, 0x3000)) + { + Store (Arg0, DHKW) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKW */ + } + ElseIf (LLess (Arg0, 0x4000)) + { + Store (Arg0, DHKS) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKS */ + } + ElseIf (LLess (Arg0, 0x5000)) + { + Store (Arg0, DHKD) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKD */ + } + ElseIf (LLess (Arg0, 0x6000)) + { + Store (Arg0, DHKH) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKH */ + } + ElseIf (LLess (Arg0, 0x7000)) + { + Store (Arg0, DHKT) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKT */ + } + ElseIf (LLess (Arg0, 0x8000)) + { + Store (Arg0, DHWW) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHWW */ + } + Else + { + } + + Release (XDHK) + Notify (HKEY, 0x80) // Status Change + } + ElseIf (LEqual (Arg0, 0x1004)) + { + Notify (\_SB.SLPB, 0x80) // Status Change + } + } + } + + Method (MHKB, 1, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x11) + Store (0x00, \LIDB) + } + ElseIf (LEqual (Arg0, 0x01)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x10) + Store (0x01, \LIDB) + } + Else + { + } + } + + Method (MHKD, 0, NotSerialized) + { + If (LEqual (\PLUX, 0x00)) + { + If (VIGD) + { + \_SB.PCI0.GFX0.VLOC (0x00) + } + } + } + + Method (MHQC, 1, NotSerialized) + { + If (\WNTF) + { + If (LEqual (Arg0, 0x00)) + { + Return (\CWAC) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Return (\CWAP) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (\CWAT) + } + Else + { + Noop + } + } + Else + { + Noop + } + + Return (0x00) + } + + Method (MHGC, 0, NotSerialized) + { + If (\WNTF) + { + Acquire (XDHK, 0xFFFF) + If (CKC4 (0x00)) + { + Store (0x03, Local0) + } + Else + { + Store (0x04, Local0) + } + + Release (XDHK) + Return (Local0) + } + Else + { + Noop + } + + Return (0x00) + } + + Method (MHSC, 1, NotSerialized) + { + If (LAnd (\CWAC, \WNTF)) + { + Acquire (XDHK, 0xFFFF) + If (\OSC4) + { + If (LEqual (Arg0, 0x03)) + { + If (LNot (\CWAS)) + { + \PNTF (0x81) + Store (0x01, \CWAS) + } + } + ElseIf (LEqual (Arg0, 0x04)) + { + If (\CWAS) + { + \PNTF (0x81) + Store (0x00, \CWAS) + } + } + Else + { + Noop + } + } + + Release (XDHK) + } + Else + { + Noop + } + } + + Method (CKC4, 1, NotSerialized) + { + Store (0x00, Local0) + If (\C4WR) + { + If (LNot (\C4AC)) + { + Or (Local0, 0x01, Local0) + } + } + + If (\C4NA) + { + Or (Local0, 0x02, Local0) + } + + If (LAnd (\CWAC, \CWAS)) + { + Or (Local0, 0x04, Local0) + } + + And (Local0, Not (Arg0), Local0) + Return (Local0) + } + + Method (MHQE, 0, NotSerialized) + { + Return (\C4WR) + } + + Method (MHGE, 0, NotSerialized) + { + If (LAnd (\C4WR, \C4AC)) + { + Return (0x04) + } + + Return (0x03) + } + + Method (MHSE, 1, NotSerialized) + { + If (\C4WR) + { + Store (\C4AC, Local0) + If (LEqual (Arg0, 0x03)) + { + Store (0x00, \C4AC) + If (XOr (Local0, \C4AC)) + { + If (\OSC4) + { + \PNTF (0x81) + } + } + } + ElseIf (LEqual (Arg0, 0x04)) + { + Store (0x01, \C4AC) + If (XOr (Local0, \C4AC)) + { + If (\OSC4) + { + \PNTF (0x81) + } + } + } + } + } + + Method (UAWO, 1, NotSerialized) + { + Return (\UAWS (Arg0)) + } + + Method (MLCG, 1, NotSerialized) + { + Store (\KBLS (0x00, 0x00), Local0) + Return (Local0) + } + + Method (MLCS, 1, NotSerialized) + { + Store (\KBLS (0x01, Arg0), Local0) + If (LNot (And (Local0, 0x80000000))) + { + If (And (Arg0, 0x00010000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6001) + } + ElseIf (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00020000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1012) + } + } + + Return (Local0) + } + + Method (DSSG, 1, NotSerialized) + { + Or (0x0400, \PDCI, Local0) + Return (Local0) + } + + Method (DSSS, 1, NotSerialized) + { + Or (\PDCI, Arg0, \PDCI) + } + + Method (SBSG, 1, NotSerialized) + { + Return (\SYBC (0x00, 0x00)) + } + + Method (SBSS, 1, NotSerialized) + { + Return (\SYBC (0x01, Arg0)) + } + + Method (PBLG, 1, NotSerialized) + { + Store (\BRLV, Local0) + Or (Local0, 0x0F00, Local1) + Return (Local1) + } + + Method (PBLS, 1, NotSerialized) + { + Store (Arg0, \BRLV) + If (\VIGD) + { + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \VBRC (\BRLV) + } + + If (LNot (\NBCF)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6050) + } + + Return (0x00) + } + + Method (PMSG, 1, NotSerialized) + { + Store (\PRSM (0x00, 0x00), Local0) + Return (Local0) + } + + Method (PMSS, 1, NotSerialized) + { + \PRSM (0x01, Arg0) + Return (0x00) + } + + Method (ISSG, 1, NotSerialized) + { + Store (\ISSP, Local0) + If (\ISSP) + { + Or (Local0, 0x01000000, Local0) + Or (Local0, ShiftLeft (\ISFS, 0x19), Local0) + } + + Or (Local0, And (\ISCG, 0x30), Local0) + And (Local0, 0xFFFFFFFE, Local0) + Or (Local0, 0x02, Local0) + Or (Local0, ShiftLeft (And (\ISWK, 0x02), 0x02), Local0) + Return (Local0) + } + + Method (ISSS, 1, NotSerialized) + { + Store (Arg0, \ISCG) + Return (0x00) + } + + Method (FFSG, 1, NotSerialized) + { + Return (0x00) + } + + Method (FFSS, 1, NotSerialized) + { + Return (0x80000000) + } + + Method (GMKS, 0, NotSerialized) + { + Return (\FNSC (0x02, 0x00)) + } + + Method (SMKS, 1, NotSerialized) + { + Return (\FNSC (0x03, And (Arg0, 0x00010001))) + } + + Method (GSKL, 1, NotSerialized) + { + Return (\FNSC (0x04, And (Arg0, 0x0F000000))) + } + + Method (SSKL, 1, NotSerialized) + { + Return (\FNSC (0x05, And (Arg0, 0x0F00FFFF))) + } + + Method (INSG, 1, NotSerialized) + { + Store (\IOEN, Local0) + Or (Local0, ShiftLeft (\IOST, 0x07), Local0) + Or (Local0, ShiftLeft (\IOCP, 0x08), Local0) + Or (Local0, 0x10000000, Local0) + Return (Local0) + } + + Method (INSS, 1, NotSerialized) + { + If (And (Arg0, 0x10000000)) + { + If (\IOCP) + { + Store (ShiftRight (And (Arg0, 0x80), 0x07), Local0) + If (LNot (\EZRC (Local0))) + { + Store (Local0, \IOST) + } + } + + Return (0x00) + } + + If (LAnd (\IOCP, And (Arg0, 0x01))) + { + Store (0x01, \IOEN) + } + Else + { + Store (0x00, \IOEN) + If (\IOST) + { + If (LNot (\ISOC (0x00))) + { + Store (0x00, \IOST) + } + } + } + + Return (0x00) + } + } + + Device (AC) + { + Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_PCL, Package (0x01) // _PCL: Power Consumer List + { + \_SB + }) + Method (_PSR, 0, NotSerialized) // _PSR: Power Source + { + If (\H8DR) + { + Return (HPAC) /* \_SB_.PCI0.LPCB.EC__.HPAC */ + } + ElseIf (And (\RBEC (0x46), 0x10)) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + + Scope (HKEY) + { + Method (SMPS, 1, Serialized) + { + If (LNotEqual (And (Arg0, Not (0xFFFF)), 0x00)) + { + Return (0x80000000) + } + + Switch (And (Arg0, 0xFFFF)) + { + Case (0x00) + { + Store (0x0100, Local1) + } + Case (0x0100) + { + Store (\_SB.PCI0.LPCB.EC.HWAT, Local1) + Or (Local1, ShiftLeft (0x2D, 0x10), Local1) + } + Default + { + Store (0x80000000, Local1) + } + + } + + Return (Local1) + } + } + + Method (_Q22, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + CLPM () + If (HB0A) + { + Notify (BAT0, 0x80) // Status Change + } + } + + Method (_Q4A, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + CLPM () + Notify (BAT0, 0x81) // Information Change + } + + Method (_Q4B, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + CLPM () + Notify (BAT0, 0x80) // Status Change + } + + Method (_Q24, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + CLPM () + Notify (BAT0, 0x80) // Status Change + } + + Method (BFCC, 0, NotSerialized) + { + If (\_SB.PCI0.LPCB.EC.BAT0.B0ST) + { + Notify (BAT0, 0x81) // Information Change + } + } + + Method (BATW, 1, NotSerialized) + { + If (\BT2T){} + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBRC, 16, + SBFC, 16, + SBAE, 16, + SBRS, 16, + SBAC, 16, + SBVO, 16, + SBAF, 16, + SBBS, 16 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBBM, 16, + SBMD, 16, + SBCC, 16 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBDC, 16, + SBDV, 16, + SBOM, 16, + SBSI, 16, + SBDT, 16, + SBSN, 16 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBCH, 32 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBMN, 128 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBDN, 128 + } + + Mutex (BATM, 0x00) + Method (GBIF, 3, NotSerialized) + { + Acquire (BATM, 0xFFFF) + If (Arg2) + { + Or (Arg0, 0x01, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBBM, Local7) + ShiftRight (Local7, 0x0F, Local7) + XOr (Local7, 0x01, Index (Arg1, 0x00)) + Store (Arg0, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + If (Local7) + { + Multiply (SBFC, 0x0A, Local1) + } + Else + { + Store (SBFC, Local1) + } + + Store (Local1, Index (Arg1, 0x02)) + Or (Arg0, 0x02, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + If (Local7) + { + Multiply (SBDC, 0x0A, Local0) + } + Else + { + Store (SBDC, Local0) + } + + Store (Local0, Index (Arg1, 0x01)) + Divide (Local1, 0x14, Local2, Index (Arg1, 0x05)) + If (Local7) + { + Store (0xC8, Index (Arg1, 0x06)) + } + ElseIf (SBDV) + { + Divide (0x00030D40, SBDV, Local2, Index (Arg1, 0x06)) + } + Else + { + Store (0x00, Index (Arg1, 0x06)) + } + + Store (SBDV, Index (Arg1, 0x04)) + Store (SBSN, Local0) + Name (SERN, Buffer (0x06) + { + " " + }) + Store (0x04, Local2) + While (Local0) + { + Divide (Local0, 0x0A, Local1, Local0) + Add (Local1, 0x30, Index (SERN, Local2)) + Decrement (Local2) + } + + Store (SERN, Index (Arg1, 0x0A)) + Or (Arg0, 0x06, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBDN, Index (Arg1, 0x09)) + Or (Arg0, 0x04, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Name (BTYP, Buffer (0x05) + { + 0x00, 0x00, 0x00, 0x00, 0x00 // ..... + }) + Store (SBCH, BTYP) /* \_SB_.PCI0.LPCB.EC__.GBIF.BTYP */ + Store (BTYP, Index (Arg1, 0x0B)) + Or (Arg0, 0x05, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBMN, Index (Arg1, 0x0C)) + } + Else + { + Store (0xFFFFFFFF, Index (Arg1, 0x01)) + Store (0x00, Index (Arg1, 0x05)) + Store (0x00, Index (Arg1, 0x06)) + Store (0xFFFFFFFF, Index (Arg1, 0x02)) + } + + Release (BATM) + Return (Arg1) + } + + Method (GBIX, 3, NotSerialized) + { + Acquire (BATM, 0xFFFF) + If (Arg2) + { + Or (Arg0, 0x01, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBCC, Local7) + Store (Local7, Index (Arg1, 0x08)) + Store (SBBM, Local7) + ShiftRight (Local7, 0x0F, Local7) + XOr (Local7, 0x01, Index (Arg1, 0x01)) + Store (Arg0, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + If (Local7) + { + Multiply (SBFC, 0x0A, Local1) + } + Else + { + Store (SBFC, Local1) + } + + Store (Local1, Index (Arg1, 0x03)) + Or (Arg0, 0x02, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + If (Local7) + { + Multiply (SBDC, 0x0A, Local0) + } + Else + { + Store (SBDC, Local0) + } + + Store (Local0, Index (Arg1, 0x02)) + Divide (Local1, 0x14, Local2, Index (Arg1, 0x06)) + If (Local7) + { + Store (0xC8, Index (Arg1, 0x07)) + } + ElseIf (SBDV) + { + Divide (0x00030D40, SBDV, Local2, Index (Arg1, 0x07)) + } + Else + { + Store (0x00, Index (Arg1, 0x07)) + } + + Store (SBDV, Index (Arg1, 0x05)) + Store (SBSN, Local0) + Name (SERN, Buffer (0x06) + { + " " + }) + Store (0x04, Local2) + While (Local0) + { + Divide (Local0, 0x0A, Local1, Local0) + Add (Local1, 0x30, Index (SERN, Local2)) + Decrement (Local2) + } + + Store (SERN, Index (Arg1, 0x11)) + Or (Arg0, 0x06, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBDN, Index (Arg1, 0x10)) + Or (Arg0, 0x04, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Name (BTYP, Buffer (0x05) + { + 0x00, 0x00, 0x00, 0x00, 0x00 // ..... + }) + Store (SBCH, BTYP) /* \_SB_.PCI0.LPCB.EC__.GBIX.BTYP */ + Store (BTYP, Index (Arg1, 0x12)) + Or (Arg0, 0x05, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBMN, Index (Arg1, 0x13)) + } + Else + { + Store (0xFFFFFFFF, Index (Arg1, 0x02)) + Store (0x00, Index (Arg1, 0x06)) + Store (0x00, Index (Arg1, 0x07)) + Store (0xFFFFFFFF, Index (Arg1, 0x03)) + } + + Release (BATM) + Return (Arg1) + } + + Name (B0I0, 0x00) + Name (B0I1, 0x00) + Name (B0I2, 0x00) + Name (B0I3, 0x00) + Name (B1I0, 0x00) + Name (B1I1, 0x00) + Name (B1I2, 0x00) + Name (B1I3, 0x00) + Method (GBST, 4, NotSerialized) + { + Acquire (BATM, 0xFFFF) + If (And (Arg1, 0x20)) + { + Store (0x02, Local0) + } + ElseIf (And (Arg1, 0x40)) + { + Store (0x01, Local0) + } + Else + { + Store (0x00, Local0) + } + + If (And (Arg1, 0x07)){} + Else + { + Or (Local0, 0x04, Local0) + } + + If (LEqual (And (Arg1, 0x07), 0x07)) + { + Store (0x04, Local0) + Store (0x00, Local1) + Store (0x00, Local2) + Store (0x00, Local3) + } + Else + { + Store (Arg0, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBVO, Local3) + If (Arg2) + { + Multiply (SBRC, 0x0A, Local2) + } + Else + { + Store (SBRC, Local2) + } + + Store (SBAC, Local1) + If (LGreaterEqual (Local1, 0x8000)) + { + If (And (Local0, 0x01)) + { + Subtract (0x00010000, Local1, Local1) + } + Else + { + Store (0x00, Local1) + } + } + ElseIf (LNot (And (Local0, 0x02))) + { + Store (0x00, Local1) + } + + If (Arg2) + { + Multiply (Local3, Local1, Local1) + Divide (Local1, 0x03E8, Local7, Local1) + } + } + + Store (ShiftLeft (0x01, ShiftRight (Arg0, 0x04)), Local5) + Or (BSWA, BSWR, BSWA) /* \_SB_.PCI0.LPCB.EC__.BSWA */ + If (LEqual (And (BSWA, Local5), 0x00)) + { + Store (Local0, Index (Arg3, 0x00)) + Store (Local1, Index (Arg3, 0x01)) + Store (Local2, Index (Arg3, 0x02)) + Store (Local3, Index (Arg3, 0x03)) + If (LEqual (Arg0, 0x00)) + { + Store (Local0, B0I0) /* \_SB_.PCI0.LPCB.EC__.B0I0 */ + Store (Local1, B0I1) /* \_SB_.PCI0.LPCB.EC__.B0I1 */ + Store (Local2, B0I2) /* \_SB_.PCI0.LPCB.EC__.B0I2 */ + Store (Local3, B0I3) /* \_SB_.PCI0.LPCB.EC__.B0I3 */ + } + Else + { + Store (Local0, B1I0) /* \_SB_.PCI0.LPCB.EC__.B1I0 */ + Store (Local1, B1I1) /* \_SB_.PCI0.LPCB.EC__.B1I1 */ + Store (Local2, B1I2) /* \_SB_.PCI0.LPCB.EC__.B1I2 */ + Store (Local3, B1I3) /* \_SB_.PCI0.LPCB.EC__.B1I3 */ + } + } + Else + { + If (\_SB.PCI0.LPCB.EC.AC._PSR ()) + { + If (LEqual (Arg0, 0x00)) + { + Store (B0I0, Index (Arg3, 0x00)) + Store (B0I1, Index (Arg3, 0x01)) + Store (B0I2, Index (Arg3, 0x02)) + Store (B0I3, Index (Arg3, 0x03)) + } + Else + { + Store (B1I0, Index (Arg3, 0x00)) + Store (B1I1, Index (Arg3, 0x01)) + Store (B1I2, Index (Arg3, 0x02)) + Store (B1I3, Index (Arg3, 0x03)) + } + } + Else + { + Store (Local0, Index (Arg3, 0x00)) + Store (Local1, Index (Arg3, 0x01)) + Store (Local2, Index (Arg3, 0x02)) + Store (Local3, Index (Arg3, 0x03)) + } + + If (LAnd (LEqual (And (Local0, 0x04), 0x00), LAnd (LGreater (Local2, 0x00), + LGreater (Local3, 0x00)))) + { + And (BSWA, Not (Local5), BSWA) /* \_SB_.PCI0.LPCB.EC__.BSWA */ + Store (Local0, Index (Arg3, 0x00)) + Store (Local1, Index (Arg3, 0x01)) + Store (Local2, Index (Arg3, 0x02)) + Store (Local3, Index (Arg3, 0x03)) + } + } + + Release (BATM) + Return (Arg3) + } + + Name (BSWR, 0x00) + Name (BSWA, 0x00) + Method (AJTP, 3, NotSerialized) + { + Store (Arg1, Local0) + Acquire (BATM, 0xFFFF) + Store (Arg0, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (SBRC, Local1) + Release (BATM) + If (LEqual (Arg0, 0x00)) + { + Store (HB0S, Local2) + } + Else + { + Store (HB1S, Local2) + } + + If (And (Local2, 0x20)) + { + If (LGreater (Arg2, 0x00)) + { + Add (Local0, 0x01, Local0) + } + + If (LLessEqual (Local0, Local1)) + { + Add (Local1, 0x01, Local0) + } + } + ElseIf (And (Local2, 0x40)) + { + If (LGreaterEqual (Local0, Local1)) + { + Subtract (Local1, 0x01, Local0) + } + } + + Return (Local0) + } + + Device (BAT0) + { + Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_PCL, Package (0x01) // _PCL: Power Consumer List + { + \_SB + }) + Name (B0ST, 0x00) + Name (BT0I, Package (0x0D) + { + 0x00, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0x01, + 0x2A30, + 0x00, + 0x00, + 0x01, + 0x01, + "", + "", + "", + "" + }) + Name (BX0I, Package (0x15) + { + 0x01, + 0x00, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0x01, + 0xFFFFFFFF, + 0x00, + 0x00, + 0xFFFFFFFF, + 0x00017318, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0x03E8, + 0x01F4, + 0xFFFFFFFF, + 0xFFFFFFFF, + "", + "", + "", + "", + 0x00 + }) + Name (BT0P, Package (0x04){}) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\H8DR) + { + Store (HB0A, B0ST) /* \_SB_.PCI0.LPCB.EC__.BAT0.B0ST */ + } + ElseIf (And (\RBEC (0x38), 0x80)) + { + Store (0x01, B0ST) /* \_SB_.PCI0.LPCB.EC__.BAT0.B0ST */ + } + Else + { + Store (0x00, B0ST) /* \_SB_.PCI0.LPCB.EC__.BAT0.B0ST */ + } + + If (B0ST) + { + Return (0x1F) + } + Else + { + Return (0x0F) + } + } + + Method (_BIF, 0, NotSerialized) // _BIF: Battery Information + { + Store (0x00, Local7) + Store (0x0A, Local6) + While (LAnd (LNot (Local7), Local6)) + { + If (HB0A) + { + If (LEqual (And (HB0S, 0x07), 0x07)) + { + Sleep (0x03E8) + Decrement (Local6) + } + Else + { + Store (0x01, Local7) + } + } + Else + { + Store (0x00, Local6) + } + } + + GBIX (0x00, BX0I, Local7) + Store (DerefOf (Index (BX0I, 0x01)), Index (BT0I, 0x00)) + Store (DerefOf (Index (BX0I, 0x02)), Index (BT0I, 0x01)) + Store (DerefOf (Index (BX0I, 0x03)), Index (BT0I, 0x02)) + Store (DerefOf (Index (BX0I, 0x04)), Index (BT0I, 0x03)) + Store (DerefOf (Index (BX0I, 0x05)), Index (BT0I, 0x04)) + Store (DerefOf (Index (BX0I, 0x06)), Index (BT0I, 0x05)) + Store (DerefOf (Index (BX0I, 0x07)), Index (BT0I, 0x06)) + Store (DerefOf (Index (BX0I, 0x0E)), Index (BT0I, 0x07)) + Store (DerefOf (Index (BX0I, 0x0F)), Index (BT0I, 0x08)) + Store (DerefOf (Index (BX0I, 0x10)), Index (BT0I, 0x09)) + Store (DerefOf (Index (BX0I, 0x11)), Index (BT0I, 0x0A)) + Store (DerefOf (Index (BX0I, 0x12)), Index (BT0I, 0x0B)) + Store (DerefOf (Index (BX0I, 0x13)), Index (BT0I, 0x0C)) + Return (BT0I) /* \_SB_.PCI0.LPCB.EC__.BAT0.BT0I */ + } + + Method (_BIX, 0, NotSerialized) // _BIX: Battery Information Extended + { + Store (0x00, Local7) + Store (0x0A, Local6) + While (LAnd (LNot (Local7), Local6)) + { + If (HB0A) + { + If (LEqual (And (HB0S, 0x07), 0x07)) + { + Sleep (0x03E8) + Decrement (Local6) + } + Else + { + Store (0x01, Local7) + } + } + Else + { + Store (0x00, Local6) + } + } + + Return (GBIX (0x00, BX0I, Local7)) + } + + Method (_BST, 0, NotSerialized) // _BST: Battery Status + { + XOr (DerefOf (Index (BX0I, 0x01)), 0x01, Local0) + Return (GBST (0x00, HB0S, Local0, BT0P)) + } + + Method (_BTP, 1, NotSerialized) // _BTP: Battery Trip Point + { + And (HAM4, 0xEF, HAM4) /* \_SB_.PCI0.LPCB.EC__.HAM4 */ + If (Arg0) + { + Store (0x00, Local0) + Store (Arg0, Local1) + If (LNot (DerefOf (Index (BX0I, 0x01)))) + { + Divide (Local1, 0x0A, Local0, Local1) + } + + Store (AJTP (0x00, Local1, Local0), Local1) + And (Local1, 0xFF, HT0L) /* \_SB_.PCI0.LPCB.EC__.HT0L */ + And (ShiftRight (Local1, 0x08), 0xFF, HT0H) /* \_SB_.PCI0.LPCB.EC__.HT0H */ + Or (HAM4, 0x10, HAM4) /* \_SB_.PCI0.LPCB.EC__.HAM4 */ + } + } + } + + Scope (HKEY) + { + Method (SCRQ, 1, Serialized) + { + Name (SCRS, 0x00) + Store (Arg0, Local0) + Store (0x00, Local1) + ADBG (Concatenate ("SCRQ =", ToHexString (Local0))) + If (LEqual (And (Local0, 0x80000000), 0x00)) + { + Switch (And (Local0, 0xFFFF)) + { + Case (0x00) + { + Store (0x01000000, Local2) + } + Case (0x0100) + { + Return (0x01) + } + Case (0x0101) + { + Return (0x01) + } + Case (0x0102) + { + Return (0x01) + } + Case (0x0200) + { + Return (0x01) + } + Case (0x0210) + { + Return (0x01) + } + Case (0x0211) + { + Return (0x01) + } + Case (0x0212) + { + Return (0x01) + } + Case (0x0300) + { + Return (0x01) + } + Case (0x0301) + { + Return (0x01) + } + Case (0x0302) + { + Return (0x01) + } + Default + { + Return (0x00) + } + + } + + Return (Local2) + } + Else + { + Store (Add (0x00, 0x40000000), Local2) + Switch (And (Local0, 0xFFFF)) + { + Case (0x00) + { + Store (0x01000000, Local2) + } + Case (0x0100) + { + Store (0x01000000, Local2) + } + Case (0x0101) + { + \SREQ (0x01, 0x00, 0x00) + } + Case (0x0102) + { + \SREQ (0x01, 0x01, 0x00) + } + Case (0x0200) + { + Store (0x01000000, Local2) + } + Case (0x0210) + { + \SREQ (0x02, 0x00, 0x00) + } + Case (0x0211) + { + \SREQ (0x02, 0x01, 0x00) + } + Case (0x0212) + { + \SREQ (0x02, 0x02, 0x00) + } + Case (0x0300) + { + Store (0x01000000, Local2) + } + Case (0x0301) + { + If (LEqual (\TBTS, 0x01)) + { + \_SB.TBFP (0x01) + } + Else + { + Store (Add (0x02, 0x80000000), Local2) + } + } + Case (0x0302) + { + If (LEqual (\TBTS, 0x01)) + { + \_SB.TBFP (0x00) + } + Else + { + Store (Add (0x02, 0x80000000), Local2) + } + } + Default + { + Store (Add (0x01, 0x80000000), Local2) + } + + } + + Return (Local2) + } + } + } + } + + Device (FWHD) + { + Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFF000000, // Address Base + 0x01000000, // Address Length + ) + }) + } + + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0xFED00000, // Address Base + 0x00000400, // Address Length + _Y32) + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (HPTE) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + If (HPTE) + { + CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y32._BAS, HPT0) // _BAS: Base Address + Store (HPTB, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */ + } + + Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */ + } + } + + Device (IPIC) + { + Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0020, // Range Minimum + 0x0020, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0024, // Range Minimum + 0x0024, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0028, // Range Minimum + 0x0028, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x002C, // Range Minimum + 0x002C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0030, // Range Minimum + 0x0030, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0034, // Range Minimum + 0x0034, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0038, // Range Minimum + 0x0038, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x003C, // Range Minimum + 0x003C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A0, // Range Minimum + 0x00A0, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A4, // Range Minimum + 0x00A4, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A8, // Range Minimum + 0x00A8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00AC, // Range Minimum + 0x00AC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B0, // Range Minimum + 0x00B0, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B4, // Range Minimum + 0x00B4, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B8, // Range Minimum + 0x00B8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00BC, // Range Minimum + 0x00BC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x04D0, // Range Minimum + 0x04D0, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IRQNoFlags () + {2} + }) + } + + Device (MATH) + { + Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x00F0, // Range Minimum + 0x00F0, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {13} + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x1F) + } + Else + { + Return (0x00) + } + } + } + + Device (LDRC) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x002E, // Range Minimum + 0x002E, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x004E, // Range Minimum + 0x004E, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0061, // Range Minimum + 0x0061, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0063, // Range Minimum + 0x0063, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0065, // Range Minimum + 0x0065, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0067, // Range Minimum + 0x0067, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0080, // Range Minimum + 0x0080, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0092, // Range Minimum + 0x0092, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x00B2, // Range Minimum + 0x00B2, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0680, // Range Minimum + 0x0680, // Range Maximum + 0x01, // Alignment + 0x20, // Length + ) + IO (Decode16, + 0xFFFF, // Range Minimum + 0xFFFF, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0xFFFF, // Range Minimum + 0xFFFF, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0xFFFF, // Range Minimum + 0xFFFF, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x1800, // Range Minimum + 0x1800, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + ) + IO (Decode16, + 0x164E, // Range Minimum + 0x164E, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + }) + } + + Device (LDR2) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_UID, "LPC_DEV") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0800, // Range Minimum + 0x0800, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + + Device (TIMR) + { + Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0040, // Range Minimum + 0x0040, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x0050, // Range Minimum + 0x0050, // Range Maximum + 0x10, // Alignment + 0x04, // Length + ) + IRQNoFlags () + {0} + }) + } + + Device (CWDT) + { + Name (_HID, EisaId ("INT3F0D") /* ACPI Motherboard Resources */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _CID: Compatible ID + Name (BUF0, ResourceTemplate () + { + IO (Decode16, + 0x1854, // Range Minimum + 0x1854, // Range Maximum + 0x04, // Alignment + 0x04, // Length + ) + }) + Method (_STA, 0, Serialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Return (BUF0) /* \_SB_.PCI0.LPCB.CWDT.BUF0 */ + } + } + + Device (SPKR) + { + Name (_HID, EisaId ("PNP0800") /* Microsoft Sound System Compatible Device */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0061, // Range Minimum + 0x0061, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + }) + } + + Device (KBD) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (\WIN8) + { + Return (0x7100AE30) + } + + Return (0x0303D041) + } + + Name (_CID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _CID: Compatible ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("LEN0091")) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _CID: Compatible ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + Method (MHID, 0, NotSerialized) + { + And (PNHM, 0x0FFF0FF0, Local0) + If (LEqual (Local0, 0x000406E0)) + { + Store (0x7B00AE30, _HID) /* \_SB_.PCI0.LPCB.MOU_._HID */ + } + ElseIf (\_SB.PCI0.LPCB.NFCD) + { + Store (0x9100AE30, _HID) /* \_SB_.PCI0.LPCB.MOU_._HID */ + } + Else + { + Store (0x9200AE30, _HID) /* \_SB_.PCI0.LPCB.MOU_._HID */ + } + } + } + } + + Name (ECUP, 0x01) + Mutex (EHLD, 0x00) + Method (TBTD, 1, Serialized) + { + ADBG ("TBTD") + Switch (ToInteger (Arg0)) + { + Case (Package (0x08) + { + 0x01, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08 + } + +) + { + Store (0x1C, Local0) + } + Case (Package (0x08) + { + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10 + } + +) + { + Store (0x1D, Local0) + } + Case (Package (0x04) + { + 0x11, + 0x12, + 0x13, + 0x14 + } + +) + { + Store (0x1B, Local0) + } + Case (Package (0x03) + { + 0x15, + 0x16, + 0x17 + } + +) + { + Store (0x01, Local0) + } + + } + + ADBG ("Device no") + ADBG (Local0) + Return (Local0) + } + + Method (TBTF, 1, Serialized) + { + ADBG ("TBTF") + Switch (ToInteger (Arg0)) + { + Case (0x01) + { + Store (And (\RPA1, 0x0F), Local0) + } + Case (0x02) + { + Store (And (\RPA2, 0x0F), Local0) + } + Case (0x03) + { + Store (And (\RPA3, 0x0F), Local0) + } + Case (0x04) + { + Store (And (\RPA4, 0x0F), Local0) + } + Case (0x05) + { + Store (And (\RPA5, 0x0F), Local0) + } + Case (0x06) + { + Store (And (\RPA6, 0x0F), Local0) + } + Case (0x07) + { + Store (And (\RPA7, 0x0F), Local0) + } + Case (0x08) + { + Store (And (\RPA8, 0x0F), Local0) + } + Case (0x09) + { + Store (And (\RPA9, 0x0F), Local0) + } + Case (0x0A) + { + Store (And (\RPAA, 0x0F), Local0) + } + Case (0x0B) + { + Store (And (\RPAB, 0x0F), Local0) + } + Case (0x0C) + { + Store (And (\RPAC, 0x0F), Local0) + } + Case (0x0D) + { + Store (And (\RPAD, 0x0F), Local0) + } + Case (0x0E) + { + Store (And (\RPAE, 0x0F), Local0) + } + Case (0x0F) + { + Store (And (\RPAF, 0x0F), Local0) + } + Case (0x10) + { + Store (And (\RPAG, 0x0F), Local0) + } + Case (0x11) + { + Store (And (\RPAH, 0x0F), Local0) + } + Case (0x12) + { + Store (And (\RPAI, 0x0F), Local0) + } + Case (0x13) + { + Store (And (\RPAJ, 0x0F), Local0) + } + Case (0x14) + { + Store (And (\RPAK, 0x0F), Local0) + } + Case (0x15) + { + Store (0x00, Local0) + } + Case (0x16) + { + Store (0x01, Local0) + } + Case (0x17) + { + Store (0x02, Local0) + } + + } + + ADBG ("Function no") + ADBG (Local0) + Return (Local0) + } + + Method (MMRP, 1, Serialized) + { + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + Return (Local0) + } + + Method (MMTB, 1, Serialized) + { + ADBG ("MMTB") + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + OperationRegion (MMMM, SystemMemory, Local0, 0x1A) + Field (MMMM, AnyAcc, NoLock, Preserve) + { + Offset (0x19), + SBUS, 8 + } + + Store (SBUS, Local2) + Store (\_SB.PCI0.GPCB (), Local0) + Multiply (Local2, 0x00100000, Local2) + Add (Local2, Local0, Local0) + ADBG ("TBT-US-ADR") + ADBG (Local0) + Return (Local0) + } + + Method (FFTB, 1, Serialized) + { + ADBG ("FFTB") + Add (MMTB (Arg0), 0x0548, Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + TB2P, 32, + P2TB, 32 + } + + Store (TB2P, Local1) + If (LEqual (Local1, 0xFFFFFFFF)) + { + ADBG ("FFTb 1") + Return (0x01) + } + Else + { + ADBG ("FFTb 0") + Return (0x00) + } + } + + Method (RLTR, 0, NotSerialized) + { + ADBG ("RLTR") + Add (0x68, \MMRP (\TBSE), Local0) + ADBG (Concatenate ("LTR=", ToHexString (Local0))) + OperationRegion (RP_X, SystemMemory, Local0, 0x02) + Field (RP_X, WordAcc, NoLock, Preserve) + { + , 10, + TLTR, 1 + } + + Store (0x01, TLTR) /* \RLTR.TLTR */ + } + + Scope (\_SB) + { + OperationRegion (ITSS, SystemMemory, 0xFDC43100, 0x0208) + Field (ITSS, ByteAcc, NoLock, Preserve) + { + PARC, 8, + PBRC, 8, + PCRC, 8, + PDRC, 8, + PERC, 8, + PFRC, 8, + PGRC, 8, + PHRC, 8, + Offset (0x200), + , 1, + , 1, + SCGE, 1 + } + } + + Mutex (MUTX, 0x00) + Mutex (OSUM, 0x00) + Event (WFEV) + OperationRegion (PRT0, SystemIO, 0x1608, 0x02) + Field (PRT0, WordAcc, Lock, Preserve) + { + P80B, 16 + } + + Field (PRT0, ByteAcc, NoLock, Preserve) + { + P80P, 8 + } + + Name (P80T, 0x00) + Method (D8XH, 2, Serialized) + { + Store (And (Arg1, 0xFF), P80T) /* \P80T */ + P8XH (0x00, P80T) + } + + Method (P8XH, 2, Serialized) + { + If (CondRefOf (DX2H)) + { + DX2H (0x00, Arg1) + } + + Store (Arg1, P80P) /* \P80P */ + } + + Method (ADBG, 1, Serialized) + { + If (CondRefOf (MBGS)) + { + ToHexString (Arg0, Local0) + MBGS (Local0) + } + } + + OperationRegion (SPRT, SystemIO, 0xB2, 0x02) + Field (SPRT, ByteAcc, Lock, Preserve) + { + SSMP, 8 + } + + Method (\_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + Store (Arg0, GPIC) /* \GPIC */ + Store (Arg0, PICM) /* \PICM */ + } + + Method (OPTS, 1, NotSerialized) + { + Store (0x00, P80D) /* \P80D */ + P8XH (0x00, Arg0) + ADBG (Concatenate ("OPTS=", ToHexString (Arg0))) + Store (0x01, Local0) + If (LEqual (Arg0, \SPS)) + { + Store (0x00, Local0) + } + + If (LOr (LEqual (Arg0, 0x00), LGreaterEqual (Arg0, 0x06))) + { + Store (0x00, Local0) + } + + If (Local0) + { + Store (Arg0, \SPS) + \_SB.PCI0.LPCB.EC.HKEY.MHKE (0x00) + If (\_SB.PCI0.LPCB.EC.KBLT) + { + \UCMS (0x0D) + } + + If (LEqual (Arg0, 0x01)) + { + Store (\_SB.PCI0.LPCB.EC.HFNI, \FNID) + Store (0x00, \_SB.PCI0.LPCB.EC.HFNI) + Store (0x00, \_SB.PCI0.LPCB.EC.HFSP) + } + + If (LEqual (Arg0, 0x03)) + { + \VVPD (0x03) + \SLTP () + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \ACST) + If (LEqual (\FNWK, 0x01)) + { + If (\H8DR) + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWFN) + } + Else + { + \MBEC (0x32, 0xEF, 0x00) + } + } + } + + If (LEqual (Arg0, 0x04)) + { + If (VDSP) + { + Store (Zero, SHA1) /* \SHA1 */ + } + + \_SB.SLPB._PSW (0x00) + \SLTP () + \AWON (0x04) + } + + If (LEqual (Arg0, 0x05)) + { + \SLTP () + \AWON (0x05) + } + + If (LGreaterEqual (Arg0, 0x04)) + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWLB) + } + Else + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWLB) + } + + If (LGreaterEqual (Arg0, 0x03)) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HCMU) + } + + If (LNotEqual (Arg0, 0x05)){} + \_SB.PCI0.LPCB.EC.HKEY.WGPS (Arg0) + } + + ADBG ("OPTS END") + } + + Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep + { + Store (0x00, P80T) /* \P80T */ + D8XH (0x00, Arg0) + ADBG (Concatenate ("_PTS=", ToHexString (Arg0))) + If (LEqual (\TBTS, 0x01)) + { + Store (0x01, TRD3) /* \TRD3 */ + Reset (WFEV) + If (LEqual (\RTBT, 0x01)) + { + Store (0x00, TOFF) /* \TOFF */ + } + + If (LEqual (\TSXW, 0x01)) + { + ADBG (Concatenate ("TSXW=", \TSXW)) + ADBG ("TBT Wake switch") + ADBG (Concatenate ("Before=", \_SB.CGRD (0x02, 0x00, 0x10, 0x00))) + \_SB.CGWR (0x02, 0x00, 0x10, 0x00) + ADBG ("TBT switch done") + ADBG (Concatenate ("After=", \_SB.CGRD (0x02, 0x00, 0x10, 0x00))) + } + Else + { + ADBG (Concatenate ("TSXW=", \TSXW)) + ADBG ("No Wake switch") + } + } + + If (LEqual (Arg0, 0x03)) + { + If (CondRefOf (\_PR.DTSE)) + { + If (LAnd (\_PR.DTSE, LGreater (TCNT, 0x01))) + { + TRAP (0x02, 0x1E) + } + } + } + + If (CondRefOf (\_SB.TPM.PTS)) + { + \_SB.TPM.PTS (Arg0) + } + + If (LOr (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)), LEqual (Arg0, 0x05))) + { + If (LEqual (PFLV, 0x02)) + { + \_SB.SGOV (0x02010003, 0x01) + } + } + + OPTS (Arg0) + } + + Method (PBCL, 0, NotSerialized) + { + Return (Package (0x67) + { + 0x50, + 0x32, + 0x00, + 0x01, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08, + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10, + 0x11, + 0x12, + 0x13, + 0x14, + 0x15, + 0x16, + 0x17, + 0x18, + 0x19, + 0x1A, + 0x1B, + 0x1C, + 0x1D, + 0x1E, + 0x1F, + 0x20, + 0x21, + 0x22, + 0x23, + 0x24, + 0x25, + 0x26, + 0x27, + 0x28, + 0x29, + 0x2A, + 0x2B, + 0x2C, + 0x2D, + 0x2E, + 0x2F, + 0x30, + 0x31, + 0x32, + 0x33, + 0x34, + 0x35, + 0x36, + 0x37, + 0x38, + 0x39, + 0x3A, + 0x3B, + 0x3C, + 0x3D, + 0x3E, + 0x3F, + 0x40, + 0x41, + 0x42, + 0x43, + 0x44, + 0x45, + 0x46, + 0x47, + 0x48, + 0x49, + 0x4A, + 0x4B, + 0x4C, + 0x4D, + 0x4E, + 0x4F, + 0x50, + 0x51, + 0x52, + 0x53, + 0x54, + 0x55, + 0x56, + 0x57, + 0x58, + 0x59, + 0x5A, + 0x5B, + 0x5C, + 0x5D, + 0x5E, + 0x5F, + 0x60, + 0x61, + 0x62, + 0x63, + 0x64 + }) + } + + Name (WAKI, Package (0x02) + { + 0x00, + 0x00 + }) + Method (OWAK, 1, NotSerialized) + { + ADBG ("OWAK") + If (LOr (LEqual (Arg0, 0x00), LGreaterEqual (Arg0, 0x05))) + { + Return (WAKI) /* \WAKI */ + } + + Store (0x00, \SPS) + Store (0x00, \_SB.PCI0.LPCB.EC.HCMU) + \_SB.PCI0.LPCB.EC.EVNT (0x01) + \_SB.PCI0.LPCB.EC.HKEY.MHKE (0x01) + \_SB.PCI0.LPCB.EC.FNST () + \UCMS (0x0D) + Store (0x00, \LIDB) + If (LEqual (Arg0, 0x01)) + { + Store (\_SB.PCI0.LPCB.EC.HFNI, \FNID) + } + + If (LEqual (Arg0, 0x03)) + { + \NVSS (0x00) + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \PWRS) + If (\OSC4) + { + \PNTF (0x81) + } + + If (LNotEqual (\ACST, \_SB.PCI0.LPCB.EC.AC._PSR ())) + { + \_SB.PCI0.LPCB.EC.ATMC () + } + + If (\SCRM) + { + Store (0x07, \_SB.PCI0.LPCB.EC.HFSP) + } + + Store (0x00, \IOEN) + Store (0x00, \IOST) + If (LEqual (\ISWK, 0x01)) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6070) + } + } + + If (\VIGD) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) /* External reference */ + If (\WVIS) + { + \VBTD () + } + } + ElseIf (\WVIS) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) /* External reference */ + \VBTD () + } + + \VCMS (0x01, \_SB.LID._LID ()) + \AWON (0x00) + If (\CMPR) + { + Notify (\_SB.SLPB, 0x02) // Device Wake + Store (0x00, \CMPR) + } + + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (\_SB.PCI0.LPCB.EC.ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, \_SB.PCI0.LPCB.EC.DCWL) + } + Else + { + Store (0x01, \_SB.PCI0.LPCB.EC.DCWL) + } + } + + If (LEqual (Arg0, 0x04)) + { + \NVSS (0x00) + Store (0x00, \_SB.PCI0.LPCB.EC.HSPA) + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \PWRS) + If (\OSC4) + { + \PNTF (0x81) + } + + \_SB.PCI0.LPCB.EC.ATMC () + If (\SCRM) + { + Store (0x07, \_SB.PCI0.LPCB.EC.HFSP) + } + + If (LNot (\NBCF)) + { + If (\VIGD) + { + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \VBRC (\BRLV) + } + } + + Store (0x00, \IOEN) + Store (0x00, \IOST) + If (LEqual (\ISWK, 0x02)) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6080) + } + } + + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (\_SB.PCI0.LPCB.EC.ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, \_SB.PCI0.LPCB.EC.DCWL) + } + Else + { + Store (0x01, \_SB.PCI0.LPCB.EC.DCWL) + } + } + + \_SB.PCI0.LPCB.EC.BATW (Arg0) + \_SB.PCI0.LPCB.EC.HKEY.WGWK (Arg0) + Notify (\_TZ.THM0, 0x80) // Thermal Status Change + \VSLD (\_SB.LID._LID ()) + If (\VIGD) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) /* External reference */ + } + ElseIf (\WVIS) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) /* External reference */ + } + + If (LLess (Arg0, 0x04)) + { + If (LOr (And (\RRBF, 0x02), And (\_SB.PCI0.LPCB.EC.HWAC, 0x02))) + { + ShiftLeft (Arg0, 0x08, Local0) + Store (Or (0x2013, Local0), Local0) + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (Local0) + } + } + + If (LEqual (Arg0, 0x04)) + { + Store (0x00, Local0) + Store (\CSUM (0x00), Local1) + If (LNotEqual (Local1, \CHKC)) + { + Store (0x01, Local0) + Store (Local1, \CHKC) + } + + Store (\CSUM (0x01), Local1) + If (LNotEqual (Local1, \CHKE)) + { + Store (0x01, Local0) + Store (Local1, \CHKE) + } + + If (Local0) + { + Notify (\_SB, 0x00) // Bus Check + } + } + + If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04))) + { + ADBG ("_WAK0") + Store (0x00, \_SB.PCI0.LPCB.EC.HKEY.ANGN) + If (\H8DR) + { + Store (\_SB.PCI0.LPCB.EC.TSL2, Local1) + Store (\_SB.PCI0.LPCB.EC.TSL1, Local2) + } + Else + { + Store (And (\RBEC (0x8A), 0x7F), Local1) + Store (And (\RBEC (0x89), 0x7F), Local2) + } + + If (And (Local2, 0x76)) + { + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x001F4001) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F4001) + } + + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F0001) + ADBG ("_WAK1") + } + + Store (Zero, \RRBF) + ADBG ("OWAK END") + Return (WAKI) /* \WAKI */ + } + + Method (_WAK, 1, Serialized) // _WAK: Wake + { + D8XH (0x01, 0xAB) + ADBG ("_WAK") + Store (0x01, TBPE) /* \TBPE */ + If (LEqual (TBTS, 0x01)) + { + Store (0x00, TRD3) /* \TRD3 */ + } + + \_SB.PCI0.GEXP.INVC () + If (LOr (LEqual (And (PMOF, 0x01), 0x01), LEqual (S0ID, One))) + { + Store (0x01, \_SB.SCGE) + } + + If (NEXP) + { + If (And (OSCC, 0x01)) + { + \_SB.PCI0.NHPG () + } + + If (And (OSCC, 0x04)) + { + \_SB.PCI0.NPME () + } + } + + If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04))) + { + If (And (GBSX, 0x40)) + { + \_SB.PCI0.GFX0.IUEH (0x06) + XOr (PB1E, 0x08, PB1E) /* \PB1E */ + } + + If (And (GBSX, 0x80)) + { + \_SB.PCI0.GFX0.IUEH (0x07) + XOr (PB1E, 0x10, PB1E) /* \PB1E */ + } + + If (CondRefOf (\_PR.DTSE)) + { + If (LAnd (\_PR.DTSE, LGreater (TCNT, 0x01))) + { + TRAP (0x02, 0x14) + } + } + + If (LEqual (TBTS, 0x01)) + { + Acquire (OSUM, 0xFFFF) + \_GPE.TINI (TBSE) + If (LEqual (TBMP, 0x01)) + { + \_GPE.TINI (TBS1) + } + + Release (OSUM) + } + + If (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP01, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP02, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP03, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP04, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP05, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP06, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF)) + { + If (LEqual (\DSTS, 0x00)) + { + Notify (\_SB.PCI0.RP07, 0x00) // Bus Check + } + } + + If (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF)) + { + If (LEqual (\DSTS, 0x00)) + { + Notify (\_SB.PCI0.RP08, 0x00) // Bus Check + } + } + + If (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP09, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP10, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP11, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP12, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP13, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP14, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP15, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP16, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP17, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP18, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP19, 0x00) // Bus Check + } + + If (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP20, 0x00) // Bus Check + } + + If (CondRefOf (\_SB.VMEN)) + { + Store (0xFF, \_SB.VMEN) + } + } + + OWAK (Arg0) + If (LEqual (TBTS, 0x01)) + { + Signal (WFEV) + } + + Return (Package (0x02) + { + 0x00, + 0x00 + }) + } + + Method (GETB, 3, Serialized) + { + Multiply (Arg0, 0x08, Local0) + Multiply (Arg1, 0x08, Local1) + CreateField (Arg2, Local0, Local1, TBF3) + Return (TBF3) /* \GETB.TBF3 */ + } + + Method (PNOT, 0, Serialized) + { + If (LGreater (TCNT, 0x01)) + { + If (And (\PC00, 0x08)) + { + Notify (\_PR.PR00, 0x80) // Performance Capability Change + } + + If (And (\PC01, 0x08)) + { + Notify (\_PR.PR01, 0x80) // Performance Capability Change + } + + If (And (\PC02, 0x08)) + { + Notify (\_PR.PR02, 0x80) // Performance Capability Change + } + + If (And (\PC03, 0x08)) + { + Notify (\_PR.PR03, 0x80) // Performance Capability Change + } + + If (And (\PC04, 0x08)) + { + Notify (\_PR.PR04, 0x80) // Performance Capability Change + } + + If (And (\PC05, 0x08)) + { + Notify (\_PR.PR05, 0x80) // Performance Capability Change + } + + If (And (\PC06, 0x08)) + { + Notify (\_PR.PR06, 0x80) // Performance Capability Change + } + + If (And (\PC07, 0x08)) + { + Notify (\_PR.PR07, 0x80) // Performance Capability Change + } + + If (And (\PC08, 0x08)) + { + Notify (\_PR.PR08, 0x80) // Performance Capability Change + } + + If (And (\PC09, 0x08)) + { + Notify (\_PR.PR09, 0x80) // Performance Capability Change + } + + If (And (\PC10, 0x08)) + { + Notify (\_PR.PR10, 0x80) // Performance Capability Change + } + + If (And (\PC11, 0x08)) + { + Notify (\_PR.PR11, 0x80) // Performance Capability Change + } + + If (And (\PC12, 0x08)) + { + Notify (\_PR.PR12, 0x80) // Performance Capability Change + } + + If (And (\PC13, 0x08)) + { + Notify (\_PR.PR13, 0x80) // Performance Capability Change + } + + If (And (\PC14, 0x08)) + { + Notify (\_PR.PR14, 0x80) // Performance Capability Change + } + + If (And (\PC15, 0x08)) + { + Notify (\_PR.PR15, 0x80) // Performance Capability Change + } + } + Else + { + Notify (\_PR.PR00, 0x80) // Performance Capability Change + } + + If (LGreater (TCNT, 0x01)) + { + If (LAnd (And (\PC00, 0x08), And (\PC00, 0x10))) + { + Notify (\_PR.PR00, 0x81) // C-State Change + } + + If (LAnd (And (\PC01, 0x08), And (\PC01, 0x10))) + { + Notify (\_PR.PR01, 0x81) // C-State Change + } + + If (LAnd (And (\PC02, 0x08), And (\PC02, 0x10))) + { + Notify (\_PR.PR02, 0x81) // C-State Change + } + + If (LAnd (And (\PC03, 0x08), And (\PC03, 0x10))) + { + Notify (\_PR.PR03, 0x81) // C-State Change + } + + If (LAnd (And (\PC04, 0x08), And (\PC04, 0x10))) + { + Notify (\_PR.PR04, 0x81) // C-State Change + } + + If (LAnd (And (\PC05, 0x08), And (\PC05, 0x10))) + { + Notify (\_PR.PR05, 0x81) // C-State Change + } + + If (LAnd (And (\PC06, 0x08), And (\PC06, 0x10))) + { + Notify (\_PR.PR06, 0x81) // C-State Change + } + + If (LAnd (And (\PC07, 0x08), And (\PC07, 0x10))) + { + Notify (\_PR.PR07, 0x81) // C-State Change + } + + If (LAnd (And (\PC08, 0x08), And (\PC08, 0x10))) + { + Notify (\_PR.PR08, 0x81) // C-State Change + } + + If (LAnd (And (\PC09, 0x08), And (\PC09, 0x10))) + { + Notify (\_PR.PR09, 0x81) // C-State Change + } + + If (LAnd (And (\PC10, 0x08), And (\PC10, 0x10))) + { + Notify (\_PR.PR10, 0x81) // C-State Change + } + + If (LAnd (And (\PC11, 0x08), And (\PC11, 0x10))) + { + Notify (\_PR.PR11, 0x81) // C-State Change + } + + If (LAnd (And (\PC12, 0x08), And (\PC12, 0x10))) + { + Notify (\_PR.PR12, 0x81) // C-State Change + } + + If (LAnd (And (\PC13, 0x08), And (\PC13, 0x10))) + { + Notify (\_PR.PR13, 0x81) // C-State Change + } + + If (LAnd (And (\PC14, 0x08), And (\PC14, 0x10))) + { + Notify (\_PR.PR14, 0x81) // C-State Change + } + + If (LAnd (And (\PC15, 0x08), And (\PC15, 0x10))) + { + Notify (\_PR.PR15, 0x81) // C-State Change + } + } + Else + { + Notify (\_PR.PR00, 0x81) // C-State Change + } + + If (LEqual (DPTF, 0x01)) + { + Notify (\_SB.IETM, 0x86) // Device-Specific + If (LEqual (CHGE, 0x01)){} + } + } + + OperationRegion (MBAR, SystemMemory, Add (\_SB.PCI0.GMHB (), 0x5000), 0x1000) + Field (MBAR, ByteAcc, NoLock, Preserve) + { + Offset (0x938), + PWRU, 4, + Offset (0x9A0), + PPL1, 15, + PL1E, 1, + CLP1, 1 + } + + Name (CLMP, 0x00) + Name (PLEN, 0x00) + Name (PLSV, 0x8000) + Name (CSEM, 0x00) + Method (SPL1, 0, Serialized) + { + Name (PPUU, 0x00) + If (LEqual (CSEM, 0x01)) + { + Return (Zero) + } + + Store (0x01, CSEM) /* \CSEM */ + Store (PPL1, PLSV) /* \PLSV */ + Store (PL1E, PLEN) /* \PLEN */ + Store (CLP1, CLMP) /* \CLMP */ + If (LEqual (PWRU, 0x00)) + { + Store (0x01, PPUU) /* \SPL1.PPUU */ + } + Else + { + ShiftLeft (Decrement (PWRU), 0x02, PPUU) /* \SPL1.PPUU */ + } + + Multiply (PLVL, PPUU, Local0) + Divide (Local0, 0x03E8, , Local1) + Store (Local1, PPL1) /* \PPL1 */ + Store (0x01, PL1E) /* \PL1E */ + Store (0x01, CLP1) /* \CLP1 */ + } + + Method (RPL1, 0, Serialized) + { + Store (PLSV, PPL1) /* \PPL1 */ + Store (PLEN, PL1E) /* \PL1E */ + Store (CLMP, CLP1) /* \CLP1 */ + Store (0x00, CSEM) /* \CSEM */ + } + + Name (UAMS, 0x00) + Name (GLCK, 0x00) + Method (GUAM, 1, Serialized) + { + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + If (LEqual (GLCK, 0x01)) + { + Store (0x00, GLCK) /* \GLCK */ + P8XH (0x00, 0xE1) + P8XH (0x01, 0xAB) + ADBG ("Exit Resiliency") + \_SB.DION () + If (PSCP) + { + If (CondRefOf (\_PR.PR00._PPC)) + { + Store (Zero, \_PR.CPPC) /* External reference */ + PNOT () + } + } + + If (PLCS) + { + RPL1 () + } + } + } + Case (0x01) + { + If (LEqual (GLCK, 0x00)) + { + Store (0x01, GLCK) /* \GLCK */ + P8XH (0x00, 0xE0) + P8XH (0x01, 0x00) + ADBG ("Enter Resiliency") + \_SB.DIOF () + If (PSCP) + { + If (LAnd (CondRefOf (\_PR.PR00._PSS), CondRefOf (\_PR.PR00._PPC))) + { + If (And (\PC00, 0x0400)) + { + Subtract (SizeOf (\_PR.PR00.TPSS), One, \_PR.CPPC) /* External reference */ + } + Else + { + Subtract (SizeOf (\_PR.PR00.LPSS), One, \_PR.CPPC) /* External reference */ + } + + PNOT () + } + } + + If (PLCS) + { + SPL1 () + } + } + } + Default + { + Return (Zero) + } + + } + + Store (LAnd (Arg0, LNot (PWRS)), UAMS) /* \UAMS */ + P_CS () + } + + Method (P_CS, 0, Serialized) + { + If (CondRefOf (\_SB.PCI0.PAUD.PUAM)) + { + \_SB.PCI0.PAUD.PUAM () + } + + If (LEqual (OSYS, 0x07DC)) + { + If (CondRefOf (\_SB.PCI0.XHC.DUAM)) + { + \_SB.PCI0.XHC.DUAM () + } + } + } + + Scope (\) + { + OperationRegion (IO_H, SystemIO, 0x1000, 0x04) + Field (IO_H, ByteAcc, NoLock, Preserve) + { + TRPH, 8 + } + } + + Method (TRAP, 2, Serialized) + { + Store (Arg1, SMIF) /* \SMIF */ + If (LEqual (Arg0, 0x02)) + { + Store (Arg1, \_PR.DTSF) /* External reference */ + Store (0x00, \_PR.TRPD) /* External reference */ + Return (\_PR.DTSF) /* External reference */ + } + + If (LEqual (Arg0, 0x03)) + { + Store (0x00, TRPH) /* \TRPH */ + } + + If (LEqual (Arg0, 0x04)) + { + Store (0x00, \_PR.TRPF) /* External reference */ + } + + Return (SMIF) /* \SMIF */ + } + + Scope (\_SB.PCI0) + { + Method (PTMA, 0, NotSerialized) + { + Return (\_PR.BGMA) /* External reference */ + } + + Method (PTMS, 0, NotSerialized) + { + Return (\_PR.BGMS) /* External reference */ + } + + Method (PTIA, 0, NotSerialized) + { + Return (\_PR.BGIA) /* External reference */ + } + + Method (OINI, 0, NotSerialized) + { + ADBG ("Init _INI") + If (LGreaterEqual (\_REV, 0x02)) + { + Store (0x01, \H8DR) + } + + Store (0x01, \OSIF) + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \PWRS) + \_SB.PCI0.LPCB.MOU.MHID () + If (\LNUX) + { + \_SB.PCI0.LPCB.EC.SAUM (0x02) + \UCMS (0x1C) + } + + Store (\SRAH, \_SB.PCI0.RID) + If (VIGD) + { + Store (\SRHE, \_SB.PCI0.GFX0.RID) + } + Else + { + Store (\SRHE, \_SB.PCI0.PEG0.RID) + } + + Store (\SRE1, \_SB.PCI0.RP01.RID) + Store (\SRE2, \_SB.PCI0.RP02.RID) + Store (\SRE3, \_SB.PCI0.RP03.RID) + Store (\SRE4, \_SB.PCI0.RP05.RID) + Store (\SRE4, \_SB.PCI0.RP09.RID) + Store (\SRLP, \_SB.PCI0.LPCB.RID) + Store (\SRSA, \_SB.PCI0.SAT0.RID) + Store (\SRSM, \_SB.PCI0.SBUS.RID) + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + Store (0x01, TBPE) /* \TBPE */ + Store (0x07D0, OSYS) /* \OSYS */ + If (CondRefOf (\_OSI)) + { + If (\_OSI ("Windows 2001")) + { + Store (0x01, \WNTF) + Store (0x01, \WXPF) + Store (0x00, \WSPV) + Store (0x07D1, OSYS) /* \OSYS */ + } + + If (\_OSI ("Windows 2001 SP1")) + { + Store (0x01, \WSPV) + Store (0x07D1, OSYS) /* \OSYS */ + } + + If (\_OSI ("Windows 2001 SP2")) + { + Store (0x02, \WSPV) + Store (0x07D2, OSYS) /* \OSYS */ + } + + If (\_OSI ("Windows 2006")) + { + Store (0x01, \WVIS) + Store (0x07D6, OSYS) /* \OSYS */ + } + + If (\_OSI ("Windows 2009")) + { + Store (0x01, \WIN7) + Store (0x07D9, OSYS) /* \OSYS */ + } + + If (\_OSI ("Windows 2012")) + { + Store (0x01, \WIN8) + Store (0x07DC, OSYS) /* \OSYS */ + } + + If (\_OSI ("Windows 2013")) + { + Store (0x01, \WIN8) + Store (0x07DD, OSYS) /* \OSYS */ + } + + If (\_OSI ("Windows 2015")) + { + Store (0x01, \WIN8) + Store (0x07DF, OSYS) /* \OSYS */ + } + + If (\_OSI ("Linux")) + { + Store (0x01, \LNUX) + Store (0x03E8, OSYS) /* \OSYS */ + } + + If (\_OSI ("FreeBSD")) + { + Store (0x01, \LNUX) + Store (0x03E8, OSYS) /* \OSYS */ + } + } + ElseIf (LEqual (\SCMP (\_OS, "Microsoft Windows NT"), Zero)) + { + Store (0x01, \WNTF) + } + + If (CondRefOf (\_PR.DTSE)) + { + If (LGreaterEqual (\_PR.DTSE, 0x01)) + { + Store (0x01, \_PR.DSAE) /* External reference */ + } + } + + If (LEqual (TBTS, 0x01)) + { + Acquire (OSUM, 0xFFFF) + \_GPE.TINI (TBSE) + Release (OSUM) + If (LEqual (TBMP, 0x01)) + { + Acquire (OSUM, 0xFFFF) + \_GPE.TINI (TBS1) + Release (OSUM) + } + + Signal (WFEV) + } + + OINI () + } + + Method (NHPG, 0, Serialized) + { + Store (0x00, ^RP01.HPEX) /* \_SB_.PCI0.RP01.HPEX */ + Store (0x00, ^RP02.HPEX) /* \_SB_.PCI0.RP02.HPEX */ + Store (0x00, ^RP03.HPEX) /* \_SB_.PCI0.RP03.HPEX */ + Store (0x00, ^RP04.HPEX) /* \_SB_.PCI0.RP04.HPEX */ + Store (0x00, ^RP05.HPEX) /* \_SB_.PCI0.RP05.HPEX */ + Store (0x00, ^RP06.HPEX) /* \_SB_.PCI0.RP06.HPEX */ + Store (0x00, ^RP07.HPEX) /* \_SB_.PCI0.RP07.HPEX */ + Store (0x00, ^RP08.HPEX) /* \_SB_.PCI0.RP08.HPEX */ + Store (0x00, ^RP09.HPEX) /* \_SB_.PCI0.RP09.HPEX */ + Store (0x00, ^RP10.HPEX) /* \_SB_.PCI0.RP10.HPEX */ + Store (0x00, ^RP11.HPEX) /* \_SB_.PCI0.RP11.HPEX */ + Store (0x00, ^RP12.HPEX) /* \_SB_.PCI0.RP12.HPEX */ + Store (0x00, ^RP13.HPEX) /* \_SB_.PCI0.RP13.HPEX */ + Store (0x00, ^RP14.HPEX) /* \_SB_.PCI0.RP14.HPEX */ + Store (0x00, ^RP15.HPEX) /* \_SB_.PCI0.RP15.HPEX */ + Store (0x00, ^RP16.HPEX) /* \_SB_.PCI0.RP16.HPEX */ + Store (0x00, ^RP17.HPEX) /* \_SB_.PCI0.RP17.HPEX */ + Store (0x00, ^RP18.HPEX) /* \_SB_.PCI0.RP18.HPEX */ + Store (0x00, ^RP19.HPEX) /* \_SB_.PCI0.RP19.HPEX */ + Store (0x00, ^RP20.HPEX) /* \_SB_.PCI0.RP20.HPEX */ + Store (0x01, ^RP01.HPSX) /* \_SB_.PCI0.RP01.HPSX */ + Store (0x01, ^RP02.HPSX) /* \_SB_.PCI0.RP02.HPSX */ + Store (0x01, ^RP03.HPSX) /* \_SB_.PCI0.RP03.HPSX */ + Store (0x01, ^RP04.HPSX) /* \_SB_.PCI0.RP04.HPSX */ + Store (0x01, ^RP05.HPSX) /* \_SB_.PCI0.RP05.HPSX */ + Store (0x01, ^RP06.HPSX) /* \_SB_.PCI0.RP06.HPSX */ + Store (0x01, ^RP07.HPSX) /* \_SB_.PCI0.RP07.HPSX */ + Store (0x01, ^RP08.HPSX) /* \_SB_.PCI0.RP08.HPSX */ + Store (0x01, ^RP09.HPSX) /* \_SB_.PCI0.RP09.HPSX */ + Store (0x01, ^RP10.HPSX) /* \_SB_.PCI0.RP10.HPSX */ + Store (0x01, ^RP11.HPSX) /* \_SB_.PCI0.RP11.HPSX */ + Store (0x01, ^RP12.HPSX) /* \_SB_.PCI0.RP12.HPSX */ + Store (0x01, ^RP13.HPSX) /* \_SB_.PCI0.RP13.HPSX */ + Store (0x01, ^RP14.HPSX) /* \_SB_.PCI0.RP14.HPSX */ + Store (0x01, ^RP15.HPSX) /* \_SB_.PCI0.RP15.HPSX */ + Store (0x01, ^RP16.HPSX) /* \_SB_.PCI0.RP16.HPSX */ + Store (0x01, ^RP17.HPSX) /* \_SB_.PCI0.RP17.HPSX */ + Store (0x01, ^RP18.HPSX) /* \_SB_.PCI0.RP18.HPSX */ + Store (0x01, ^RP19.HPSX) /* \_SB_.PCI0.RP19.HPSX */ + Store (0x01, ^RP20.HPSX) /* \_SB_.PCI0.RP20.HPSX */ + Store (0x01, ^RP01.PDCX) /* \_SB_.PCI0.RP01.PDCX */ + Store (0x01, ^RP02.PDCX) /* \_SB_.PCI0.RP02.PDCX */ + Store (0x01, ^RP03.PDCX) /* \_SB_.PCI0.RP03.PDCX */ + Store (0x01, ^RP04.PDCX) /* \_SB_.PCI0.RP04.PDCX */ + Store (0x01, ^RP05.PDCX) /* \_SB_.PCI0.RP05.PDCX */ + Store (0x01, ^RP06.PDCX) /* \_SB_.PCI0.RP06.PDCX */ + Store (0x01, ^RP07.PDCX) /* \_SB_.PCI0.RP07.PDCX */ + Store (0x01, ^RP08.PDCX) /* \_SB_.PCI0.RP08.PDCX */ + Store (0x01, ^RP09.PDCX) /* \_SB_.PCI0.RP09.PDCX */ + Store (0x01, ^RP10.PDCX) /* \_SB_.PCI0.RP10.PDCX */ + Store (0x01, ^RP11.PDCX) /* \_SB_.PCI0.RP11.PDCX */ + Store (0x01, ^RP12.PDCX) /* \_SB_.PCI0.RP12.PDCX */ + Store (0x01, ^RP13.PDCX) /* \_SB_.PCI0.RP13.PDCX */ + Store (0x01, ^RP14.PDCX) /* \_SB_.PCI0.RP14.PDCX */ + Store (0x01, ^RP15.PDCX) /* \_SB_.PCI0.RP15.PDCX */ + Store (0x01, ^RP16.PDCX) /* \_SB_.PCI0.RP16.PDCX */ + Store (0x01, ^RP17.PDCX) /* \_SB_.PCI0.RP17.PDCX */ + Store (0x01, ^RP18.PDCX) /* \_SB_.PCI0.RP18.PDCX */ + Store (0x01, ^RP19.PDCX) /* \_SB_.PCI0.RP19.PDCX */ + Store (0x01, ^RP20.PDCX) /* \_SB_.PCI0.RP20.PDCX */ + } + + Method (NPME, 0, Serialized) + { + Store (0x00, ^RP01.PMEX) /* \_SB_.PCI0.RP01.PMEX */ + Store (0x00, ^RP02.PMEX) /* \_SB_.PCI0.RP02.PMEX */ + Store (0x00, ^RP03.PMEX) /* \_SB_.PCI0.RP03.PMEX */ + Store (0x00, ^RP04.PMEX) /* \_SB_.PCI0.RP04.PMEX */ + Store (0x00, ^RP05.PMEX) /* \_SB_.PCI0.RP05.PMEX */ + Store (0x00, ^RP06.PMEX) /* \_SB_.PCI0.RP06.PMEX */ + Store (0x00, ^RP07.PMEX) /* \_SB_.PCI0.RP07.PMEX */ + Store (0x00, ^RP08.PMEX) /* \_SB_.PCI0.RP08.PMEX */ + Store (0x00, ^RP09.PMEX) /* \_SB_.PCI0.RP09.PMEX */ + Store (0x00, ^RP10.PMEX) /* \_SB_.PCI0.RP10.PMEX */ + Store (0x00, ^RP11.PMEX) /* \_SB_.PCI0.RP11.PMEX */ + Store (0x00, ^RP12.PMEX) /* \_SB_.PCI0.RP12.PMEX */ + Store (0x00, ^RP13.PMEX) /* \_SB_.PCI0.RP13.PMEX */ + Store (0x00, ^RP14.PMEX) /* \_SB_.PCI0.RP14.PMEX */ + Store (0x00, ^RP15.PMEX) /* \_SB_.PCI0.RP15.PMEX */ + Store (0x00, ^RP16.PMEX) /* \_SB_.PCI0.RP16.PMEX */ + Store (0x00, ^RP17.PMEX) /* \_SB_.PCI0.RP17.PMEX */ + Store (0x00, ^RP18.PMEX) /* \_SB_.PCI0.RP18.PMEX */ + Store (0x00, ^RP19.PMEX) /* \_SB_.PCI0.RP19.PMEX */ + Store (0x00, ^RP20.PMEX) /* \_SB_.PCI0.RP20.PMEX */ + Store (0x01, ^RP01.PMSX) /* \_SB_.PCI0.RP01.PMSX */ + Store (0x01, ^RP02.PMSX) /* \_SB_.PCI0.RP02.PMSX */ + Store (0x01, ^RP03.PMSX) /* \_SB_.PCI0.RP03.PMSX */ + Store (0x01, ^RP04.PMSX) /* \_SB_.PCI0.RP04.PMSX */ + Store (0x01, ^RP05.PMSX) /* \_SB_.PCI0.RP05.PMSX */ + Store (0x01, ^RP06.PMSX) /* \_SB_.PCI0.RP06.PMSX */ + Store (0x01, ^RP07.PMSX) /* \_SB_.PCI0.RP07.PMSX */ + Store (0x01, ^RP08.PMSX) /* \_SB_.PCI0.RP08.PMSX */ + Store (0x01, ^RP09.PMSX) /* \_SB_.PCI0.RP09.PMSX */ + Store (0x01, ^RP10.PMSX) /* \_SB_.PCI0.RP10.PMSX */ + Store (0x01, ^RP11.PMSX) /* \_SB_.PCI0.RP11.PMSX */ + Store (0x01, ^RP12.PMSX) /* \_SB_.PCI0.RP12.PMSX */ + Store (0x01, ^RP13.PMSX) /* \_SB_.PCI0.RP13.PMSX */ + Store (0x01, ^RP14.PMSX) /* \_SB_.PCI0.RP14.PMSX */ + Store (0x01, ^RP15.PMSX) /* \_SB_.PCI0.RP15.PMSX */ + Store (0x01, ^RP16.PMSX) /* \_SB_.PCI0.RP16.PMSX */ + Store (0x01, ^RP17.PMSX) /* \_SB_.PCI0.RP17.PMSX */ + Store (0x01, ^RP18.PMSX) /* \_SB_.PCI0.RP18.PMSX */ + Store (0x01, ^RP19.PMSX) /* \_SB_.PCI0.RP19.PMSX */ + Store (0x01, ^RP20.PMSX) /* \_SB_.PCI0.RP20.PMSX */ + } + } + + Scope (\) + { + Name (PICM, 0x00) + Name (PRWP, Package (0x02) + { + Zero, + Zero + }) + Method (GPRW, 2, NotSerialized) + { + Store (Arg0, Index (PRWP, 0x00)) + Store (ShiftLeft (SS1, 0x01), Local0) + Or (Local0, ShiftLeft (SS2, 0x02), Local0) + Or (Local0, ShiftLeft (SS3, 0x03), Local0) + Or (Local0, ShiftLeft (SS4, 0x04), Local0) + If (And (ShiftLeft (0x01, Arg1), Local0)) + { + Store (Arg1, Index (PRWP, 0x01)) + } + Else + { + ShiftRight (Local0, 0x01, Local0) + FindSetLeftBit (Local0, Index (PRWP, 0x01)) + } + + Return (PRWP) /* \PRWP */ + } + } + + Scope (\_SB) + { + Name (OSCI, 0x00) + Name (OSCO, 0x00) + Name (OSCP, 0x00) + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, 0x00, STS0) + CreateDWordField (Arg3, 0x04, CAP0) + If (LOr (LEqual (And (PMOF, 0x01), 0x01), LEqual (S0ID, One))) + { + Store (0x01, \_SB.SCGE) + } + + If (LEqual (Arg0, ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) + { + If (LEqual (Arg1, One)) + { + Store (CAP0, OSCP) /* \_SB_.OSCP */ + If (And (CAP0, 0x04)) + { + Store (0x04, OSCO) /* \_SB_.OSCO */ + If (LNotEqual (And (SGMD, 0x0F), 0x02)) + { + If (LEqual (RTD3, 0x00)) + { + And (CAP0, 0x3B, CAP0) /* \_SB_._OSC.CAP0 */ + Or (STS0, 0x10, STS0) /* \_SB_._OSC.STS0 */ + } + } + } + + If (And (CAP0, 0x20)) + { + Store (0x01, \CPPX) + } + Else + { + And (CAP0, 0x9F, CAP0) /* \_SB_._OSC.CAP0 */ + Or (STS0, 0x10, STS0) /* \_SB_._OSC.STS0 */ + } + } + ElseIf (LEqual (Arg0, ToUUID ("ed855e0c-6c90-47bf-a62a-26de0fc5ad5c"))) + { + Return (Arg3) + } + Else + { + And (STS0, 0xFFFFFF00, STS0) /* \_SB_._OSC.STS0 */ + Or (STS0, 0x0A, STS0) /* \_SB_._OSC.STS0 */ + } + } + Else + { + And (STS0, 0xFFFFFF00, STS0) /* \_SB_._OSC.STS0 */ + Or (STS0, 0x06, STS0) /* \_SB_._OSC.STS0 */ + } + + Return (Arg3) + } + + Device (EPC) + { + Name (_HID, EisaId ("INT0E0C")) // _HID: Hardware ID + Name (_STR, Unicode ("Enclave Page Cache 1.0")) // _STR: Description String + Name (_MLS, Package (0x01) // _MLS: Multiple Language String + { + Package (0x02) + { + "en", + Unicode ("Enclave Page Cache 1.0") + } + }) + Name (RBUF, ResourceTemplate () + { + QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0x0000000000000000, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000000000001, // Length + ,, _Y33, AddressRangeMemory, TypeStatic) + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + CreateQWordField (RBUF, \_SB.EPC._Y33._MIN, EMIN) // _MIN: Minimum Base Address + CreateQWordField (RBUF, \_SB.EPC._Y33._MAX, EMAX) // _MAX: Maximum Base Address + CreateQWordField (RBUF, \_SB.EPC._Y33._LEN, ELEN) // _LEN: Length + Store (\_PR.EMNA, EMIN) /* \_SB_.EPC_._CRS.EMIN */ + Store (\_PR.ELNG, ELEN) /* \_SB_.EPC_._CRS.ELEN */ + Subtract (Add (\_PR.EMNA, \_PR.ELNG), 0x01, EMAX) /* \_SB_.EPC_._CRS.EMAX */ + Return (RBUF) /* \_SB_.EPC_.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (\_PR.EPCS, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + } + } + + Scope (\_SB) + { + Device (BTKL) + { + Name (_HID, "INT3420" /* Intel Bluetooth RF Kill */) // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x00) + } + + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + } + + Method (PSTS, 0, NotSerialized) + { + } + } + } + + Scope (\_SB) + { + Device (SLPB) + { + Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _HID: Hardware ID + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (Package (0x02) + { + 0x17, + 0x03 + }) + } + + Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake + { + If (\H8DR) + { + If (Arg0) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWFN) + } + Else + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWFN) + } + } + ElseIf (Arg0) + { + \MBEC (0x32, 0xFF, 0x10) + } + Else + { + \MBEC (0x32, 0xEF, 0x00) + } + } + } + } + + If (LNotEqual (RTVM, 0x00)) + { + ADBG (Concatenate ("RTVM=", ToHexString (RTVM))) + Scope (\_SB) + { + Name (VMEN, 0xFF) + Method (VMON, 0, Serialized) + { + ADBG (Concatenate ("VMON=", ToHexString (VMEN))) + If (LEqual (VMEN, 0x01)) + { + Return (Zero) + } + + If (LEqual (RTVM, 0x01)){} + ElseIf (LEqual (RTVM, 0x02)) + { + ADBG ("Assert pin") + SGOV (VRGP, 0x00) + } + + Store (0x01, VMEN) /* \_SB_.VMEN */ + } + + Method (VMOF, 0, Serialized) + { + ADBG (Concatenate ("VMOF=", ToHexString (VMEN))) + If (LEqual (VMEN, 0x00)) + { + Return (Zero) + } + + If (LEqual (RTVM, 0x01)){} + ElseIf (LEqual (RTVM, 0x02)) + { + ADBG ("Deassert pin") + SGOV (VRGP, 0x01) + } + + Store (0x00, VMEN) /* \_SB_.VMEN */ + } + } + } + + Name (TDMA, 0x5B4A4000) + Name (TDPG, 0x80000000) + Name (TDTI, 0x80000000) + Name (TRDO, 0x00) + Name (TRD3, 0x00) + Name (TBPE, 0x00) + Name (TOFF, 0x00) + Scope (\_GPE) + { + Method (OSUP, 1, Serialized) + { + ADBG (Concatenate ("OSUP=", ToHexString (Arg0))) + Add (Arg0, 0x0548, Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + TB2P, 32, + P2TB, 32 + } + + Store (0x64, Local1) + Store (0x0D, P2TB) /* \_GPE.OSUP.P2TB */ + While (LGreater (Local1, 0x00)) + { + Store (Subtract (Local1, 0x01), Local1) + Store (TB2P, Local2) + If (LEqual (Local2, 0xFFFFFFFF)) + { + ADBG ("Dev gone") + Return (0x02) + } + + If (And (Local2, 0x01)) + { + ADBG ("Cmd acknowledged") + Break + } + + Sleep (0x32) + } + + If (LEqual (TRWA, 0x01)) + { + Store (0x0C, P2TB) /* \_GPE.OSUP.P2TB */ + } + Else + { + Store (0x00, P2TB) /* \_GPE.OSUP.P2TB */ + } + + ADBG ("End-of-OSUP") + Return (0x01) + } + + Method (PGWA, 1, Serialized) + { + ADBG ("PGWA") + If (LGreaterEqual (Arg0, 0x15)) + { + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + ADBG (Local0) + OperationRegion (ABCD, SystemMemory, Local0, 0x1000) + Field (ABCD, AnyAcc, NoLock, Preserve) + { + Offset (0x84), + PWRS, 2, + Offset (0xB0), + , 4, + LNKD, 1, + Offset (0x11A), + , 1, + VCNP, 1, + Offset (0x508), + TREN, 1 + } + + If (LNotEqual (PWRS, 0x00)) + { + ADBG ("Force D0") + Store (0x00, PWRS) /* \_GPE.PGWA.PWRS */ + Store (0x00, \_PR.POWS) /* External reference */ + Sleep (0x10) + } + + If (LNotEqual (LNKD, 0x00)) + { + ADBG ("Link Enable") + Store (0x00, LNKD) /* \_GPE.PGWA.LNKD */ + Store (0x01, TREN) /* \_GPE.PGWA.TREN */ + Store (0x00, Local6) + Store (0x64, Local7) + While (LLess (Local6, Local7)) + { + If (LEqual (VCNP, 0x00)) + { + Break + } + + Sleep (0x10) + Add (Local6, 0x10, Local6) + } + } + } + } + + Method (TBFF, 1, Serialized) + { + ADBG ("TBFF") + Store (MMTB (Arg0), Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + VEDI, 32, + CMDR, 32 + } + + Store (VEDI, Local1) + If (LEqual (Local1, 0xFFFFFFFF)) + { + If (LNotEqual (\TWIN, 0x00)) + { + If (LEqual (CMDR, 0xFFFFFFFF)) + { + Return (0x02) + } + + Return (0x01) + } + Else + { + Return (OSUP (Local0)) + } + } + Else + { + ADBG ("Dev Present") + Return (0x00) + } + } + + Method (TSUB, 1, Serialized) + { + ADBG ("TSUB") + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + ADBG ("ADR") + ADBG (Local0) + OperationRegion (MMMM, SystemMemory, Local0, 0x1A) + Field (MMMM, AnyAcc, NoLock, Preserve) + { + Offset (0x19), + SBUS, 8 + } + + ADBG ("Sec Bus") + ADBG (SBUS) + Return (SBUS) /* \_GPE.TSUB.SBUS */ + } + + Method (WSUB, 1, Serialized) + { + ADBG ("WSUB") + Store (0x00, Local0) + Store (0x00, Local1) + While (0x01) + { + Store (TSUB (Arg0), Local1) + If (Local1) + { + ADBG ("WSUB-Finished") + Break + } + Else + { + Add (Local0, 0x01, Local0) + If (LGreater (Local0, 0x03E8)) + { + Sleep (0x03E8) + ADBG ("WSUB-Deadlock") + } + Else + { + Sleep (0x10) + } + } + } + } + + Method (WWAK, 0, NotSerialized) + { + ADBG ("WWAK") + Wait (WFEV, 0xFFFF) + Signal (WFEV) + } + + Method (NTFY, 1, Serialized) + { + ADBG ("NTFY") + If (LEqual (NOHP, 0x01)) + { + Switch (ToInteger (Arg0)) + { + Case (0x01) + { + ADBG ("Notify RP01") + Notify (\_SB.PCI0.RP01, 0x00) // Bus Check + } + Case (0x02) + { + ADBG ("Notify RP02") + Notify (\_SB.PCI0.RP02, 0x00) // Bus Check + } + Case (0x03) + { + ADBG ("Notify RP03") + Notify (\_SB.PCI0.RP03, 0x00) // Bus Check + } + Case (0x04) + { + ADBG ("Notify RP04") + Notify (\_SB.PCI0.RP04, 0x00) // Bus Check + } + Case (0x05) + { + ADBG ("Notify RP05") + Notify (\_SB.PCI0.RP05, 0x00) // Bus Check + } + Case (0x06) + { + ADBG ("Notify RP06") + Notify (\_SB.PCI0.RP06, 0x00) // Bus Check + } + Case (0x07) + { + ADBG ("Notify RP07") + Notify (\_SB.PCI0.RP07, 0x00) // Bus Check + } + Case (0x08) + { + ADBG ("Notify RP08") + Notify (\_SB.PCI0.RP08, 0x00) // Bus Check + } + Case (0x09) + { + ADBG ("Notify RP09") + Notify (\_SB.PCI0.RP09, 0x00) // Bus Check + } + Case (0x0A) + { + ADBG ("Notify RP10") + Notify (\_SB.PCI0.RP10, 0x00) // Bus Check + } + Case (0x0B) + { + ADBG ("Notify RP11") + Notify (\_SB.PCI0.RP11, 0x00) // Bus Check + } + Case (0x0C) + { + ADBG ("Notify RP12") + Notify (\_SB.PCI0.RP12, 0x00) // Bus Check + } + Case (0x0D) + { + ADBG ("Notify RP13") + Notify (\_SB.PCI0.RP13, 0x00) // Bus Check + } + Case (0x0E) + { + ADBG ("Notify RP14") + Notify (\_SB.PCI0.RP14, 0x00) // Bus Check + } + Case (0x0F) + { + ADBG ("Notify RP15") + Notify (\_SB.PCI0.RP15, 0x00) // Bus Check + } + Case (0x10) + { + ADBG ("Notify RP16") + Notify (\_SB.PCI0.RP16, 0x00) // Bus Check + } + Case (0x11) + { + ADBG ("Notify RP17") + Notify (\_SB.PCI0.RP17, 0x00) // Bus Check + } + Case (0x12) + { + ADBG ("Notify RP18") + Notify (\_SB.PCI0.RP18, 0x00) // Bus Check + } + Case (0x13) + { + ADBG ("Notify RP19") + Notify (\_SB.PCI0.RP19, 0x00) // Bus Check + } + Case (0x14) + { + ADBG ("Notify RP20") + Notify (\_SB.PCI0.RP20, 0x00) // Bus Check + } + Case (0x15) + { + ADBG ("Notify PEG0") + Notify (\_SB.PCI0.PEG0, 0x00) // Bus Check + } + Case (0x16) + { + ADBG ("Notify PEG1") + Notify (\_SB.PCI0.PEG1, 0x00) // Bus Check + } + Case (0x17) + { + ADBG ("Notify PEG2") + Notify (\_SB.PCI0.PEG2, 0x00) // Bus Check + } + + } + } + + P8XH (0x00, 0xC2) + P8XH (0x01, 0xC2) + } + + Method (NFYG, 0, NotSerialized) + { + ADBG ("NFYG") + If (LEqual (TDGS, 0x01)) + { + If (LEqual (DCKE, 0x01)) + { + ADBG ("NFYG.DCKE") + Notify (\_SB.PCI0.GFX0, 0x81) // Information Change + } + ElseIf (LEqual (SUDK, 0x01)) + { + ADBG ("NFYG.SUDK") + Notify (\_SB.PCI0.GFX0, 0x81) // Information Change + } + } + } + + Method (TFPS, 0, NotSerialized) + { + ADBG ("TFPS") + Store (\_SB.CGRD (FPAT, FPEN, FPGN, 0x00), Local0) + If (Local0) + { + ADBG ("ExtFrcPwr1") + } + Else + { + ADBG ("ExtFrcPwr0") + } + + Return (Local0) + } + + Method (CNCT, 0, NotSerialized) + { + ADBG ("CNCT") + ADBG ("Read") + ADBG ("ACPI_GPE_STS") + Store (CPAD, Local7) + Store (CPAB, Local6) + While (LGreater (Local6, 0x08)) + { + Add (Local7, 0x01, Local7) + Subtract (Local6, 0x08, Local6) + } + + OperationRegion (GPE0, SystemIO, Local7, 0x01) + Field (GPE0, ByteAcc, Lock, Preserve) + { + TEMP, 8 + } + + Store (TEMP, Local0) + ShiftRight (Local0, Local6, Local0) + And (Local0, 0x01, Local0) + Return (Local0) + } + + Method (CLNE, 0, NotSerialized) + { + ADBG ("CLNE") + ADBG ("Clear") + ADBG ("ACPI_GPE_STS") + Store (CPAD, Local7) + Store (CPAB, Local6) + While (LGreater (Local6, 0x08)) + { + Add (Local7, 0x01, Local7) + Subtract (Local6, 0x08, Local6) + } + + OperationRegion (GPE0, SystemIO, Local7, 0x01) + Field (GPE0, ByteAcc, Lock, Preserve) + { + TEMP, 8 + } + + ShiftLeft (0x01, Local6, Local6) + Or (TEMP, Local6, TEMP) /* \_GPE.CLNE.TEMP */ + } + + Method (GNIS, 1, Serialized) + { + ADBG ("GNIS") + If (LEqual (GP5F, 0x00)) + { + ADBG ("GNIS_Dis=0") + Return (0x00) + } + + Add (MMTB (Arg0), 0x0544, Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + HPFI, 1, + Offset (0x04), + TB2P, 32 + } + + Store (TB2P, Local1) + ADBG (Concatenate ("TB2P=", ToHexString (Local1))) + If (LEqual (Local1, 0xFFFFFFFF)) + { + ADBG ("GNIS=0") + Return (0x00) + } + + Store (HPFI, Local2) + ADBG (Concatenate ("HPFI=", ToHexString (Local2))) + If (LEqual (Local2, 0x01)) + { + Store (0x00, HPFI) /* \_GPE.GNIS.HPFI */ + ADBG ("GNIS=0") + Return (0x00) + } + + ADBG ("GNIS=1") + Return (0x01) + } + + Method (XTBT, 2, Serialized) + { + ADBG ("XTBT") + If (LEqual (CF2T, 0x01)) + { + ADBG ("Clear") + ADBG ("GPI_GPE_STS") + \_SB.CAGS (Arg1) + } + + \RLTR () + If (TRDO) + { + ADBG ("Drng TBT_ON") + Return (Zero) + } + + If (TRD3) + { + ADBG ("During TBT_OFF") + Return (Zero) + } + + WWAK () + WSUB (Arg0) + If (GNIS (Arg0)) + { + Return (Zero) + } + + OperationRegion (SPRT, SystemIO, 0xB2, 0x02) + Field (SPRT, ByteAcc, Lock, Preserve) + { + SSMP, 8 + } + + ADBG ("TBT-HP-Handler") + ADBG ("PEG WorkAround") + PGWA (Arg0) + Acquire (OSUM, 0xFFFF) + Store (TBFF (Arg0), Local1) + If (LEqual (Local1, 0x01)) + { + Sleep (0x10) + Release (OSUM) + ADBG ("OS_Up_Received") + Return (Zero) + } + + If (LEqual (Local1, 0x02)) + { + ADBG ("Disconnect") + If (LEqual (OHPN, 0x01)) + { + NTFY (Arg0) + } + + If (LEqual (GHPN, 0x01)) + { + NFYG () + } + + Sleep (0x10) + Release (OSUM) + ADBG ("Disconnect") + Return (Zero) + } + + If (LEqual (SOHP, 0x01)) + { + If (LEqual (Arg1, CPG1)) + { + ADBG ("TBT SW SMI 2") + Store (0x18, TBSF) /* \TBSF */ + Store (0xF7, SSMP) /* \_GPE.XTBT.SSMP */ + Store (0x1B, TBSF) /* \TBSF */ + Store (0xF7, SSMP) /* \_GPE.XTBT.SSMP */ + } + Else + { + ADBG ("TBT SW SMI") + Store (0x15, TBSF) /* \TBSF */ + Store (0xF7, SSMP) /* \_GPE.XTBT.SSMP */ + Store (0x1A, TBSF) /* \TBSF */ + Store (0xF7, SSMP) /* \_GPE.XTBT.SSMP */ + } + } + + If (LEqual (OHPN, 0x01)) + { + NTFY (Arg0) + } + + If (LEqual (GHPN, 0x01)) + { + NFYG () + } + + Sleep (0x10) + Release (OSUM) + ADBG ("End-of-XTBT") + } + + Method (YTBT, 0, NotSerialized) + { + ADBG ("YTBT") + XTBT (TBSE, CPGN) + ADBG ("End-of-YTBT") + } + + Method (TINI, 1, Serialized) + { + ADBG ("TINI") + Store (MMRP (Arg0), Local0) + OperationRegion (RP_X, SystemMemory, Local0, 0x20) + Field (RP_X, DWordAcc, NoLock, Preserve) + { + REG0, 32, + REG1, 32, + REG2, 32, + REG3, 32, + REG4, 32, + REG5, 32, + REG6, 32, + REG7, 32 + } + + Store (REG6, Local1) + Store (MMTB (Arg0), Local2) + OSUP (Local2) + Store (Local1, REG6) /* \_GPE.TINI.REG6 */ + ADBG ("End-of-TINI") + } + } + + Scope (\_SB) + { + Method (THDR, 2, Serialized) + { + ADBG ("THDR") + \_GPE.XTBT (Arg0, Arg1) + } + } + + Scope (\_SB) + { + Method (CGWR, 4, Serialized) + { + If (LEqual (Arg0, 0x01)) + { + If (CondRefOf (\_SB.SGOV)) + { + \_SB.SGOV (Arg2, Arg3) + } + } + ElseIf (LEqual (Arg0, 0x02)) + { + If (CondRefOf (\_SB.PCI0.GEXP.SGEP)) + { + \_SB.PCI0.GEXP.SGEP (Arg1, Arg2, Arg3) + } + } + } + + Method (CGRD, 4, Serialized) + { + Store (0x01, Local0) + If (LEqual (Arg0, 0x01)) + { + If (LEqual (Arg3, 0x00)) + { + If (CondRefOf (\_SB.GGOV)) + { + Store (\_SB.GGOV (Arg2), Local0) + } + } + ElseIf (LEqual (Arg3, 0x01)) + { + If (CondRefOf (\_SB.GGIV)) + { + Store (\_SB.GGIV (Arg2), Local0) + } + } + } + ElseIf (LEqual (Arg0, 0x02)) + { + If (CondRefOf (\_SB.PCI0.GEXP.GEPS)) + { + Store (\_SB.PCI0.GEXP.GEPS (Arg1, Arg2), Local0) + } + } + + Return (Local0) + } + + Method (WRGP, 2, Serialized) + { + Store (Arg0, Local0) + Store (Arg0, Local1) + And (Local0, 0xFFFFFFFF, Local0) + ShiftRight (Local1, 0x20, Local1) + If (LEqual (And (Local0, 0xFF), 0x01)) + { + \_SB.CGWR (And (Local0, 0xFF), ShiftRight (Local1, 0x18), Local1, Arg1) + } + ElseIf (LEqual (And (Local0, 0xFF), 0x02)) + { + \_SB.CGWR (And (Local0, 0xFF), ShiftRight (Local1, 0x18), ShiftRight (ShiftLeft (Local1, + 0x08), 0x18), Arg1) + } + } + + Method (RDGP, 2, Serialized) + { + Store (0x01, Local7) + Store (Arg0, Local0) + Store (Arg0, Local1) + And (Local0, 0xFFFFFFFF, Local0) + ShiftRight (Local1, 0x20, Local1) + If (LEqual (And (Local0, 0xFF), 0x01)) + { + Store (\_SB.CGRD (And (Local0, 0xFF), ShiftRight (Local1, 0x18), Local1, Arg1), + Local7) + } + ElseIf (LEqual (And (Local0, 0xFF), 0x02)) + { + Store (\_SB.CGRD (And (Local0, 0xFF), ShiftRight (Local1, 0x18), ShiftRight (ShiftLeft ( + Local1, 0x08), 0x18), Arg1), Local7) + } + + Return (Local7) + } + } + + Scope (\_SB) + { + Method (TBFP, 1, NotSerialized) + { + If (Arg0) + { + CGWR (FPAT, FPEN, FPGN, FPLV) + } + Else + { + CGWR (FPAT, FPEN, FPGN, LNot (FPLV)) + } + } + + Device (WTBT) + { + Name (_HID, "PNP0C14" /* Windows Management Instrumentation Device */) // _HID: Hardware ID + Name (_UID, "TBFP") // _UID: Unique ID + Name (_WDG, Buffer (0x14) + { + /* 0000 */ 0x48, 0xFD, 0xCC, 0x86, 0x5E, 0x20, 0x77, 0x4A, // H...^ wJ + /* 0008 */ 0x9C, 0x48, 0x20, 0x21, 0xCB, 0xED, 0xE3, 0x41, // .H !...A + /* 0010 */ 0x54, 0x46, 0x01, 0x02 // TF.. + }) + Method (WMTF, 3, NotSerialized) + { + CreateByteField (Arg2, 0x00, FP) + If (FP) + { + TBFP (0x01) + } + Else + { + TBFP (0x00) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x01), LEqual (TBS1, 0x01)))) + { + Scope (\_SB.PCI0.RP01) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x02), LEqual (TBS1, 0x02)))) + { + Scope (\_SB.PCI0.RP02) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x03), LEqual (TBS1, 0x03)))) + { + Scope (\_SB.PCI0.RP03) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x04), LEqual (TBS1, 0x04)))) + { + Scope (\_SB.PCI0.RP04) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x05), LEqual (TBS1, 0x05)))) + { + Scope (\_SB.PCI0.RP05) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x06), LEqual (TBS1, 0x06)))) + { + Scope (\_SB.PCI0.RP06) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x07), LEqual (TBS1, 0x07)))) + { + Scope (\_SB.PCI0.RP07) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x08), LEqual (TBS1, 0x08)))) + { + Scope (\_SB.PCI0.RP08) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x09), LEqual (TBS1, 0x09)))){} + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0A), LEqual (TBS1, 0x0A)))) + { + Scope (\_SB.PCI0.RP10) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0B), LEqual (TBS1, 0x0B)))) + { + Scope (\_SB.PCI0.RP11) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0C), LEqual (TBS1, 0x0C)))) + { + Scope (\_SB.PCI0.RP12) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0D), LEqual (TBS1, 0x0D)))) + { + Scope (\_SB.PCI0.RP13) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0E), LEqual (TBS1, 0x0E)))) + { + Scope (\_SB.PCI0.RP14) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0F), LEqual (TBS1, 0x0F)))) + { + Scope (\_SB.PCI0.RP15) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x10), LEqual (TBS1, 0x10)))) + { + Scope (\_SB.PCI0.RP16) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x11), LEqual (TBS1, 0x11)))) + { + Scope (\_SB.PCI0.RP17) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x12), LEqual (TBS1, 0x12)))) + { + Scope (\_SB.PCI0.RP18) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x13), LEqual (TBS1, 0x13)))) + { + Scope (\_SB.PCI0.RP19) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x14), LEqual (TBS1, 0x14)))) + { + Scope (\_SB.PCI0.RP20) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x15), LEqual (TBS1, 0x15)))) + { + Scope (\_SB.PCI0.PEG0) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x16), LEqual (TBS1, 0x16)))) + { + Scope (\_SB.PCI0.PEG1) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x17), LEqual (TBS1, 0x17)))) + { + Scope (\_SB.PCI0.PEG2) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) /* \TARS */ + } + } + } + } + + Scope (\_SB) + { + Method (R008, 1, Serialized) + { + ADBG ("R008") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x01) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Return (TEMP) /* \_SB_.R008.TEMP */ + } + + Method (W008, 2, Serialized) + { + ADBG ("W008") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x01) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Store (Arg1, TEMP) /* \_SB_.W008.TEMP */ + } + + Method (R016, 1, Serialized) + { + ADBG ("R016") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x02) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Return (TEMP) /* \_SB_.R016.TEMP */ + } + + Method (W016, 2, Serialized) + { + ADBG ("W016") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x02) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Store (Arg1, TEMP) /* \_SB_.W016.TEMP */ + } + + Method (R032, 1, Serialized) + { + ADBG ("R032") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x04) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) /* \_SB_.R032.TEMP */ + } + + Method (W032, 2, Serialized) + { + ADBG ("W032") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x04) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg1, TEMP) /* \_SB_.W032.TEMP */ + } + + Method (PERB, 5, Serialized) + { + ADBG ("PERB") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x01) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Return (TEMP) /* \_SB_.PERB.TEMP */ + } + + Method (PEWB, 6, Serialized) + { + ADBG ("PEWB") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x01) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Store (Arg5, TEMP) /* \_SB_.PEWB.TEMP */ + } + + Method (PERW, 5, Serialized) + { + ADBG ("PERW") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x02) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Return (TEMP) /* \_SB_.PERW.TEMP */ + } + + Method (PEWW, 6, Serialized) + { + ADBG ("PEWW") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x02) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Store (Arg5, TEMP) /* \_SB_.PEWW.TEMP */ + } + + Method (PERD, 5, Serialized) + { + ADBG ("PERD") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x04) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) /* \_SB_.PERD.TEMP */ + } + + Method (PEWD, 6, Serialized) + { + ADBG ("PEWD") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x04) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg5, TEMP) /* \_SB_.PEWD.TEMP */ + } + + Method (STDC, 5, Serialized) + { + ADBG ("STDC") + Store (PERW (Arg0, Arg1, Arg2, Arg3, 0x00), Local7) + If (LEqual (Local7, 0xFFFF)) + { + ADBG ("Referenced device is not present") + Return (0x00) + } + + Store (PERW (Arg0, Arg1, Arg2, Arg3, 0x06), Local0) + If (LEqual (And (Local0, 0x10), 0x00)) + { + ADBG ("No Capabilities linked list is available") + Return (0x00) + } + + Store (PERB (Arg0, Arg1, Arg2, Arg3, 0x34), Local2) + While (0x01) + { + And (Local2, 0xFC, Local2) + If (LEqual (Local2, 0x00)) + { + ADBG ("Capability ID is not found") + Return (0x00) + } + + Store (PERB (Arg0, Arg1, Arg2, Arg3, Local2), Local1) + If (LEqual (Arg4, Local1)) + { + ADBG ("Capability ID is found") + ADBG ("Capability Offset : ") + ADBG (Local2) + Return (Local2) + } + + Store (PERB (Arg0, Arg1, Arg2, Arg3, Add (Local2, 0x01)), Local2) + Return (0x00) + } + } + } + + Method (RDCM, 1, Serialized) + { + ADBG ("RDCM") + ADBG ("CMOS Offset") + ADBG (Arg0) + OperationRegion (CMOS, SystemIO, 0x70, 0x04) + Field (CMOS, AnyAcc, NoLock, Preserve) + { + LIND, 8, + LDAT, 8, + HIND, 8, + HDAT, 8 + } + + If (LLessEqual (Arg0, 0x7F)) + { + Store (Arg0, LIND) /* \RDCM.LIND */ + Store (LDAT, Local0) + } + ElseIf (LLessEqual (Arg0, 0xFF)) + { + Store (Arg0, HIND) /* \RDCM.HIND */ + Store (HDAT, Local0) + } + + ADBG ("CMOS Data") + ADBG (Local0) + Return (Local0) + } + + Method (WRCM, 2, Serialized) + { + ADBG ("WRCM") + ADBG ("CMOS Offset") + ADBG (Arg0) + ADBG ("CMOS Data") + ADBG (Arg1) + OperationRegion (CMOS, SystemIO, 0x70, 0x04) + Field (CMOS, AnyAcc, NoLock, Preserve) + { + LIND, 8, + LDAT, 8, + HIND, 8, + HDAT, 8 + } + + If (LLessEqual (Arg0, 0x7F)) + { + Store (Arg0, LIND) /* \WRCM.LIND */ + Store (Arg1, LDAT) /* \WRCM.LDAT */ + } + ElseIf (LLessEqual (Arg0, 0xFF)) + { + Store (Arg0, HIND) /* \WRCM.HIND */ + Store (Arg1, HDAT) /* \WRCM.HDAT */ + } + } + + Method (TBON, 0, Serialized) + { + Store (0x01, TRDO) /* \TRDO */ + Switch (ToInteger (\TBSE)) + { + Case (0x01) + { + If (CondRefOf (\_SB.PCI0.RP01.PON)) + { + \_SB.PCI0.RP01.PON () + } + } + Case (0x02) + { + If (CondRefOf (\_SB.PCI0.RP02.PON)) + { + \_SB.PCI0.RP02.PON () + } + } + Case (0x03) + { + If (CondRefOf (\_SB.PCI0.RP03.PON)) + { + \_SB.PCI0.RP03.PON () + } + } + Case (0x04) + { + If (CondRefOf (\_SB.PCI0.RP04.PON)) + { + \_SB.PCI0.RP04.PON () + } + } + Case (0x05) + { + If (CondRefOf (\_SB.PCI0.RP05.PON)) + { + \_SB.PCI0.RP05.PON () + } + } + Case (0x06) + { + If (CondRefOf (\_SB.PCI0.RP06.PON)) + { + \_SB.PCI0.RP06.PON () + } + } + Case (0x07) + { + If (CondRefOf (\_SB.PCI0.RP07.PON)) + { + \_SB.PCI0.RP07.PON () + } + } + Case (0x08) + { + If (CondRefOf (\_SB.PCI0.RP08.PON)) + { + \_SB.PCI0.RP08.PON () + } + } + Case (0x09) + { + If (CondRefOf (\_SB.PCI0.RP09.PON)) + { + \_SB.PCI0.RP09.PON () + } + } + Case (0x0A) + { + If (CondRefOf (\_SB.PCI0.RP10.PON)) + { + \_SB.PCI0.RP10.PON () + } + } + Case (0x0B) + { + If (CondRefOf (\_SB.PCI0.RP11.PON)) + { + \_SB.PCI0.RP11.PON () + } + } + Case (0x0C) + { + If (CondRefOf (\_SB.PCI0.RP12.PON)) + { + \_SB.PCI0.RP12.PON () + } + } + Case (0x0D) + { + If (CondRefOf (\_SB.PCI0.RP13.PON)) + { + \_SB.PCI0.RP13.PON () + } + } + Case (0x0E) + { + If (CondRefOf (\_SB.PCI0.RP14.PON)) + { + \_SB.PCI0.RP14.PON () + } + } + Case (0x0F) + { + If (CondRefOf (\_SB.PCI0.RP15.PON)) + { + \_SB.PCI0.RP15.PON () + } + } + Case (0x10) + { + If (CondRefOf (\_SB.PCI0.RP16.PON)) + { + \_SB.PCI0.RP16.PON () + } + } + Case (0x11) + { + If (CondRefOf (\_SB.PCI0.RP17.PON)) + { + \_SB.PCI0.RP17.PON () + } + } + Case (0x12) + { + If (CondRefOf (\_SB.PCI0.RP18.PON)) + { + \_SB.PCI0.RP18.PON () + } + } + Case (0x13) + { + If (CondRefOf (\_SB.PCI0.RP19.PON)) + { + \_SB.PCI0.RP19.PON () + } + } + Case (0x14) + { + If (CondRefOf (\_SB.PCI0.RP20.PON)) + { + \_SB.PCI0.RP20.PON () + } + } + Case (0x15) + { + } + Case (0x16) + { + } + Case (0x17) + { + } + + } + + Store (0x00, TRDO) /* \TRDO */ + } + + Scope (\_PR) + { + Processor (PR00, 0x01, 0x00001810, 0x06){} + Processor (PR01, 0x02, 0x00001810, 0x06){} + Processor (PR02, 0x03, 0x00001810, 0x06){} + Processor (PR03, 0x04, 0x00001810, 0x06){} + Processor (PR04, 0x05, 0x00001810, 0x06){} + Processor (PR05, 0x06, 0x00001810, 0x06){} + Processor (PR06, 0x07, 0x00001810, 0x06){} + Processor (PR07, 0x08, 0x00001810, 0x06){} + Processor (PR08, 0x09, 0x00001810, 0x06){} + Processor (PR09, 0x0A, 0x00001810, 0x06){} + Processor (PR10, 0x0B, 0x00001810, 0x06){} + Processor (PR11, 0x0C, 0x00001810, 0x06){} + Processor (PR12, 0x0D, 0x00001810, 0x06){} + Processor (PR13, 0x0E, 0x00001810, 0x06){} + Processor (PR14, 0x0F, 0x00001810, 0x06){} + Processor (PR15, 0x10, 0x00001810, 0x06){} + } + + Scope (\_PR.PR00) + { + Name (CPC2, Package (0x15) + { + 0x15, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x00000000000000CE, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E7, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E8, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x02, // Bit Width + 0x01, // Bit Offset + 0x0000000000000777, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x01, // Bit Width + 0x00, // Bit Offset + 0x0000000000000770, // Address + 0x04, // Access Size + ) + }, + + 0x01, + ResourceTemplate () + { + Register (FFixedHW, + 0x0A, // Bit Width + 0x20, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + 0x00 + }) + Name (CPOC, Package (0x15) + { + 0x15, + 0x02, + 0xFF, + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x00000000000000CE, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E7, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E8, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x02, // Bit Width + 0x01, // Bit Offset + 0x0000000000000777, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x01, // Bit Width + 0x00, // Bit Offset + 0x0000000000000770, // Address + 0x04, // Access Size + ) + }, + + 0x01, + ResourceTemplate () + { + Register (FFixedHW, + 0x0A, // Bit Width + 0x20, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + 0x00 + }) + } + + Scope (\_SB) + { + Device (PAGD) + { + Name (_HID, "ACPI000C" /* Processor Aggregator Device */) // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\_OSI ("Processor Aggregator Device")) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Name (_PUR, Package (0x02) // _PUR: Processor Utilization Request + { + 0x01, + 0x00 + }) + } + } + + Scope (\) + { + Method (PNTF, 1, NotSerialized) + { + If (And (\_PR.CFGD, 0x0200)) + { + If (LOr (LAnd (And (PC00, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC00, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR00, Arg0) + } + + If (LOr (LAnd (And (PC01, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC01, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR01, Arg0) + } + + If (LOr (LAnd (And (PC02, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC02, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR02, Arg0) + } + + If (LOr (LAnd (And (PC03, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC03, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR03, Arg0) + } + + If (LOr (LAnd (And (PC04, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC04, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR04, Arg0) + } + + If (LOr (LAnd (And (PC05, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC05, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR05, Arg0) + } + + If (LOr (LAnd (And (PC06, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC06, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR06, Arg0) + } + + If (LOr (LAnd (And (PC07, 0x08), LOr (LEqual (Arg0, 0x80), LEqual ( + Arg0, 0x82))), LAnd (And (PC07, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR07, Arg0) + } + } + ElseIf (LOr (LEqual (Arg0, 0x80), LOr (LEqual (Arg0, 0x81), LEqual (Arg0, + 0x82)))) + { + Notify (\_PR.PR00, Arg0) + } + } + } + + Scope (\_SB.PCI0) + { + Device (PDRC) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00008000, // Address Length + _Y34) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y35) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y36) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y37) + Memory32Fixed (ReadWrite, + 0xFED20000, // Address Base + 0x00020000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFED90000, // Address Base + 0x00004000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED45000, // Address Base + 0x0004B000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFF000000, // Address Base + 0x01000000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFEE00000, // Address Base + 0x00100000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y38) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y39) + }) + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y34._BAS, MBR0) // _BAS: Base Address + Store (\_SB.PCI0.GMHB (), MBR0) /* \_SB_.PCI0.PDRC._CRS.MBR0 */ + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y35._BAS, DBR0) // _BAS: Base Address + Store (\_SB.PCI0.GDMB (), DBR0) /* \_SB_.PCI0.PDRC._CRS.DBR0 */ + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y36._BAS, EBR0) // _BAS: Base Address + Store (\_SB.PCI0.GEPB (), EBR0) /* \_SB_.PCI0.PDRC._CRS.EBR0 */ + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y37._BAS, XBR0) // _BAS: Base Address + Store (\_SB.PCI0.GPCB (), XBR0) /* \_SB_.PCI0.PDRC._CRS.XBR0 */ + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y37._LEN, XSZ0) // _LEN: Length + Store (\_SB.PCI0.GPCL (), XSZ0) /* \_SB_.PCI0.PDRC._CRS.XSZ0 */ + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y38._BAS, SXRA) // _BAS: Base Address + Store (SXRB, SXRA) /* \_SB_.PCI0.PDRC._CRS.SXRA */ + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y38._LEN, SXRL) // _LEN: Length + Store (SXRS, SXRL) /* \_SB_.PCI0.PDRC._CRS.SXRL */ + If (LNot (HPTE)) + { + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y39._BAS, HBAS) // _BAS: Base Address + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y39._LEN, HLEN) // _LEN: Length + Store (HPTB, HBAS) /* \_SB_.PCI0.PDRC._CRS.HBAS */ + Store (0x0400, HLEN) /* \_SB_.PCI0.PDRC._CRS.HLEN */ + } + + Return (BUF0) /* \_SB_.PCI0.PDRC.BUF0 */ + } + } + } + + Method (BRTN, 1, Serialized) + { + If (LEqual (And (DIDX, 0x0F00), 0x0400)) + { + Notify (\_SB.PCI0.GFX0.DD1F, Arg0) + } + } + + Scope (\_GPE) + { + Method (_L17, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + Store (\_SB.PCI0.LPCB.EC.HWAC, Local0) + Store (Local0, \RRBF) + Sleep (0x0A) + If (And (Local0, 0x02)){} + If (And (Local0, 0x04)) + { + Notify (\_SB.LID, 0x02) // Device Wake + } + + If (And (Local0, 0x08)) + { + Notify (\_SB.SLPB, 0x02) // Device Wake + } + + If (And (Local0, 0x10)) + { + Notify (\_SB.SLPB, 0x02) // Device Wake + } + + If (And (Local0, 0x40)){} + If (And (Local0, 0x80)) + { + Notify (\_SB.SLPB, 0x02) // Device Wake + } + } + + Method (_L69, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + If (\_SB.PCI0.RP01.PSPX) + { + Store (0x01, \_SB.PCI0.RP01.PSPX) + Store (0x01, \_SB.PCI0.RP01.PMSX) + Notify (\_SB.PCI0.RP01, 0x02) // Device Wake + } + + If (\_SB.PCI0.RP02.PSPX) + { + Store (0x01, \_SB.PCI0.RP02.PSPX) + Store (0x01, \_SB.PCI0.RP02.PMSX) + Notify (\_SB.PCI0.RP02, 0x02) // Device Wake + } + + If (\_SB.PCI0.RP03.PSPX) + { + Store (0x01, \_SB.PCI0.RP03.PSPX) + Store (0x01, \_SB.PCI0.RP03.PMSX) + Notify (\_SB.PCI0.RP03, 0x02) // Device Wake + } + + If (\_SB.PCI0.RP05.PSPX) + { + Store (0x01, \_SB.PCI0.RP05.PSPX) + Store (0x01, \_SB.PCI0.RP05.PMSX) + Notify (\_SB.PCI0.RP05, 0x02) // Device Wake + } + + If (\_SB.PCI0.RP09.PSPX) + { + Store (0x01, \_SB.PCI0.RP09.PSPX) + Store (0x01, \_SB.PCI0.RP09.PMSX) + Notify (\_SB.PCI0.RP09, 0x02) // Device Wake + } + } + + Method (_L61, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + Add (L01C, 0x01, L01C) /* \L01C */ + P8XH (0x00, 0x01) + P8XH (0x01, L01C) + } + + Method (_L62, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + Store (0x00, \_SB.PCI0.LPCB.SWGE) + } + + Method (_L66, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + If (\_SB.PCI0.GFX0.GSSE) + { + \_SB.PCI0.GFX0.GSCI () + } + Else + { + Store (0x01, \_SB.PCI0.SBUS.CPSC) + } + } + + Method (TBNF, 0, NotSerialized) + { + ADBG ("TBNF") + Notify (\_SB.PCI0.RP09, 0x02) // Device Wake + } + + Method (_L27, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + ADBG ("-TBT_PCIE_WAKE") + Notify (\_SB.PCI0.RP09, 0x02) // Device Wake + } + + Method (_L6F, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF + { + ADBG ("_L6F") + If (LEqual (TBTS, 0x01)) + { + If (\_SB.ISME (CPGN)) + { + ADBG (Concatenate ("CPGN->", ToHexString (CPGN))) + \_SB.THDR (TBSE, CPGN) + } + + If (\_SB.ISME (CPG1)) + { + ADBG (Concatenate ("CPG1->", ToHexString (CPG1))) + \_SB.THDR (TBS1, CPG1) + } + } + } + } + + Scope (\_SB.PCI0.RP01.PXSX) + { + ADBG ("WIFI SAR") + OperationRegion (RPXX, PCI_Config, 0x00, 0x50) + Field (RPXX, WordAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x44), + DCAP, 32, + DCTR, 16 + } + + Method (WIST, 0, Serialized) + { + ADBG (Concatenate ("WIST=", ToHexString (VDID))) + If (VDID) + { + Switch (ToInteger (VDID)) + { + Case (0x095A8086) + { + Return (0x01) + } + Case (0x095B8086) + { + Return (0x01) + } + Case (0x31658086) + { + Return (0x01) + } + Case (0x31668086) + { + Return (0x01) + } + Case (0x08B18086) + { + Return (0x01) + } + Case (0x08B28086) + { + Return (0x01) + } + Case (0x08B38086) + { + Return (0x01) + } + Case (0x08B48086) + { + Return (0x01) + } + Case (0x24F38086) + { + Return (0x01) + } + Case (0x24F48086) + { + Return (0x01) + } + Case (0x24F58086) + { + Return (0x01) + } + Case (0x24F68086) + { + Return (0x01) + } + Case (0x24FD8086) + { + Return (0x01) + } + Case (0x24FB8086) + { + Return (0x01) + } + Default + { + Return (0x00) + } + + } + } + Else + { + Return (0x00) + } + } + + Method (WGST, 0, Serialized) + { + ADBG (Concatenate ("WGST=", ToHexString (VDID))) + If (VDID) + { + Switch (ToInteger (VDID)) + { + Case (0x093C8086) + { + Return (0x01) + } + Case (0x097C8086) + { + Return (0x01) + } + Default + { + Return (0x00) + } + + } + } + Else + { + Return (0x00) + } + } + + If (LOr (WIST (), WGST ())) + { + ADBG ("Add WIFI SAR") + OperationRegion (RPXY, PCI_Config, 0x2C, 0x10) + Field (RPXY, AnyAcc, NoLock, Preserve) + { + SVID, 32 + } + + Name (SPLX, Package (0x04) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Method (SPLC, 0, Serialized) + { + Store (\DOM1, Index (DerefOf (Index (SPLX, 0x01)), 0x00)) + Store (\LIM1, Index (DerefOf (Index (SPLX, 0x01)), 0x01)) + Store (\TIM1, Index (DerefOf (Index (SPLX, 0x01)), 0x02)) + Store (\DOM2, Index (DerefOf (Index (SPLX, 0x02)), 0x00)) + Store (\LIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x01)) + Store (\TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02)) + Store (\DOM3, Index (DerefOf (Index (SPLX, 0x03)), 0x00)) + Store (\LIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x01)) + Store (\TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02)) + Return (SPLX) /* \_SB_.PCI0.RP01.PXSX.SPLX */ + } + + PowerResource (WRST, 0x05, 0x0000) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + ADBG ("PXSX _STA") + Return (0x01) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + ADBG ("PXSX _ON") + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + ADBG ("PXSX _OFF") + } + + Method (_RST, 0, NotSerialized) // _RST: Device Reset + { + ADBG ("PXSX _RST") + If (And (DCAP, 0x10000000)) + { + Store (DCTR, Local0) + Or (Local0, 0x8000, Local0) + Store (Local0, DCTR) /* \_SB_.PCI0.RP01.PXSX.DCTR */ + } + } + } + + Name (_PRR, Package (0x01) // _PRR: Power Resource for Reset + { + WRST + }) + Name (WANX, Package (0x03) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Method (WAND, 0, Serialized) + { + Store (0x00, Index (DerefOf (Index (WANX, 0x01)), 0x00)) + Store (\TRD0, Index (DerefOf (Index (WANX, 0x01)), 0x01)) + Store (\TRL0, Index (DerefOf (Index (WANX, 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (WANX, 0x02)), 0x00)) + Store (\TRD1, Index (DerefOf (Index (WANX, 0x02)), 0x01)) + Store (\TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02)) + Return (WANX) /* \_SB_.PCI0.RP01.PXSX.WANX */ + } + + Name (WRDX, Package (0x03) + { + 0x00, + Package (0x02) + { + 0x80000000, + 0x8000 + }, + + Package (0x02) + { + 0x80000000, + 0x8000 + } + }) + Method (WRDD, 0, Serialized) + { + ADBG ("WRDD") + If (CondRefOf (SVID)) + { + If (LOr (LEqual (SVID, 0x00108086), LEqual (SVID, 0x10108086))) + { + ADBG ("Get it") + Name (WRDG, Package (0x02) + { + 0x00, + Package (0x02) + { + 0x07, + 0x4150 + } + }) + Return (WRDG) /* \_SB_.PCI0.RP01.PXSX.WRDD.WRDG */ + } + } + } + + Name (WRDY, Package (0x03) + { + 0x00, + Package (0x0C) + { + 0x07, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80 + }, + + Package (0x06) + { + 0x10, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80 + } + }) + Method (WRDS, 0, Serialized) + { + ADBG ("WRDS") + If (CondRefOf (SVID)) + { + If (LOr (LEqual (SVID, 0x00108086), LEqual (SVID, 0x10108086))) + { + ADBG ("Get it") + Name (WRDI, Package (0x02) + { + 0x00, + Package (0x0C) + { + 0x07, + 0x01, + 0x7C, + 0x6C, + 0x6C, + 0x68, + 0x60, + 0x7C, + 0x6C, + 0x6C, + 0x68, + 0x60 + } + }) + Return (WRDI) /* \_SB_.PCI0.RP01.PXSX.WRDS.WRDI */ + } + } + } + + Method (AWVC, 0, Serialized) + { + Return (0x0101) + } + + Method (WOWG, 0, Serialized) + { + Return (WGWS) /* \WGWS */ + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("1730e71d-e5dd-4a34-be57-4d76b6a2fe37"))) + { + If (LEqual (Arg2, Zero)) + { + If (LEqual (Arg1, Zero)) + { + Return (Buffer (0x01) + { + 0x03 // . + }) + } + Else + { + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + + If (LEqual (Arg2, One)) + { + Switch (ToInteger (DerefOf (Index (Arg3, 0x00)))) + { + Case (0x00) + { + } + Case (0x01) + { + If (CondRefOf (\_SB.SLPB)) + { + Notify (\_SB.SLPB, 0x80) // Status Change + } + } + Case (0x02) + { + } + Case (0x03) + { + } + Case (0x04) + { + If (CondRefOf (\_SB.SLPB)) + { + Notify (\_SB.SLPB, 0x02) // Device Wake + } + } + + } + } + + Return (0x00) + } + ElseIf (LEqual (Arg0, ToUUID ("7574eb17-d1a2-4cc2-9929-4a08fcc29107"))) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + If (LEqual (Arg1, Zero)) + { + Return (Buffer (0x01) + { + 0x07 // . + }) + } + Else + { + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + Case (0x01) + { + Return (\_SB.PCI0.WHIT ()) + } + Case (0x02) + { + Return (\_SB.PCI0.SELF ()) + } + Default + { + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + } + } + Else + { + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Method (WHIT, 0, NotSerialized) + { + Return (Package (0x01) + { + Package (0x05) + { + "?*", + "?*", + 0x00, + 0x02, + 0x02 + } + }) + } + + Method (SELF, 0, NotSerialized) + { + Return (Package (0x02) + { + "LENOVO", + "TP-N23 " + }) + } + } + + If (LEqual (STY0, 0x01)) + { + Scope (\_SB.PCI0.GFX0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.ISP0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.SAT0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LNotEqual ( + And (PEPC, 0x03), 0x00))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.SAT0.VOL0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LEqual (OSYS, 0x07DD)) + { + Return (Package (0x00){}) + } + + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Scope (\_SB.PCI0.I2C0) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C1) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C2) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C3) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C4) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C5) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.SPI0) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.SPI1) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.UA00) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.UA01) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.UA02) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.HECI) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + } + + Scope (\_SB.PCI0.XHC) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.HDAS) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LEqual (S0ID, 0x01)) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.RP01.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP02.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP03.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP04.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP05.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP06.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP07.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP08.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP09.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP10.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP11.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP12.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP13.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP14.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP15.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP16.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP17.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP18.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP19.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP20.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual ( + And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_PR.PR00) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR01) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR02) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR03) + { + Method (XDEP, 0, NotSerialized) + { + ADBG ("PR03 DEP Call") + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR04) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR05) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR06) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR07) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR08) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR09) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR10) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR11) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR12) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR13) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR14) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR15) + { + Method (XDEP, 0, NotSerialized) + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB) + { + Device (PEPD) + { + Name (_HID, "INT33A1" /* Intel Power Engine */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0D80") /* Windows-compatible System Power Management Controller */) // _CID: Compatible ID + Name (_UID, 0x01) // _UID: Unique ID + Name (DEVY, Package (0x44) + { + Package (0x03) + { + "\\_PR.PR00", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR01", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR02", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR03", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR04", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR05", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR06", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR07", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.GFX0", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.UA00", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.UA01", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C0", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C1", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.XHC", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.HDAS", + 0x01, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.PEMC", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.PSDC", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C2", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C3", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C4", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C5", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.UA02", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SPI0", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SPI1", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP01.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP02.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP03.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP04.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP05.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP06.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP07.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP08.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP09.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP10.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP11.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP12.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP13.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP14.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP15.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP16.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP17.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP18.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP19.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP20.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.ISP0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT1", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT2", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT3", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT4", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT5", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.NVM1", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.NVM2", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.NVM3", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.VOL0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_PR.PR08", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR09", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR10", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR11", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR12", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR13", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR14", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR15", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.HECI", + 0x01, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP09.PXSX.TBDU.XHC", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.GLAN", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP09", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + } + }) + Name (BCCD, Package (0x0B) + { + Package (0x02) + { + "\\_SB.PCI0.SAT0", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT0", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT1", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT2", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT3", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.VOL0", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP01.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP02.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP03.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP05.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP09.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LOr (LGreaterEqual (OSYS, 0x07DF), LAnd (LGreaterEqual (OSYS, 0x07DC), LEqual ( + S0ID, 0x01)))) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("c4eb40a0-6cd2-11e2-bcfd-0800200c9a66"))) + { + ADBG (Concatenate ("PEP:_DSM=", ToHexString (Arg2))) + If (LEqual (Arg2, Zero)) + { + Return (Buffer (One) + { + 0x7F // . + }) + } + + If (LEqual (Arg2, One)) + { + If (LEqual (S0ID, 0x00)) + { + Return (Package (0x00){}) + } + + If (LOr (\_SB.PCI0.RP01.PXSX.PAHC (), \_SB.PCI0.RP01.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x19)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP02.PXSX.PAHC (), \_SB.PCI0.RP02.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1A)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP03.PXSX.PAHC (), \_SB.PCI0.RP03.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1B)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP04.PXSX.PAHC (), \_SB.PCI0.RP04.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1C)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP05.PXSX.PAHC (), \_SB.PCI0.RP05.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1D)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP06.PXSX.PAHC (), \_SB.PCI0.RP06.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1E)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP07.PXSX.PAHC (), \_SB.PCI0.RP07.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1F)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP08.PXSX.PAHC (), \_SB.PCI0.RP08.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x20)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP09.PXSX.PAHC (), \_SB.PCI0.RP09.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x21)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP10.PXSX.PAHC (), \_SB.PCI0.RP10.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x22)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP11.PXSX.PAHC (), \_SB.PCI0.RP11.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x23)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP12.PXSX.PAHC (), \_SB.PCI0.RP12.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x24)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP13.PXSX.PAHC (), \_SB.PCI0.RP13.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x25)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP14.PXSX.PAHC (), \_SB.PCI0.RP14.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x26)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP15.PXSX.PAHC (), \_SB.PCI0.RP15.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x27)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP16.PXSX.PAHC (), \_SB.PCI0.RP16.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x28)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP17.PXSX.PAHC (), \_SB.PCI0.RP17.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x29)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP18.PXSX.PAHC (), \_SB.PCI0.RP18.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2A)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP19.PXSX.PAHC (), \_SB.PCI0.RP19.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2B)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP20.PXSX.PAHC (), \_SB.PCI0.RP20.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2C)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x00200000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x37)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x00400000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2E)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x00800000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2F)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x01000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x30)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x02000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x31)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x04000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x32)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x08000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x33)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x10000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x34)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x20000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x35)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x40000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x36)), 0x01)) + } + + If (LEqual (And (PEPC, 0x80000000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x40)), 0x01)) + } + + If (LEqual (And (PEPC, 0x04), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0A)), 0x01)) + } + + If (LEqual (And (PEPC, 0x08), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0B)), 0x01)) + } + + If (LEqual (And (PEPC, 0x10), 0x00)){} + If (LEqual (And (PEPC, 0x20), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0C)), 0x01)) + } + + If (LEqual (And (PEPC, 0x40), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0D)), 0x01)) + } + + If (LEqual (And (PEPC, 0x80), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0E)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0100), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0F)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0200), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x08)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x01)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x00)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x02)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x01)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x03)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x02)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x04)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x03)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x05)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x04)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x06)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x05)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x07)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x06)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x08)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x07)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x09)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x38)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0A)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x39)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0B)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3A)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0C)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3B)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0D)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3C)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0E)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3D)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0F)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3E)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x10)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3F)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0400), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x00)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x02)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x03)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x04)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x05)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x06)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x07)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x38)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x39)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3A)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3B)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3C)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3D)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3E)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3F)), 0x01)) + } + + If (LEqual (And (PEPC, 0x01), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x41)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0800), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x10)), 0x01)) + } + + If (LEqual (And (PEPC, 0x1000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x11)), 0x01)) + } + + If (LEqual (And (PEPC, 0x2000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x12)), 0x01)) + } + + If (LEqual (And (PEPC, 0x4000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x13)), 0x01)) + } + + If (LEqual (And (PEPC, 0x8000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x14)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00010000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x15)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00020000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x16)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00040000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x17)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00080000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x18)), 0x01)) + } + + If (LEqual (And (PEPC, 0x02), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x42)), 0x01)) + } + + If (LGreaterEqual (OSYS, 0x07DF)) + { + If (CondRefOf (\_SB.PCI0.RP01.PXSX.WIST)) + { + If (\_SB.PCI0.RP01.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x19)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x19)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x19)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP02.PXSX.WIST)) + { + If (\_SB.PCI0.RP02.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1A)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1A)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP03.PXSX.WIST)) + { + If (\_SB.PCI0.RP03.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1B)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1B)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP04.PXSX.WIST)) + { + If (\_SB.PCI0.RP04.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1C)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1C)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1C)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP05.PXSX.WIST)) + { + If (\_SB.PCI0.RP05.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1D)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1D)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1D)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP06.PXSX.WIST)) + { + If (\_SB.PCI0.RP06.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1E)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1E)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1E)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP07.PXSX.WIST)) + { + If (\_SB.PCI0.RP07.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1F)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1F)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1F)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP08.PXSX.WIST)) + { + If (\_SB.PCI0.RP08.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x20)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x20)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x20)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP09.PXSX.WIST)) + { + If (\_SB.PCI0.RP09.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x21)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x21)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x21)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP10.PXSX.WIST)) + { + If (\_SB.PCI0.RP10.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x22)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x22)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x22)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP11.PXSX.WIST)) + { + If (\_SB.PCI0.RP11.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x23)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x23)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x23)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP12.PXSX.WIST)) + { + If (\_SB.PCI0.RP12.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x24)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x24)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x24)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP13.PXSX.WIST)) + { + If (\_SB.PCI0.RP13.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x25)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x25)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x25)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP14.PXSX.WIST)) + { + If (\_SB.PCI0.RP14.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x26)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x26)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x26)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP15.PXSX.WIST)) + { + If (\_SB.PCI0.RP15.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x27)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x27)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x27)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP16.PXSX.WIST)) + { + If (\_SB.PCI0.RP16.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x28)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x28)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x28)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP17.PXSX.WIST)) + { + If (\_SB.PCI0.RP17.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x29)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x29)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x29)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP18.PXSX.WIST)) + { + If (\_SB.PCI0.RP18.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2A)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2A)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x2A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP19.PXSX.WIST)) + { + If (\_SB.PCI0.RP19.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2B)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2B)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x2B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP20.PXSX.WIST)) + { + If (\_SB.PCI0.RP20.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2C)), + 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2C)), + 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x2C)), 0x01)) + } + } + } + + If (LAnd (LGreaterEqual (OSYS, 0x07DF), LEqual (PWIG, 0x01))) + { + If (CondRefOf (\_SB.PCI0.RP01.PXSX.WGST)) + { + If (\_SB.PCI0.RP01.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x19)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP02.PXSX.WGST)) + { + If (\_SB.PCI0.RP02.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP03.PXSX.WGST)) + { + If (\_SB.PCI0.RP03.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP04.PXSX.WGST)) + { + If (\_SB.PCI0.RP04.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1C)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP05.PXSX.WGST)) + { + If (\_SB.PCI0.RP05.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1D)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP06.PXSX.WGST)) + { + If (\_SB.PCI0.RP06.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1E)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP07.PXSX.WGST)) + { + If (\_SB.PCI0.RP07.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1F)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP08.PXSX.WGST)) + { + If (\_SB.PCI0.RP08.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x20)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP09.PXSX.WGST)) + { + If (\_SB.PCI0.RP09.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x21)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP10.PXSX.WGST)) + { + If (\_SB.PCI0.RP10.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x22)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP11.PXSX.WGST)) + { + If (\_SB.PCI0.RP11.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x23)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP12.PXSX.WGST)) + { + If (\_SB.PCI0.RP12.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x24)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP13.PXSX.WGST)) + { + If (\_SB.PCI0.RP13.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x25)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP14.PXSX.WGST)) + { + If (\_SB.PCI0.RP14.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x26)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP15.PXSX.WGST)) + { + If (\_SB.PCI0.RP15.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x27)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP16.PXSX.WGST)) + { + If (\_SB.PCI0.RP16.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x28)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP17.PXSX.WGST)) + { + If (\_SB.PCI0.RP17.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x29)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP18.PXSX.WGST)) + { + If (\_SB.PCI0.RP18.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP19.PXSX.WGST)) + { + If (\_SB.PCI0.RP19.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP20.PXSX.WGST)) + { + If (\_SB.PCI0.RP20.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2C)), 0x01)) + } + } + } + + If (LAnd (LEqual (\RTBT, 0x01), LEqual (\TBTS, 0x01))) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x43)), 0x01)) + } + + Return (DEVY) /* \_SB_.PEPD.DEVY */ + } + + If (LEqual (Arg2, 0x02)) + { + Return (BCCD) /* \_SB_.PEPD.BCCD */ + } + + If (LEqual (Arg2, 0x03)) + { + If (LEqual (S0ID, 0x01)) + { + ADBG ("PEP:S_Fun3") + \_SB.PCI0.LPCB.EC.ECNT (0x01) + ADBG ("PEP:E_Fun3") + } + } + + If (LEqual (Arg2, 0x04)) + { + If (LEqual (S0ID, 0x01)) + { + ADBG ("PEP:S_Fun4") + If (LAnd (LEqual (\RTBT, 0x01), CondRefOf (\_GPE.TBNF))) + { + \_GPE.TBNF () + } + + \_SB.PCI0.LPCB.EC.ECNT (0x00) + ADBG ("PEP:E_Fun4") + } + } + + If (LEqual (Arg2, 0x05)) + { + ADBG ("PEP:S_Fun5") + If (LEqual (S0ID, 0x01)) + { + \GUAM (0x01) + } + + \_SB.PCI0.LPCB.EC.ECNT (0x03) + ADBG ("PEP:E_Fun5") + } + + If (LEqual (Arg2, 0x06)) + { + ADBG ("PEP:S_Fun6") + \_SB.PCI0.LPCB.EC.ECNT (0x02) + If (LEqual (S0ID, 0x01)) + { + \GUAM (0x00) + } + + ADBG ("PEP:E_Fun6") + } + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + + Device (PSM) + { + Name (_HID, EisaId ("INT3420") /* Intel Bluetooth RF Kill */) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_STR, Unicode ("Power Sharing Manager")) // _STR: Description String + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (PSME, 0x01)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Name (SPLX, Package (0x03) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Method (SPLC, 0, Serialized) + { + Store (\PDT1, Index (DerefOf (Index (SPLX, 0x01)), 0x00)) + Store (\PLM1, Index (DerefOf (Index (SPLX, 0x01)), 0x01)) + Store (\PTW1, Index (DerefOf (Index (SPLX, 0x01)), 0x02)) + Store (\PDT2, Index (DerefOf (Index (SPLX, 0x02)), 0x00)) + Store (\PLM2, Index (DerefOf (Index (SPLX, 0x02)), 0x01)) + Store (\PTW2, Index (DerefOf (Index (SPLX, 0x02)), 0x02)) + Return (SPLX) /* \PSM_.SPLX */ + } + + Name (DPLX, Package (0x03) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + Package (0x06) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + Package (0x06) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + } + }) + Method (DPLC, 0, Serialized) + { + Store (\DDT1, Index (DerefOf (Index (DPLX, 0x01)), 0x00)) + Store (\DDP1, Index (DerefOf (Index (DPLX, 0x01)), 0x01)) + Store (\DLI1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), + 0x00)) + Store (\DPL1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), + 0x01)) + Store (\DTW1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), + 0x02)) + Store (\DMI1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), + 0x03)) + Store (\DMA1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), + 0x04)) + Store (\DMT1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), + 0x05)) + Store (\DDT2, Index (DerefOf (Index (DPLX, 0x02)), 0x00)) + Store (\DDP2, Index (DerefOf (Index (DPLX, 0x02)), 0x01)) + Store (\DLI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), + 0x00)) + Store (\DPL2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), + 0x01)) + Store (\DTW2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), + 0x02)) + Store (\DMI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), + 0x03)) + Store (\DMA2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), + 0x04)) + Store (\DMT2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), + 0x05)) + Return (DPLX) /* \PSM_.DPLX */ + } + } + + Name (\_S0, Package (0x04) // _S0_: S0 System State + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + If (LEqual (STY0, 0x00)) + { + Name (\_S3, Package (0x04) // _S3_: S3 System State + { + 0x05, + 0x05, + 0x00, + 0x00 + }) + } + + Name (\_S4, Package (0x04) // _S4_: S4 System State + { + 0x06, + 0x06, + 0x00, + 0x00 + }) + Name (\_S5, Package (0x04) // _S5_: S5 System State + { + 0x07, + 0x07, + 0x00, + 0x00 + }) + Method (PTS, 1, NotSerialized) + { + If (Arg0){} + } + + Method (WAK, 1, NotSerialized) + { + } + + Scope (\) + { + Field (GNVS, AnyAcc, Lock, Preserve) + { + Offset (0x1F), + B0SC, 8, + B1SC, 8, + B2SC, 8, + B0SS, 8, + B1SS, 8, + B2SS, 8 + } + } + + OperationRegion (MNVS, SystemMemory, 0x5B568018, 0x1000) + Field (MNVS, DWordAcc, NoLock, Preserve) + { + Offset (0xD00), + GAPA, 32, + GAPL, 32, + DCKI, 32, + DCKS, 32, + VCDL, 1, + VCDC, 1, + VCDT, 1, + VCDD, 1, + , 1, + VCSS, 1, + VCDB, 1, + VCIN, 1, + VVPO, 8, + BNTN, 8, + BRLV, 8, + CDFL, 8, + CDAH, 8, + PMOD, 2, + PDIR, 1, + PDMA, 1, + Offset (0xD17), + LFDC, 1, + Offset (0xD18), + C2NA, 1, + C3NA, 1, + C4NA, 1, + C6NA, 1, + C7NA, 1, + Offset (0xD19), + Offset (0xD1A), + , 2, + , 1, + NHPS, 1, + NPME, 1, + Offset (0xD1B), + UOPT, 8, + BTID, 32, + DPP0, 1, + DPP1, 1, + DPP2, 1, + DPP3, 1, + DPP4, 1, + DPP5, 1, + Offset (0xD21), + Offset (0xD22), + TCRT, 16, + TPSV, 16, + TTC1, 16, + TTC2, 16, + TTSP, 16, + SRAH, 8, + SRHE, 8, + SRE1, 8, + SRE2, 8, + SRE3, 8, + SRE4, 8, + SRE5, 8, + SRE6, 8, + SRU1, 8, + SRU2, 8, + SRU3, 8, + SRU7, 8, + SRU4, 8, + SRU5, 8, + SRU8, 8, + SRPB, 8, + SRLP, 8, + SRSA, 8, + SRSM, 8, + CWAC, 1, + CWAS, 1, + CWUE, 1, + CWUS, 1, + Offset (0xD40), + CWAP, 16, + CWAT, 16, + DBGC, 1, + Offset (0xD45), + FS1L, 16, + FS1M, 16, + FS1H, 16, + FS2L, 16, + FS2M, 16, + FS2H, 16, + FS3L, 16, + FS3M, 16, + FS3H, 16, + TATC, 1, + , 6, + TATL, 1, + TATW, 8, + TNFT, 4, + TNTT, 4, + TDFA, 4, + TDTA, 4, + TDFD, 4, + TDTD, 4, + TCFA, 4, + TCTA, 4, + TCFD, 4, + TCTD, 4, + TSFT, 4, + TSTT, 4, + TIT0, 8, + TCR0, 16, + TPS0, 16, + TIT1, 8, + TCR1, 16, + TPS1, 16, + TIT2, 8, + TCR2, 16, + TPS2, 16, + TIF0, 8, + TIF1, 8, + TIF2, 8, + Offset (0xD78), + BTHI, 1, + TBAS, 1, + Offset (0xD79), + HDIR, 1, + HDEH, 1, + HDSP, 1, + HDPP, 1, + HDUB, 1, + HDMC, 1, + NFCF, 1, + Offset (0xD7A), + TPME, 8, + BIDE, 4, + IDET, 4, + , 1, + , 1, + Offset (0xD7D), + DTS0, 8, + Offset (0xD7F), + DT00, 1, + DT01, 1, + DT02, 1, + DT03, 1, + Offset (0xD80), + LIDB, 1, + C4WR, 1, + C4AC, 1, + ODDX, 1, + CMPR, 1, + ILNF, 1, + PLUX, 1, + Offset (0xD81), + Offset (0xD8A), + WLAC, 8, + WIWK, 1, + Offset (0xD8C), + , 4, + , 1, + IDMM, 1, + Offset (0xD8D), + , 3, + , 1, + , 1, + , 1, + Offset (0xD8E), + Offset (0xD8F), + , 4, + Offset (0xD90), + Offset (0xD91), + SWGP, 8, + IPMS, 8, + IPMB, 120, + IPMR, 24, + IPMO, 24, + IPMA, 8, + VIGD, 1, + VDSC, 1, + VMSH, 1, + , 1, + VDSP, 1, + Offset (0xDAA), + Offset (0xDAD), + ASFT, 8, + PL1L, 8, + PL1M, 8, + CHKC, 32, + CHKE, 32, + ATRB, 32, + Offset (0xDBD), + PPCR, 8, + TPCR, 5, + Offset (0xDBF), + Offset (0xDCE), + CTPR, 8, + PPCA, 8, + TPCA, 5, + Offset (0xDD1), + BFWB, 296, + OSPX, 1, + OSC4, 1, + CPPX, 1, + Offset (0xDF7), + SPEN, 1, + SCRM, 1, + , 1, + ETAU, 1, + IHBC, 1, + APMD, 1, + APMF, 1, + Offset (0xDF8), + FTPS, 8, + HIST, 8, + LPST, 8, + LWST, 8, + Offset (0xDFF), + Offset (0xE00), + Offset (0xE20), + HPET, 32, + PKLI, 16, + VLCX, 16, + VNIT, 8, + VBD0, 8, + VBDT, 128, + VBPL, 16, + VBPH, 16, + VBML, 8, + VBMH, 8, + VEDI, 1024, + PDCI, 16, + ISCG, 32, + ISSP, 1, + ISWK, 2, + ISFS, 3, + Offset (0xEC7), + SHA1, 160, + Offset (0xEDC), + LWCP, 1, + LWEN, 1, + IOCP, 1, + IOEN, 1, + IOST, 1, + Offset (0xEDD), + USBR, 1, + Offset (0xEDE), + Offset (0xEDF), + Offset (0xEE1), + BT2T, 1, + Offset (0xEE2), + TPPP, 8, + TPPC, 8, + CTPC, 8, + FNWK, 8, + Offset (0xEE7), + XHCC, 8, + FCAP, 16, + VSTD, 1, + VCQL, 1, + VTIO, 1, + VMYH, 1, + VSTP, 1, + VCQH, 1, + VDCC, 1, + VSFN, 1, + VDMC, 1, + VFHP, 1, + VIFC, 1, + VMMC, 1, + VMSC, 1, + VPSC, 1, + VCSC, 1, + Offset (0xEEC), + CICF, 4, + CICM, 4, + MYHC, 8, + MMCC, 8, + PT1D, 15, + Offset (0xEF1), + PT2D, 15, + Offset (0xEF3), + PT0D, 15, + Offset (0xEF5), + DVS0, 1, + DVS1, 1, + DVS2, 1, + DVS3, 1, + Offset (0xEF7), + DSTD, 15, + Offset (0xEF9), + DCQL, 15, + Offset (0xEFB), + DTIO, 15, + Offset (0xEFD), + DMYH, 15, + Offset (0xEFF), + DSTP, 15, + Offset (0xF01), + DCQH, 15, + Offset (0xF03), + DDCC, 15, + Offset (0xF05), + DSFN, 15, + Offset (0xF07), + DDMC, 15, + Offset (0xF09), + DFHP, 15, + Offset (0xF0B), + DIFC, 15, + Offset (0xF0D), + DMMC, 15, + Offset (0xF0F), + DMSC, 15, + Offset (0xF11), + DPSC, 15, + Offset (0xF13), + ECSC, 15, + Offset (0xF15), + SMYH, 4, + SMMC, 4, + SPSC, 4, + Offset (0xF17), + STDV, 8, + SCRB, 8, + PMOF, 8 + } + + Field (MNVS, ByteAcc, NoLock, Preserve) + { + Offset (0xB00), + WITM, 8, + WSEL, 8, + WLS0, 8, + WLS1, 8, + WLS2, 8, + WLS3, 8, + WLS4, 8, + WLS5, 8, + WLS6, 8, + WLS7, 8, + WLS8, 8, + WLS9, 8, + WLSA, 8, + WLSB, 8, + WLSC, 8, + WLSD, 8, + WENC, 8, + WKBD, 8, + WPTY, 8, + WPAS, 1032, + WPNW, 1032, + WSPM, 8, + WSPS, 8, + WSMN, 8, + WSMX, 8, + WSEN, 8, + WSKB, 8, + WASB, 8, + WASI, 16, + WASD, 8, + WASS, 32 + } + + Field (MNVS, ByteAcc, NoLock, Preserve) + { + Offset (0xA00), + DBGB, 1024 + } + + Name (SPS, 0x00) + Name (OSIF, 0x00) + Name (WNTF, 0x00) + Name (WXPF, 0x00) + Name (WVIS, 0x00) + Name (WIN7, 0x00) + Name (WIN8, 0x00) + Name (WSPV, 0x00) + Name (LNUX, 0x00) + Name (H8DR, 0x00) + Name (MEMX, 0x00) + Name (ACST, 0x00) + Name (FMBL, 0x01) + Name (FDTP, 0x02) + Name (FUPS, 0x03) + Name (FNID, 0x00) + Name (RRBF, 0x00) + Name (NBCF, 0x00) + OperationRegion (SMI0, SystemIO, 0xB2, 0x01) + Field (SMI0, ByteAcc, NoLock, Preserve) + { + APMC, 8 + } + + Field (MNVS, AnyAcc, NoLock, Preserve) + { + Offset (0xFC0), + CMD, 8, + ERR, 32, + PAR0, 32, + PAR1, 32, + PAR2, 32, + PAR3, 32 + } + + Mutex (MSMI, 0x00) + Method (SMI, 5, Serialized) + { + Acquire (MSMI, 0xFFFF) + Store (Arg0, CMD) /* \CMD_ */ + Store (0x01, ERR) /* \ERR_ */ + Store (Arg1, PAR0) /* \PAR0 */ + Store (Arg2, PAR1) /* \PAR1 */ + Store (Arg3, PAR2) /* \PAR2 */ + Store (Arg4, PAR3) /* \PAR3 */ + Store (0xF5, APMC) /* \APMC */ + While (LEqual (ERR, 0x01)) + { + Sleep (0x01) + Store (0xF5, APMC) /* \APMC */ + } + + Store (PAR0, Local0) + Release (MSMI) + Return (Local0) + } + + Method (RPCI, 1, NotSerialized) + { + Return (SMI (0x00, 0x00, Arg0, 0x00, 0x00)) + } + + Method (WPCI, 2, NotSerialized) + { + SMI (0x00, 0x01, Arg0, Arg1, 0x00) + } + + Method (MPCI, 3, NotSerialized) + { + SMI (0x00, 0x02, Arg0, Arg1, Arg2) + } + + Method (RBEC, 1, NotSerialized) + { + Return (SMI (0x00, 0x03, Arg0, 0x00, 0x00)) + } + + Method (WBEC, 2, NotSerialized) + { + SMI (0x00, 0x04, Arg0, Arg1, 0x00) + } + + Method (MBEC, 3, NotSerialized) + { + SMI (0x00, 0x05, Arg0, Arg1, Arg2) + } + + Method (RISA, 1, NotSerialized) + { + Return (SMI (0x00, 0x06, Arg0, 0x00, 0x00)) + } + + Method (WISA, 2, NotSerialized) + { + SMI (0x00, 0x07, Arg0, Arg1, 0x00) + } + + Method (MISA, 3, NotSerialized) + { + SMI (0x00, 0x08, Arg0, Arg1, Arg2) + } + + Method (VEXP, 0, NotSerialized) + { + SMI (0x01, 0x00, 0x00, 0x00, 0x00) + } + + Method (VUPS, 1, NotSerialized) + { + SMI (0x01, 0x01, Arg0, 0x00, 0x00) + } + + Method (VSDS, 2, NotSerialized) + { + SMI (0x01, 0x02, Arg0, Arg1, 0x00) + } + + Method (VDDC, 0, NotSerialized) + { + SMI (0x01, 0x03, 0x00, 0x00, 0x00) + } + + Method (VVPD, 1, NotSerialized) + { + SMI (0x01, 0x04, Arg0, 0x00, 0x00) + } + + Method (VNRS, 1, NotSerialized) + { + SMI (0x01, 0x05, Arg0, 0x00, 0x00) + } + + Method (GLPW, 0, NotSerialized) + { + Return (SMI (0x01, 0x06, 0x00, 0x00, 0x00)) + } + + Method (VSLD, 1, NotSerialized) + { + SMI (0x01, 0x07, Arg0, 0x00, 0x00) + } + + Method (VEVT, 1, NotSerialized) + { + Return (SMI (0x01, 0x08, Arg0, 0x00, 0x00)) + } + + Method (VTHR, 0, NotSerialized) + { + Return (SMI (0x01, 0x09, 0x00, 0x00, 0x00)) + } + + Method (VBRC, 1, NotSerialized) + { + SMI (0x01, 0x0A, Arg0, 0x00, 0x00) + } + + Method (VBRG, 0, NotSerialized) + { + Return (SMI (0x01, 0x0E, 0x00, 0x00, 0x00)) + } + + Method (VCMS, 2, NotSerialized) + { + Return (SMI (0x01, 0x0B, Arg0, Arg1, 0x00)) + } + + Method (VBTD, 0, NotSerialized) + { + Return (SMI (0x01, 0x0F, 0x00, 0x00, 0x00)) + } + + Method (VHYB, 2, NotSerialized) + { + Return (SMI (0x01, 0x10, Arg0, Arg1, 0x00)) + } + + Method (VDYN, 2, NotSerialized) + { + Return (SMI (0x01, 0x11, Arg0, Arg1, 0x00)) + } + + Method (SDPS, 2, NotSerialized) + { + Return (SMI (0x01, 0x12, Arg0, Arg1, 0x00)) + } + + Method (UCMS, 1, NotSerialized) + { + Return (SMI (0x02, Arg0, 0x00, 0x00, 0x00)) + } + + Method (BHDP, 2, NotSerialized) + { + Return (SMI (0x03, 0x00, Arg0, Arg1, 0x00)) + } + + Method (STEP, 1, NotSerialized) + { + SMI (0x04, Arg0, 0x00, 0x00, 0x00) + } + + Method (SLTP, 0, NotSerialized) + { + SMI (0x05, 0x00, 0x00, 0x00, 0x00) + } + + Method (CBRI, 0, NotSerialized) + { + SMI (0x05, 0x01, 0x00, 0x00, 0x00) + } + + Method (BCHK, 0, NotSerialized) + { + Return (SMI (0x05, 0x04, 0x00, 0x00, 0x00)) + } + + Method (BYRS, 0, NotSerialized) + { + SMI (0x05, 0x05, 0x00, 0x00, 0x00) + } + + Method (LCHK, 1, NotSerialized) + { + Return (SMI (0x05, 0x06, Arg0, 0x00, 0x00)) + } + + Method (BLTH, 1, NotSerialized) + { + Return (SMI (0x06, Arg0, 0x00, 0x00, 0x00)) + } + + Method (PRSM, 2, NotSerialized) + { + Return (SMI (0x07, 0x00, Arg0, Arg1, 0x00)) + } + + Method (ISOC, 1, NotSerialized) + { + Return (SMI (0x07, 0x03, Arg0, 0x00, 0x00)) + } + + Method (EZRC, 1, NotSerialized) + { + Return (SMI (0x07, 0x04, Arg0, 0x00, 0x00)) + } + + Method (WGSV, 1, NotSerialized) + { + Return (SMI (0x09, Arg0, 0x00, 0x00, 0x00)) + } + + Method (SWTT, 1, NotSerialized) + { + If (SMI (0x0A, 0x02, Arg0, 0x00, 0x00)) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6030) + } + } + } + + Method (TSDL, 0, NotSerialized) + { + Return (SMI (0x0A, 0x03, 0x00, 0x00, 0x00)) + } + + Method (FLPF, 1, NotSerialized) + { + Return (SMI (0x0A, 0x04, Arg0, 0x00, 0x00)) + } + + Method (GTST, 0, NotSerialized) + { + Return (SMI (0x0A, 0x05, 0x00, 0x00, 0x00)) + } + + Method (CSUM, 1, NotSerialized) + { + Return (SMI (0x0E, Arg0, 0x00, 0x00, 0x00)) + } + + Method (NVSS, 1, NotSerialized) + { + Return (SMI (0x0F, Arg0, 0x00, 0x00, 0x00)) + } + + Method (WMIS, 2, NotSerialized) + { + Return (SMI (0x10, Arg0, Arg1, 0x00, 0x00)) + } + + Method (AWON, 1, NotSerialized) + { + Return (SMI (0x12, Arg0, 0x00, 0x00, 0x00)) + } + + Method (PMON, 2, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + Name (TSTR, Buffer (Local0){}) + Store (Arg0, TSTR) /* \PMON.TSTR */ + Store (TSTR, \DBGB) + SMI (0x11, Arg1, 0x00, 0x00, 0x00) + } + + Method (UAWS, 1, NotSerialized) + { + Return (SMI (0x13, Arg0, 0x00, 0x00, 0x00)) + } + + Method (BFWC, 1, NotSerialized) + { + Return (SMI (0x14, 0x00, Arg0, 0x00, 0x00)) + } + + Method (BFWP, 0, NotSerialized) + { + Return (SMI (0x14, 0x01, 0x00, 0x00, 0x00)) + } + + Method (BFWL, 0, NotSerialized) + { + SMI (0x14, 0x02, 0x00, 0x00, 0x00) + } + + Method (BFWG, 1, NotSerialized) + { + SMI (0x14, 0x03, Arg0, 0x00, 0x00) + } + + Method (BDMC, 1, NotSerialized) + { + SMI (0x14, 0x04, Arg0, 0x00, 0x00) + } + + Method (PSIF, 2, NotSerialized) + { + Return (SMI (0x14, 0x05, Arg0, Arg1, 0x00)) + } + + Method (FNSC, 2, NotSerialized) + { + Return (SMI (0x14, 0x06, Arg0, Arg1, 0x00)) + } + + Method (AUDC, 2, NotSerialized) + { + Return (SMI (0x14, 0x07, Arg0, Arg1, 0x00)) + } + + Method (SYBC, 2, NotSerialized) + { + Return (SMI (0x14, 0x08, Arg0, Arg1, 0x00)) + } + + Method (KBLS, 2, NotSerialized) + { + Return (SMI (0x14, 0x09, Arg0, Arg1, 0x00)) + } + + Method (UBIS, 1, NotSerialized) + { + Return (SMI (0x15, 0x00, Arg0, 0x00, 0x00)) + } + + Method (DIEH, 1, NotSerialized) + { + Return (SMI (0x16, 0x00, Arg0, 0x00, 0x00)) + } + + Method (OUTP, 2, NotSerialized) + { + SMI (0x17, Arg0, Arg1, 0x00, 0x00) + } + + Method (SREQ, 3, NotSerialized) + { + SMI (0x18, And (Arg0, 0xFF), And (Arg1, 0xFF), And (Arg2, + 0xFF), 0x00) + } + + Method (SPMS, 1, NotSerialized) + { + SMI (0x19, And (Arg0, 0xFF), 0x00, 0x00, 0x00) + } + + Method (SCMP, 2, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + If (LNotEqual (Local0, SizeOf (Arg1))) + { + Return (One) + } + + Increment (Local0) + Name (STR1, Buffer (Local0){}) + Name (STR2, Buffer (Local0){}) + Store (Arg0, STR1) /* \SCMP.STR1 */ + Store (Arg1, STR2) /* \SCMP.STR2 */ + Store (Zero, Local1) + While (LLess (Local1, Local0)) + { + Store (DerefOf (Index (STR1, Local1)), Local2) + Store (DerefOf (Index (STR2, Local1)), Local3) + If (LNotEqual (Local2, Local3)) + { + Return (One) + } + + Increment (Local1) + } + + Return (Zero) + } + + Name (MACA, "_AUXMAC_#8C1645772B6F#") + Name (WOLD, "_S5WOL_#0017EF00000000#") + Scope (\_SB) + { + Name (RID, 0x00) + Device (MEM) + { + Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID + Name (MEMS, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x000A0000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0x000C0000, // Address Base + 0x00000000, // Address Length + _Y3A) + Memory32Fixed (ReadOnly, + 0x000C4000, // Address Base + 0x00000000, // Address Length + _Y3B) + Memory32Fixed (ReadOnly, + 0x000C8000, // Address Base + 0x00000000, // Address Length + _Y3C) + Memory32Fixed (ReadOnly, + 0x000CC000, // Address Base + 0x00000000, // Address Length + _Y3D) + Memory32Fixed (ReadOnly, + 0x000D0000, // Address Base + 0x00000000, // Address Length + _Y3E) + Memory32Fixed (ReadOnly, + 0x000D4000, // Address Base + 0x00000000, // Address Length + _Y3F) + Memory32Fixed (ReadOnly, + 0x000D8000, // Address Base + 0x00000000, // Address Length + _Y40) + Memory32Fixed (ReadOnly, + 0x000DC000, // Address Base + 0x00000000, // Address Length + _Y41) + Memory32Fixed (ReadOnly, + 0x000E0000, // Address Base + 0x00000000, // Address Length + _Y42) + Memory32Fixed (ReadOnly, + 0x000E4000, // Address Base + 0x00000000, // Address Length + _Y43) + Memory32Fixed (ReadOnly, + 0x000E8000, // Address Base + 0x00000000, // Address Length + _Y44) + Memory32Fixed (ReadOnly, + 0x000EC000, // Address Base + 0x00000000, // Address Length + _Y45) + Memory32Fixed (ReadOnly, + 0x000F0000, // Address Base + 0x00010000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x00100000, // Address Base + 0x01EE0000, // Address Length + _Y46) + Memory32Fixed (ReadOnly, + 0xFEC00000, // Address Base + 0x00140000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFED4C000, // Address Base + 0x012B4000, // Address Length + ) + }) + CreateDWordField (MEMS, \_SB.MEM._Y3A._LEN, MC0L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3B._LEN, MC4L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3C._LEN, MC8L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3D._LEN, MCCL) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3E._LEN, MD0L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3F._LEN, MD4L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y40._LEN, MD8L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y41._LEN, MDCL) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y42._LEN, ME0L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y43._LEN, ME4L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y44._LEN, ME8L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y45._LEN, MECL) // _LEN: Length + CreateBitField (MEMS, \_SB.MEM._Y3A._RW, MC0W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3B._RW, MC4W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3C._RW, MC8W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3D._RW, MCCW) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3E._RW, MD0W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3F._RW, MD4W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y40._RW, MD8W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y41._RW, MDCW) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y42._RW, ME0W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y43._RW, ME4W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y44._RW, ME8W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y45._RW, MECW) // _RW_: Read-Write Status + CreateDWordField (MEMS, \_SB.MEM._Y46._BAS, MEB1) // _BAS: Base Address + CreateDWordField (MEMS, \_SB.MEM._Y46._LEN, MEL1) // _LEN: Length + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + And (\_SB.PCI0.PM1L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MC0L) /* \_SB_.MEM_.MC0L */ + If (And (Local0, 0x02)) + { + Store (0x01, MC0W) /* \_SB_.MEM_.MC0W */ + } + } + + And (\_SB.PCI0.PM1H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MC4L) /* \_SB_.MEM_.MC4L */ + If (And (Local0, 0x20)) + { + Store (0x01, MC4W) /* \_SB_.MEM_.MC4W */ + } + } + + And (\_SB.PCI0.PM2L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MC8L) /* \_SB_.MEM_.MC8L */ + If (And (Local0, 0x02)) + { + Store (0x01, MC8W) /* \_SB_.MEM_.MC8W */ + } + } + + And (\_SB.PCI0.PM2H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MCCL) /* \_SB_.MEM_.MCCL */ + If (And (Local0, 0x20)) + { + Store (0x01, MCCW) /* \_SB_.MEM_.MCCW */ + } + } + + And (\_SB.PCI0.PM3L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MD0L) /* \_SB_.MEM_.MD0L */ + If (And (Local0, 0x02)) + { + Store (0x01, MD0W) /* \_SB_.MEM_.MD0W */ + } + } + + And (\_SB.PCI0.PM3H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MD4L) /* \_SB_.MEM_.MD4L */ + If (And (Local0, 0x20)) + { + Store (0x01, MD4W) /* \_SB_.MEM_.MD4W */ + } + } + + And (\_SB.PCI0.PM4L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MD8L) /* \_SB_.MEM_.MD8L */ + If (And (Local0, 0x02)) + { + Store (0x01, MD8W) /* \_SB_.MEM_.MD8W */ + } + } + + And (\_SB.PCI0.PM4H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MDCL) /* \_SB_.MEM_.MDCL */ + If (And (Local0, 0x20)) + { + Store (0x01, MDCW) /* \_SB_.MEM_.MDCW */ + } + } + + And (\_SB.PCI0.PM5L, 0x03, Local0) + If (Local0) + { + Store (0x4000, ME0L) /* \_SB_.MEM_.ME0L */ + If (And (Local0, 0x02)) + { + Store (0x01, ME0W) /* \_SB_.MEM_.ME0W */ + } + } + + And (\_SB.PCI0.PM5H, 0x30, Local0) + If (Local0) + { + Store (0x4000, ME4L) /* \_SB_.MEM_.ME4L */ + If (And (Local0, 0x20)) + { + Store (0x01, ME4W) /* \_SB_.MEM_.ME4W */ + } + } + + And (\_SB.PCI0.PM6L, 0x03, Local0) + If (Local0) + { + Store (0x4000, ME8L) /* \_SB_.MEM_.ME8L */ + If (And (Local0, 0x02)) + { + Store (0x01, ME8W) /* \_SB_.MEM_.ME8W */ + } + } + + And (\_SB.PCI0.PM6H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MECL) /* \_SB_.MEM_.MECL */ + If (And (Local0, 0x20)) + { + Store (0x01, MECW) /* \_SB_.MEM_.MECW */ + } + } + + ShiftLeft (\_SB.PCI0.TLUD, 0x14, \MEMX) + Subtract (\MEMX, MEB1, MEL1) /* \_SB_.MEM_.MEL1 */ + Return (MEMS) /* \_SB_.MEM_.MEMS */ + } + } + + Device (LID) + { + Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID + Method (_LID, 0, NotSerialized) // _LID: Lid Status + { + If (LAnd (LEqual (\ILNF, 0x00), LEqual (\PLUX, 0x00))) + { + If (\H8DR) + { + Return (\_SB.PCI0.LPCB.EC.HPLD) + } + ElseIf (And (\RBEC (0x46), 0x04)) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + Else + { + Return (0x01) + } + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + If (\LWCP) + { + Return (Package (0x02) + { + 0x17, + 0x04 + }) + } + Else + { + Return (Package (0x02) + { + 0x17, + 0x03 + }) + } + } + + Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake + { + If (\H8DR) + { + If (Arg0) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWLO) + } + Else + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWLO) + } + } + ElseIf (Arg0) + { + \MBEC (0x32, 0xFF, 0x04) + } + Else + { + \MBEC (0x32, 0xFB, 0x00) + } + + If (\LWCP) + { + If (Arg0) + { + Store (0x01, \LWEN) + } + Else + { + Store (0x00, \LWEN) + } + } + } + } + + Device (WMI1) + { + Name (_HID, EisaId ("PNP0C14") /* Windows Management Instrumentation Device */) // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Name (_WDG, Buffer (0xB4) + { + /* 0000 */ 0x0E, 0x23, 0xF5, 0x51, 0x77, 0x96, 0xCD, 0x46, // .#.Qw..F + /* 0008 */ 0xA1, 0xCF, 0xC0, 0xB2, 0x3E, 0xE3, 0x4D, 0xB7, // ....>.M. + /* 0010 */ 0x41, 0x30, 0xFF, 0x05, 0x64, 0x9A, 0x47, 0x98, // A0..d.G. + /* 0018 */ 0xF5, 0x33, 0x33, 0x4E, 0xA7, 0x07, 0x8E, 0x25, // .33N...% + /* 0020 */ 0x1E, 0xBB, 0xC3, 0xA1, 0x41, 0x31, 0x01, 0x06, // ....A1.. + /* 0028 */ 0xEF, 0x54, 0x4B, 0x6A, 0xED, 0xA5, 0x33, 0x4D, // .TKj..3M + /* 0030 */ 0x94, 0x55, 0xB0, 0xD9, 0xB4, 0x8D, 0xF4, 0xB3, // .U...... + /* 0038 */ 0x41, 0x32, 0x01, 0x06, 0xB6, 0xEB, 0xF1, 0x74, // A2.....t + /* 0040 */ 0x7A, 0x92, 0x7D, 0x4C, 0x95, 0xDF, 0x69, 0x8E, // z.}L..i. + /* 0048 */ 0x21, 0xE8, 0x0E, 0xB5, 0x41, 0x33, 0x01, 0x06, // !...A3.. + /* 0050 */ 0xFF, 0x04, 0xEF, 0x7E, 0x28, 0x43, 0x7C, 0x44, // ...~(C|D + /* 0058 */ 0xB5, 0xBB, 0xD4, 0x49, 0x92, 0x5D, 0x53, 0x8D, // ...I.]S. + /* 0060 */ 0x41, 0x34, 0x01, 0x06, 0x9E, 0x15, 0xDB, 0x8A, // A4...... + /* 0068 */ 0x32, 0x1E, 0x5C, 0x45, 0xBC, 0x93, 0x30, 0x8A, // 2.\E..0. + /* 0070 */ 0x7E, 0xD9, 0x82, 0x46, 0x41, 0x35, 0x01, 0x01, // ~..FA5.. + /* 0078 */ 0xFD, 0xD9, 0x51, 0x26, 0x1C, 0x91, 0x69, 0x4B, // ..Q&..iK + /* 0080 */ 0xB9, 0x4E, 0xD0, 0xDE, 0xD5, 0x96, 0x3B, 0xD7, // .N....;. + /* 0088 */ 0x41, 0x36, 0x01, 0x06, 0x1A, 0x65, 0x64, 0x73, // A6...eds + /* 0090 */ 0x2F, 0x13, 0xE7, 0x4F, 0xAD, 0xAA, 0x40, 0xC6, // /..O..@. + /* 0098 */ 0xC7, 0xEE, 0x2E, 0x3B, 0x41, 0x37, 0x01, 0x06, // ...;A7.. + /* 00A0 */ 0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11, // !...f... + /* 00A8 */ 0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, // ......). + /* 00B0 */ 0x42, 0x41, 0x01, 0x00 // BA.. + }) + Name (RETN, Package (0x05) + { + "Success", + "Not Supported", + "Invalid Parameter", + "Access Denied", + "System Busy" + }) + Name (ITEM, Package (0x6E) + { + Package (0x02) + { + 0x0E, + "WakeOnLAN" + }, + + Package (0x02) + { + 0x00, + "EthernetLANOptionROM" + }, + + Package (0x02) + { + 0x00, + "USBBIOSSupport" + }, + + Package (0x02) + { + 0x00, + "AlwaysOnUSB" + }, + + Package (0x02) + { + 0x01, + "TrackPoint" + }, + + Package (0x02) + { + 0x01, + "TouchPad" + }, + + Package (0x02) + { + 0x00, + "FnSticky" + }, + + Package (0x02) + { + 0x04, + "ThinkPadNumLock" + }, + + Package (0x02) + { + 0x0C, + "PowerOnNumLock" + }, + + Package (0x02) + { + 0x05, + "BootDisplayDevice" + }, + + Package (0x02) + { + 0x00, + "SpeedStep" + }, + + Package (0x02) + { + 0x09, + "AdaptiveThermalManagementAC" + }, + + Package (0x02) + { + 0x09, + "AdaptiveThermalManagementBattery" + }, + + Package (0x02) + { + 0x06, + "CDROMSpeed" + }, + + Package (0x02) + { + 0x01, + "CPUPowerManagement" + }, + + Package (0x02) + { + 0x00, + "PowerControlBeep" + }, + + Package (0x02) + { + 0x00, + "LowBatteryAlarm" + }, + + Package (0x02) + { + 0x00, + "PasswordBeep" + }, + + Package (0x02) + { + 0x00, + "KeyboardBeep" + }, + + Package (0x02) + { + 0x00, + "ExtendedMemoryTest" + }, + + Package (0x02) + { + 0x07, + "SATAControllerMode" + }, + + Package (0x02) + { + 0x00, + "CoreMultiProcessing" + }, + + Package (0x02) + { + 0x00, + "VirtualizationTechnology" + }, + + Package (0x02) + { + 0x00, + "LockBIOSSetting" + }, + + Package (0x02) + { + 0x0B, + "MinimumPasswordLength" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtUnattendedBoot" + }, + + Package (0x02) + { + 0x00, + "FingerprintPredesktopAuthentication" + }, + + Package (0x02) + { + 0x08, + "FingerprintReaderPriority" + }, + + Package (0x02) + { + 0x03, + "FingerprintSecurityMode" + }, + + Package (0x02) + { + 0x02, + "SecurityChip" + }, + + Package (0x02) + { + 0x00, + "BIOSUpdateByEndUsers" + }, + + Package (0x02) + { + 0x00, + "DataExecutionPrevention" + }, + + Package (0x02) + { + 0x00, + "EthernetLANAccess" + }, + + Package (0x02) + { + 0x00, + "WirelessLANAccess" + }, + + Package (0x02) + { + 0x00, + "WirelessWANAccess" + }, + + Package (0x02) + { + 0x00, + "BluetoothAccess" + }, + + Package (0x02) + { + 0x00, + "WirelessUSBAccess" + }, + + Package (0x02) + { + 0x00, + "ModemAccess" + }, + + Package (0x02) + { + 0x00, + "USBPortAccess" + }, + + Package (0x02) + { + 0x00, + "IEEE1394Access" + }, + + Package (0x02) + { + 0x00, + "ExpressCardAccess" + }, + + Package (0x02) + { + 0x00, + "PCIExpressSlotAccess" + }, + + Package (0x02) + { + 0x00, + "UltrabayAccess" + }, + + Package (0x02) + { + 0x00, + "MemoryCardSlotAccess" + }, + + Package (0x02) + { + 0x00, + "SmartCardSlotAccess" + }, + + Package (0x02) + { + 0x00, + "IntegratedCameraAccess" + }, + + Package (0x02) + { + 0x00, + "MicrophoneAccess" + }, + + Package (0x02) + { + 0x0A, + "BootMode" + }, + + Package (0x02) + { + 0x00, + "StartupOptionKeys" + }, + + Package (0x02) + { + 0x00, + "BootDeviceListF12Option" + }, + + Package (0x02) + { + 0x64, + "BootOrder" + }, + + Package (0x02) + { + 0x00, + "WiMAXAccess" + }, + + Package (0x02) + { + 0x0D, + "GraphicsDevice" + }, + + Package (0x02) + { + 0x00, + "TXTFeature" + }, + + Package (0x02) + { + 0x00, + "VTdFeature" + }, + + Package (0x02) + { + 0x0F, + "AMTControl" + }, + + Package (0x02) + { + 0x00, + "FingerprintPasswordAuthentication" + }, + + Package (0x02) + { + 0x00, + "FingerprintReaderAccess" + }, + + Package (0x02) + { + 0x00, + "OsDetectionForSwitchableGraphics" + }, + + Package (0x02) + { + 0x0F, + "ComputraceModuleActivation" + }, + + Package (0x02) + { + 0x01, + "PCIExpressPowerManagement" + }, + + Package (0x02) + { + 0x00, + "Reserved" + }, + + Package (0x02) + { + 0x00, + "eSATAPortAccess" + }, + + Package (0x02) + { + 0x00, + "HardwarePasswordManager" + }, + + Package (0x02) + { + 0x00, + "HyperThreadingTechnology" + }, + + Package (0x02) + { + 0x00, + "FnCtrlKeySwap" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtReboot" + }, + + Package (0x02) + { + 0x00, + "OnByAcAttach" + }, + + Package (0x02) + { + 0x64, + "NetworkBoot" + }, + + Package (0x02) + { + 0x00, + "BootOrderLock" + }, + + Package (0x02) + { + 0x10, + "SharedDisplayPriority" + }, + + Package (0x02) + { + 0x11, + "ExpressCardSpeed" + }, + + Package (0x02) + { + 0x00, + "RapidStartTechnology" + }, + + Package (0x02) + { + 0x12, + "KeyboardIllumination" + }, + + Package (0x02) + { + 0x00, + "IPv4NetworkStack" + }, + + Package (0x02) + { + 0x00, + "IPv6NetworkStack" + }, + + Package (0x02) + { + 0x13, + "UefiPxeBootPriority" + }, + + Package (0x02) + { + 0x00, + "PhysicalPresenceForTpmProvision" + }, + + Package (0x02) + { + 0x00, + "PhysicalPresenceForTpmClear" + }, + + Package (0x02) + { + 0x00, + "SecureRollBackPrevention" + }, + + Package (0x02) + { + 0x00, + "SecureBoot" + }, + + Package (0x02) + { + 0x00, + "NfcAccess" + }, + + Package (0x02) + { + 0x00, + "BottomCoverTamperDetected" + }, + + Package (0x02) + { + 0x00, + "PasswordCountExceededError" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtBootDeviceList" + }, + + Package (0x02) + { + 0x14, + "TotalGraphicsMemory" + }, + + Package (0x02) + { + 0x15, + "BootTimeExtension" + }, + + Package (0x02) + { + 0x00, + "FnKeyAsPrimary" + }, + + Package (0x02) + { + 0x00, + "WiGig" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtPowerOn" + }, + + Package (0x02) + { + 0x16, + "SGXControl" + }, + + Package (0x02) + { + 0x00, + "Reserved" + }, + + Package (0x02) + { + 0x00, + "InternalStorageTamper" + }, + + Package (0x02) + { + 0x00, + "WirelessAutoDisconnection" + }, + + Package (0x02) + { + 0x00, + "Reserved" + }, + + Package (0x02) + { + 0x00, + "USBKeyProvisioning" + }, + + Package (0x02) + { + 0x00, + "MACAddressPassThrough" + }, + + Package (0x02) + { + 0x00, + "ThunderboltAccess" + }, + + Package (0x02) + { + 0x00, + "WindowsUEFIFirmwareUpdate" + }, + + Package (0x02) + { + 0x00, + "WakeOnLANDock" + }, + + Package (0x02) + { + 0x00, + "Reserved" + }, + + Package (0x02) + { + 0x17, + "ThunderboltSecurityLevel" + }, + + Package (0x02) + { + 0x1A, + "PreBootForThunderboltDevice" + }, + + Package (0x02) + { + 0x00, + "PreBootForThunderboltUSBDevice" + }, + + Package (0x02) + { + 0x00, + "DeviceGuard" + }, + + Package (0x02) + { + 0x18, + "I8254ClockGating" + }, + + Package (0x02) + { + 0x19, + "ThunderboltBIOSAssistMode" + }, + + Package (0x02) + { + 0x1B, + "SleepState" + }, + + Package (0x02) + { + 0x1C, + "MaxPasswordAttempts" + }, + + Package (0x02) + { + 0x1D, + "PasswordChangeTime" + } + }) + Name (VSEL, Package (0x1E) + { + Package (0x02) + { + "Disable", + "Enable" + }, + + Package (0x02) + { + "Disable", + "Automatic" + }, + + Package (0x04) + { + "Active", + "Inactive", + "Disable", + "Enable" + }, + + Package (0x02) + { + "Normal", + "High" + }, + + Package (0x02) + { + "Independent", + "Synchronized" + }, + + Package (0x02) + { + "LCD", + "ExternalDisplay" + }, + + Package (0x03) + { + "High", + "Normal", + "Silent" + }, + + Package (0x02) + { + "Compatibility", + "AHCI" + }, + + Package (0x02) + { + "External", + "InternalOnly" + }, + + Package (0x02) + { + "MaximizePerformance", + "Balanced" + }, + + Package (0x02) + { + "Quick", + "Diagnostics" + }, + + Package (0x0A) + { + "Disable", + "4", + "5", + "6", + "7", + "8", + "9", + "10", + "11", + "12" + }, + + Package (0x03) + { + "Auto", + "On", + "Off" + }, + + Package (0x03) + { + "IntegratedGfx", + "DiscreteGfx", + "SwitchableGfx" + }, + + Package (0x04) + { + "Disable", + "ACOnly", + "ACandBattery", + "Enable" + }, + + Package (0x03) + { + "Disable", + "Enable", + "Disable" + }, + + Package (0x02) + { + "HDMI", + "USBTypeC" + }, + + Package (0x02) + { + "Generation1", + "Automatic" + }, + + Package (0x03) + { + "ThinkLightOnly", + "BacklightOnly", + "Both" + }, + + Package (0x02) + { + "IPv6First", + "IPv4First" + }, + + Package (0x02) + { + "256MB", + "512MB" + }, + + Package (0x0B) + { + "Disable", + "1", + "2", + "3", + "", + "5", + "", + "", + "", + "", + "10" + }, + + Package (0x03) + { + "Disable", + "Enable", + "SoftwareControl" + }, + + Package (0x04) + { + "NoSecurity", + "UserAuthorization", + "SecureConnect", + "DisplayPortandUSB" + }, + + Package (0x02) + { + "Disable", + "Auto" + }, + + Package (0x03) + { + "Enable", + "", + "Disable" + }, + + Package (0x03) + { + "Disable", + "Enable", + "Pre-BootACL" + }, + + Package (0x02) + { + "Windows10", + "Linux" + }, + + Package (0x04) + { + "Unlimited", + "1", + "3", + "100" + }, + + Package (0x02) + { + "Immediately", + "AfterReboot" + } + }) + Name (VLST, Package (0x11) + { + "HDD0", + "HDD1", + "HDD2", + "HDD3", + "HDD4", + "PCILAN", + "ATAPICD0", + "ATAPICD1", + "ATAPICD2", + "USBFDD", + "USBCD", + "USBHDD", + "OtherHDD", + "OtherCD", + "NVMe0", + "NVMe1", + "NODEV" + }) + Name (PENC, Package (0x02) + { + "ascii", + "scancode" + }) + Name (PKBD, Package (0x03) + { + "us", + "fr", + "gr" + }) + Name (PTYP, Package (0x08) + { + "pap", + "pop", + "uhdp1", + "mhdp1", + "uhdp2", + "mhdp2", + "uhdp3", + "mhdp3" + }) + Mutex (MWMI, 0x00) + Name (PCFG, Buffer (0x18){}) + Name (IBUF, Buffer (0x0100){}) + Name (ILEN, 0x00) + Name (PSTR, Buffer (0x81){}) + Method (WQA0, 1, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + If (LNotEqual (\WMIS (0x00, Arg0), 0x00)) + { + Release (MWMI) + Return ("") + } + + Store (DerefOf (Index (ITEM, \WITM)), Local0) + Store (DerefOf (Index (Local0, 0x00)), Local1) + Store (DerefOf (Index (Local0, 0x01)), Local2) + If (LLess (Local1, 0x64)) + { + Concatenate (Local2, ",", Local6) + Store (DerefOf (Index (VSEL, Local1)), Local3) + Concatenate (Local6, DerefOf (Index (Local3, \WSEL)), Local7) + } + Else + { + Store (SizeOf (VLST), Local3) + If (LLessEqual (\WLS0, Local3)) + { + Concatenate (Local2, ",", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS0)), Local2) + } + + If (LLessEqual (\WLS1, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS1)), Local2) + } + + If (LLessEqual (\WLS2, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS2)), Local2) + } + + If (LLessEqual (\WLS3, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS3)), Local2) + } + + If (LLessEqual (\WLS4, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS4)), Local2) + } + + If (LLessEqual (\WLS5, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS5)), Local2) + } + + If (LLessEqual (\WLS6, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS6)), Local2) + } + + If (LLessEqual (\WLS7, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS7)), Local2) + } + + If (LLessEqual (\WLS8, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS8)), Local2) + } + + If (LLessEqual (\WLS9, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS9)), Local2) + } + + If (LLessEqual (\WLSA, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSA)), Local2) + } + + If (LLessEqual (\WLSB, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSB)), Local2) + } + + If (LLessEqual (\WLSC, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSC)), Local2) + } + + If (LLessEqual (\WLSD, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSD)), Local2) + } + + Store (Local2, Local7) + } + + Release (MWMI) + Return (Local7) + } + + Method (WMA1, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + If (LEqual (SizeOf (Arg2), 0x00)) + { + Store (0x02, Local0) + } + Else + { + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + Store (WSET (ITEM, VSEL), Local0) + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x01, 0x00), Local0) + } + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA2, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (CPAS (IBUF, 0x00), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x02, 0x00), Local0) + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA3, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (CPAS (IBUF, 0x00), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x03, 0x00), Local0) + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA4, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (CPAS (IBUF, 0x00), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x04, 0x00), Local0) + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WQA5, 1, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (\WMIS (0x05, 0x00), Local0) + Store (\WSPM, Index (PCFG, 0x00)) + Store (\WSPS, Index (PCFG, 0x04)) + Store (\WSMN, Index (PCFG, 0x08)) + Store (\WSMX, Index (PCFG, 0x0C)) + Store (\WSEN, Index (PCFG, 0x10)) + Store (\WSKB, Index (PCFG, 0x14)) + Release (MWMI) + Return (PCFG) /* \_SB_.WMI1.PCFG */ + } + + Method (WMA6, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + If (LEqual (SizeOf (Arg2), 0x00)) + { + Store (0x02, Local0) + } + Else + { + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (SPAS (IBUF), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x06, 0x00), Local0) + } + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA7, 3, NotSerialized) + { + If (LEqual (SizeOf (Arg2), 0x00)) + { + Return ("") + } + + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + Store (GITM (IBUF, ITEM), Local1) + If (LEqual (Local1, Ones)) + { + Return ("") + } + + Store (DerefOf (Index (ITEM, Local1)), Local0) + Store (DerefOf (Index (Local0, 0x00)), Local1) + If (LLess (Local1, 0x64)) + { + Store (DerefOf (Index (VSEL, Local1)), Local3) + Store (DerefOf (Index (Local3, 0x00)), Local2) + Store (SizeOf (Local3), Local4) + Store (0x01, Local5) + While (LLess (Local5, Local4)) + { + Store (DerefOf (Index (Local3, Local5)), Local6) + If (LNotEqual (SizeOf (Local6), 0x00)) + { + Concatenate (Local2, ",", Local7) + Concatenate (Local7, Local6, Local2) + } + + Increment (Local5) + } + } + Else + { + Store (DerefOf (Index (VLST, 0x00)), Local2) + Store (SizeOf (VLST), Local4) + Store (0x01, Local5) + While (LLess (Local5, Local4)) + { + Store (DerefOf (Index (VLST, Local5)), Local6) + Concatenate (Local2, ",", Local7) + Concatenate (Local7, Local6, Local2) + Increment (Local5) + } + } + } + + Return (Local2) + } + + Method (CARG, 1, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + If (LEqual (Local0, 0x00)) + { + Store (0x00, IBUF) /* \_SB_.WMI1.IBUF */ + Store (0x00, ILEN) /* \_SB_.WMI1.ILEN */ + Return (0x00) + } + + If (LNotEqual (ObjectType (Arg0), 0x02)) + { + Return (0x02) + } + + If (LGreaterEqual (Local0, 0xFF)) + { + Return (0x02) + } + + Store (Arg0, IBUF) /* \_SB_.WMI1.IBUF */ + Decrement (Local0) + Store (DerefOf (Index (IBUF, Local0)), Local1) + If (LOr (LEqual (Local1, 0x3B), LEqual (Local1, 0x2A))) + { + Store (0x00, Index (IBUF, Local0)) + Store (Local0, ILEN) /* \_SB_.WMI1.ILEN */ + } + Else + { + Store (SizeOf (Arg0), ILEN) /* \_SB_.WMI1.ILEN */ + } + + Return (0x00) + } + + Method (SCMP, 3, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + If (LEqual (Local0, 0x00)) + { + Return (0x00) + } + + Increment (Local0) + Name (STR1, Buffer (Local0){}) + Store (Arg0, STR1) /* \_SB_.WMI1.SCMP.STR1 */ + Decrement (Local0) + Store (0x00, Local1) + Store (Arg2, Local2) + While (LLess (Local1, Local0)) + { + Store (DerefOf (Index (STR1, Local1)), Local3) + Store (DerefOf (Index (Arg1, Local2)), Local4) + If (LNotEqual (Local3, Local4)) + { + Return (0x00) + } + + Increment (Local1) + Increment (Local2) + } + + Store (DerefOf (Index (Arg1, Local2)), Local4) + If (LEqual (Local4, 0x00)) + { + Return (0x01) + } + + If (LOr (LEqual (Local4, 0x2C), LEqual (Local4, 0x3A))) + { + Return (0x01) + } + + Return (0x00) + } + + Method (GITM, 2, NotSerialized) + { + Store (0x00, Local0) + Store (SizeOf (Arg1), Local1) + While (LLess (Local0, Local1)) + { + Store (DerefOf (Index (DerefOf (Index (Arg1, Local0)), 0x01)), Local3) + If (SCMP (Local3, Arg0, 0x00)) + { + Return (Local0) + } + + Increment (Local0) + } + + Return (Ones) + } + + Method (GSEL, 3, NotSerialized) + { + Store (0x00, Local0) + Store (SizeOf (Arg0), Local1) + While (LLess (Local0, Local1)) + { + Store (DerefOf (Index (Arg0, Local0)), Local2) + If (SCMP (Local2, Arg1, Arg2)) + { + Return (Local0) + } + + Increment (Local0) + } + + Return (Ones) + } + + Method (SLEN, 2, NotSerialized) + { + Store (DerefOf (Index (Arg0, Arg1)), Local0) + Return (SizeOf (Local0)) + } + + Method (CLRP, 0, NotSerialized) + { + Store (0x00, \WPAS) + Store (0x00, \WPNW) + } + + Method (GPAS, 2, NotSerialized) + { + Store (Arg1, Local0) + Store (0x00, Local1) + While (LLessEqual (Local1, 0x80)) + { + Store (DerefOf (Index (Arg0, Local0)), Local2) + If (LOr (LEqual (Local2, 0x2C), LEqual (Local2, 0x00))) + { + Store (0x00, Index (PSTR, Local1)) + Return (Local1) + } + + Store (Local2, Index (PSTR, Local1)) + Increment (Local0) + Increment (Local1) + } + + Store (0x00, Index (PSTR, Local1)) + Return (Ones) + } + + Method (CPAS, 2, NotSerialized) + { + CLRP () + Store (Arg1, Local0) + Store (GPAS (Arg0, Local0), Local1) + If (LEqual (Local1, Ones)) + { + Return (0x02) + } + + If (LEqual (Local1, 0x00)) + { + Return (0x02) + } + + Store (PSTR, \WPAS) + Add (Local0, Local1, Local0) + Increment (Local0) + Store (GSEL (PENC, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WENC) + If (LEqual (Local6, 0x00)) + { + Add (Local0, SLEN (PENC, 0x00), Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GSEL (PKBD, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WKBD) + } + + Return (0x00) + } + + Method (SPAS, 1, NotSerialized) + { + CLRP () + Store (GSEL (PTYP, Arg0, 0x00), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WPTY) + Store (SLEN (PTYP, Local6), Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GPAS (Arg0, Local0), Local1) + If (LOr (LEqual (Local1, Ones), LEqual (Local1, 0x00))) + { + Return (0x02) + } + + Store (PSTR, \WPAS) + Add (Local0, Local1, Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GPAS (Arg0, Local0), Local1) + If (LEqual (Local1, Ones)) + { + Return (0x02) + } + + If (LEqual (Local1, 0x00)) + { + Store (0x00, PSTR) /* \_SB_.WMI1.PSTR */ + } + + Store (PSTR, \WPNW) + Add (Local0, Local1, Local0) + Increment (Local0) + Store (GSEL (PENC, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WENC) + If (LEqual (Local6, 0x00)) + { + Add (Local0, SLEN (PENC, 0x00), Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GSEL (PKBD, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WKBD) + } + + Return (0x00) + } + + Method (WSET, 2, NotSerialized) + { + Store (ILEN, Local0) + Increment (Local0) + Store (GITM (IBUF, Arg0), Local1) + If (LEqual (Local1, Ones)) + { + Return (0x02) + } + + Store (Local1, \WITM) + Store (DerefOf (Index (Arg0, Local1)), Local3) + Store (DerefOf (Index (Local3, 0x01)), Local4) + Store (SizeOf (Local4), Local2) + Increment (Local2) + Store (DerefOf (Index (Local3, 0x00)), Local4) + If (LLess (Local4, 0x64)) + { + Store (DerefOf (Index (Arg1, Local4)), Local5) + Store (GSEL (Local5, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WSEL) + Add (Local2, SLEN (Local5, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + Else + { + Store (0x3F, \WLS0) + Store (0x3F, \WLS1) + Store (0x3F, \WLS2) + Store (0x3F, \WLS3) + Store (0x3F, \WLS4) + Store (0x3F, \WLS5) + Store (0x3F, \WLS6) + Store (0x3F, \WLS7) + Store (0x3F, \WLS8) + Store (0x3F, \WLS9) + Store (0x3F, \WLSA) + Store (0x3F, \WLSB) + Store (0x3F, \WLSC) + Store (0x3F, \WLSD) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS0) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS1) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS2) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS3) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS4) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS5) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS6) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS7) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS8) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS9) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSA) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSB) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSC) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSD) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + } + + If (LAnd (LEqual (Local4, 0x2C), LLess (Local2, Local0))) + { + Increment (Local2) + Store (CPAS (IBUF, Local2), Local0) + If (LNotEqual (Local0, 0x00)) + { + Return (Local0) + } + } + + Return (0x00) + } + + Name (WQBA, Buffer (0x089D) + { + /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00, // FOMB.... + /* 0008 */ 0x8D, 0x08, 0x00, 0x00, 0xF2, 0x36, 0x00, 0x00, // .....6.. + /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54, // DS...}.T + /* 0018 */ 0xA8, 0xC9, 0x9A, 0x00, 0x01, 0x06, 0x18, 0x42, // .......B + /* 0020 */ 0x10, 0x13, 0x10, 0x0A, 0x0D, 0x21, 0x02, 0x0B, // .....!.. + /* 0028 */ 0x83, 0x50, 0x4C, 0x18, 0x14, 0xA0, 0x45, 0x41, // .PL...EA + /* 0030 */ 0xC8, 0x05, 0x14, 0x95, 0x02, 0x21, 0xC3, 0x02, // .....!.. + /* 0038 */ 0x14, 0x0B, 0x70, 0x2E, 0x40, 0xBA, 0x00, 0xE5, // ..p.@... + /* 0040 */ 0x28, 0x72, 0x0C, 0x22, 0x02, 0xF7, 0xEF, 0x0F, // (r.".... + /* 0048 */ 0x31, 0x0E, 0x88, 0x14, 0x40, 0x48, 0x26, 0x84, // 1...@H&. + /* 0050 */ 0x44, 0x00, 0x53, 0x21, 0x70, 0x84, 0xA0, 0x5F, // D.S!p.._ + /* 0058 */ 0x01, 0x08, 0x1D, 0xA2, 0xC9, 0xA0, 0x00, 0xA7, // ........ + /* 0060 */ 0x08, 0x82, 0xB4, 0x65, 0x01, 0xBA, 0x05, 0xF8, // ...e.... + /* 0068 */ 0x16, 0xA0, 0x1D, 0x42, 0x68, 0x15, 0x0A, 0x30, // ...Bh..0 + /* 0070 */ 0x29, 0xC0, 0x27, 0x98, 0x2C, 0x0A, 0x90, 0x0D, // ).'.,... + /* 0078 */ 0x26, 0xDB, 0x70, 0x64, 0x18, 0x4C, 0xE4, 0x18, // &.pd.L.. + /* 0080 */ 0x50, 0x62, 0xC6, 0x80, 0xD2, 0x39, 0x05, 0xD9, // Pb...9.. + /* 0088 */ 0x04, 0x16, 0x74, 0xA1, 0x28, 0x9A, 0x46, 0x94, // ..t.(.F. + /* 0090 */ 0x04, 0x07, 0x75, 0x0C, 0x11, 0x82, 0x97, 0x2B, // ..u....+ + /* 0098 */ 0x40, 0xF2, 0x04, 0xA4, 0x79, 0x5E, 0xB2, 0x3E, // @...y^.> + /* 00A0 */ 0x08, 0x0D, 0x81, 0x8D, 0x80, 0x47, 0x91, 0x00, // .....G.. + /* 00A8 */ 0xC2, 0x62, 0x2C, 0x53, 0xE2, 0x61, 0x50, 0x1E, // .b,S.aP. + /* 00B0 */ 0x40, 0x24, 0x67, 0xA8, 0x28, 0x60, 0x7B, 0x9D, // @$g.(`{. + /* 00B8 */ 0x88, 0x86, 0x75, 0x9C, 0x4C, 0x12, 0x1C, 0x6A, // ..u.L..j + /* 00C0 */ 0x94, 0x96, 0x28, 0xC0, 0xFC, 0xC8, 0x34, 0x91, // ..(...4. + /* 00C8 */ 0x63, 0x6B, 0x7A, 0xC4, 0x82, 0x64, 0xD2, 0x86, // ckz..d.. + /* 00D0 */ 0x82, 0x1A, 0xBA, 0xA7, 0x75, 0x52, 0x9E, 0x68, // ....uR.h + /* 00D8 */ 0xC4, 0x83, 0x32, 0x4C, 0x02, 0x8F, 0x82, 0xA1, // ..2L.... + /* 00E0 */ 0x71, 0x82, 0xB2, 0x20, 0xE4, 0x60, 0xA0, 0x28, // q.. .`.( + /* 00E8 */ 0xC0, 0x93, 0xF0, 0x1C, 0x8B, 0x17, 0x20, 0x7C, // ...... | + /* 00F0 */ 0xC6, 0xE4, 0x28, 0x10, 0x23, 0x81, 0x8F, 0x04, // ..(.#... + /* 00F8 */ 0x1E, 0xCD, 0x31, 0x63, 0x81, 0xC2, 0x05, 0x3C, // ..1c...< + /* 0100 */ 0x9F, 0x63, 0x88, 0x1C, 0xF7, 0x50, 0x63, 0x1C, // .c...Pc. + /* 0108 */ 0x45, 0xE4, 0x04, 0xEF, 0x00, 0x51, 0x8C, 0x56, // E....Q.V + /* 0110 */ 0xD0, 0xBC, 0x85, 0x18, 0x2C, 0x9A, 0xC1, 0x7A, // ....,..z + /* 0118 */ 0x06, 0x27, 0x83, 0x4E, 0xF0, 0xFF, 0x3F, 0x02, // .'.N..?. + /* 0120 */ 0x2E, 0x03, 0x42, 0x1E, 0x05, 0x58, 0x1D, 0x94, // ..B..X.. + /* 0128 */ 0xA6, 0x61, 0x82, 0xEE, 0x05, 0xBC, 0x1A, 0x1A, // .a...... + /* 0130 */ 0x13, 0xA0, 0x11, 0x43, 0xCA, 0x04, 0x38, 0xBB, // ...C..8. + /* 0138 */ 0x2F, 0x68, 0x46, 0x6D, 0x09, 0x30, 0x27, 0x40, // /hFm.0'@ + /* 0140 */ 0x9B, 0x00, 0x6F, 0x08, 0x42, 0x39, 0xCF, 0x28, // ..o.B9.( + /* 0148 */ 0xC7, 0x72, 0x8A, 0x51, 0x1E, 0x06, 0x62, 0xBE, // .r.Q..b. + /* 0150 */ 0x0C, 0x04, 0x8D, 0x12, 0x23, 0xE6, 0xB9, 0xC4, // ....#... + /* 0158 */ 0x35, 0x6C, 0x84, 0x18, 0x21, 0x4F, 0x21, 0x50, // 5l..!O!P + /* 0160 */ 0xDC, 0xF6, 0x07, 0x41, 0x06, 0x8D, 0x1B, 0xBD, // ...A.... + /* 0168 */ 0x4F, 0x0B, 0x67, 0x75, 0x02, 0x47, 0xFF, 0xA4, // O.gu.G.. + /* 0170 */ 0x60, 0x02, 0x4F, 0xF9, 0xC0, 0x9E, 0x0D, 0x4E, // `.O....N + /* 0178 */ 0xE0, 0x58, 0xA3, 0xC6, 0x38, 0x95, 0x04, 0x8E, // .X..8... + /* 0180 */ 0xFD, 0x80, 0x90, 0x06, 0x10, 0x45, 0x82, 0x47, // .....E.G + /* 0188 */ 0x9D, 0x16, 0x7C, 0x2E, 0xF0, 0xD0, 0x0E, 0xDA, // ..|..... + /* 0190 */ 0x73, 0x3C, 0x81, 0x20, 0x87, 0x70, 0x04, 0x4F, // s<. .p.O + /* 0198 */ 0x0C, 0x0F, 0x04, 0x1E, 0x03, 0xBB, 0x29, 0xF8, // ......). + /* 01A0 */ 0x08, 0xE0, 0x13, 0x02, 0xDE, 0x35, 0xA0, 0xAE, // .....5.. + /* 01A8 */ 0x06, 0x0F, 0x06, 0x6C, 0xD0, 0xE1, 0x30, 0xE3, // ...l..0. + /* 01B0 */ 0xF5, 0xF0, 0xC3, 0x9D, 0xC0, 0x49, 0x3E, 0x60, // .....I>` + /* 01B8 */ 0xF0, 0xC3, 0x86, 0x07, 0x87, 0x9B, 0xE7, 0xC9, // ........ + /* 01C0 */ 0x1C, 0x59, 0xA9, 0x02, 0xCC, 0x1E, 0x0E, 0x74, // .Y.....t + /* 01C8 */ 0x90, 0xF0, 0x69, 0x83, 0x9D, 0x01, 0x30, 0xF2, // ..i...0. + /* 01D0 */ 0x07, 0x81, 0x1A, 0x99, 0xA1, 0x3D, 0xEE, 0x97, // .....=.. + /* 01D8 */ 0x0E, 0x43, 0x3E, 0x27, 0x1C, 0x16, 0x13, 0x7B, // .C>'...{ + /* 01E0 */ 0xEA, 0xA0, 0xE3, 0x01, 0xFF, 0x65, 0xE4, 0x39, // .....e.9 + /* 01E8 */ 0xC3, 0xD3, 0xF7, 0x7C, 0x4D, 0x30, 0xEC, 0xC0, // ...|M0.. + /* 01F0 */ 0xD1, 0x03, 0x31, 0xF4, 0xC3, 0xC6, 0x61, 0x9C, // ..1...a. + /* 01F8 */ 0x86, 0xEF, 0x1F, 0x3E, 0x2F, 0xC0, 0x38, 0x05, // ...>/.8. + /* 0200 */ 0x78, 0xE4, 0xFE, 0xFF, 0x1F, 0x52, 0x7C, 0x9A, // x....R|. + /* 0208 */ 0xE0, 0x47, 0x0B, 0x9F, 0x26, 0xD8, 0xF5, 0xE0, // .G..&... + /* 0210 */ 0x34, 0x9E, 0x03, 0x3C, 0x9C, 0xB3, 0xF2, 0x61, // 4..<...a + /* 0218 */ 0x02, 0x6C, 0xF7, 0x13, 0x36, 0xA2, 0x77, 0x0B, // .l..6.w. + /* 0220 */ 0x8F, 0x06, 0x7B, 0x0A, 0x00, 0xDF, 0xF9, 0x05, // ..{..... + /* 0228 */ 0x9C, 0x77, 0x0D, 0x36, 0x58, 0x18, 0xE7, 0x17, // .w.6X... + /* 0230 */ 0xE0, 0x71, 0x42, 0xF0, 0x10, 0xF8, 0x41, 0xC2, // .qB...A. + /* 0238 */ 0x43, 0xE0, 0x03, 0x78, 0xFE, 0x38, 0x43, 0x2B, // C..x.8C+ + /* 0240 */ 0x9D, 0x17, 0x72, 0x60, 0xF0, 0xCE, 0x39, 0x30, // ..r`..90 + /* 0248 */ 0x46, 0xC1, 0xF3, 0x3C, 0x36, 0x4C, 0xA0, 0x20, // F..<6L. + /* 0250 */ 0xAF, 0x01, 0x85, 0x7A, 0x16, 0x50, 0x18, 0x9F, // ...z.P.. + /* 0258 */ 0x6A, 0x80, 0xD7, 0xFF, 0xFF, 0x54, 0x03, 0x5C, // j....T.\ + /* 0260 */ 0x0E, 0x07, 0xB8, 0x93, 0x03, 0xDC, 0x7B, 0x01, // ......{. + /* 0268 */ 0xBB, 0x38, 0x3C, 0xD7, 0xC0, 0x15, 0x7D, 0xAE, // .8<...}. + /* 0270 */ 0x81, 0x7A, 0x6F, 0x29, 0x6E, 0x8C, 0xBA, 0xC6, // .zo)n... + /* 0278 */ 0x04, 0x79, 0x14, 0x78, 0xA4, 0x89, 0xF2, 0x3C, // .y.x...< + /* 0280 */ 0xF3, 0x2E, 0x13, 0xE1, 0xD9, 0xC6, 0xD7, 0x1A, // ........ + /* 0288 */ 0x4F, 0x21, 0x8E, 0xAF, 0x35, 0x46, 0x7C, 0x99, // O!..5F|. + /* 0290 */ 0x78, 0xB7, 0x31, 0xEE, 0xC1, 0x3D, 0xD6, 0x3C, // x.1..=.< + /* 0298 */ 0xE4, 0x18, 0xE4, 0x68, 0x22, 0xBC, 0x18, 0x04, // ...h"... + /* 02A0 */ 0x7C, 0xBC, 0xF1, 0xB1, 0x06, 0xBC, 0x62, 0x5E, // |.....b^ + /* 02A8 */ 0x28, 0xB2, 0x70, 0xAC, 0x01, 0x34, 0xFE, 0xFF, // (.p..4.. + /* 02B0 */ 0x8F, 0x35, 0xC0, 0x0D, 0xEB, 0x01, 0x05, 0x7C, // .5.....| + /* 02B8 */ 0x47, 0x06, 0x76, 0x43, 0x81, 0x77, 0x42, 0x01, // G.vC.wB. + /* 02C0 */ 0xFC, 0x24, 0x7E, 0x01, 0xE8, 0xC8, 0xE1, 0xB4, // .$~..... + /* 02C8 */ 0x20, 0xB2, 0xF1, 0x06, 0xF0, 0x29, 0x80, 0xAA, // ....).. + /* 02D0 */ 0x01, 0xD2, 0x34, 0x61, 0x13, 0x4C, 0x4F, 0x2E, // ..4a.LO. + /* 02D8 */ 0x78, 0x1F, 0x09, 0x9C, 0x9B, 0x44, 0xC9, 0x87, // x....D.. + /* 02E0 */ 0x45, 0xE1, 0x9C, 0xF5, 0x20, 0x42, 0x41, 0x0C, // E... BA. + /* 02E8 */ 0xE8, 0x20, 0xC7, 0x09, 0xF4, 0x19, 0xC5, 0x07, // . ...... + /* 02F0 */ 0x91, 0x13, 0x7D, 0x22, 0xF4, 0xA0, 0x3C, 0x8C, // ..}"..<. + /* 02F8 */ 0x77, 0x14, 0x76, 0x02, 0xF1, 0x61, 0xC2, 0x63, // w.v..a.c + /* 0300 */ 0xF7, 0x31, 0x81, 0xFF, 0x63, 0x3C, 0x1B, 0xA3, // .1..c<.. + /* 0308 */ 0x5B, 0x0D, 0x86, 0xFE, 0xFF, 0xE7, 0x14, 0x0E, // [....... + /* 0310 */ 0xE6, 0x83, 0x08, 0x27, 0xA8, 0xEB, 0x26, 0x01, // ...'..&. + /* 0318 */ 0x32, 0x7D, 0x47, 0x05, 0x50, 0x00, 0xF9, 0x5E, // 2}G.P..^ + /* 0320 */ 0xE0, 0x73, 0xC0, 0xB3, 0x01, 0x1B, 0xC3, 0xA3, // .s...... + /* 0328 */ 0x80, 0xD1, 0x8C, 0xCE, 0xC3, 0x4F, 0x16, 0x15, // .....O.. + /* 0330 */ 0x77, 0xB2, 0x14, 0xC4, 0x93, 0x75, 0x94, 0xC9, // w....u.. + /* 0338 */ 0xA2, 0x67, 0xE2, 0x7B, 0x85, 0x67, 0xF4, 0xA6, // .g.{.g.. + /* 0340 */ 0xE5, 0x39, 0x7A, 0xC2, 0xBE, 0x87, 0xC0, 0x3A, // .9z....: + /* 0348 */ 0x0C, 0x84, 0x7C, 0x30, 0xF0, 0x34, 0x0C, 0xE7, // ..|0.4.. + /* 0350 */ 0xC9, 0x72, 0x38, 0x4F, 0x96, 0x8F, 0xC5, 0xD7, // .r8O.... + /* 0358 */ 0x10, 0xF0, 0x09, 0x9C, 0x2D, 0xC8, 0xE1, 0x31, // ....-..1 + /* 0360 */ 0xB1, 0x46, 0x45, 0xAF, 0x42, 0x1E, 0x1E, 0xBF, // .FE.B... + /* 0368 */ 0x1C, 0x78, 0x3E, 0xCF, 0x08, 0x47, 0xF9, 0x24, // .x>..G.$ + /* 0370 */ 0x81, 0xC3, 0x78, 0x26, 0xF1, 0x10, 0x7D, 0x2B, // ..x&..}+ + /* 0378 */ 0x82, 0x35, 0x91, 0x93, 0xF6, 0x6D, 0xE1, 0x64, // .5...m.d + /* 0380 */ 0x83, 0xBE, 0x9E, 0x61, 0x6E, 0x45, 0xB0, 0xFF, // ...anE.. + /* 0388 */ 0xFF, 0xB7, 0x22, 0x38, 0x17, 0x34, 0x98, 0x99, // .."8.4.. + /* 0390 */ 0xEE, 0x55, 0xA8, 0x58, 0xF7, 0x2A, 0x40, 0xEC, // .U.X.*@. + /* 0398 */ 0xB0, 0x5E, 0x7B, 0x7C, 0xB0, 0x82, 0x7B, 0xAF, // .^{|..{. + /* 03A0 */ 0x82, 0x7B, 0xA9, 0x7A, 0x56, 0x38, 0xC6, 0xF0, // .{.zV8.. + /* 03A8 */ 0x0F, 0x53, 0x31, 0x4E, 0xE9, 0xB5, 0xD3, 0x40, // .S1N...@ + /* 03B0 */ 0x61, 0xA2, 0xC4, 0x7B, 0xAF, 0xF2, 0x18, 0xDF, // a..{.... + /* 03B8 */ 0xAB, 0xD8, 0x15, 0x2A, 0x4C, 0xAC, 0x97, 0x2B, // ...*L..+ + /* 03C0 */ 0xA3, 0xBE, 0x4E, 0x84, 0x0B, 0x14, 0x24, 0xD2, // ..N...$. + /* 03C8 */ 0xAB, 0x55, 0x94, 0xC8, 0xF1, 0x0D, 0xF9, 0x5E, // .U.....^ + /* 03D0 */ 0x05, 0x5E, 0x39, 0xF7, 0x2A, 0x90, 0xFD, 0xFF, // .^9.*... + /* 03D8 */ 0xEF, 0x55, 0x80, 0x79, 0xB4, 0xF7, 0x2A, 0x30, // .U.y..*0 + /* 03E0 */ 0x5E, 0x1B, 0xD8, 0x0D, 0x09, 0x16, 0xD0, 0x8B, // ^....... + /* 03E8 */ 0x15, 0x60, 0x28, 0xF3, 0xC5, 0x8A, 0xE6, 0xBD, // .`(..... + /* 03F0 */ 0x58, 0x21, 0xFE, 0xFF, 0xE7, 0x12, 0xA6, 0xE7, // X!...... + /* 03F8 */ 0x62, 0x45, 0xE6, 0x09, 0xFF, 0x66, 0x05, 0x70, // bE...f.p + /* 0400 */ 0xFA, 0xFF, 0x7F, 0xB3, 0x02, 0x8C, 0xDD, 0x8B, // ........ + /* 0408 */ 0x30, 0x47, 0x2B, 0x78, 0x29, 0x6F, 0x56, 0x34, // 0G+x)oV4 + /* 0410 */ 0xCE, 0x32, 0x14, 0x70, 0x41, 0x14, 0xC6, 0x37, // .2.pA..7 + /* 0418 */ 0x2B, 0xC0, 0xD1, 0x75, 0x05, 0x37, 0x64, 0xB8, // +..u.7d. + /* 0420 */ 0x60, 0x51, 0x82, 0xF9, 0x10, 0xE2, 0xE9, 0x1C, // `Q...... + /* 0428 */ 0xF1, 0x43, 0xC2, 0x4B, 0xC0, 0x63, 0x8E, 0x07, // .C.K.c.. + /* 0430 */ 0xFC, 0x40, 0xE0, 0xCB, 0x15, 0x98, 0xFE, 0xFF, // .@...... + /* 0438 */ 0x04, 0x3E, 0xF9, 0x9E, 0xE5, 0xDB, 0xD4, 0x7B, // .>.....{ + /* 0440 */ 0x2F, 0x3F, 0x60, 0xBD, 0x57, 0xF9, 0xF0, 0x1B, // /?`.W... + /* 0448 */ 0xEB, 0x9D, 0xE1, 0xE5, 0xCA, 0x23, 0x89, 0x72, // .....#.r + /* 0450 */ 0x12, 0xA1, 0x7C, 0xB7, 0x7A, 0xAF, 0x32, 0x4A, // ..|.z.2J + /* 0458 */ 0xC4, 0x17, 0x62, 0x9F, 0x82, 0x0D, 0x6D, 0x94, // ..b...m. + /* 0460 */ 0xA7, 0x8A, 0xE8, 0xC6, 0x7B, 0xB9, 0x02, 0xAF, // ....{... + /* 0468 */ 0xA4, 0xCB, 0x15, 0x40, 0x93, 0xE1, 0xBF, 0x5C, // ...@...\ + /* 0470 */ 0x81, 0xEF, 0xE6, 0x80, 0xBD, 0x26, 0xC1, 0xF9, // .....&.. + /* 0478 */ 0xFF, 0x5F, 0x93, 0xF8, 0xF5, 0x0A, 0xF0, 0x93, // ._...... + /* 0480 */ 0xFD, 0x7A, 0x45, 0x73, 0x5F, 0xAF, 0x50, 0xA2, // .zEs_.P. + /* 0488 */ 0x20, 0xA4, 0x08, 0x48, 0x33, 0x05, 0xCF, 0xFD, // ..H3... + /* 0490 */ 0x0A, 0xE0, 0xC4, 0xFF, 0xFF, 0x7E, 0x05, 0x58, // .....~.X + /* 0498 */ 0x0E, 0x77, 0xBF, 0x02, 0x7A, 0xB7, 0x23, 0xF0, // .w..z.#. + /* 04A0 */ 0xA2, 0xBC, 0x1D, 0x61, 0xAF, 0x58, 0xF8, 0x8C, // ...a.X.. + /* 04A8 */ 0x57, 0x2C, 0x1A, 0x66, 0x25, 0x8A, 0xB7, 0x26, // W,.f%..& + /* 04B0 */ 0x0A, 0xE3, 0x2B, 0x16, 0x30, 0xF9, 0xFF, 0x5F, // ..+.0.._ + /* 04B8 */ 0xB1, 0x80, 0xD9, 0x41, 0x14, 0x37, 0x6A, 0xB8, // ...A.7j. + /* 04C0 */ 0x17, 0x27, 0xDF, 0x7A, 0x3C, 0xDF, 0x88, 0xBE, // .'.z<... + /* 04C8 */ 0xC3, 0x60, 0x4E, 0x58, 0x30, 0x6E, 0x58, 0xF0, // .`NX0nX. + /* 04D0 */ 0x87, 0xF4, 0x30, 0xEC, 0x93, 0xC4, 0x3B, 0x96, // ..0...;. + /* 04D8 */ 0x8F, 0x56, 0x06, 0x79, 0x03, 0x7E, 0xB2, 0x7A, // .V.y.~.z + /* 04E0 */ 0xB0, 0x8A, 0x62, 0x84, 0x80, 0xC7, 0xF3, 0x2E, // ..b..... + /* 04E8 */ 0xEC, 0xA3, 0xD5, 0x9B, 0x96, 0x51, 0x62, 0xC7, // .....Qb. + /* 04F0 */ 0xF2, 0x85, 0xEA, 0x59, 0xCB, 0xD7, 0x2C, 0x43, // ...Y..,C + /* 04F8 */ 0xC4, 0x7D, 0x20, 0xF6, 0x0D, 0x0B, 0xB0, 0xFD, // .} ..... + /* 0500 */ 0xFF, 0xBF, 0x61, 0x01, 0x8E, 0x2E, 0x0E, 0xFC, // ..a..... + /* 0508 */ 0xE0, 0x80, 0xBD, 0x61, 0x01, 0x3E, 0x67, 0x0A, // ...a.>g. + /* 0510 */ 0x9E, 0x1B, 0x16, 0xB0, 0xF9, 0xFF, 0xDF, 0xB0, // ........ + /* 0518 */ 0x00, 0xFE, 0xFF, 0xFF, 0x6F, 0x58, 0xC0, 0xE1, // ....oX.. + /* 0520 */ 0x76, 0x85, 0xBD, 0x65, 0x61, 0x6F, 0x2F, 0x64, // v..eao/d + /* 0528 */ 0x15, 0x34, 0xD4, 0x4A, 0x14, 0xFC, 0x7B, 0x65, // .4.J..{e + /* 0530 */ 0x18, 0x7A, 0xC3, 0x02, 0x1C, 0x8D, 0xDB, 0xA3, // .z...... + /* 0538 */ 0x06, 0xC7, 0xD9, 0xE0, 0x49, 0x02, 0x73, 0xAE, // ....I.s. + /* 0540 */ 0xC6, 0xCD, 0xE6, 0xE0, 0x02, 0x47, 0xE8, 0x1D, // .....G.. + /* 0548 */ 0x54, 0x73, 0x67, 0x97, 0x14, 0x18, 0xB7, 0x2C, // Tsg...., + /* 0550 */ 0xB8, 0x97, 0xAA, 0x87, 0x86, 0x28, 0x07, 0xF1, // .....(.. + /* 0558 */ 0x2A, 0xFC, 0x60, 0xF5, 0x28, 0x75, 0x64, 0x8F, // *.`.(ud. + /* 0560 */ 0x57, 0x4F, 0xC3, 0x3E, 0x66, 0xF9, 0x96, 0x65, // WO.>f..e + /* 0568 */ 0xA8, 0x08, 0x6F, 0x59, 0xEC, 0x0C, 0x11, 0x2F, // ..oY.../ + /* 0570 */ 0x56, 0x94, 0x10, 0xEF, 0x15, 0xA1, 0x7D, 0xE7, // V.....}. + /* 0578 */ 0x32, 0xF8, 0xA3, 0xB1, 0x51, 0x83, 0xBE, 0x1C, // 2...Q... + /* 0580 */ 0xBF, 0x65, 0xC1, 0xFB, 0xFF, 0xDF, 0xB2, 0xE0, // .e...... + /* 0588 */ 0x8B, 0xFC, 0xAB, 0xE8, 0x44, 0xE0, 0x5B, 0x16, // ....D.[. + /* 0590 */ 0xC0, 0x8F, 0x60, 0x10, 0x72, 0x32, 0x70, 0xF4, // ..`.r2p. + /* 0598 */ 0x79, 0x01, 0x3F, 0x80, 0x87, 0x11, 0x0F, 0x89, // y.?..... + /* 05A0 */ 0x05, 0x18, 0x38, 0xBD, 0x2F, 0xF9, 0x4C, 0xC1, // ..8./.L. + /* 05A8 */ 0x0F, 0x18, 0x3E, 0x53, 0xB0, 0xEB, 0x41, 0xF4, // ..>S..A. + /* 05B0 */ 0xC7, 0x00, 0x9F, 0x4B, 0x30, 0x83, 0x03, 0xFF, // ...K0... + /* 05B8 */ 0xB5, 0xE2, 0xD0, 0x3D, 0x8A, 0xD7, 0x07, 0x13, // ...=.... + /* 05C0 */ 0x78, 0x70, 0xFC, 0xFF, 0x3F, 0x38, 0xB8, 0x77, // xp..?8.w + /* 05C8 */ 0x86, 0x23, 0xF2, 0x1D, 0xC6, 0x83, 0x03, 0xDB, // .#...... + /* 05D0 */ 0x41, 0x00, 0x38, 0x0C, 0x0E, 0x1F, 0x6A, 0x70, // A.8...jp + /* 05D8 */ 0xE8, 0xF1, 0x18, 0x38, 0xA4, 0xCF, 0x63, 0xEC, // ...8..c. + /* 05E0 */ 0xC2, 0xF0, 0x90, 0xE3, 0xA1, 0x81, 0x0D, 0xD0, // ........ + /* 05E8 */ 0x43, 0x03, 0x96, 0x93, 0x78, 0x0A, 0x39, 0x34, // C...x.94 + /* 05F0 */ 0x30, 0x4B, 0x18, 0x1A, 0x50, 0x8A, 0x37, 0x34, // 0K..P.74 + /* 05F8 */ 0xFA, 0xFF, 0x1F, 0x1A, 0x1F, 0x92, 0x0F, 0x0B, // ........ + /* 0600 */ 0x31, 0x9F, 0x72, 0x22, 0xBC, 0x2F, 0xF8, 0x04, // 1.r"./.. + /* 0608 */ 0xC5, 0xD0, 0x5F, 0x53, 0x7C, 0xBB, 0xF0, 0x4D, // .._S|..M + /* 0610 */ 0x10, 0x37, 0x3E, 0x70, 0x5D, 0x3A, 0x3D, 0x3E, // .7>p]:=> + /* 0618 */ 0xE0, 0x73, 0xE4, 0xF2, 0xF8, 0x70, 0x47, 0x27, // .s...pG' + /* 0620 */ 0x8F, 0x0F, 0x86, 0xCB, 0xAB, 0x0C, 0x39, 0x9A, // ......9. + /* 0628 */ 0xF8, 0x68, 0xC5, 0x86, 0x07, 0xB6, 0x9B, 0x9E, // .h...... + /* 0630 */ 0x87, 0x07, 0x7C, 0xAE, 0x9B, 0x60, 0xBC, 0x42, // ..|..`.B + /* 0638 */ 0xF2, 0x6B, 0x09, 0x8C, 0x13, 0x14, 0xFE, 0xBA, // .k...... + /* 0640 */ 0x09, 0xDE, 0xFF, 0xFF, 0x75, 0x13, 0x78, 0x8E, // ....u.x. + /* 0648 */ 0x82, 0x6B, 0xBD, 0x64, 0xD3, 0x20, 0xAF, 0x1C, // .k.d. .. + /* 0650 */ 0xC5, 0x7A, 0x11, 0x50, 0x18, 0x9F, 0xD9, 0x00, // .z.P.... + /* 0658 */ 0x47, 0x63, 0x7D, 0x66, 0x03, 0xCB, 0xBD, 0x80, // Gc}f.... + /* 0660 */ 0xDD, 0xD8, 0xE0, 0x9E, 0xD6, 0x60, 0xDF, 0x1D, // .....`.. + /* 0668 */ 0x1E, 0xCE, 0x1E, 0xD3, 0x1E, 0xD5, 0x1E, 0xD0, // ........ + /* 0670 */ 0x7C, 0xC4, 0x8E, 0xF1, 0x96, 0x16, 0x24, 0x4E, // |.....$N + /* 0678 */ 0x84, 0xD7, 0x81, 0xA7, 0x35, 0x5F, 0x32, 0xE2, // ....5_2. + /* 0680 */ 0x05, 0x7A, 0x5A, 0x33, 0x46, 0x9C, 0x97, 0x36, // .zZ3F..6 + /* 0688 */ 0x23, 0xBE, 0x52, 0x84, 0x78, 0x58, 0xF3, 0xC9, // #.R.xX.. + /* 0690 */ 0xCD, 0x78, 0x0F, 0x13, 0xE1, 0xC2, 0xBC, 0xB0, // .x...... + /* 0698 */ 0x3D, 0xAD, 0x81, 0xE3, 0xFF, 0x7F, 0x5A, 0x83, // =.....Z. + /* 06A0 */ 0x23, 0xE7, 0x8A, 0x0D, 0xD0, 0xE4, 0xA2, 0x8F, // #....... + /* 06A8 */ 0x3B, 0xA4, 0x80, 0xE5, 0xDA, 0xC0, 0x6E, 0x29, // ;.....n) + /* 06B0 */ 0xF0, 0x2E, 0xD8, 0xC0, 0xF9, 0xFF, 0x7F, 0x44, // .......D + /* 06B8 */ 0x01, 0x5F, 0x96, 0x0B, 0x36, 0xCD, 0x71, 0xC1, // ._..6.q. + /* 06C0 */ 0x46, 0x71, 0x58, 0x0D, 0x90, 0xE6, 0x09, 0xFF, // FqX..... + /* 06C8 */ 0x7A, 0x0D, 0xFE, 0x49, 0xF8, 0x7A, 0x0D, 0xD8, // z..I.z.. + /* 06D0 */ 0xBE, 0xC5, 0xE2, 0xAE, 0xD7, 0xC0, 0xEA, 0xFF, // ........ + /* 06D8 */ 0x7F, 0xBD, 0x06, 0x96, 0x82, 0x47, 0x4A, 0xEF, // .....GJ. + /* 06E0 */ 0xD4, 0xE0, 0xBA, 0x69, 0xE3, 0x41, 0xDF, 0xB4, // ...i.A.. + /* 06E8 */ 0x61, 0x0A, 0xBE, 0x45, 0xD1, 0x28, 0xE4, 0x8A, // a..E.(.. + /* 06F0 */ 0xB6, 0x10, 0x0A, 0xE3, 0x5B, 0x14, 0xE0, 0x08, // ....[... + /* 06F8 */ 0xFB, 0x2D, 0x0A, 0x2C, 0x17, 0xA7, 0xB7, 0x28, // .-.,...( + /* 0700 */ 0xFC, 0x0C, 0x3C, 0x68, 0xDF, 0x75, 0x18, 0xA6, // ..H.p. + /* 0718 */ 0xFC, 0xF4, 0xFF, 0x8F, 0xF1, 0x5E, 0xE7, 0x9B, // .....^.. + /* 0720 */ 0xD4, 0x6B, 0x94, 0x2F, 0x30, 0xC7, 0x10, 0x31, // .k./0..1 + /* 0728 */ 0xCA, 0xCB, 0xB4, 0x21, 0xE2, 0xF9, 0xD4, 0xE4, // ...!.... + /* 0730 */ 0xB3, 0x42, 0xDC, 0x10, 0x0F, 0xD1, 0x46, 0x88, // .B....F. + /* 0738 */ 0xFA, 0x3C, 0xED, 0x09, 0xBD, 0x46, 0x81, 0x57, // .<...F.W + /* 0740 */ 0xD0, 0x35, 0x0A, 0xA0, 0xC9, 0xFD, 0x08, 0x77, // .5.....w + /* 0748 */ 0x8D, 0x02, 0xCB, 0xBD, 0x81, 0x9D, 0x87, 0xF8, // ........ + /* 0750 */ 0x95, 0xC8, 0xD7, 0x06, 0x18, 0xF7, 0x28, 0x38, // ......(8 + /* 0758 */ 0xFF, 0xFF, 0x7B, 0x14, 0x60, 0x23, 0xCC, 0x3D, // ..{.`#.= + /* 0760 */ 0x8A, 0x06, 0xB9, 0x47, 0xA1, 0x4E, 0x26, 0xBE, // ...G.N&. + /* 0768 */ 0xD4, 0x79, 0xA2, 0xE0, 0x08, 0x7F, 0x91, 0x42, // .y.....B + /* 0770 */ 0xC5, 0x26, 0x51, 0xE8, 0xC3, 0x10, 0x2A, 0xE6, // .&Q...*. + /* 0778 */ 0x61, 0x84, 0x82, 0x18, 0xD0, 0x19, 0x4E, 0x14, // a.....N. + /* 0780 */ 0x68, 0x15, 0x27, 0x0A, 0x72, 0x8B, 0xF1, 0xA4, // h.'.r... + /* 0788 */ 0x1E, 0xA3, 0x00, 0x5F, 0xCB, 0xF4, 0x50, 0x79, // ..._..Py + /* 0790 */ 0xE4, 0xA1, 0x52, 0x10, 0x0F, 0xD5, 0x71, 0x86, // ..R...q. + /* 0798 */ 0x8A, 0x9E, 0xA4, 0xE7, 0x8F, 0xF9, 0xFF, 0x1F, // ........ + /* 07A0 */ 0x1C, 0xB0, 0x07, 0x29, 0x80, 0x17, 0x0A, 0x6D, // ...)...m + /* 07A8 */ 0xFA, 0xD4, 0x68, 0xD4, 0xAA, 0x41, 0x99, 0x1A, // ..h..A.. + /* 07B0 */ 0x65, 0x1A, 0xD4, 0xEA, 0x53, 0xA9, 0x31, 0x63, // e...S.1c + /* 07B8 */ 0xE7, 0x50, 0x4B, 0x3B, 0x4B, 0x50, 0x31, 0x8B, // .PK;KP1. + /* 07C0 */ 0xD1, 0x68, 0x1C, 0x05, 0x84, 0xCA, 0xFE, 0x9B, // .h...... + /* 07C8 */ 0x0B, 0xC4, 0x21, 0x9F, 0x3A, 0x02, 0x74, 0xB0, // ..!.:.t. + /* 07D0 */ 0x17, 0x95, 0x80, 0x2C, 0x6B, 0x6D, 0x02, 0x71, // ...,km.q + /* 07D8 */ 0x7C, 0x13, 0x10, 0x8D, 0x80, 0x48, 0xCB, 0x63, // |....H.c + /* 07E0 */ 0x42, 0x40, 0xCE, 0x0D, 0x22, 0x20, 0xAB, 0x58, // B@.." .X + /* 07E8 */ 0x93, 0x80, 0xAC, 0xF9, 0x01, 0x23, 0x70, 0xEB, // .....#p. + /* 07F0 */ 0xD4, 0x01, 0xC4, 0x52, 0x82, 0xD0, 0x44, 0x0B, // ...R..D. + /* 07F8 */ 0x17, 0xA8, 0xE3, 0x81, 0x68, 0x30, 0x84, 0x46, // ....h0.F + /* 0800 */ 0x40, 0x0E, 0x46, 0x21, 0x20, 0xCB, 0xF8, 0x74, // @.F! ..t + /* 0808 */ 0x0B, 0xDC, 0x02, 0xAC, 0x00, 0x31, 0xF9, 0x20, // .....1. + /* 0810 */ 0x54, 0xB0, 0x17, 0x50, 0xA6, 0x1E, 0x44, 0x40, // T..P..D@ + /* 0818 */ 0x56, 0xBA, 0x56, 0x01, 0x59, 0x37, 0x88, 0x80, // V.V.Y7.. + /* 0820 */ 0xFE, 0xFF, 0x2F, 0x83, 0x32, 0x03, 0xCE, 0x32, // ../.2..2 + /* 0828 */ 0xBA, 0x01, 0x62, 0x0A, 0x1F, 0x0A, 0x02, 0xB1, // ..b..... + /* 0830 */ 0x26, 0x3D, 0xA0, 0x4C, 0x20, 0x88, 0xAE, 0x1C, // &=.L ... + /* 0838 */ 0xC4, 0x0F, 0x10, 0x93, 0x06, 0x22, 0x20, 0xC7, // ....." . + /* 0840 */ 0x39, 0x98, 0x08, 0xDC, 0x71, 0x14, 0x01, 0x52, // 9...q..R + /* 0848 */ 0x47, 0xC3, 0xA5, 0x20, 0x54, 0xFC, 0xF3, 0x44, // G.. T..D + /* 0850 */ 0x20, 0x16, 0x64, 0x09, 0x8C, 0x82, 0xD0, 0x08, // .d..... + /* 0858 */ 0x9A, 0x40, 0x98, 0x3C, 0x4F, 0x20, 0x2C, 0xD4, // .@..x.... + /* 0100 */ 0x51, 0xB8, 0x80, 0xE7, 0x73, 0x0C, 0x91, 0xE3, // Q...s... + /* 0108 */ 0x1E, 0x6A, 0x8C, 0xA3, 0x88, 0x7C, 0x38, 0x0C, // .j...|8. + /* 0110 */ 0xED, 0x74, 0xE3, 0x1C, 0xD8, 0xE9, 0x14, 0x04, // .t...... + /* 0118 */ 0x2E, 0x90, 0x60, 0x3D, 0xCF, 0x59, 0x20, 0xFF, // ..`=.Y . + /* 0120 */ 0xFF, 0x18, 0x07, 0xC1, 0xF0, 0x8E, 0x01, 0x23, // .......# + /* 0128 */ 0x03, 0x42, 0x1E, 0x05, 0x58, 0x1D, 0x96, 0x26, // .B..X..& + /* 0130 */ 0x91, 0xC0, 0xEE, 0x05, 0x68, 0xBC, 0x04, 0x48, // ....h..H + /* 0138 */ 0xE1, 0x20, 0xA5, 0x0C, 0x42, 0x30, 0x8D, 0x09, // . ..B0.. + /* 0140 */ 0xB0, 0x75, 0x68, 0x90, 0x37, 0x01, 0xD6, 0xAE, // .uh.7... + /* 0148 */ 0x02, 0x42, 0x89, 0x74, 0x02, 0x71, 0x42, 0x44, // .B.t.qBD + /* 0150 */ 0x89, 0x18, 0xD4, 0x40, 0x51, 0x6A, 0x43, 0x15, // ...@QjC. + /* 0158 */ 0x4C, 0x67, 0xC3, 0x13, 0x66, 0xDC, 0x10, 0x31, // Lg..f..1 + /* 0160 */ 0x0C, 0x14, 0xB7, 0xFD, 0x41, 0x90, 0x61, 0xE3, // ....A.a. + /* 0168 */ 0xC6, 0xEF, 0x41, 0x9D, 0xD6, 0xD9, 0x1D, 0xD3, // ..A..... + /* 0170 */ 0xAB, 0x82, 0x09, 0x3C, 0xE9, 0x37, 0x84, 0xA7, // ...<.7.. + /* 0178 */ 0x83, 0xA3, 0x38, 0xDA, 0xA8, 0x31, 0x9A, 0x23, // ..8..1.# + /* 0180 */ 0x65, 0xAB, 0xD6, 0xB9, 0xC2, 0x91, 0xE0, 0x51, // e......Q + /* 0188 */ 0xE7, 0x05, 0x9F, 0x0C, 0x3C, 0xB4, 0xC3, 0xF6, // ....<... + /* 0190 */ 0x60, 0xCF, 0xD2, 0x43, 0x38, 0x82, 0x67, 0x86, // `..C8.g. + /* 0198 */ 0x47, 0x02, 0x8F, 0x81, 0xDD, 0x15, 0x7C, 0x08, // G.....|. + /* 01A0 */ 0xF0, 0x19, 0x01, 0xEF, 0x1A, 0x50, 0x97, 0x83, // .....P.. + /* 01A8 */ 0x47, 0x03, 0x36, 0xE9, 0x70, 0x98, 0xF1, 0x7A, // G.6.p..z + /* 01B0 */ 0xEE, 0x9E, 0xBA, 0xCF, 0x18, 0xFC, 0xBC, 0xE1, // ........ + /* 01B8 */ 0xC1, 0xE1, 0x46, 0x7A, 0x32, 0x47, 0x56, 0xAA, // ..Fz2GV. + /* 01C0 */ 0x00, 0xB3, 0xD7, 0x00, 0x1D, 0x25, 0x7C, 0xE0, // .....%|. + /* 01C8 */ 0x60, 0x77, 0x81, 0xA7, 0x00, 0x13, 0x58, 0xFE, // `w....X. + /* 01D0 */ 0x20, 0x50, 0x23, 0x33, 0xB4, 0xC7, 0xFB, 0xDE, // P#3.... + /* 01D8 */ 0x61, 0xC8, 0x27, 0x85, 0xC3, 0x62, 0x62, 0x0F, // a.'..bb. + /* 01E0 */ 0x1E, 0x74, 0x3C, 0xE0, 0xBF, 0x8F, 0x3C, 0x69, // .t<... + /* 0228 */ 0xEC, 0xA1, 0x79, 0x14, 0x2F, 0x11, 0x6F, 0x0F, // ..y./.o. + /* 0230 */ 0x26, 0x88, 0xF6, 0x10, 0x03, 0xC6, 0x19, 0xE1, // &....... + /* 0238 */ 0xCE, 0x1B, 0x70, 0x4E, 0x31, 0xC0, 0x03, 0xEA, // ..pN1... + /* 0240 */ 0x10, 0x30, 0x87, 0x09, 0x0F, 0x81, 0x0F, 0xE0, // .0...... + /* 0248 */ 0x19, 0xE4, 0x1C, 0x7D, 0xCC, 0x39, 0x33, 0xDC, // ...}.93. + /* 0250 */ 0x71, 0x07, 0x6C, 0xC3, 0xE0, 0x91, 0x2D, 0x80, // q.l...-. + /* 0258 */ 0xB0, 0x38, 0x4F, 0x02, 0x05, 0x7C, 0x1B, 0x50, // .8O..|.P + /* 0260 */ 0x18, 0x1F, 0x6E, 0xC0, 0xFB, 0xFF, 0x3F, 0xDC, // ..n...?. + /* 0268 */ 0x00, 0xD7, 0xF3, 0x01, 0xEE, 0xF8, 0x00, 0xF7, // ........ + /* 0270 */ 0x62, 0xC1, 0x0E, 0x0F, 0x8F, 0x37, 0xC0, 0x60, // b....7.` + /* 0278 */ 0x48, 0x8F, 0x34, 0x6F, 0x35, 0x31, 0x5E, 0x6D, // H.4o51^m + /* 0280 */ 0x42, 0x44, 0x78, 0xA8, 0x79, 0xB7, 0x31, 0x52, // BDx.y.1R + /* 0288 */ 0xBC, 0xC7, 0x1B, 0x76, 0x8D, 0x39, 0x8B, 0x07, // ...v.9.. + /* 0290 */ 0x90, 0x28, 0xC5, 0xA1, 0xE9, 0x62, 0x13, 0x23, // .(...b.# + /* 0298 */ 0xCA, 0x9B, 0x8D, 0x61, 0xDF, 0x74, 0x0C, 0x14, // ...a.t.. + /* 02A0 */ 0x2A, 0x52, 0x84, 0x30, 0x2F, 0x16, 0x21, 0x1E, // *R.0/.!. + /* 02A8 */ 0x6F, 0xC0, 0x2C, 0xE9, 0xA5, 0xA2, 0xCF, 0x81, // o.,..... + /* 02B0 */ 0x8F, 0x37, 0x80, 0x97, 0xFF, 0xFF, 0xF1, 0x06, // .7...... + /* 02B8 */ 0xF0, 0x30, 0x0C, 0x1F, 0x53, 0xC0, 0x76, 0x73, // .0..S.vs + /* 02C0 */ 0x60, 0xF7, 0x14, 0xF8, 0xE7, 0x14, 0xC0, 0x91, // `....... + /* 02C8 */ 0x90, 0x47, 0x80, 0x0E, 0x1E, 0x16, 0x01, 0x22, // .G....." + /* 02D0 */ 0x1B, 0xCF, 0x00, 0x9F, 0x89, 0xA8, 0x40, 0x2A, // ......@* + /* 02D8 */ 0xCD, 0x14, 0x2C, 0xE3, 0x14, 0xAC, 0x4E, 0x88, // ..,...N. + /* 02E0 */ 0x5C, 0x06, 0x85, 0x44, 0x40, 0x68, 0x64, 0x86, // \..D@hd. + /* 02E8 */ 0xF3, 0x21, 0xD1, 0x60, 0x06, 0xF1, 0xF9, 0xC0, // .!.`.... + /* 02F0 */ 0x67, 0x0A, 0x9F, 0x9C, 0xF8, 0xFF, 0xFF, 0xE4, // g....... + /* 02F8 */ 0x04, 0x9E, 0x83, 0xC9, 0x43, 0x05, 0x2C, 0x44, // ....C.,D + /* 0300 */ 0x9F, 0x16, 0x38, 0x9C, 0xCF, 0x2C, 0x1C, 0xCE, // ..8..,.. + /* 0308 */ 0x47, 0x12, 0x7E, 0x80, 0xE4, 0x47, 0x25, 0x70, // G.~..G%p + /* 0310 */ 0x09, 0x3C, 0x34, 0x80, 0x02, 0xC8, 0xF7, 0x03, // .<4..... + /* 0318 */ 0x9F, 0x03, 0x9E, 0x11, 0xD8, 0x1C, 0x1E, 0x09, // ........ + /* 0320 */ 0x7C, 0x20, 0x60, 0xF0, 0x3C, 0xDA, 0xA8, 0xE8, // | `.<... + /* 0328 */ 0xD1, 0xC6, 0xC3, 0xE3, 0x47, 0x06, 0xCF, 0xE7, // ....G... + /* 0330 */ 0x81, 0xE0, 0x28, 0x1F, 0x09, 0x70, 0x18, 0xEF, // ..(..p.. + /* 0338 */ 0x17, 0x1E, 0xA2, 0x4F, 0x39, 0xB0, 0x26, 0x72, // ...O9.&r + /* 0340 */ 0xD4, 0x16, 0x7D, 0x22, 0x10, 0xE8, 0x33, 0x17, // ..}"..3. + /* 0348 */ 0xE6, 0x94, 0x03, 0x9C, 0x82, 0x8F, 0x1E, 0x15, // ........ + /* 0350 */ 0xF5, 0x40, 0x0A, 0xDA, 0x93, 0x82, 0xCF, 0x0A, // .@...... + /* 0358 */ 0x3E, 0x7C, 0xC1, 0xFF, 0xFF, 0x1F, 0xBE, 0xE0, // >|...... + /* 0360 */ 0xCC, 0xEB, 0x65, 0xCD, 0x07, 0x8E, 0x38, 0x67, // ..e...8g + /* 0368 */ 0x71, 0xBA, 0xEF, 0x16, 0xF8, 0x13, 0x29, 0x30, // q.....)0 + /* 0370 */ 0x0B, 0x72, 0x22, 0x45, 0xC1, 0xF8, 0x44, 0x0A, // .r"E..D. + /* 0378 */ 0xD8, 0xBC, 0x05, 0x60, 0xAF, 0x0B, 0x4F, 0x22, // ...`..O" + /* 0380 */ 0x30, 0xCE, 0x11, 0xCF, 0x58, 0x30, 0x0F, 0x55, // 0...X0.U + /* 0388 */ 0xA7, 0xF8, 0x52, 0xF5, 0xC6, 0x10, 0xE1, 0xC9, // ..R..... + /* 0390 */ 0xEA, 0x35, 0xEA, 0x01, 0xCB, 0x60, 0x2F, 0x02, // .5...`/. + /* 0398 */ 0x86, 0x79, 0xC5, 0xF2, 0xE9, 0x2A, 0xC4, 0x03, // .y...*.. + /* 03A0 */ 0x96, 0xCF, 0x5A, 0xD1, 0x42, 0x84, 0x8C, 0x12, // ..Z.B... + /* 03A8 */ 0xEC, 0x15, 0xEB, 0x55, 0xC6, 0x47, 0x2A, 0x83, // ...U.G*. + /* 03B0 */ 0x07, 0x0C, 0x1B, 0x2D, 0x52, 0x84, 0x47, 0x2C, // ...-R.G, + /* 03B8 */ 0xFC, 0xFF, 0xFF, 0x88, 0x05, 0x1E, 0x09, 0x07, // ........ + /* 03C0 */ 0x52, 0x80, 0x2A, 0x03, 0xC7, 0x1D, 0x48, 0x81, // R.*...H. + /* 03C8 */ 0xFD, 0x69, 0x02, 0x7F, 0xBD, 0xF0, 0x78, 0xB0, // .i....x. + /* 03D0 */ 0xFF, 0xFF, 0x73, 0x00, 0xF8, 0x0E, 0x31, 0xC0, // ..s...1. + /* 03D8 */ 0x60, 0xC0, 0x30, 0x0E, 0x31, 0xC0, 0x43, 0xF0, // `.0.1.C. + /* 03E0 */ 0xC9, 0x0C, 0xF4, 0xC7, 0x1D, 0xF8, 0xE3, 0xE0, // ........ + /* 03E8 */ 0x19, 0x9F, 0x1C, 0x26, 0x50, 0x98, 0x13, 0x29, // ...&P..) + /* 03F0 */ 0x0A, 0xC6, 0x27, 0x52, 0xC0, 0xD9, 0xFF, 0xFF, // ..'R.... + /* 03F8 */ 0x70, 0x05, 0x86, 0xE3, 0x0D, 0xF8, 0x6F, 0x33, // p.....o3 + /* 0400 */ 0x3E, 0x84, 0xFA, 0x7C, 0xE3, 0x0B, 0xA9, 0x21, // >..|...! + /* 0408 */ 0x5E, 0x6C, 0xDE, 0xD4, 0x5E, 0x09, 0x5E, 0xDF, // ^l..^.^. + /* 0410 */ 0xD9, 0xB5, 0xE6, 0xF5, 0xDD, 0xA7, 0x82, 0x27, // .......' + /* 0418 */ 0xD1, 0x08, 0x21, 0xA3, 0xBC, 0xE4, 0x18, 0x24, // ..!....$ + /* 0420 */ 0xC4, 0xEB, 0xA8, 0x01, 0x83, 0x05, 0x89, 0x78, // .......x + /* 0428 */ 0x0A, 0x4F, 0x3B, 0x8F, 0x37, 0xE0, 0x15, 0x75, // .O;.7..u + /* 0430 */ 0x20, 0x05, 0xE8, 0xF1, 0xFF, 0x3F, 0x90, 0x02, // ....?.. + /* 0438 */ 0x83, 0x7B, 0x0A, 0xEC, 0x73, 0x0A, 0xE0, 0x29, // .{..s..) + /* 0440 */ 0xF9, 0x89, 0x94, 0xA6, 0x3E, 0x91, 0xA2, 0x15, // ....>... + /* 0448 */ 0x01, 0x69, 0xAA, 0x60, 0x21, 0x98, 0xFE, 0x44, // .i.`!..D + /* 0450 */ 0x4A, 0x0F, 0x06, 0xCE, 0x4D, 0xA2, 0xE4, 0x43, // J...M..C + /* 0458 */ 0xA3, 0x70, 0xCE, 0x7A, 0x20, 0xA1, 0x20, 0x06, // .p.z . . + /* 0460 */ 0x74, 0x90, 0x43, 0x05, 0xFA, 0xAC, 0xE2, 0x03, // t.C..... + /* 0468 */ 0xC9, 0x81, 0x3C, 0x22, 0x7A, 0x58, 0x3E, 0x54, // ..<"zX>T + /* 0470 */ 0xFA, 0xAE, 0xE2, 0x73, 0x88, 0x8F, 0x14, 0x1E, // ...s.... + /* 0478 */ 0xBF, 0x0F, 0x0B, 0xFC, 0x3F, 0xE3, 0xE3, 0x28, // ....?..( + /* 0480 */ 0x03, 0xAF, 0xE6, 0xBC, 0x82, 0x02, 0xF3, 0x69, // .......i + /* 0488 */ 0x14, 0xA3, 0xEB, 0x3E, 0x01, 0x92, 0xFF, 0xFF, // ...>.... + /* 0490 */ 0xFC, 0xB8, 0xBE, 0xC3, 0x28, 0xC8, 0xD1, 0x79, // ....(..y + /* 0498 */ 0xF8, 0xC9, 0xA2, 0xE2, 0x4E, 0x96, 0x82, 0x78, // ....N..x + /* 04A0 */ 0xB2, 0x8E, 0x32, 0x59, 0xF4, 0x4C, 0x7C, 0xBB, // ..2Y.L|. + /* 04A8 */ 0xF0, 0x8C, 0xDE, 0xBB, 0x7C, 0x83, 0x65, 0x37, // ....|.e7 + /* 04B0 */ 0x59, 0x78, 0x97, 0x81, 0x90, 0x8F, 0x06, 0xBE, // Yx...... + /* 04B8 */ 0xC9, 0xC2, 0x1D, 0x8B, 0x2F, 0x23, 0xE0, 0xBB, // ..../#.. + /* 04C0 */ 0xC9, 0x02, 0x5E, 0x47, 0xE3, 0xB3, 0x05, 0x3B, // ..^G...; + /* 04C8 */ 0x85, 0xF8, 0xBA, 0x06, 0x4B, 0xA1, 0x4D, 0x9F, // ....K.M. + /* 04D0 */ 0x1A, 0x8D, 0x5A, 0xFD, 0xFF, 0x1B, 0x94, 0xA9, // ..Z..... + /* 04D8 */ 0x51, 0xA6, 0x41, 0xAD, 0x3E, 0x95, 0x1A, 0x33, // Q.A.>..3 + /* 04E0 */ 0x76, 0xA1, 0xB0, 0xB8, 0x0B, 0x06, 0x95, 0xB4, // v....... + /* 04E8 */ 0x2C, 0x8D, 0xCB, 0x81, 0x40, 0x68, 0x80, 0x5B, // ,...@h.[ + /* 04F0 */ 0xA9, 0x40, 0x1C, 0xFA, 0x0B, 0xA4, 0x53, 0x02, // .@....S. + /* 04F8 */ 0xF9, 0x6A, 0x09, 0xC8, 0x62, 0x57, 0x25, 0x10, // .j..bW%. + /* 0500 */ 0xCB, 0x54, 0x01, 0xD1, 0xC8, 0xDD, 0xC2, 0x20, // .T..... + /* 0508 */ 0x02, 0x72, 0xBC, 0x4F, 0x8D, 0x40, 0x1D, 0x49, // .r.O.@.I + /* 0510 */ 0x07, 0x10, 0x13, 0xE4, 0x63, 0xAC, 0xF4, 0x25, // ....c..% + /* 0518 */ 0x20, 0x10, 0xCB, 0xA6, 0x15, 0xA0, 0xE5, 0x3A, // ......: + /* 0520 */ 0x01, 0x62, 0x61, 0x41, 0x68, 0xC0, 0x5F, 0xB5, // .baAh._. + /* 0528 */ 0x86, 0xE0, 0xB4, 0x20, 0x02, 0x72, 0x32, 0x2D, // ... .r2- + /* 0530 */ 0x40, 0x2C, 0x27, 0x88, 0x80, 0xFC, 0xFF, 0x07 // @,'..... + }) + } + + Device (WMI3) + { + Name (_HID, EisaId ("PNP0C14") /* Windows Management Instrumentation Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_WDG, /**** Is ResourceTemplate, but EndTag not at buffer end ****/ Buffer (0x3C) + { + /* 0000 */ 0x79, 0x36, 0x4D, 0x8F, 0x9E, 0x74, 0x79, 0x44, // y6M..tyD + /* 0008 */ 0x9B, 0x16, 0xC6, 0x26, 0x01, 0xFD, 0x25, 0xF0, // ...&..%. + /* 0010 */ 0x41, 0x42, 0x01, 0x02, 0x69, 0xE8, 0xD2, 0x85, // AB..i... + /* 0018 */ 0x5A, 0x36, 0xCE, 0x4A, 0xA4, 0xD3, 0xCD, 0x69, // Z6.J...i + /* 0020 */ 0x2B, 0x16, 0x98, 0xA0, 0x41, 0x43, 0x01, 0x02, // +...AC.. + /* 0028 */ 0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11, // !...f... + /* 0030 */ 0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, // ......). + /* 0038 */ 0x42, 0x43, 0x01, 0x00 // BC.. + }) + Method (WMAB, 3, NotSerialized) + { + CreateByteField (Arg2, 0x00, ASS0) + CreateWordField (Arg2, 0x01, ASS1) + CreateByteField (Arg2, 0x03, ASS2) + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + Store (ASS0, \WASB) + Store (ASS1, \WASI) + Store (ASS2, \WASD) + \WMIS (0x0B, 0x00) + Store (\WASS, Local0) + Release (\_SB.WMI1.MWMI) + Return (Local0) + } + + Method (WMAC, 3, NotSerialized) + { + CreateByteField (Arg2, 0x00, ASS0) + CreateWordField (Arg2, 0x01, ASS1) + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + Store (ASS0, \WASB) + Store (ASS1, \WASI) + \WMIS (0x0C, Arg1) + Store (\WASS, Local0) + Release (\_SB.WMI1.MWMI) + Return (Local0) + } + + Name (WQBC, Buffer (0x040A) + { + /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00, // FOMB.... + /* 0008 */ 0xFA, 0x03, 0x00, 0x00, 0x32, 0x12, 0x00, 0x00, // ....2... + /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54, // DS...}.T + /* 0018 */ 0x98, 0xC3, 0x88, 0x00, 0x01, 0x06, 0x18, 0x42, // .......B + /* 0020 */ 0x10, 0x07, 0x10, 0x8A, 0x0D, 0x21, 0x02, 0x0B, // .....!.. + /* 0028 */ 0x83, 0x50, 0x50, 0x18, 0x14, 0xA0, 0x45, 0x41, // .PP...EA + /* 0030 */ 0xC8, 0x05, 0x14, 0x95, 0x02, 0x21, 0xC3, 0x02, // .....!.. + /* 0038 */ 0x14, 0x0B, 0x70, 0x2E, 0x40, 0xBA, 0x00, 0xE5, // ..p.@... + /* 0040 */ 0x28, 0x72, 0x0C, 0x22, 0x02, 0xF7, 0xEF, 0x0F, // (r.".... + /* 0048 */ 0x31, 0x10, 0x88, 0x14, 0x40, 0x48, 0x28, 0x84, // 1...@H(. + /* 0050 */ 0x44, 0x00, 0x53, 0x21, 0x70, 0x84, 0xA0, 0x5F, // D.S!p.._ + /* 0058 */ 0x01, 0x08, 0x1D, 0x0A, 0x90, 0x29, 0xC0, 0xA0, // .....).. + /* 0060 */ 0x00, 0xA7, 0x08, 0x22, 0x88, 0xD2, 0xB2, 0x00, // ...".... + /* 0068 */ 0xDD, 0x02, 0x7C, 0x0B, 0xD0, 0x0E, 0x21, 0xB4, // ..|...!. + /* 0070 */ 0x58, 0x07, 0x11, 0x21, 0xD2, 0x31, 0x34, 0x29, // X..!.14) + /* 0078 */ 0x40, 0xA2, 0x00, 0x8B, 0x02, 0x64, 0xC3, 0xC8, // @....d.. + /* 0080 */ 0x36, 0x22, 0x99, 0x87, 0x45, 0x0E, 0x02, 0x25, // 6"..E..% + /* 0088 */ 0x66, 0x10, 0x28, 0x9D, 0xE0, 0xB2, 0x89, 0xAB, // f.(..... + /* 0090 */ 0x41, 0x9C, 0x4C, 0x94, 0xF3, 0x88, 0x92, 0xE0, // A.L..... + /* 0098 */ 0xA8, 0x0E, 0x22, 0x42, 0xEC, 0x72, 0x05, 0x48, // .."B.r.H + /* 00A0 */ 0x1E, 0x80, 0x34, 0x4F, 0x4C, 0xD6, 0xE7, 0xA0, // ..4OL... + /* 00A8 */ 0x91, 0xB1, 0x11, 0xF0, 0x94, 0x1A, 0x40, 0x58, // ......@X + /* 00B0 */ 0xA0, 0x75, 0x2A, 0xE0, 0x7A, 0x0D, 0x43, 0x3D, // .u*.z.C= + /* 00B8 */ 0x80, 0x48, 0xCE, 0x58, 0x51, 0xC0, 0xF6, 0x3A, // .H.XQ..: + /* 00C0 */ 0x11, 0x8D, 0xEA, 0x40, 0x99, 0x24, 0x38, 0xD4, // ...@.$8. + /* 00C8 */ 0x30, 0x3D, 0xB5, 0xE6, 0x27, 0xA6, 0x89, 0x9C, // 0=..'... + /* 00D0 */ 0x5A, 0xD3, 0x43, 0x16, 0x24, 0x93, 0x36, 0x14, // Z.C.$.6. + /* 00D8 */ 0xD4, 0xD8, 0x3D, 0xAD, 0x93, 0xF2, 0x4C, 0x23, // ..=...L# + /* 00E0 */ 0x1E, 0x94, 0x61, 0x12, 0x78, 0x14, 0x0C, 0x8D, // ..a.x... + /* 00E8 */ 0x13, 0x94, 0x75, 0x22, 0xA0, 0x03, 0xE5, 0x80, // ..u".... + /* 00F0 */ 0x27, 0xE1, 0x39, 0x16, 0x2F, 0x40, 0xF8, 0x88, // '.9./@.. + /* 00F8 */ 0xC9, 0xB4, 0x4D, 0xE0, 0x33, 0x81, 0x87, 0x79, // ..M.3..y + /* 0100 */ 0xCC, 0xD8, 0x11, 0x85, 0x0B, 0x78, 0x3E, 0xC7, // .....x>. + /* 0108 */ 0x10, 0x39, 0xEE, 0xA1, 0xC6, 0x38, 0x8A, 0xC8, // .9...8.. + /* 0110 */ 0x47, 0x60, 0x24, 0x03, 0xC5, 0x2B, 0x08, 0x89, // G`$..+.. + /* 0118 */ 0x80, 0xF8, 0x76, 0x70, 0x70, 0x91, 0xFC, 0xFF, // ..vpp... + /* 0120 */ 0x47, 0x89, 0x11, 0x2A, 0xC6, 0xDB, 0x00, 0x6E, // G..*...n + /* 0128 */ 0x5E, 0x09, 0x8A, 0x1E, 0x07, 0x4A, 0x06, 0x84, // ^....J.. + /* 0130 */ 0x3C, 0x0A, 0xB0, 0x7A, 0x28, 0x20, 0x04, 0x16, // <..z( .. + /* 0138 */ 0x27, 0x40, 0xE3, 0x38, 0x05, 0xD3, 0x99, 0x00, // '@.8.... + /* 0140 */ 0x6D, 0x02, 0xBC, 0x09, 0x30, 0x27, 0xC0, 0x16, // m...0'.. + /* 0148 */ 0x86, 0x80, 0x82, 0x9C, 0x59, 0x94, 0x20, 0x11, // ....Y. . + /* 0150 */ 0x42, 0x31, 0x88, 0x0A, 0x05, 0x18, 0x43, 0x14, // B1....C. + /* 0158 */ 0xCA, 0x3B, 0x41, 0x8C, 0xCA, 0x20, 0x74, 0x82, // .;A.. t. + /* 0160 */ 0x08, 0x14, 0x3D, 0x78, 0x98, 0xD6, 0x40, 0x74, // ..=x..@t + /* 0168 */ 0x89, 0xF0, 0xC8, 0xB1, 0x47, 0x00, 0x9F, 0x19, // ....G... + /* 0170 */ 0xCE, 0xE9, 0x04, 0x1F, 0x01, 0xDE, 0x16, 0x4C, // .......L + /* 0178 */ 0xE0, 0x79, 0xBF, 0x24, 0x1C, 0x6A, 0xD8, 0x03, // .y.$.j.. + /* 0180 */ 0x8E, 0x1A, 0xE3, 0x28, 0x12, 0x58, 0xD0, 0x33, // ...(.X.3 + /* 0188 */ 0x42, 0x16, 0x40, 0x14, 0x09, 0x1E, 0x75, 0x64, // B.@...ud + /* 0190 */ 0xF0, 0xE1, 0xC0, 0x23, 0x3B, 0x72, 0xCF, 0xF0, // ...#;r.. + /* 0198 */ 0x04, 0x82, 0x1C, 0xC2, 0x11, 0x3C, 0x36, 0x3C, // .....<6< + /* 01A0 */ 0x15, 0x78, 0x0C, 0xEC, 0xBA, 0xE0, 0x73, 0x80, // .x....s. + /* 01A8 */ 0x8F, 0x09, 0x78, 0xD7, 0x80, 0x9A, 0xF3, 0xD3, // ..x..... + /* 01B0 */ 0x01, 0x9B, 0x72, 0x38, 0xCC, 0x70, 0x3D, 0xFD, // ..r8.p=. + /* 01B8 */ 0x70, 0x27, 0x70, 0xD2, 0x06, 0x64, 0xB3, 0xF3, // p'p..d.. + /* 01C0 */ 0xE0, 0x70, 0xE3, 0x3C, 0x99, 0x23, 0x2B, 0x55, // .p.<.#+U + /* 01C8 */ 0x80, 0xD9, 0x13, 0x82, 0x4E, 0x13, 0x3E, 0x73, // ....N.>s + /* 01D0 */ 0xB0, 0xBB, 0xC0, 0xF9, 0xF4, 0x0C, 0x49, 0xE4, // ......I. + /* 01D8 */ 0x0F, 0x02, 0x35, 0x32, 0x43, 0xFB, 0x2C, 0xF0, // ..52C.,. + /* 01E0 */ 0xEA, 0x61, 0xC8, 0x87, 0x85, 0xC3, 0x62, 0x62, // .a....bb + /* 01E8 */ 0xCF, 0x1E, 0x74, 0x3C, 0xE0, 0x3F, 0x25, 0x3C, // ..t<.?%< + /* 01F0 */ 0x6C, 0x78, 0xFA, 0x9E, 0xAF, 0x09, 0xA2, 0x3D, // lx.....= + /* 01F8 */ 0x8F, 0x80, 0xE1, 0xFF, 0x7F, 0x1E, 0x81, 0x39, // .......9 + /* 0200 */ 0x9C, 0x07, 0x84, 0x27, 0x07, 0x76, 0x80, 0xC0, // ...'.v.. + /* 0208 */ 0x1C, 0x48, 0x80, 0xC9, 0xF9, 0x02, 0x77, 0x28, // .H....w( + /* 0210 */ 0xF0, 0x10, 0xF8, 0x00, 0x1E, 0x25, 0xCE, 0xD1, // .....%.. + /* 0218 */ 0x4A, 0x67, 0x86, 0x3C, 0xB9, 0x80, 0x2D, 0xFB, // Jg.<..-. + /* 0220 */ 0x1B, 0x40, 0x07, 0x0F, 0xE7, 0x06, 0x91, 0x8D, // .@...... + /* 0228 */ 0x57, 0x80, 0x09, 0x74, 0x38, 0xB1, 0x1E, 0x20, // W..t8.. + /* 0230 */ 0x4D, 0x14, 0x0C, 0x04, 0xD3, 0xD3, 0x6B, 0x00, // M.....k. + /* 0238 */ 0x3E, 0x15, 0x38, 0x37, 0x89, 0x92, 0x0F, 0x8C, // >.87.... + /* 0240 */ 0xC2, 0x39, 0xEB, 0x79, 0x84, 0x82, 0x18, 0xD0, // .9.y.... + /* 0248 */ 0x41, 0x20, 0xE4, 0xE4, 0xA0, 0x80, 0x3A, 0xAA, // A ....:. + /* 0250 */ 0xF8, 0x3C, 0x72, 0xAA, 0x0F, 0x3D, 0x9E, 0x94, // .O + /* 0260 */ 0x78, 0xF4, 0x3E, 0x29, 0xF0, 0xEF, 0x8C, 0xAF, // x.>).... + /* 0268 */ 0x0E, 0x46, 0xB7, 0x9A, 0xE3, 0x0A, 0x0A, 0xCC, // .F...... + /* 0270 */ 0x67, 0x11, 0x4E, 0x50, 0xD7, 0x6D, 0x01, 0xFA, // g.NP.m.. + /* 0278 */ 0x29, 0xE0, 0x08, 0x3C, 0x94, 0x77, 0x92, 0xC7, // )..<.w.. + /* 0280 */ 0x90, 0x04, 0xF5, 0x9D, 0x16, 0x40, 0x01, 0xE4, // .....@.. + /* 0288 */ 0x9B, 0x81, 0x4F, 0x02, 0x21, 0xFE, 0xFF, 0x4F, // ..O.!..O + /* 0290 */ 0x07, 0x1E, 0xC3, 0xC3, 0x80, 0xD1, 0x8C, 0xCE, // ........ + /* 0298 */ 0xC3, 0x4F, 0x16, 0x15, 0x77, 0xB2, 0x14, 0xC4, // .O..w... + /* 02A0 */ 0x93, 0x75, 0x94, 0xC9, 0xA2, 0x67, 0xE2, 0xAB, // .u...g.. + /* 02A8 */ 0x85, 0x27, 0x74, 0x4A, 0x41, 0xCE, 0xD1, 0x13, // .'tJA... + /* 02B0 */ 0xF6, 0x55, 0x04, 0xD6, 0xF9, 0x20, 0xE4, 0x8B, // .U... .. + /* 02B8 */ 0x81, 0xA7, 0x61, 0x38, 0x4F, 0x96, 0xC3, 0x79, // ..a8O..y + /* 02C0 */ 0xB2, 0x7C, 0x2C, 0xBE, 0x6A, 0xC0, 0x1F, 0x2D, // .|,.j..- + /* 02C8 */ 0x96, 0xA0, 0xC0, 0xD9, 0x82, 0x1C, 0x1E, 0x13, // ........ + /* 02D0 */ 0x6F, 0x54, 0xF4, 0x46, 0xE4, 0xE1, 0xF1, 0xCB, // oT.F.... + /* 02D8 */ 0x81, 0xE7, 0xF3, 0x8C, 0x70, 0x94, 0x6F, 0x12, // ....p.o. + /* 02E0 */ 0x38, 0x8C, 0xC7, 0x12, 0x0F, 0xD1, 0x97, 0x23, // 8......# + /* 02E8 */ 0x58, 0x13, 0x39, 0x69, 0xDF, 0x16, 0x4E, 0x36, // X.9i..N6 + /* 02F0 */ 0xE8, 0x4B, 0x10, 0xBB, 0x1C, 0x01, 0xBF, 0x88, // .K...... + /* 02F8 */ 0x26, 0x86, 0xC1, 0x22, 0x2D, 0x45, 0x11, 0x17, // &.."-E.. + /* 0300 */ 0x45, 0x61, 0x7C, 0xC5, 0x82, 0xFD, 0xFF, 0xBF, // Ea|..... + /* 0308 */ 0x62, 0x01, 0x16, 0x04, 0x0F, 0x1B, 0x34, 0x87, // b.....4. + /* 0310 */ 0x83, 0x97, 0x1E, 0x36, 0x6B, 0x38, 0x07, 0x99, // ...6k8.. + /* 0318 */ 0xD3, 0xF1, 0x48, 0x4E, 0x1B, 0xC6, 0x1D, 0x0B, // ..HN.... + /* 0320 */ 0xFE, 0x9D, 0xEA, 0xA9, 0xCA, 0xD3, 0x8A, 0xF2, // ........ + /* 0328 */ 0x64, 0xF5, 0x7A, 0xE5, 0x63, 0x96, 0xA1, 0xCE, // d.z.c... + /* 0330 */ 0xE0, 0x1D, 0xCB, 0xB7, 0x3C, 0x4F, 0x21, 0x4A, // ......b..Y. + /* 0400 */ 0xA3, 0x40, 0x40, 0xD6, 0x0A, 0x22, 0x20, 0xFF, // .@@.." . + /* 0408 */ 0xFF, 0x01 // .. + }) + } + + Device (WMI5) + { + Name (_HID, EisaId ("PNP0C14") /* Windows Management Instrumentation Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_WDG, Buffer (0x28) + { + /* 0000 */ 0x5E, 0xBD, 0xD0, 0x74, 0x8A, 0x6E, 0x09, 0x48, // ^..t.n.H + /* 0008 */ 0xA7, 0x3A, 0xC1, 0x48, 0xD0, 0x8E, 0xEE, 0xBE, // .:.H.... + /* 0010 */ 0x41, 0x45, 0x01, 0x02, 0x21, 0x12, 0x90, 0x05, // AE..!... + /* 0018 */ 0x66, 0xD5, 0xD1, 0x11, 0xB2, 0xF0, 0x00, 0xA0, // f....... + /* 0020 */ 0xC9, 0x06, 0x29, 0x10, 0x42, 0x45, 0x01, 0x00 // ..).BE.. + }) + Method (WMAE, 3, Serialized) + { + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + CreateDWordField (Arg2, 0x00, REQP) + Switch (REQP) + { + Case (0x0101) + { + \_SB.PCI0.LPCB.EC.HKEY.SCRQ (Or (0x80000000, 0x0101)) + } + Case (0x0102) + { + \_SB.PCI0.LPCB.EC.HKEY.SCRQ (Or (0x80000000, 0x0102)) + } + Default + { + Noop + } + + } + + Release (\_SB.WMI1.MWMI) + Return (0x00) + } + + Name (WQBE, Buffer (0x0315) + { + /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00, // FOMB.... + /* 0008 */ 0x05, 0x03, 0x00, 0x00, 0xBE, 0x07, 0x00, 0x00, // ........ + /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54, // DS...}.T + /* 0018 */ 0xA8, 0xDC, 0x83, 0x00, 0x01, 0x06, 0x18, 0x42, // .......B + /* 0020 */ 0x10, 0x05, 0x10, 0x8A, 0x0D, 0x21, 0x02, 0x0B, // .....!.. + /* 0028 */ 0x83, 0x50, 0x50, 0x18, 0x14, 0xA0, 0x45, 0x41, // .PP...EA + /* 0030 */ 0xC8, 0x05, 0x14, 0x95, 0x02, 0x21, 0xC3, 0x02, // .....!.. + /* 0038 */ 0x14, 0x0B, 0x70, 0x2E, 0x40, 0xBA, 0x00, 0xE5, // ..p.@... + /* 0040 */ 0x28, 0x72, 0x0C, 0x22, 0x02, 0xF7, 0xEF, 0x0F, // (r.".... + /* 0048 */ 0x31, 0xD0, 0x18, 0xA8, 0x50, 0x08, 0x89, 0x00, // 1...P... + /* 0050 */ 0xA6, 0x42, 0xE0, 0x08, 0x41, 0xBF, 0x02, 0x10, // .B..A... + /* 0058 */ 0x3A, 0x14, 0x20, 0x53, 0x80, 0x41, 0x01, 0x4E, // :. S.A.N + /* 0060 */ 0x11, 0x44, 0x10, 0xA5, 0x65, 0x01, 0xBA, 0x05, // .D..e... + /* 0068 */ 0xF8, 0x16, 0xA0, 0x1D, 0x42, 0x68, 0x91, 0x9A, // ....Bh.. + /* 0070 */ 0x9F, 0x04, 0x81, 0x6A, 0x5B, 0x80, 0x45, 0x01, // ...j[.E. + /* 0078 */ 0xB2, 0x41, 0x08, 0xA0, 0xC7, 0xC1, 0x44, 0x0E, // .A....D. + /* 0080 */ 0x02, 0x25, 0x66, 0x10, 0x28, 0x9D, 0x73, 0x90, // .%f.(.s. + /* 0088 */ 0x4D, 0x60, 0xE1, 0x9F, 0x4C, 0x94, 0xF3, 0x88, // M`..L... + /* 0090 */ 0x92, 0xE0, 0xA8, 0x0E, 0x22, 0x42, 0xF0, 0x72, // ...."B.r + /* 0098 */ 0x05, 0x48, 0x9E, 0x80, 0x34, 0x4F, 0x4C, 0xD6, // .H..4OL. + /* 00A0 */ 0x07, 0xA1, 0x21, 0xB0, 0x11, 0x70, 0xE5, 0x1A, // ..!..p.. + /* 00A8 */ 0x40, 0x58, 0x88, 0x75, 0x2A, 0x8A, 0x03, 0x18, // @X.u*... + /* 00B0 */ 0xCC, 0xA6, 0x25, 0x40, 0xCE, 0x58, 0x51, 0xC0, // ..%@.XQ. + /* 00B8 */ 0xF6, 0x3A, 0x11, 0x99, 0x1C, 0x28, 0x95, 0x04, // .:...(.. + /* 00C0 */ 0x87, 0x1A, 0xA6, 0x25, 0xCE, 0x4E, 0x23, 0x3B, // ...%.N#; + /* 00C8 */ 0x91, 0x63, 0x6B, 0x7A, 0xC8, 0x82, 0x64, 0xD2, // .ckz..d. + /* 00D0 */ 0x86, 0x82, 0x1A, 0xBB, 0xA7, 0x75, 0x52, 0x9E, // .....uR. + /* 00D8 */ 0x69, 0xC4, 0x83, 0x32, 0x4C, 0x02, 0x8F, 0x82, // i..2L... + /* 00E0 */ 0xA1, 0x71, 0x82, 0xB2, 0x20, 0xB4, 0x23, 0x3A, // .q.. .#: + /* 00E8 */ 0x50, 0x02, 0x78, 0x12, 0x9E, 0x63, 0xF1, 0x02, // P.x..c.. + /* 00F0 */ 0x84, 0xCF, 0x98, 0x4C, 0x3B, 0x46, 0x02, 0x9F, // ...L;F.. + /* 00F8 */ 0x09, 0x3C, 0x9A, 0x63, 0xC6, 0x02, 0x85, 0x0B, // .<.c.... + /* 0100 */ 0x78, 0x3E, 0xC7, 0x10, 0x39, 0xEE, 0xA1, 0xC6, // x>..9... + /* 0108 */ 0x38, 0x8A, 0xC8, 0x09, 0x4A, 0x1D, 0x88, 0x04, // 8...J... + /* 0110 */ 0x09, 0xD0, 0x38, 0x06, 0x61, 0xB4, 0x8A, 0xA6, // ..8.a... + /* 0118 */ 0xF9, 0x1C, 0xDA, 0x83, 0x80, 0x09, 0xFC, 0xFF, // ........ + /* 0120 */ 0x17, 0x3D, 0x02, 0x94, 0x0C, 0x08, 0x79, 0x44, // .=....yD + /* 0128 */ 0xD4, 0xA0, 0x4E, 0xC3, 0x04, 0xBD, 0x4D, 0x50, // ..N...MP + /* 0130 */ 0x28, 0xAF, 0x0B, 0x15, 0x62, 0xC8, 0xDA, 0x88, // (...b... + /* 0138 */ 0x64, 0x4B, 0x80, 0x36, 0x0C, 0x89, 0x3B, 0x08, // dK.6..;. + /* 0140 */ 0x08, 0x25, 0x5A, 0x90, 0x68, 0xCD, 0xA1, 0x08, // .%Z.h... + /* 0148 */ 0x27, 0x68, 0x67, 0x50, 0xE4, 0x36, 0xD0, 0x18, // 'hgP.6.. + /* 0150 */ 0x18, 0x81, 0x36, 0x46, 0xD4, 0x08, 0x86, 0x7F, // ..6F.... + /* 0158 */ 0x25, 0xF0, 0x98, 0xB1, 0x83, 0xF7, 0x69, 0xE1, // %.....i. + /* 0160 */ 0xB8, 0x4E, 0xED, 0x90, 0x1E, 0x14, 0x4C, 0xE0, // .N....L. + /* 0168 */ 0x19, 0xBF, 0x1E, 0x3C, 0x1A, 0x04, 0x3F, 0xD4, // ...<..?. + /* 0170 */ 0xA8, 0x87, 0xE1, 0x41, 0x91, 0x07, 0x84, 0x2C, // ...A..., + /* 0178 */ 0x80, 0x28, 0x12, 0x3C, 0xEA, 0xB0, 0xE0, 0x63, // .(.<...c + /* 0180 */ 0x81, 0x47, 0x76, 0xCC, 0x9E, 0xE1, 0x09, 0x04, // .Gv..... + /* 0188 */ 0x39, 0x84, 0x23, 0x78, 0x60, 0x78, 0x1E, 0xF0, // 9.#x`x.. + /* 0190 */ 0x18, 0xD8, 0x45, 0xC1, 0x27, 0x00, 0x1F, 0x10, // ..E.'... + /* 0198 */ 0xF0, 0xAE, 0x01, 0x75, 0x33, 0x78, 0x2E, 0x60, // ...u3x.` + /* 01A0 */ 0x53, 0x0E, 0x87, 0x19, 0xAE, 0x47, 0x1F, 0xEE, // S....G.. + /* 01A8 */ 0x04, 0x4E, 0xFB, 0x01, 0x83, 0x1F, 0x36, 0x3C, // .N....6< + /* 01B0 */ 0x38, 0xDC, 0x38, 0x4F, 0xE6, 0xC8, 0x5E, 0x01, // 8.8O..^. + /* 01B8 */ 0x9A, 0x3D, 0x03, 0x68, 0x92, 0x3E, 0x6D, 0xB0, // .=.h.>m. + /* 01C0 */ 0x8B, 0xC0, 0xF9, 0xF4, 0x0C, 0x49, 0xE4, 0x0F, // .....I.. + /* 01C8 */ 0x02, 0x35, 0x32, 0x43, 0x7B, 0xD4, 0x2F, 0x1D, // .52C{./. + /* 01D0 */ 0x86, 0x7C, 0x4C, 0x38, 0x2C, 0x26, 0xF6, 0xD4, // .|L8,&.. + /* 01D8 */ 0x41, 0xC7, 0x03, 0xFE, 0xCB, 0xC8, 0x63, 0x86, // A.....c. + /* 01E0 */ 0xA7, 0xEF, 0xF9, 0x9A, 0xA0, 0xC0, 0x93, 0x08, // ........ + /* 01E8 */ 0x08, 0xC7, 0xF0, 0xC6, 0xF0, 0xD0, 0xD0, 0xFB, // ........ + /* 01F0 */ 0x59, 0x41, 0xFF, 0x7F, 0x90, 0xA7, 0x10, 0x60, // YA.....` + /* 01F8 */ 0x02, 0x75, 0x08, 0x98, 0xF3, 0x80, 0x87, 0xC0, // .u...... + /* 0200 */ 0x07, 0x70, 0x28, 0xA7, 0x67, 0xA5, 0x93, 0x42, // .p(.g..B + /* 0208 */ 0x1E, 0x57, 0xC0, 0x96, 0x72, 0xF9, 0x3A, 0x6D, // .W..r.:m + /* 0210 */ 0x38, 0x21, 0x88, 0x6C, 0x3C, 0x00, 0x3C, 0x56, // 8!.l<..x@ + /* 0240 */ 0x1E, 0x94, 0xAF, 0x26, 0x3E, 0x7A, 0xF8, 0x14, // ...&>z.. + /* 0248 */ 0xE1, 0x81, 0xFB, 0x7C, 0xC0, 0xBF, 0x2F, 0xBE, // ...|../. + /* 0250 */ 0x30, 0x18, 0xDD, 0x6A, 0x8E, 0x27, 0x28, 0x30, // 0..j.'(0 + /* 0258 */ 0x9F, 0x40, 0x38, 0x41, 0x5D, 0x77, 0x04, 0xE8, // .@8A]w.. + /* 0260 */ 0x07, 0x80, 0x23, 0xF0, 0x50, 0x9E, 0x40, 0x2A, // ..#.P.@* + /* 0268 */ 0xC3, 0x91, 0xBE, 0x33, 0x02, 0x28, 0x80, 0x7C, // ...3.(.| + /* 0270 */ 0x29, 0xF0, 0x21, 0xE0, 0xC1, 0x80, 0x8D, 0xE1, // ).!..... + /* 0278 */ 0x39, 0xC0, 0x68, 0x46, 0xE7, 0xE1, 0x27, 0x8B, // 9.hF..'. + /* 0280 */ 0x8A, 0x3B, 0x59, 0x0A, 0xE2, 0xC9, 0x3A, 0xCA, // .;Y...:. + /* 0288 */ 0x64, 0x91, 0xFF, 0xFF, 0xAB, 0x05, 0xBB, 0x50, // d......P + /* 0290 */ 0x78, 0x42, 0xA7, 0x14, 0xE4, 0x1C, 0x3D, 0x61, // xB....=a + /* 0298 */ 0x5F, 0x40, 0x60, 0x1D, 0x0D, 0x42, 0x3E, 0x14, // _@`..B>. + /* 02A0 */ 0x78, 0x1A, 0x86, 0xF3, 0x64, 0x39, 0x9C, 0x27, // x...d9.' + /* 02A8 */ 0xCB, 0xC7, 0xE2, 0x0B, 0x06, 0xFC, 0xD1, 0x62, // .......b + /* 02B0 */ 0x2F, 0x18, 0x60, 0x99, 0x2D, 0x4C, 0x78, 0xCC, // /.`.-Lx. + /* 02B8 */ 0xD5, 0xC5, 0xA3, 0xF2, 0x0D, 0xC8, 0xC3, 0xE3, // ........ + /* 02C0 */ 0x97, 0x03, 0xCF, 0xE7, 0x19, 0xE1, 0x28, 0x9F, // ......(. + /* 02C8 */ 0x22, 0x70, 0x18, 0x0F, 0x23, 0x1E, 0xA2, 0x2F, // "p..#../ + /* 02D0 */ 0x43, 0xB0, 0x26, 0x72, 0xD2, 0xBE, 0x2D, 0x9C, // C.&r..-. + /* 02D8 */ 0x6C, 0xD0, 0xF8, 0x61, 0x7D, 0x19, 0x02, 0x1E, // l..a}... + /* 02E0 */ 0x0A, 0x6D, 0xFA, 0xD4, 0x68, 0xD4, 0xAA, 0x41, // .m..h..A + /* 02E8 */ 0x99, 0x1A, 0x65, 0x1A, 0xD4, 0xEA, 0x53, 0xA9, // ..e...S. + /* 02F0 */ 0x31, 0x63, 0x57, 0x29, 0x8B, 0xBB, 0x5C, 0x50, // 1cW)..\P + /* 02F8 */ 0x31, 0x4B, 0xD2, 0x98, 0x7C, 0xA5, 0x32, 0x88, // 1K..|.2. + /* 0300 */ 0x45, 0xFE, 0x77, 0x64, 0xE4, 0xB2, 0x62, 0x10, // E.wd..b. + /* 0308 */ 0x01, 0x59, 0xDD, 0x37, 0x42, 0x40, 0xD6, 0x0A, // .Y.7B@.. + /* 0310 */ 0x22, 0x20, 0xFF, 0xFF, 0x01 // " ... + }) + } + } + + Scope (\_SB.PCI0) + { + Name (RID, 0x00) + Scope (I2C0) + { + Device (NFC1) + { + Name (_ADR, 0x00) // _ADR: Address + Name (_HID, "NXP1001") // _HID: Hardware ID + Name (_DDN, "NXP NFC For Win10") // _DDN: DOS Device Name + Name (_UID, 0x01) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0029, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x006C + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0027 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0064 + } + }) + Return (RBUF) /* \_SB_.PCI0.I2C0.NFC1._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LGreaterEqual (\OSYS, 0x07DF)) + { + If (LAnd (LEqual (\_SB.GGIV (0x02030016), 0x00), LEqual (\NFCF, 0x00))) + { + Return (0x0F) + } + } + + Return (0x00) + } + } + } + + Scope (I2C1) + { + Device (TPFW) + { + Name (_HID, "ALPS0000") // _HID: Hardware ID + Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID + Name (_DDN, "TP FW Update For Win10") // _DDN: DOS Device Name + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x002C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C1", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, Exclusive, PullUp, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x004C + } + }) + Return (RBUF) /* \_SB_.PCI0.I2C1.TPFW._CRS.RBUF */ + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */)) + { + ADBG (Concatenate ("TPFW:_DSM=", ToHexString (Arg2))) + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Switch (ToInteger (Arg1)) + { + Case (0x01) + { + Return (Buffer (0x01) + { + 0x03 // . + }) + } + Default + { + Return (Buffer (0x01) + { + 0x00 // . + }) + } + + } + } + Case (0x01) + { + Return (0x20) + } + Default + { + } + + } + + Return (Buffer (0x01) + { + 0x00 // . + }) + } + } + } + } + } + + Scope (\_SB.PCI0.SBUS) + { + Name (RID, 0x00) + Name (_S3D, 0x03) // _S3D: S3 Device State + OperationRegion (SMBP, PCI_Config, 0x50, 0x04) + Field (SMBP, DWordAcc, NoLock, Preserve) + { + , 5, + TCOB, 11, + Offset (0x04) + } + + Name (TCBV, 0x00) + Method (TCBS, 0, NotSerialized) + { + If (LEqual (TCBV, 0x00)) + { + Store (ShiftLeft (\_SB.PCI0.SBUS.TCOB, 0x05), TCBV) /* \_SB_.PCI0.SBUS.TCBV */ + } + + Return (TCBV) /* \_SB_.PCI0.SBUS.TCBV */ + } + + OperationRegion (TCBA, SystemIO, TCBS (), 0x10) + Field (TCBA, ByteAcc, NoLock, Preserve) + { + Offset (0x04), + , 9, + CPSC, 1 + } + } + + Scope (\_SB.PCI0.PEG0) + { + Name (RID, 0x00) + } + + Scope (\_SB.PCI0.GFX0) + { + Name (RID, 0x00) + } + + Scope (\_SB.PCI0.SAT0) + { + Name (RID, 0x00) + } + + Scope (\_SB.PCI0.LPCB) + { + Name (RID, 0x00) + Device (SIO) + { + Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (BUF, ResourceTemplate () + { + IO (Decode16, + 0x0010, // Range Minimum + 0x0010, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + IO (Decode16, + 0x0090, // Range Minimum + 0x0090, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + IO (Decode16, + 0x0024, // Range Minimum + 0x0024, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0028, // Range Minimum + 0x0028, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x002C, // Range Minimum + 0x002C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0030, // Range Minimum + 0x0030, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0034, // Range Minimum + 0x0034, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0038, // Range Minimum + 0x0038, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x003C, // Range Minimum + 0x003C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A4, // Range Minimum + 0x00A4, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A8, // Range Minimum + 0x00A8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00AC, // Range Minimum + 0x00AC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B0, // Range Minimum + 0x00B0, // Range Maximum + 0x01, // Alignment + 0x06, // Length + ) + IO (Decode16, + 0x00B8, // Range Minimum + 0x00B8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00BC, // Range Minimum + 0x00BC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0050, // Range Minimum + 0x0050, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x0072, // Range Minimum + 0x0072, // Range Maximum + 0x01, // Alignment + 0x06, // Length + ) + IO (Decode16, + 0x1800, // Range Minimum + 0x1800, // Range Maximum + 0x01, // Alignment + 0xA0, // Length + ) + IO (Decode16, + 0x0800, // Range Minimum + 0x0800, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0880, // Range Minimum + 0x0880, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0900, // Range Minimum + 0x0900, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0980, // Range Minimum + 0x0980, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0A80, // Range Minimum + 0x0A80, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0B00, // Range Minimum + 0x0B00, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0B80, // Range Minimum + 0x0B80, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x15E0, // Range Minimum + 0x15E0, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + IO (Decode16, + 0x1600, // Range Minimum + 0x1600, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x1640, // Range Minimum + 0x1640, // Range Maximum + 0x01, // Alignment + 0x20, // Length + ) + Memory32Fixed (ReadWrite, + 0xF0000000, // Address Base + 0x08000000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED10000, // Address Base + 0x00004000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED18000, // Address Base + 0x00001000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED19000, // Address Base + 0x00001000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFEB00000, // Address Base + 0x00100000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED20000, // Address Base + 0x00020000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFED90000, // Address Base + 0x00004000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y47) + }) + CreateDWordField (BUF, \_SB.PCI0.LPCB.SIO._CRS._Y47._BAS, SXB) // _BAS: Base Address + Store (\SXRB, SXB) /* \_SB_.PCI0.LPCB.SIO_._CRS.SXB_ */ + CreateDWordField (BUF, \_SB.PCI0.LPCB.SIO._CRS._Y47._LEN, SXL) // _LEN: Length + Store (\SXRS, SXL) /* \_SB_.PCI0.LPCB.SIO_._CRS.SXL_ */ + Return (BUF) /* \_SB_.PCI0.LPCB.SIO_._CRS.BUF_ */ + } + } + + OperationRegion (LPCS, PCI_Config, 0x00, 0x0100) + Field (LPCS, AnyAcc, NoLock, Preserve) + { + Offset (0x60), + PIRA, 8, + PIRB, 8, + PIRC, 8, + PIRD, 8, + SERQ, 8, + Offset (0x68), + PIRE, 8, + PIRF, 8, + PIRG, 8, + PIRH, 8, + Offset (0x80), + XU1A, 3, + , 1, + XU2A, 3, + Offset (0x81), + XPA, 2, + , 2, + XFA, 1, + Offset (0x82), + XU1E, 1, + XU2E, 1, + XPE, 1, + XFE, 1, + Offset (0x84), + XG1E, 1, + , 1, + XG1A, 14, + Offset (0x88), + XG2E, 1, + , 1, + XG2A, 14, + Offset (0xA0), + , 2, + CLKR, 1, + , 7, + EXPE, 1, + Offset (0xA2), + Offset (0xAC), + Offset (0xAD), + Offset (0xAE), + XUSB, 1, + Offset (0xB8), + GR00, 2, + , 10, + GR06, 2 + } + + OperationRegion (GDIO, SystemMemory, 0xFDAF04C0, 0x10) + Field (GDIO, DWordAcc, NoLock, Preserve) + { + , 30, + DOI0, 1, + Offset (0x04), + , 30, + DOI1, 1, + Offset (0x08), + , 30, + DOI2, 1, + Offset (0x0C), + , 30, + DOI3, 1 + } + + OperationRegion (LPIO, SystemIO, 0x0800, 0x0400) + Field (LPIO, DWordAcc, NoLock, Preserve) + { + Offset (0x180), + , 3, + XHPD, 1, + Offset (0x1B0), + , 31, + GLIS, 1, + Offset (0x308), + Offset (0x30C) + } + + OperationRegion (GNIO, SystemMemory, 0xFDAE0570, 0x04) + Field (GNIO, DWordAcc, NoLock, Preserve) + { + , 1, + NFCD, 1, + Offset (0x04) + } + + OperationRegion (PMIO, SystemIO, 0x1800, 0x0100) + Field (PMIO, AnyAcc, NoLock, Preserve) + { + Offset (0x2A), + , 6, + XHPE, 1, + Offset (0x42), + , 1, + SWGE, 1, + Offset (0x64), + , 9, + Offset (0x8C), + SCIS, 1, + , 6 + } + + OperationRegion (IMGA, SystemIO, 0x15E0, 0x10) + Field (IMGA, ByteAcc, NoLock, Preserve) + { + Offset (0x01), + Offset (0x02), + Offset (0x03), + WAKR, 16, + Offset (0x0C), + GAIX, 8, + Offset (0x0E), + GADT, 8, + Offset (0x10) + } + + IndexField (GAIX, GADT, ByteAcc, NoLock, Preserve) + { + Offset (0x60), + EPWG, 1, + , 1, + CSON, 1, + DSCI, 1, + DSCS, 1, + DLAN, 1, + Offset (0xC2), + GAID, 8 + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Mutex (MCPU, 0x00) + Method (_Q1F, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00020000)) + { + If (And (PKLI, 0x0C00)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1012) + } + } + + \UCMS (0x0E) + } + + Method (_Q16, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x40)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1007) + } + } + + Method (_Q1C, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x01000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1019) + } + } + + Method (_Q1D, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x02000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x101A) + } + } + + Method (_Q13, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1004) + } + Else + { + Notify (\_SB.SLPB, 0x80) // Status Change + } + } + + Method (_Q66, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x10000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x101D) + } + } + + Method (_Q64, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x10)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1005) + } + } + + Method (_Q60, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00080000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1314) + } + } + + Method (_Q61, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00100000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1315) + } + } + + Method (_Q62, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00010000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1311) + } + } + + Method (_Q65, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00020000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1312) + } + } + + Method (_Q26, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (VIGD) + { + If (\WVIS) + { + \VBTD () + } + + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \UCMS (0x12) + } + + Sleep (0x01F4) + Notify (AC, 0x80) // Status Change + Notify (\_TZ.THM0, 0x80) // Thermal Status Change + If (\WXPF) + { + Acquire (MCPU, 0xFFFF) + } + + Store (0x01, PWRS) /* \PWRS */ + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + } + + If (\WXPF) + { + Sleep (0x64) + } + + If (\OSC4) + { + \PNTF (0x81) + } + + If (\WXPF) + { + Release (MCPU) + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6040) + ATMC () + } + + Method (_Q27, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (VIGD) + { + If (\WVIS) + { + \VBTD () + } + + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \UCMS (0x12) + } + + Sleep (0x01F4) + Notify (AC, 0x80) // Status Change + Notify (\_TZ.THM0, 0x80) // Thermal Status Change + If (\WXPF) + { + Acquire (MCPU, 0xFFFF) + } + + Store (0x00, PWRS) /* \PWRS */ + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + } + + If (\WXPF) + { + Sleep (0x64) + } + + If (\OSC4) + { + \PNTF (0x81) + } + + If (\WXPF) + { + Release (MCPU) + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6040) + ATMC () + } + + Method (_Q2A, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + ADBG ("LIDO") + \VCMS (0x01, \_SB.LID._LID ()) + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + If (LEqual (\ILNF, 0x00)) + { + If (\IOST) + { + If (LNot (\ISOC (0x00))) + { + Store (0x00, \IOST) + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60D0) + } + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x5002) + If (LEqual (\PLUX, 0x00)) + { + If (VIGD) + { + \_SB.PCI0.GFX0.VLOC (0x01) + } + + Notify (\_SB.LID, 0x80) // Status Change + } + } + } + + Method (_Q2B, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + ADBG ("LIDC") + \UCMS (0x0D) + \_SB.PCI0.LPCB.EC.LED (0x00, 0x00) + \VCMS (0x01, \_SB.LID._LID ()) + If (LEqual (\ILNF, 0x00)) + { + If (LAnd (\IOEN, LNot (\IOST))) + { + If (LNot (\ISOC (0x01))) + { + Store (0x01, \IOST) + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60D0) + } + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x5001) + If (LEqual (\PLUX, 0x00)) + { + If (VIGD) + { + \_SB.PCI0.GFX0.VLOC (0x00) + } + + Notify (\_SB.LID, 0x80) // Status Change + } + } + } + + Method (_Q3D, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + } + + Method (_Q48, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + Else + { + \STEP (0x04) + } + + Store (0x01, \_SB.PCI0.LPCB.EC.CALM) + } + } + + Method (_Q49, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + Else + { + \STEP (0x05) + } + } + } + + Method (_Q7F, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + Fatal (0x01, 0x80010000, 0x000120CD) + } + + Method (_Q46, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6012) + } + + Method (_Q3B, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, DCWL) /* \_SB_.PCI0.LPCB.EC__.DCWL */ + } + Else + { + Store (0x01, DCWL) /* \_SB_.PCI0.LPCB.EC__.DCWL */ + } + } + + Method (_Q4F, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + ADBG ("QUERY_METHOD_UCSI") + If (CondRefOf (\_SB.UBTC.NTFY)) + { + \_SB.UBTC.NTFY () + } + } + + Method (_Q2F, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + \_SB.PCI0.LPCB.EC.BFCC () + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q6A, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (HDMC) + { + Noop + } + ElseIf (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x04000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x101B) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (MMTG, 0, NotSerialized) + { + Store (0x0101, Local0) + If (HDMC) + { + Or (Local0, 0x00010000, Local0) + } + + Return (Local0) + } + + Method (MMTS, 1, NotSerialized) + { + If (HDMC) + { + Noop + } + ElseIf (LEqual (Arg0, 0x02)) + { + \_SB.PCI0.LPCB.EC.LED (0x0E, 0x80) + } + ElseIf (LEqual (Arg0, 0x03)) + { + \_SB.PCI0.LPCB.EC.LED (0x0E, 0xC0) + } + Else + { + \_SB.PCI0.LPCB.EC.LED (0x0E, 0x00) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + VIDA, 16, + PIDA, 16, + VIDB, 16, + PIDB, 16 + } + + Method (_Q45, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + Store (\_SB.PCI0.LPCB.EC.DKID (), Local0) + If (LNotEqual (Local0, 0x00)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x4010) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x4011) + } + } + + Method (DKID, 0, NotSerialized) + { + Acquire (BATM, 0xFFFF) + Store (0x00, Local0) + Store (0x59, HIID) /* \_SB_.PCI0.LPCB.EC__.HIID */ + Store (VIDB, Local1) + Store (PIDB, Local2) + ADBG ("Dock ID Rear") + ADBG (Local1) + ADBG (Local2) + Store (VIDA, Local3) + Store (PIDA, Local4) + ADBG ("Dock ID Front") + ADBG (Local3) + ADBG (Local4) + If (LEqual (Local1, 0x17EF)) + { + If (LEqual (Local2, 0x306E)) + { + Store (0x01, Local0) + } + + If (LEqual (Local2, 0x306D)) + { + Store (0x02, Local0) + } + + If (LEqual (Local2, 0x306C)) + { + Store (0x03, Local0) + } + } + + If (LEqual (Local0, 0x00)) + { + If (LEqual (Local3, 0x17EF)) + { + If (LEqual (Local4, 0x306E)) + { + Store (0x01, Local0) + } + + If (LEqual (Local4, 0x306D)) + { + Store (0x02, Local0) + } + + If (LEqual (Local4, 0x306C)) + { + Store (0x03, Local0) + } + } + } + + Release (BATM) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GDKS, 0, NotSerialized) + { + Store (0x00, Local0) + Store (\_SB.PCI0.LPCB.EC.DKID (), Local1) + If (Local1) + { + Or (Local0, 0x01, Local0) + ShiftLeft (Local1, 0x08, Local1) + Or (Local0, Local1, Local0) + } + + Or (Local0, 0x000A0000, Local0) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q3F, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6000) + } + + Method (_Q74, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6060) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Name (BRTW, Package (0x12) + { + 0x64, + 0x64, + 0x05, + 0x0A, + 0x14, + 0x19, + 0x1E, + 0x23, + 0x28, + 0x2D, + 0x32, + 0x37, + 0x3C, + 0x41, + 0x46, + 0x50, + 0x5A, + 0x64 + }) + Name (BRTB, Package (0x08) + { + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x32, + 0x03, + 0x03, + 0x05, + 0x08, + 0x0A, + 0x0D, + 0x0F, + 0x12, + 0x19, + 0x22, + 0x2E, + 0x3E, + 0x54, + 0x6E, + 0x93, + 0xC1, + 0xFF, + 0x0587, + 0x0587, + 0x03, + 0x03 + }, + + Package (0x16) + { + 0x32, + 0x03, + 0x03, + 0x05, + 0x08, + 0x0A, + 0x0D, + 0x0F, + 0x12, + 0x19, + 0x22, + 0x2E, + 0x3E, + 0x54, + 0x6E, + 0x93, + 0xC1, + 0xFF, + 0x0587, + 0x0587, + 0x03, + 0x03 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + } + }) + Method (_Q14, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x8000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1010) + } + + If (\VIGD) + { + Notify (\_SB.PCI0.GFX0.DD1F, 0x86) // Device-Specific + } + } + + Method (_Q15, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00010000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1011) + } + + If (\VIGD) + { + Notify (\_SB.PCI0.GFX0.DD1F, 0x87) // Device-Specific + } + + Return (Zero) + } + + Method (BRNS, 0, NotSerialized) + { + Add (\BRLV, 0x02, Local0) + Store (\BNTN, Local3) + If (\_SB.PCI0.GFX0.DRDY) + { + Store (DerefOf (Index (DerefOf (Index (BRTB, Local3)), Local0)), Local2) + \_SB.PCI0.GFX0.AINT (0x01, Local2) + } + } + + Method (BFRQ, 0, NotSerialized) + { + Store (0x80000100, Local0) + Store (DerefOf (Index (DerefOf (Index (BRTB, \BNTN)), 0x13)), Local1) + Or (ShiftLeft (Local1, 0x09), Local0, Local0) + Store (DerefOf (Index (DerefOf (Index (BRTB, \BNTN)), 0x15)), Local1) + Or (Local1, Local0, Local0) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Name (BDEV, 0xFF) + Name (BSTS, 0x00) + Name (BHKE, 0x00) + Method (_Q2C, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (LEqual (BSTS, 0x00)) + { + Store (BGID (0x00), BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + NBRE (BDEV) + } + } + + Method (_Q2D, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + Store (BGID (0x00), BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + NBIN (BDEV) + } + + Method (_Q38, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + Store (BGID (0x00), Local0) + If (LEqual (Local0, 0x0F)) + { + BDIS () + \BHDP (0x01, 0x00) + NBEJ (BDEV) + Store (Local0, BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + If (LEqual (\BIDE, 0x03)) + { + Store (0x00, \_SB.PCI0.SAT0.PRIM.GTME) /* External reference */ + Store (0x00, \_SB.PCI0.SAT0.SCND.GTME) /* External reference */ + } + } + ElseIf (HPBU){} + Else + { + Store (Local0, BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + NBIN (Local0) + } + } + + Method (NBRE, 1, NotSerialized) + { + If (LLess (Arg0, 0x0C)) + { + If (LEqual (\BIDE, 0x03)) + { + Notify (\_SB.PCI0.SAT0.SCND.MSTR, 0x03) // Eject Request + } + Else + { + Notify (\_SB.PCI0.SAT0.PRT1, 0x03) // Eject Request + } + } + } + + Method (NBEJ, 1, NotSerialized) + { + If (LEqual (BSTS, 0x00)) + { + If (LLess (Arg0, 0x0C)) + { + If (LEqual (\BIDE, 0x03)) + { + Notify (\_SB.PCI0.SAT0.SCND.MSTR, 0x01) // Device Check + } + Else + { + Notify (\_SB.PCI0.SAT0.PRT1, 0x01) // Device Check + } + } + } + + BEEP (0x00) + Store (0x00, BSTS) /* \_SB_.PCI0.LPCB.EC__.BSTS */ + } + + Method (NBIN, 1, NotSerialized) + { + If (LLess (Arg0, 0x0C)) + { + BEN (0x01) + If (LEqual (\BIDE, 0x03)) + { + Notify (\_SB.PCI0.SAT0.SCND.MSTR, 0x01) // Device Check + } + Else + { + Notify (\_SB.PCI0.SAT0.PRT1, 0x01) // Device Check + } + } + + BEEP (0x00) + Store (0x00, BSTS) /* \_SB_.PCI0.LPCB.EC__.BSTS */ + } + + Method (BEJ0, 1, NotSerialized) + { + If (Arg0) + { + BDIS () + \BHDP (0x01, 0x00) + Store (0x01, BSTS) /* \_SB_.PCI0.LPCB.EC__.BSTS */ + If (BHKE) + { + Store (0x00, BHKE) /* \_SB_.PCI0.LPCB.EC__.BHKE */ + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x3003) + } + } + Else + { + Store (0x00, BSTS) /* \_SB_.PCI0.LPCB.EC__.BSTS */ + } + } + + Method (BEJ3, 1, NotSerialized) + { + If (Arg0) + { + BDIS () + Store (0x01, BSTS) /* \_SB_.PCI0.LPCB.EC__.BSTS */ + } + Else + { + Store (0x00, BSTS) /* \_SB_.PCI0.LPCB.EC__.BSTS */ + } + } + + Method (BPTS, 1, NotSerialized) + { + Store (0x01, HDBM) /* \_SB_.PCI0.LPCB.EC__.HDBM */ + If (LNotEqual (BSTS, 0x00)) + { + Store (0x0F, BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + Store (0x00, BSTS) /* \_SB_.PCI0.LPCB.EC__.BSTS */ + } + + Store (0x00, BHKE) /* \_SB_.PCI0.LPCB.EC__.BHKE */ + BUWK (0x00) + } + + Method (BWAK, 1, NotSerialized) + { + BUWK (0x00) + Store (BGID (0x00), Local0) + If (LEqual (BSTS, 0x00)) + { + If (LNotEqual (Local0, BDEV)) + { + NBEJ (BDEV) + Store (Local0, BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + NBIN (Local0) + } + ElseIf (LOr (\LFDC, LNotEqual (BDEV, 0x0D))) + { + If (LNotEqual (Local0, 0x0F)) + { + If (HPBU) + { + If (LLessEqual (Arg0, 0x02)){} + Else + { + NBRE (Local0) + } + } + } + } + } + + If (LLess (BDEV, 0x0C)) + { + \UBIS (0x00) + } + Else + { + \UBIS (0x01) + } + } + + Method (BDIS, 0, NotSerialized) + { + If (LNot (\_SB.PCI0.LPCB.CSON)) + { + If (LNot (\_SB.PCI0.LPCB.GLIS)) + { + \UBIS (0x01) + } + + Store (0x01, \_SB.PCI0.LPCB.CSON) + Store (0x0F, \IDET) + } + } + + Method (BPON, 1, NotSerialized) + { + If (\_SB.PCI0.LPCB.CSON) + { + Store (0x00, \_SB.PCI0.LPCB.CSON) + If (\_SB.PCI0.LPCB.GLIS) + { + \UBIS (0x00) + } + } + } + + Method (BEN, 1, NotSerialized) + { + If (\_SB.PCI0.LPCB.CSON) + { + BPON (Arg0) + If (Arg0) + { + IRDY () + } + } + } + + Method (BSTA, 1, NotSerialized) + { + If (\_SB.PCI0.LPCB.CSON) + { + Return (0x00) + } + + BINI () + If (LEqual (Arg0, 0x01)) + { + Return (LLess (BDEV, 0x0C)) + } + + Return (0x00) + } + + Method (BUWK, 1, NotSerialized) + { + If (\H8DR) + { + If (Arg0) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWBU) + } + Else + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWBU) + } + } + ElseIf (Arg0) + { + \MBEC (0x32, 0xFF, 0x80) + } + Else + { + \MBEC (0x32, 0x7F, 0x00) + } + } + + Method (BINI, 0, NotSerialized) + { + If (LEqual (BDEV, 0xFF)) + { + Store (BGID (0x00), BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + } + } + + Method (BGID, 1, NotSerialized) + { + If (Arg0) + { + Store (0xFF, Local0) + } + Else + { + If (\H8DR) + { + Store (HPBU, Local1) + Store (HBID, Local2) + } + Else + { + Store (RBEC (0x47), Local2) + And (Local2, 0x01, Local1) + And (Local2, 0x04, Local2) + ShiftRight (Local2, 0x02, Local2) + } + + If (Local2) + { + Store (0x0F, Local0) + } + ElseIf (HDUB) + { + Store (0x0F, Local0) + } + ElseIf (LOr (LEqual (\IDET, 0x03), LEqual (\IDET, 0x06))) + { + Store (\IDET, Local0) + } + Else + { + Store (0x07, Local0) + } + + If (LEqual (Local0, 0x0F)){} + } + + If (LAnd (\HDUB, LLess (Local0, 0x0C))) + { + Store (0x0F, Local0) + } + + Return (Local0) + } + + Method (IRDY, 0, NotSerialized) + { + Store (0x01F4, Local0) + Store (0x3C, Local1) + Store (Zero, Local2) + While (Local1) + { + Sleep (Local0) + Store (\BCHK (), Local3) + If (LNot (Local3)) + { + Break + } + + If (LEqual (Local3, 0x02)) + { + Store (One, Local2) + Break + } + + Decrement (Local1) + } + + Return (Local2) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q43, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + \UCMS (0x18) + } + + Method (SAUM, 1, NotSerialized) + { + If (LGreater (Arg0, 0x03)) + { + Noop + } + ElseIf (\H8DR) + { + Store (Arg0, HAUM) /* \_SB_.PCI0.LPCB.EC__.HAUM */ + } + Else + { + \MBEC (0x03, 0x9F, ShiftLeft (Arg0, 0x05)) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GSMS, 1, NotSerialized) + { + Return (\AUDC (0x00, 0x00)) + } + + Method (SSMS, 1, NotSerialized) + { + Return (\AUDC (0x01, And (Arg0, 0x01))) + } + + Method (SHDA, 1, NotSerialized) + { + Store (Arg0, Local0) + If (LAnd (LGreaterEqual (OSYS, 0x07DF), LEqual (Local0, 0x01))) + { + Store (0x02, Local0) + } + + Return (\AUDC (0x02, And (Local0, 0x03))) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q19, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00800000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1018) + } + + \UCMS (0x03) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q63, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00080000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1014) + } + + \UCMS (0x0B) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q70, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + FNST () + } + + Method (_Q72, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + FNST () + } + + Method (_Q73, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + FNST () + } + + Method (FNST, 0, NotSerialized) + { + If (\H8DR) + { + Store (HFNS, Local0) + Store (HFNE, Local1) + } + Else + { + And (\RBEC (0x0E), 0x03, Local0) + And (\RBEC (0x00), 0x08, Local1) + } + + If (Local1) + { + If (LEqual (Local0, 0x00)) + { + \UCMS (0x11) + } + + If (LEqual (Local0, 0x01)) + { + \UCMS (0x0F) + } + + If (LEqual (Local0, 0x02)) + { + \UCMS (0x10) + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6005) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GHSL, 1, NotSerialized) + { + Return (\FNSC (0x00, 0x00)) + } + + Method (SHSL, 1, NotSerialized) + { + Return (\FNSC (0x01, And (Arg0, 0x00010001))) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Name (INDV, 0x00) + Method (MHQI, 0, NotSerialized) + { + If (And (\IPMS, 0x01)) + { + Or (INDV, 0x01, INDV) /* \_SB_.PCI0.LPCB.EC__.HKEY.INDV */ + } + + If (And (\IPMS, 0x02)) + { + Or (INDV, 0x02, INDV) /* \_SB_.PCI0.LPCB.EC__.HKEY.INDV */ + } + + If (And (\IPMS, 0x04)) + { + Or (INDV, 0x0100, INDV) /* \_SB_.PCI0.LPCB.EC__.HKEY.INDV */ + } + + If (And (\IPMS, 0x08)) + { + Or (INDV, 0x0200, INDV) /* \_SB_.PCI0.LPCB.EC__.HKEY.INDV */ + } + + If (And (\IPMS, 0x10)) + { + Or (INDV, 0x04, INDV) /* \_SB_.PCI0.LPCB.EC__.HKEY.INDV */ + } + + Return (INDV) /* \_SB_.PCI0.LPCB.EC__.HKEY.INDV */ + } + + Method (MHGI, 1, NotSerialized) + { + Name (RETB, Buffer (0x10){}) + CreateByteField (RETB, 0x00, MHGS) + ShiftLeft (0x01, Arg0, Local0) + If (And (INDV, Local0)) + { + If (LEqual (Arg0, 0x00)) + { + CreateField (RETB, 0x08, 0x78, BRBU) + Store (\IPMB, BRBU) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.BRBU */ + Store (0x10, MHGS) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.MHGS */ + } + ElseIf (LEqual (Arg0, 0x01)) + { + CreateField (RETB, 0x08, 0x18, RRBU) + Store (\IPMR, RRBU) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.RRBU */ + Store (0x04, MHGS) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.MHGS */ + } + ElseIf (LEqual (Arg0, 0x08)) + { + CreateField (RETB, 0x10, 0x18, ODBU) + CreateByteField (RETB, 0x01, MHGZ) + Store (\IPMO, ODBU) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.ODBU */ + If (LAnd (LEqual (^^BSTS, 0x00), LEqual (^^BDEV, 0x03))) + { + Or (0x01, MHGZ, MHGZ) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.MHGZ */ + Or (0x02, MHGZ, MHGZ) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.MHGZ */ + } + + Store (0x05, MHGS) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.MHGS */ + } + ElseIf (LEqual (Arg0, 0x09)) + { + CreateField (RETB, 0x10, 0x08, AUBU) + Store (\IPMA, AUBU) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.AUBU */ + Store (0x01, Index (RETB, 0x01)) + Store (0x03, MHGS) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.MHGS */ + } + ElseIf (LEqual (Arg0, 0x02)) + { + Store (\VDYN (0x00, 0x00), Local1) + And (Local1, 0x0F, Index (RETB, 0x02)) + ShiftRight (Local1, 0x04, Local1) + And (Local1, 0x0F, Index (RETB, 0x01)) + Store (0x03, MHGS) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.MHGS */ + } + } + + Return (RETB) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHGI.RETB */ + } + + Method (MHSI, 2, NotSerialized) + { + ShiftLeft (0x01, Arg0, Local0) + If (And (INDV, Local0)) + { + If (LEqual (Arg0, 0x08)) + { + If (Arg1) + { + If (\H8DR) + { + Store (^^HPBU, Local1) + } + Else + { + And (\RBEC (0x47), 0x01, Local1) + } + + If (LNot (Local1)) + { + Store (^^BGID (0x00), ^^BDEV) /* \_SB_.PCI0.LPCB.EC__.BDEV */ + ^^NBIN (Local1) + } + } + } + ElseIf (LEqual (Arg0, 0x02)) + { + \VDYN (0x01, Arg1) + } + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (PWMC, 0, NotSerialized) + { + Return (0x00) + } + + Method (PWMG, 0, NotSerialized) + { + Store (\_SB.PCI0.LPCB.EC.PWMH, Local0) + ShiftLeft (Local0, 0x08, Local0) + Or (Local0, \_SB.PCI0.LPCB.EC.PWML, Local0) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Name (WGFL, 0x00) + Method (WSIF, 0, NotSerialized) + { + Return (0x00) + } + + Method (WLSW, 0, NotSerialized) + { + Return (0x10010001) + } + + Method (GWAN, 0, NotSerialized) + { + Store (0x00, Local0) + If (And (WGFL, 0x01)) + { + Or (Local0, 0x01, Local0) + } + + If (And (WGFL, 0x08)) + { + Return (Local0) + } + + If (WPWS ()) + { + Or (Local0, 0x02, Local0) + } + + Or (Local0, 0x04, Local0) + Return (Local0) + } + + Method (SWAN, 1, NotSerialized) + { + If (And (Arg0, 0x02)) + { + WPWC (0x01) + } + Else + { + WPWC (0x00) + } + } + + Method (GBDC, 0, NotSerialized) + { + Store (0x00, Local0) + If (And (WGFL, 0x10)) + { + Or (Local0, 0x01, Local0) + } + + If (And (WGFL, 0x80)) + { + Return (Local0) + } + + If (BPWS ()) + { + Or (Local0, 0x02, Local0) + } + + Or (Local0, 0x04, Local0) + Return (Local0) + } + + Method (SBDC, 1, NotSerialized) + { + If (And (Arg0, 0x02)) + { + BPWC (0x01) + } + Else + { + BPWC (0x00) + } + } + + Method (WPWS, 0, NotSerialized) + { + If (LEqual (\_SB.GGOV (0x02040007), 0x00)) + { + Store (0x00, Local0) + } + Else + { + Store (0x01, Local0) + } + + Return (Local0) + } + + Method (WPWC, 1, NotSerialized) + { + If (LAnd (Arg0, LAnd (And (WGFL, 0x01), LNot (And (WGFL, 0x08 + ))))) + { + \_SB.SGOV (0x02040007, 0x01) + Or (WGFL, 0x02, WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + } + Else + { + \_SB.SGOV (0x02040007, 0x00) + And (WGFL, Not (0x02), WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + } + } + + Method (BPWS, 0, NotSerialized) + { + If (LEqual (\_SB.GGOV (0x02040000), 0x01)) + { + Store (0x01, Local0) + } + Else + { + Store (0x00, Local0) + } + + Return (Local0) + } + + Method (BPWC, 1, NotSerialized) + { + If (LAnd (Arg0, LAnd (And (WGFL, 0x10), LNot (And (WGFL, 0x80 + ))))) + { + \_SB.SGOV (0x02040000, 0x01) + Or (WGFL, 0x20, WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + } + Else + { + \_SB.SGOV (0x02040000, 0x00) + And (WGFL, Not (0x20), WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + } + } + + Method (WGIN, 0, NotSerialized) + { + Store (0x00, WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + Store (\WGSV (0x01), WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + If (\WIN8) + { + If (LAnd (WGFL, 0x10)) + { + BPWC (0x01) + } + } + + If (WPWS ()) + { + Or (WGFL, 0x02, WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + } + + If (BPWS ()) + { + Or (WGFL, 0x20, WGFL) /* \_SB_.PCI0.LPCB.EC__.HKEY.WGFL */ + } + } + + Method (WGPS, 1, NotSerialized) + { + If (LGreaterEqual (Arg0, 0x04)) + { + \BLTH (0x05) + } + } + + Method (WGWK, 1, NotSerialized) + { + Noop + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q41, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x7000) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Mutex (BFWM, 0x00) + Method (MHCF, 1, NotSerialized) + { + Store (\BFWC (Arg0), Local0) + Store (ShiftRight (Arg0, 0x05), \_SB.PCI0.LPCB.EC.BSWR) + Return (Local0) + } + + Method (MHPF, 1, NotSerialized) + { + Name (RETB, Buffer (0x25){}) + Acquire (BFWM, 0xFFFF) + If (LLessEqual (SizeOf (Arg0), 0x25)) + { + Store (Arg0, \BFWB) + If (\BFWP ()) + { + \_SB.PCI0.LPCB.EC.CHKS () + \BFWL () + } + + Store (\BFWB, RETB) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHPF.RETB */ + } + + Release (BFWM) + Return (RETB) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHPF.RETB */ + } + + Method (MHIF, 1, NotSerialized) + { + Name (RETB, Buffer (0x0A){}) + Acquire (BFWM, 0xFFFF) + \BFWG (Arg0) + Store (\BFWB, RETB) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHIF.RETB */ + Release (BFWM) + Return (RETB) /* \_SB_.PCI0.LPCB.EC__.HKEY.MHIF.RETB */ + } + + Method (MHDM, 1, NotSerialized) + { + \BDMC (Arg0) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (PSSG, 1, NotSerialized) + { + Return (\PSIF (0x00, 0x00)) + } + + Method (PSSS, 1, NotSerialized) + { + Return (\PSIF (0x01, Arg0)) + } + + Method (PSBS, 1, NotSerialized) + { + Return (\PSIF (0x02, Arg0)) + } + + Method (BICG, 1, NotSerialized) + { + Return (\PSIF (0x03, Arg0)) + } + + Method (BICS, 1, NotSerialized) + { + Return (\PSIF (0x04, Arg0)) + } + + Method (BCTG, 1, NotSerialized) + { + Return (\PSIF (0x05, Arg0)) + } + + Method (BCCS, 1, NotSerialized) + { + Return (\PSIF (0x06, Arg0)) + } + + Method (BCSG, 1, NotSerialized) + { + Return (\PSIF (0x07, Arg0)) + } + + Method (BCSS, 1, NotSerialized) + { + Return (\PSIF (0x08, Arg0)) + } + + Method (BDSG, 1, NotSerialized) + { + Return (\PSIF (0x09, Arg0)) + } + + Method (BDSS, 1, NotSerialized) + { + Return (\PSIF (0x0A, Arg0)) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GILN, 0, NotSerialized) + { + Return (Or (0x02, \ILNF)) + } + + Method (SILN, 1, NotSerialized) + { + If (LEqual (0x01, Arg0)) + { + Store (0x01, \ILNF) + Store (0x00, BBLS) /* \_SB_.PCI0.LPCB.EC__.BBLS */ + Return (0x00) + } + ElseIf (LEqual (0x02, Arg0)) + { + Store (0x00, \ILNF) + Store (0x01, BBLS) /* \_SB_.PCI0.LPCB.EC__.BBLS */ + Return (0x00) + } + Else + { + Return (0x01) + } + } + + Method (GLSI, 0, NotSerialized) + { + If (\H8DR) + { + Return (Add (0x02, \_SB.PCI0.LPCB.EC.HPLD)) + } + ElseIf (And (\RBEC (0x46), 0x04)) + { + Return (0x03) + } + Else + { + Return (0x02) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GDLN, 0, NotSerialized) + { + Return (Or (0x02, \PLUX)) + } + + Method (SDLN, 1, NotSerialized) + { + If (LEqual (0x01, Arg0)) + { + Store (0x01, \PLUX) + Return (0x00) + } + ElseIf (LEqual (0x02, Arg0)) + { + Store (0x00, \PLUX) + Return (0x00) + } + Else + { + Return (0x01) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q4E, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + If (\H8DR) + { + Store (PSST, Local0) + If (PSST) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B0) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B1) + } + } + ElseIf (And (\RBEC (0x46), 0x40)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B0) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B1) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GPSS, 0, NotSerialized) + { + If (\H8DR) + { + Store (PSST, Local1) + } + ElseIf (And (\RBEC (0x46), 0x40)) + { + Store (0x01, Local1) + } + Else + { + Store (0x00, Local1) + } + + If (LEqual (\_SB.GGIV (0x02050015), 0x00)) + { + Store (0x01, Local0) + } + Else + { + Store (0x00, Local0) + } + + Or (ShiftLeft (Local1, 0x01), Local0, Local0) + And (Local0, 0x03, Local0) + Return (Local0) + } + } + } + + Name (WOTF, 0x00) + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (MHQT, 1, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + If (LEqual (Arg0, 0x00)) + { + Store (\TATC, Local0) + Return (Local0) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Store (\TDFA, Local0) + Add (Local0, ShiftLeft (\TDTA, 0x04), Local0) + Add (Local0, ShiftLeft (\TDFD, 0x08), Local0) + Add (Local0, ShiftLeft (\TDTD, 0x0C), Local0) + Add (Local0, ShiftLeft (\TNFT, 0x10), Local0) + Add (Local0, ShiftLeft (\TNTT, 0x14), Local0) + Return (Local0) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Store (\TCFA, Local0) + Add (Local0, ShiftLeft (\TCTA, 0x04), Local0) + Add (Local0, ShiftLeft (\TCFD, 0x08), Local0) + Add (Local0, ShiftLeft (\TCTD, 0x0C), Local0) + Return (Local0) + } + ElseIf (LEqual (Arg0, 0x03)){} + ElseIf (LEqual (Arg0, 0x04)) + { + Store (\TATW, Local0) + Return (Local0) + } + Else + { + Noop + } + } + + Return (0x00) + } + + Method (MHAT, 1, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + Store (And (Arg0, 0xFF), Local0) + If (LNot (ATMV (Local0))) + { + Return (0x00) + } + + Store (And (ShiftRight (Arg0, 0x08), 0xFF), Local0) + If (LNot (ATMV (Local0))) + { + Return (0x00) + } + + Store (And (Arg0, 0x0F), \TCFA) + Store (And (ShiftRight (Arg0, 0x04), 0x0F), \TCTA) + Store (And (ShiftRight (Arg0, 0x08), 0x0F), \TCFD) + Store (And (ShiftRight (Arg0, 0x0C), 0x0F), \TCTD) + ATMC () + If (And (\_PR.CFGD, 0x0100)) + { + Store (\FTPS, Local1) + If (And (Arg0, 0x00010000)) + { + If (\_PR.CLVL) + { + Store (\CTPR, \FTPS) + Increment (\FTPS) + } + Else + { + Store (0x01, \FTPS) + } + } + ElseIf (\_PR.CLVL) + { + Store (\CTPR, \FTPS) + } + Else + { + Store (0x00, \FTPS) + } + + If (XOr (\FTPS, Local1)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + } + } + + Store (\SCRM, Local2) + If (And (Arg0, 0x00040000)) + { + Store (0x01, \SCRM) + Store (0x07, \_SB.PCI0.LPCB.EC.HFSP) + } + Else + { + Store (0x00, \SCRM) + Store (0x80, \_SB.PCI0.LPCB.EC.HFSP) + } + + Store (\ETAU, Local3) + If (And (Arg0, 0x00020000)) + { + Store (0x01, \ETAU) + } + Else + { + Store (0x00, \ETAU) + } + + Return (0x01) + } + + Return (0x00) + } + + Method (MHGT, 1, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + Store (0x01000000, Local0) + If (And (\_PR.CFGD, 0x0100)) + { + Or (Local0, 0x08000000, Local0) + } + + If (\SCRM) + { + Or (Local0, 0x10000000, Local0) + } + + If (\ETAU) + { + Or (Local0, 0x04000000, Local0) + } + + If (LLess (\CTPR, \FTPS)) + { + Or (Local0, 0x02000000, Local0) + } + + Add (Local0, ShiftLeft (\TSFT, 0x10), Local0) + Add (Local0, ShiftLeft (\TSTT, 0x14), Local0) + Store (And (Arg0, 0xFF), Local1) + If (LNot (ATMV (Local1))) + { + Or (Local0, 0xFFFF, Local0) + Return (Local0) + } + + Store (And (Arg0, 0x0F), Local1) + If (LEqual (Local1, 0x00)) + { + Add (Local0, \TIF0, Local0) + } + ElseIf (LEqual (Local1, 0x01)) + { + Add (Local0, \TIF1, Local0) + } + ElseIf (LEqual (Local1, 0x02)) + { + Add (Local0, \TIF2, Local0) + } + Else + { + Add (Local0, 0xFF, Local0) + } + + Store (And (ShiftRight (Arg0, 0x04), 0x0F), Local1) + If (LEqual (Local1, 0x00)) + { + Add (Local0, ShiftLeft (\TIT0, 0x08), Local0) + } + ElseIf (LEqual (Local1, 0x01)) + { + Add (Local0, ShiftLeft (\TIT1, 0x08), Local0) + } + ElseIf (LEqual (Local1, 0x02)) + { + Add (Local0, ShiftLeft (\TIT2, 0x08), Local0) + } + Else + { + Add (Local0, ShiftLeft (0xFF, 0x08), Local0) + } + + Return (Local0) + } + + Return (0x00) + } + + Method (ATMV, 1, NotSerialized) + { + Store (And (Arg0, 0x0F), Local1) + Store (\TNFT, Local0) + If (LGreaterEqual (Local1, Local0)) + { + Return (0x00) + } + + Store (And (ShiftRight (Arg0, 0x04), 0x0F), Local2) + Store (\TNTT, Local0) + If (LGreaterEqual (Local2, Local0)) + { + Return (0x00) + } + + If (\TATL) + { + If (XOr (Local1, Local2)) + { + Return (0x00) + } + } + + Return (0x01) + } + + Method (MHCT, 1, NotSerialized) + { + Store (0x00, Local0) + If (\SPEN) + { + Store (\LWST, Local0) + Increment (Local0) + ShiftLeft (Local0, 0x08, Local0) + } + + Store (0x08, Local1) + ShiftLeft (Local1, 0x08, Local1) + If (LEqual (Arg0, 0xFFFFFFFF)) + { + Or (Local1, \TPCR, Local1) + If (\SPEN) + { + Or (Local0, \PPCR, Local0) + If (LNot (LAnd (\_PR.CFGD, 0x02000000))) + { + Or (Local1, 0x80, Local1) + } + + If (LNot (LAnd (\_PR.CFGD, 0x08000000))) + { + Or (Local1, 0x40, Local1) + } + } + Else + { + Or (Local1, 0xC0, Local1) + } + } + Else + { + If (LAnd (LOr (\OSPX, \CPPX), \SPEN)) + { + And (Arg0, 0x00FF0000, Local2) + ShiftRight (Local2, 0x10, Local2) + Or (Local0, Local2, Local0) + If (XOr (Local2, \PPCR)) + { + Store (Local2, \PPCA) + \PNTF (0x80) + } + } + + If (\WVIS) + { + And (Arg0, 0x1F, Local2) + Or (Local1, Local2, Local1) + If (XOr (Local2, \TPCR)) + { + Store (Local2, \TPCA) + \PNTF (0x82) + } + } + } + + ShiftLeft (Local0, 0x10, Local0) + Or (Local0, Local1, Local0) + Return (Local0) + } + + Method (DYTC, 1, Serialized) + { + Store (Arg0, Local0) + Store (0x00, Local1) + ADBG (Concatenate ("DYTC STT=", ToHexString (Local0))) + If (LAnd (\WNTF, \TATC)) + { + Switch (ToInteger (And (Local0, 0x01FF))) + { + Case (0x00) + { + Store (ShiftLeft (0x01, 0x08), Local1) + Or (Local1, ShiftLeft (0x04, 0x1C), Local1) + Or (Local1, ShiftLeft (0x02, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x01) + { + And (ShiftRight (Local0, 0x0C), 0x0F, Local2) + And (ShiftRight (Local0, 0x10), 0x0F, Local3) + And (ShiftRight (Local0, 0x14), 0x01, Local4) + ADBG ("DYTC_CMD_SET") + ADBG (Concatenate ("ICFunc=", ToHexString (Local2))) + ADBG (Concatenate ("ICMode=", ToHexString (Local3))) + ADBG (Concatenate ("ValidF=", ToHexString (Local4))) + If (LNot (CondRefOf (\_SB.IETM.DPTE))) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + Store (0x01, WOTF) /* \WOTF */ + } + } + ElseIf (LEqual (\_SB.IETM.DPTE, 0x00)) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + Store (0x01, WOTF) /* \WOTF */ + } + } + + If (WOTF) + { + ADBG ("WOTF") + } + + Switch (Local2) + { + Case (0x01) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VCQL) + } + Else + { + Store (0x01, \VCQL) + } + } + Case (0x04) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VSTP) + } + Else + { + Store (0x01, \VSTP) + } + } + Case (0x08) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VDMC) + } + Else + { + Store (0x01, \VDMC) + } + } + Case (0x0A) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VIFC) + } + Else + { + Store (0x01, \VIFC) + } + } + Case (0x0B) + { + Switch (Local3) + { + Case (0x01) + { + If (LNotEqual (Local4, 0x01)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Case (0x02) + { + If (LNotEqual (Local4, 0x01)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Case (0x0F) + { + If (LNotEqual (Local4, 0x00)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Default + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VMMC) + Store (0x00, \SMMC) + } + Else + { + Store (0x01, \VMMC) + Store (Local3, \SMMC) + } + } + Case (0x0C) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VMSC) + } + Else + { + Store (0x01, \VMSC) + } + } + Case (0x0D) + { + If (LAnd (LLessEqual (Local3, 0x08), LGreaterEqual (Local3, 0x01))) + { + If (LNotEqual (Local4, 0x01)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LAnd (LNotEqual (Local3, 0x02), LAnd (LNotEqual (Local3, 0x07), + LNotEqual (Local3, 0x08)))) + { + ADBG ("PSC InValid Mode, Clear the PSC State.") + Store (0x00, Local4) + } + } + ElseIf (LEqual (Local3, 0x0F)) + { + If (LNotEqual (Local4, 0x00)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Else + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VPSC) + Store (0x00, \SPSC) + } + Else + { + Store (0x01, \VPSC) + Store (Local3, \SPSC) + } + } + Case (0x00) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Default + { + ADBG ("UND IC Func") + ShiftLeft (0x01, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + } + + ADBG (" Set ODM Variable") + If (CondRefOf (\_SB.IETM.DPTE)) + { + If (And (\_SB.IETM.DPTE, 0x01)) + { + Store (\STDV, \ODV0) + Store (\VCQL, \ODV1) + Store (\VTIO, \ODV2) + If (LAnd (LEqual (\VMYH, 0x01), LEqual (\SMYH, 0x00))) + { + Store (0x01, \ODV3) + } + Else + { + Store (0x00, \ODV3) + } + + If (LAnd (LEqual (\VMYH, 0x01), LEqual (\SMYH, 0x01))) + { + Store (0x01, \ODV4) + } + Else + { + Store (0x00, \ODV4) + } + + If (LAnd (LEqual (\VMYH, 0x01), LEqual (\SMYH, 0x02))) + { + Store (0x01, \ODV5) + } + Else + { + Store (0x00, \ODV5) + } + + Store (\VSTP, \ODV6) + Store (\VCQH, \ODV7) + Store (\VDCC, \ODV8) + Store (\VSFN, \ODV9) + Store (\VDMC, \ODVA) + Store (\VFHP, \ODVB) + Store (\VIFC, \ODVC) + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x00))) + { + Store (0x01, \ODVD) + } + Else + { + Store (0x00, \ODVD) + } + + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x01))) + { + Store (0x01, \ODVE) + } + Else + { + Store (0x00, \ODVE) + } + + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x02))) + { + Store (0x01, \ODVF) + } + Else + { + Store (0x00, \ODVF) + } + + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x03))) + { + Store (0x01, \ODVH) + } + Else + { + Store (0x00, \ODVH) + } + + Store (\VMSC, \ODVG) + If (LEqual (\VPSC, 0x01)) + { + Store (\SPSC, \ODVI) + } + Else + { + Store (0x00, \ODVI) + } + + Store (\VCSC, \ODVJ) + Notify (\_SB.IETM, 0x88) // Device-Specific + } + } + + If (LEqual (\VSTP, 0x01)) + { + Store (0x04, \CICF) + If (LNot (CondRefOf (\_SB.IETM.DPTE))) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTP) + } + } + ElseIf (LEqual (\_SB.IETM.DPTE, 0x00)) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTP) + } + } + + \FLPF (0x0D) + } + ElseIf (LEqual (\VCSC, 0x01)) + { + Store (0x0E, \CICF) + \FLPF (0x01) + } + ElseIf (LEqual (\VFHP, 0x01)) + { + Store (0x09, \CICF) + \FLPF (0x04) + } + ElseIf (LEqual (\VPSC, 0x01)) + { + Store (0x0D, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("PSC") + ADBG (SPSC) + If (LOr (LEqual (\SPSC, 0x08), LEqual (\SPSC, 0x07))) + { + ADBG ("7_8") + \_SB.PCI0.PL1S (0x78) + } + ElseIf (LEqual (\SPSC, 0x02)) + { + ADBG ("2") + \_SB.PCI0.PL1S (0x60) + } + + \FLPF (0x00) + } + } + ElseIf (LEqual (\VMMC, 0x01)) + { + Store (0x0B, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("MMC") + If (LEqual (\SMMC, 0x01)) + { + ADBG ("COL") + \_SB.PCI0.PL1S (0x60) + } + ElseIf (LEqual (\SMMC, 0x02)) + { + ADBG ("PFM") + \_SB.PCI0.PL1S (0x78) + } + + \FLPF (0x00) + } + } + ElseIf (LEqual (\VMSC, 0x01)) + { + Store (0x0C, \CICF) + \FLPF (0x0E) + If (WOTF) + { + ADBG ("MSC") + \_SB.PCI0.PL1S (\DMSC) + \FLPF (0x00) + } + } + ElseIf (LEqual (\VIFC, 0x01)) + { + Store (0x0A, \CICF) + \FLPF (0x0C) + If (WOTF) + { + ADBG ("IFC") + \_SB.PCI0.PL1S (\DIFC) + \FLPF (0x00) + } + } + ElseIf (LEqual (\VDMC, 0x01)) + { + Store (0x08, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("DMC") + \_SB.PCI0.PL1S (\DDMC) + \FLPF (0x00) + } + } + ElseIf (LEqual (\VCQL, 0x01)) + { + Store (0x01, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("CQL") + \_SB.PCI0.PL1S (\DCQL) + \FLPF (0x00) + } + } + Else + { + ADBG ("Lowest IC Func") + Store (0x00, \CICF) + If (LNot (CondRefOf (\_SB.IETM.DPTE))) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTD) + ADBG ("W/O DYTC") + \FLPF (0x00) + } + } + ElseIf (LEqual (\_SB.IETM.DPTE, 0x00)) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTD) + ADBG ("W/O DYTC") + \FLPF (0x00) + } + } + Else + { + ADBG ("DEF IC CONF") + \FLPF (0x01) + } + } + + If (WOTF) + { + Store (0x00, WOTF) /* \WOTF */ + } + + Store (\VSTD, Local5) + Or (ShiftLeft (\VCQL, 0x01), Local5, Local5) + Or (ShiftLeft (\VTIO, 0x02), Local5, Local5) + Or (ShiftLeft (\VMYH, 0x03), Local5, Local5) + Or (ShiftLeft (\VSTP, 0x04), Local5, Local5) + Or (ShiftLeft (\VCQH, 0x05), Local5, Local5) + Or (ShiftLeft (\VDCC, 0x06), Local5, Local5) + Or (ShiftLeft (\VSFN, 0x07), Local5, Local5) + Or (ShiftLeft (\VDMC, 0x08), Local5, Local5) + Or (ShiftLeft (\VFHP, 0x09), Local5, Local5) + Or (ShiftLeft (\VIFC, 0x0A), Local5, Local5) + Or (ShiftLeft (\VMMC, 0x0B), Local5, Local5) + Or (ShiftLeft (\VMSC, 0x0C), Local5, Local5) + Or (ShiftLeft (\VPSC, 0x0D), Local5, Local5) + Or (ShiftLeft (\VCSC, 0x0E), Local5, Local5) + Store (ShiftLeft (\CICF, 0x08), Local1) + If (LEqual (\CICF, 0x03)) + { + Store (\SMYH, \CICM) + } + ElseIf (LEqual (\CICF, 0x0B)) + { + Store (\SMMC, \CICM) + } + ElseIf (LEqual (\CICF, 0x0D)) + { + Store (\SPSC, \CICM) + } + Else + { + Store (0x0F, \CICM) + } + + Or (ShiftLeft (\CICM, 0x0C), Local1, Local1) + Or (ShiftLeft (Local5, 0x10), Local1, Local1) + Or (Local1, 0x01, Local1) + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6032) + } + } + Case (0x02) + { + Store (\VSTD, Local5) + Or (ShiftLeft (\VCQL, 0x01), Local5, Local5) + Or (ShiftLeft (\VTIO, 0x02), Local5, Local5) + Or (ShiftLeft (\VMYH, 0x03), Local5, Local5) + Or (ShiftLeft (\VSTP, 0x04), Local5, Local5) + Or (ShiftLeft (\VCQH, 0x05), Local5, Local5) + Or (ShiftLeft (\VDCC, 0x06), Local5, Local5) + Or (ShiftLeft (\VSFN, 0x07), Local5, Local5) + Or (ShiftLeft (\VDMC, 0x08), Local5, Local5) + Or (ShiftLeft (\VFHP, 0x09), Local5, Local5) + Or (ShiftLeft (\VIFC, 0x0A), Local5, Local5) + Or (ShiftLeft (\VMMC, 0x0B), Local5, Local5) + Or (ShiftLeft (\VMSC, 0x0C), Local5, Local5) + Or (ShiftLeft (\VPSC, 0x0D), Local5, Local5) + Or (ShiftLeft (\VCSC, 0x0E), Local5, Local5) + Store (ShiftLeft (\CICF, 0x08), Local1) + If (LEqual (\CICF, 0x03)) + { + Store (\SMYH, \CICM) + } + ElseIf (LEqual (\CICF, 0x0B)) + { + Store (\SMMC, \CICM) + } + ElseIf (LEqual (\CICF, 0x0D)) + { + Store (\SPSC, \CICM) + } + Else + { + Store (0x0F, \CICM) + } + + Or (ShiftLeft (\CICM, 0x0C), Local1, Local1) + Or (ShiftLeft (Local5, 0x10), Local1, Local1) + Or (Local1, 0x01, Local1) + } + Case (0x03) + { + Store (ShiftLeft (FCAP, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x04) + { + Store (ShiftLeft (MYHC, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x06) + { + And (ShiftRight (Local0, 0x09), 0x0F, Local2) + If (LNotEqual (Local2, 0x01)) + { + Store (ShiftLeft (MMCC, 0x10), Local1) + } + Else + { + Store (ShiftLeft (0x02, 0x08), Local1) + } + + Or (Local1, 0x01, Local1) + } + Case (0x05) + { + If (LNotEqual (0x00, 0x01)) + { + Store (ShiftLeft (0x05, 0x08), Local1) + Or (Local1, ShiftLeft (0x010E, 0x14), Local1) + } + + Or (Local1, 0x01, Local1) + } + Case (0x0100) + { + Store (ShiftLeft (0x1001, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x01FF) + { + ADBG (" DYTC_CMD_RESET") + Store (0x00, \VCQL) + Store (0x00, \VTIO) + Store (0x00, \VMYH) + Store (0x00, \VSTP) + Store (0x00, \VCQH) + Store (0x00, \VDCC) + Store (0x00, \VSFN) + Store (0x00, \VDMC) + Store (0x00, \VFHP) + Store (0x00, \VIFC) + Store (0x00, \VMMC) + Store (0x00, \VMSC) + Store (0x00, \VPSC) + Store (0x00, \VCSC) + Store (0x00, \SMYH) + Store (0x00, \SMMC) + Store (0x00, \SPSC) + Store (0x00, \CICF) + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTD) + } + + \FLPF (0x01) + NVST (0x3C) + Store (0x0F, \CICM) + Store (\VSTD, Local5) + Or (ShiftLeft (\VCQL, 0x01), Local5, Local5) + Or (ShiftLeft (\VTIO, 0x02), Local5, Local5) + Or (ShiftLeft (\VMYH, 0x03), Local5, Local5) + Or (ShiftLeft (\VSTP, 0x04), Local5, Local5) + Or (ShiftLeft (\VCQH, 0x05), Local5, Local5) + Or (ShiftLeft (\VDCC, 0x06), Local5, Local5) + Or (ShiftLeft (\VSFN, 0x07), Local5, Local5) + Or (ShiftLeft (\VDMC, 0x08), Local5, Local5) + Or (ShiftLeft (\VFHP, 0x09), Local5, Local5) + Or (ShiftLeft (\VIFC, 0x0A), Local5, Local5) + Or (ShiftLeft (\VMMC, 0x0B), Local5, Local5) + Or (ShiftLeft (\VMSC, 0x0C), Local5, Local5) + Or (ShiftLeft (\VPSC, 0x0D), Local5, Local5) + Or (ShiftLeft (\VCSC, 0x0E), Local5, Local5) + Store (ShiftLeft (\CICF, 0x08), Local1) + Or (ShiftLeft (\CICM, 0x0C), Local1, Local1) + Or (ShiftLeft (Local5, 0x10), Local1, Local1) + Or (Local1, 0x01, Local1) + } + Default + { + ShiftLeft (0x02, 0x01, Local1) + } + + } + } + Else + { + ShiftLeft (0x04, 0x01, Local1) + } + + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + Name (GPTL, 0x3C) + Name (ANGN, 0x00) + Method (NVST, 1, NotSerialized) + { + Store (Arg0, \_SB.PCI0.LPCB.EC.HKEY.GPTL) + If (LAnd (ANGN, LNotEqual (\_SB.PCI0.LPCB.EC.VPON, 0x00))) + { + If (CondRefOf (\_SB.PCI0.RP09.PEGP.CPPC)) + { + \_SB.PCI0.RP09.PEGP.NVST () + } + } + } + } + + Scope (\_SB.PCI0) + { + Method (PL1S, 1, NotSerialized) + { + ADBG (Concatenate ("PL1S Value1=", ToHexString (Arg0))) + ADBG (Concatenate ("PL1S PTDP1 =", ToHexString (\_SB.PCI0.PTDP))) + If (LEqual (\_SB.PCI0.PTDP, Arg0)) + { + Store (Arg0, \PT0D) + \_SB.PCI0.CTCN () + ADBG (" MMIO 1") + } + ElseIf (LGreater (\_SB.PCI0.PTDP, Arg0)) + { + If (LGreaterEqual (\_PR.CLVL, 0x01)) + { + Store (Arg0, \PT1D) + \_SB.PCI0.CTCD () + ADBG (" MMIO 2") + } + Else + { + Store (Arg0, \PT0D) + \_SB.PCI0.CTCN () + ADBG (" MMIO 3") + } + } + ElseIf (LLess (\_SB.PCI0.PTDP, Arg0)) + { + If (LGreater (\_PR.CLVL, 0x02)) + { + Store (Arg0, \PT0D) + \_SB.PCI0.CTCN () + ADBG (" MMIO 4") + } + } + } + } + + Scope (\_SB.PCI0) + { + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (ATMC, 0, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + If (HPAC) + { + Store (\TCFA, Local0) + Store (\TCTA, Local1) + Store (Or (ShiftLeft (Local1, 0x04), Local0), Local2) + XOr (Local2, ATMX, Local3) + Store (Local2, ATMX) /* \_SB_.PCI0.LPCB.EC__.ATMX */ + If (LEqual (\TCTA, 0x00)) + { + Store (\TCR0, \TCRT) + Store (\TPS0, \TPSV) + } + ElseIf (LEqual (\TCTA, 0x01)) + { + Store (\TCR1, \TCRT) + Store (\TPS1, \TPSV) + } + Else + { + } + } + Else + { + Store (\TCFD, Local0) + Store (\TCTD, Local1) + Store (Or (ShiftLeft (Local1, 0x04), Local0), Local2) + XOr (Local2, ATMX, Local3) + Store (Local2, ATMX) /* \_SB_.PCI0.LPCB.EC__.ATMX */ + If (LEqual (\TCTD, 0x00)) + { + Store (\TCR0, \TCRT) + Store (\TPS0, \TPSV) + } + ElseIf (LEqual (\TCTD, 0x01)) + { + Store (\TCR1, \TCRT) + Store (\TPS1, \TPSV) + } + Else + { + } + } + + If (Local3) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6030) + } + } + + Notify (\_TZ.THM0, 0x81) // Thermal Trip Point Change + } + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Device (ITSD) + { + Name (_HID, EisaId ("LEN0100")) // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + } + + Scope (\_TZ) + { + ThermalZone (THM0) + { + Method (_CRT, 0, Serialized) // _CRT: Critical Temperature + { + Return (\TCRT) + } + + Method (_TMP, 0, Serialized) // _TMP: Temperature + { + If (\H8DR) + { + Store (\_SB.PCI0.LPCB.EC.TMP0, Local0) + Store (\_SB.PCI0.LPCB.EC.TSL2, Local1) + Store (\_SB.PCI0.LPCB.EC.TSL3, Local2) + } + Else + { + Store (\RBEC (0x78), Local0) + Store (And (\RBEC (0x8A), 0x7F), Local1) + Store (And (\RBEC (0x8B), 0x7F), Local2) + } + + If (LEqual (Local0, 0x80)) + { + Store (0x30, Local0) + } + + If (Local2) + { + \TSDL () + Return (\TCRT) + } + + If (LNot (\_SB.PCI0.LPCB.EC.HKEY.DHKC)) + { + If (Local1) + { + \TSDL () + Return (\TCRT) + } + } + + Return (_C2K (Local0)) + } + } + + Method (_C2K, 1, Serialized) + { + Add (Multiply (Arg0, 0x0A), 0x0AAC, Local0) + If (LLessEqual (Local0, 0x0AAC)) + { + Store (0x0C8C, Local0) + } + ElseIf (LGreater (Local0, 0x0FAC)) + { + Store (0x0C8C, Local0) + } + + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q40, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF + { + Notify (\_TZ.THM0, 0x80) // Thermal Status Change + If (\H8DR) + { + Store (\_SB.PCI0.LPCB.EC.TSL2, Local1) + Store (\_SB.PCI0.LPCB.EC.TSL1, Local2) + } + Else + { + Store (And (\RBEC (0x8A), 0x7F), Local1) + Store (And (\RBEC (0x89), 0x7F), Local2) + } + + If (And (Local2, 0x76)) + { + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x001F4001) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F4001) + } + + If (LAnd (\_SB.PCI0.LPCB.EC.HKEY.DHKC, Local1)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6022) + } + + If (LNot (\VIGD)) + { + \VTHR () + } + } + } + + Scope (\_SI) + { + Method (_SST, 1, NotSerialized) // _SST: System Status + { + If (LEqual (Arg0, 0x00)) + { + \_SB.PCI0.LPCB.EC.LED (0x00, 0x00) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x00) + \_SB.PCI0.LPCB.EC.LED (0x07, 0x00) + } + + If (LEqual (Arg0, 0x01)) + { + If (LOr (\SPS, \WNTF)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x05) + } + + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x07, 0x00) + } + + If (LEqual (Arg0, 0x02)) + { + \_SB.PCI0.LPCB.EC.LED (0x00, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x07, 0xC0) + } + + If (LEqual (Arg0, 0x03)) + { + If (LGreater (\SPS, 0x03)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x07) + } + ElseIf (LEqual (\SPS, 0x03)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x03) + } + Else + { + \_SB.PCI0.LPCB.EC.BEEP (0x04) + } + + If (LEqual (\SPS, 0x03)){} + Else + { + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x80) + } + + \_SB.PCI0.LPCB.EC.LED (0x07, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x00, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xC0) + } + + If (LEqual (Arg0, 0x04)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x03) + \_SB.PCI0.LPCB.EC.LED (0x07, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x00, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xC0) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-0-DptfTabl.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-0-DptfTabl.dsl new file mode 100644 index 0000000..077b82d --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-0-DptfTabl.dsl @@ -0,0 +1,5650 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-0-DptfTabl.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000099B2 (39346) + * Revision 0x02 + * Checksum 0x17 + * OEM ID "LENOVO" + * OEM Table ID "DptfTabl" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "DptfTabl", 0x00001000) +{ + External (_PR_.AAC0, FieldUnitObj) + External (_PR_.ACRT, FieldUnitObj) + External (_PR_.APSV, FieldUnitObj) + External (_PR_.CBMI, FieldUnitObj) + External (_PR_.CFGD, FieldUnitObj) + External (_PR_.CLVL, FieldUnitObj) + External (_PR_.CPPC, FieldUnitObj) + External (_PR_.CTC0, FieldUnitObj) + External (_PR_.CTC1, FieldUnitObj) + External (_PR_.CTC2, FieldUnitObj) + External (_PR_.HDCE, FieldUnitObj) + External (_PR_.PL10, FieldUnitObj) + External (_PR_.PL11, FieldUnitObj) + External (_PR_.PL12, FieldUnitObj) + External (_PR_.PL20, FieldUnitObj) + External (_PR_.PL21, FieldUnitObj) + External (_PR_.PL22, FieldUnitObj) + External (_PR_.PLW0, FieldUnitObj) + External (_PR_.PLW1, FieldUnitObj) + External (_PR_.PLW2, FieldUnitObj) + External (_PR_.PR00, ProcessorObj) + External (_PR_.PR00._PSS, MethodObj) // 0 Arguments + External (_PR_.PR00._TPC, IntObj) + External (_PR_.PR00._TSD, MethodObj) // 0 Arguments + External (_PR_.PR00._TSS, MethodObj) // 0 Arguments + External (_PR_.PR00.LPSS, PkgObj) + External (_PR_.PR00.TPSS, PkgObj) + External (_PR_.PR00.TSMC, PkgObj) + External (_PR_.PR00.TSMF, PkgObj) + External (_PR_.PR01, ProcessorObj) + External (_PR_.PR02, ProcessorObj) + External (_PR_.PR03, ProcessorObj) + External (_PR_.PR04, ProcessorObj) + External (_PR_.PR05, ProcessorObj) + External (_PR_.PR06, ProcessorObj) + External (_PR_.PR07, ProcessorObj) + External (_PR_.PR08, ProcessorObj) + External (_PR_.PR09, ProcessorObj) + External (_PR_.PR10, ProcessorObj) + External (_PR_.PR11, ProcessorObj) + External (_PR_.PR12, ProcessorObj) + External (_PR_.PR13, ProcessorObj) + External (_PR_.PR14, ProcessorObj) + External (_PR_.PR15, ProcessorObj) + External (_PR_.TAR0, FieldUnitObj) + External (_PR_.TAR1, FieldUnitObj) + External (_PR_.TAR2, FieldUnitObj) + External (_SB_.OSCP, IntObj) + External (_SB_.PAGD, DeviceObj) + External (_SB_.PAGD._PUR, PkgObj) + External (_SB_.PAGD._STA, MethodObj) // 0 Arguments + External (_SB_.PCI0, DeviceObj) + External (_SB_.PCI0.B0D4, DeviceObj) + External (_SB_.PCI0.LPCB.EC__, DeviceObj) + External (_SB_.PCI0.LPCB.EC__.HKEY.DHKC, IntObj) + External (_SB_.PCI0.LPCB.EC__.HKEY.DYTC, MethodObj) // 1 Arguments + External (_SB_.PCI0.MHBR, FieldUnitObj) + External (_SB_.SLPB, DeviceObj) + External (_TZ_._C2K, MethodObj) // 1 Arguments + External (_TZ_.THM0, ThermalZoneObj) + External (_TZ_.THM0._TMP, MethodObj) // 0 Arguments + External (ACTT, IntObj) + External (ADBG, MethodObj) // 1 Arguments + External (APPE, IntObj) + External (ATMC, IntObj) + External (ATPC, IntObj) + External (CHGE, IntObj) + External (CPUS, IntObj) + External (CRTT, IntObj) + External (CTDP, IntObj) + External (DCFE, IntObj) + External (DCMP, IntObj) + External (DISE, IntObj) + External (DPAP, IntObj) + External (DPCP, IntObj) + External (DPHL, IntObj) + External (DPLL, IntObj) + External (DPPP, IntObj) + External (DPTF, IntObj) + External (ECEU, IntObj) + External (FND1, IntObj) + External (FND2, IntObj) + External (G1AT, IntObj) + External (G1C3, IntObj) + External (G1CT, IntObj) + External (G1HT, IntObj) + External (G1PT, IntObj) + External (G2AT, IntObj) + External (G2C3, IntObj) + External (G2CT, IntObj) + External (G2HT, IntObj) + External (G2PT, IntObj) + External (G3AT, IntObj) + External (G3C3, IntObj) + External (G3CT, IntObj) + External (G3HT, IntObj) + External (G3PT, IntObj) + External (G4AT, IntObj) + External (G4C3, IntObj) + External (G4CT, IntObj) + External (G4HT, IntObj) + External (G4PT, IntObj) + External (G5AT, IntObj) + External (G5C3, IntObj) + External (G5CT, IntObj) + External (G5HT, IntObj) + External (G5PT, IntObj) + External (G6AT, IntObj) + External (G6C3, IntObj) + External (G6CT, IntObj) + External (G6HT, IntObj) + External (G6PT, IntObj) + External (G7AT, IntObj) + External (G7C3, IntObj) + External (G7CT, IntObj) + External (G7HT, IntObj) + External (G7PT, IntObj) + External (G8AT, IntObj) + External (G8C3, IntObj) + External (G8CT, IntObj) + External (G8HT, IntObj) + External (G8PT, IntObj) + External (GN1E, IntObj) + External (GN2E, IntObj) + External (GN3E, IntObj) + External (GN4E, IntObj) + External (GN5E, IntObj) + External (GN6E, IntObj) + External (GN7E, IntObj) + External (GN8E, IntObj) + External (GTST, MethodObj) // 0 Arguments + External (HIDW, MethodObj) // 4 Arguments + External (HIWC, MethodObj) // 1 Arguments + External (ICAE, IntObj) + External (ICAT, IntObj) + External (ICC3, IntObj) + External (ICCR, IntObj) + External (ICHT, IntObj) + External (ICPV, IntObj) + External (LPER, IntObj) + External (LPMP, IntObj) + External (LPMV, IntObj) + External (LPOE, IntObj) + External (LPOP, IntObj) + External (LPOS, IntObj) + External (LPOW, IntObj) + External (MPL0, IntObj) + External (MPL1, IntObj) + External (MPL2, IntObj) + External (ODV0, IntObj) + External (ODV1, IntObj) + External (ODV2, IntObj) + External (ODV3, IntObj) + External (ODV4, IntObj) + External (ODV5, IntObj) + External (ODV6, IntObj) + External (ODV7, IntObj) + External (ODV8, IntObj) + External (ODV9, IntObj) + External (ODVA, IntObj) + External (ODVB, IntObj) + External (ODVC, IntObj) + External (ODVD, IntObj) + External (ODVE, IntObj) + External (ODVF, IntObj) + External (ODVG, IntObj) + External (ODVH, IntObj) + External (ODVI, IntObj) + External (ODVJ, IntObj) + External (PBPE, IntObj) + External (PC00, IntObj) + External (PEAT, IntObj) + External (PEC3, IntObj) + External (PECR, IntObj) + External (PEHT, IntObj) + External (PEPV, IntObj) + External (PERE, IntObj) + External (PIDE, IntObj) + External (PNHM, IntObj) + External (PPPR, IntObj) + External (PPSZ, IntObj) + External (PSVT, IntObj) + External (PTMC, IntObj) + External (PTPC, IntObj) + External (PVSC, IntObj) + External (PWRE, IntObj) + External (PWRS, IntObj) + External (S1AT, IntObj) + External (S1CT, IntObj) + External (S1DE, IntObj) + External (S1HT, IntObj) + External (S1PT, IntObj) + External (S1S3, IntObj) + External (S2AT, IntObj) + External (S2CT, IntObj) + External (S2DE, IntObj) + External (S2HT, IntObj) + External (S2PT, IntObj) + External (S2S3, IntObj) + External (S3AT, IntObj) + External (S3CT, IntObj) + External (S3DE, IntObj) + External (S3HT, IntObj) + External (S3PT, IntObj) + External (S3S3, IntObj) + External (S4AT, IntObj) + External (S4CT, IntObj) + External (S4DE, IntObj) + External (S4HT, IntObj) + External (S4PT, IntObj) + External (S4S3, IntObj) + External (S5AT, IntObj) + External (S5CT, IntObj) + External (S5DE, IntObj) + External (S5HT, IntObj) + External (S5PT, IntObj) + External (S5S3, IntObj) + External (S6AT, IntObj) + External (S6CT, IntObj) + External (S6DE, IntObj) + External (S6HT, IntObj) + External (S6PT, IntObj) + External (S6S3, IntObj) + External (S7AT, IntObj) + External (S7CT, IntObj) + External (S7DE, IntObj) + External (S7HT, IntObj) + External (S7PT, IntObj) + External (S7S3, IntObj) + External (S8AT, IntObj) + External (S8CT, IntObj) + External (S8DE, IntObj) + External (S8HT, IntObj) + External (S8PT, IntObj) + External (S8S3, IntObj) + External (SAC3, IntObj) + External (SACR, IntObj) + External (SADE, IntObj) + External (SAHT, IntObj) + External (SSP1, IntObj) + External (SSP2, IntObj) + External (SSP3, IntObj) + External (SSP4, IntObj) + External (SSP5, IntObj) + External (SSP6, IntObj) + External (SSP7, IntObj) + External (SSP8, IntObj) + External (STAT, IntObj) + External (STC3, IntObj) + External (STCT, IntObj) + External (STDV, IntObj) + External (STGE, IntObj) + External (STHT, IntObj) + External (STPT, IntObj) + External (TCNT, IntObj) + External (TGFG, IntObj) + External (TRTV, IntObj) + External (TSOD, IntObj) + External (TSP1, IntObj) + External (TSP2, IntObj) + External (TSP3, IntObj) + External (TSP4, IntObj) + External (TSP5, IntObj) + External (TSP6, IntObj) + External (TSP7, IntObj) + External (TSP8, IntObj) + External (V1AT, IntObj) + External (V1C3, IntObj) + External (V1CR, IntObj) + External (V1HT, IntObj) + External (V1PV, IntObj) + External (V2AT, IntObj) + External (V2C3, IntObj) + External (V2CR, IntObj) + External (V2HT, IntObj) + External (V2PV, IntObj) + External (VSP1, IntObj) + External (VSP2, IntObj) + External (VSPE, IntObj) + External (WAND, IntObj) + External (WFAT, IntObj) + External (WFC3, IntObj) + External (WFCT, IntObj) + External (WFHT, IntObj) + External (WFPT, IntObj) + External (WIFD, IntObj) + External (WTSP, IntObj) + External (WWAT, IntObj) + External (WWC3, IntObj) + External (WWCT, IntObj) + External (WWHT, IntObj) + External (WWPT, IntObj) + + Scope (\_SB) + { + Device (IETM) + { + Name (_HID, EisaId ("INT3400") /* Intel Dynamic Power Performance Management */) // _HID: Hardware ID + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (DPTF, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + + Name (TMPP, Package (0x0E) + { + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + } + }) + Name (PTRP, Zero) + Name (PSEM, Zero) + Name (ATRP, Zero) + Name (ASEM, Zero) + Name (YTRP, Zero) + Name (YSEM, Zero) + Name (DPTE, Zero) + Method (IDSP, 0, Serialized) + { + Name (TMPI, Zero) + If (LAnd (LEqual (\DPPP, 0x02), CondRefOf (DP2P))) + { + Store (DerefOf (Index (DP2P, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPPP, One), CondRefOf (DPSP))) + { + Store (DerefOf (Index (DPSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPAP, One), CondRefOf (DASP))) + { + Store (DerefOf (Index (DASP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPAP, 0x02), CondRefOf (DA2P))) + { + Store (DerefOf (Index (DA2P, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPCP, One), CondRefOf (DCSP))) + { + Store (DerefOf (Index (DCSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DCMP, One), CondRefOf (DMSP))) + { + Store (DerefOf (Index (DMSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (CondRefOf (LPSP)) + { + If (LAnd (LEqual (\SADE, One), LEqual (\LPMP, One))) + { + Store (DerefOf (Index (LPSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + } + + If (CondRefOf (CTSP)) + { + If (LAnd (LEqual (\SADE, One), LEqual (\CTDP, One))) + { + Store (DerefOf (Index (CTSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + } + + If (LAnd (LEqual (\PBPE, One), CondRefOf (POBP))) + { + Store (DerefOf (Index (POBP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\_PR.HDCE, One), CondRefOf (HDCP))) + { + Store (DerefOf (Index (HDCP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\APPE, One), CondRefOf (DAPP))) + { + Store (DerefOf (Index (DAPP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\VSPE, One), CondRefOf (DVSP))) + { + Store (DerefOf (Index (DVSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\PIDE, One), CondRefOf (DPID))) + { + Store (DerefOf (Index (DPID, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + Return (TMPP) /* \_SB_.IETM.TMPP */ + } + + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Name (NUMP, Zero) + Name (UID2, Buffer (0x10) + { + /* 0000 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0008 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........ + }) + CreateDWordField (Arg3, Zero, STS1) + CreateDWordField (Arg3, 0x04, CAP1) + If (And (CAP1, One)) + { + If (LEqual (DPTE, Zero)) + { + Store (One, DPTE) /* \_SB_.IETM.DPTE */ + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F0001) + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC){} + } + } + ElseIf (LEqual (DPTE, One)) + { + Store (Zero, DPTE) /* \_SB_.IETM.DPTE */ + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x01FF) + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC){} + } + + ADBG (Concatenate ("OSC->DPTE=", ToHexString (DPTE))) + IDSP () + Store (SizeOf (TMPP), NUMP) /* \_SB_.IETM._OSC.NUMP */ + CreateDWordField (Arg0, Zero, IID0) + CreateDWordField (Arg0, 0x04, IID1) + CreateDWordField (Arg0, 0x08, IID2) + CreateDWordField (Arg0, 0x0C, IID3) + CreateDWordField (UID2, Zero, EID0) + CreateDWordField (UID2, 0x04, EID1) + CreateDWordField (UID2, 0x08, EID2) + CreateDWordField (UID2, 0x0C, EID3) + While (NUMP) + { + Store (DerefOf (Index (TMPP, Subtract (NUMP, One))), UID2) /* \_SB_.IETM._OSC.UID2 */ + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, + EID2), LEqual (IID3, EID3)))) + { + Break + } + + Decrement (NUMP) + } + + If (LEqual (NUMP, Zero)) + { + And (STS1, 0xFFFFFF00, STS1) /* \_SB_.IETM._OSC.STS1 */ + Or (STS1, 0x06, STS1) /* \_SB_.IETM._OSC.STS1 */ + Return (Arg3) + } + + If (LNotEqual (Arg1, One)) + { + And (STS1, 0xFFFFFF00, STS1) /* \_SB_.IETM._OSC.STS1 */ + Or (STS1, 0x0A, STS1) /* \_SB_.IETM._OSC.STS1 */ + Return (Arg3) + } + + If (LNotEqual (Arg2, 0x02)) + { + And (STS1, 0xFFFFFF00, STS1) /* \_SB_.IETM._OSC.STS1 */ + Or (STS1, 0x02, STS1) /* \_SB_.IETM._OSC.STS1 */ + Return (Arg3) + } + + If (LAnd (LEqual (\DPPP, 0x02), CondRefOf (\_PR.APSV))) + { + If (LEqual (PSEM, Zero)) + { + Store (One, PSEM) /* \_SB_.IETM.PSEM */ + Store (\_PR.APSV, PTRP) /* \_SB_.IETM.PTRP */ + } + + If (CondRefOf (DP2P)) + { + Store (DerefOf (Index (DP2P, Zero)), UID2) /* \_SB_.IETM._OSC.UID2 */ + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, + EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.APSV) /* External reference */ + } + Else + { + Store (PTRP, \_PR.APSV) /* External reference */ + } + + Notify (\_TZ.THM0, 0x81) // Information Change + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPPP, One), CondRefOf (\_PR.APSV))) + { + If (LEqual (PSEM, Zero)) + { + Store (One, PSEM) /* \_SB_.IETM.PSEM */ + Store (\_PR.APSV, PTRP) /* \_SB_.IETM.PTRP */ + } + + If (CondRefOf (DPSP)) + { + Store (DerefOf (Index (DPSP, Zero)), UID2) /* \_SB_.IETM._OSC.UID2 */ + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, + EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.APSV) /* External reference */ + } + Else + { + Store (PTRP, \_PR.APSV) /* External reference */ + } + + Notify (\_TZ.THM0, 0x81) // Information Change + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\PIDE, One), CondRefOf (\_PR.APSV))) + { + If (LEqual (PSEM, Zero)) + { + Store (One, PSEM) /* \_SB_.IETM.PSEM */ + Store (\_PR.APSV, PTRP) /* \_SB_.IETM.PTRP */ + } + + If (CondRefOf (DPID)) + { + Store (DerefOf (Index (DPID, Zero)), UID2) /* \_SB_.IETM._OSC.UID2 */ + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, + EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.APSV) /* External reference */ + } + Else + { + Store (PTRP, \_PR.APSV) /* External reference */ + } + + Notify (\_TZ.THM0, 0x81) // Information Change + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPAP, One), CondRefOf (\_PR.AAC0))) + { + If (LEqual (ASEM, Zero)) + { + Store (One, ASEM) /* \_SB_.IETM.ASEM */ + Store (\_PR.AAC0, ATRP) /* \_SB_.IETM.ATRP */ + } + + If (CondRefOf (DASP)) + { + Store (DerefOf (Index (DASP, Zero)), UID2) /* \_SB_.IETM._OSC.UID2 */ + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, + EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.AAC0) /* External reference */ + } + Else + { + Store (ATRP, \_PR.AAC0) /* External reference */ + } + + Notify (\_TZ.THM0, 0x81) // Information Change + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPAP, 0x02), CondRefOf (\_PR.AAC0))) + { + If (LEqual (ASEM, Zero)) + { + Store (One, ASEM) /* \_SB_.IETM.ASEM */ + Store (\_PR.AAC0, ATRP) /* \_SB_.IETM.ATRP */ + } + + If (CondRefOf (DA2P)) + { + Store (DerefOf (Index (DA2P, Zero)), UID2) /* \_SB_.IETM._OSC.UID2 */ + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, + EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.AAC0) /* External reference */ + } + Else + { + Store (ATRP, \_PR.AAC0) /* External reference */ + } + + Notify (\_TZ.THM0, 0x81) // Information Change + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPCP, One), CondRefOf (\_PR.ACRT))) + { + If (LEqual (YSEM, Zero)) + { + Store (One, YSEM) /* \_SB_.IETM.YSEM */ + Store (\_PR.ACRT, YTRP) /* \_SB_.IETM.YTRP */ + } + + If (CondRefOf (DCSP)) + { + Store (DerefOf (Index (DCSP, Zero)), UID2) /* \_SB_.IETM._OSC.UID2 */ + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, + EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0xD2, \_PR.ACRT) /* External reference */ + } + Else + { + Store (YTRP, \_PR.ACRT) /* External reference */ + } + + Notify (\_TZ.THM0, 0x81) // Information Change + } + + Return (Arg3) + } + } + + Return (Arg3) + } + + Method (KTOC, 1, Serialized) + { + If (LGreater (Arg0, 0x0AAC)) + { + Return (Divide (Subtract (Arg0, 0x0AAC), 0x0A, )) + } + Else + { + Return (Zero) + } + } + + Method (CTOK, 1, Serialized) + { + Return (Add (Multiply (Arg0, 0x0A), 0x0AAC)) + } + + Name (VERS, Zero) + Name (CTYP, Zero) + Name (ALMT, Zero) + Name (PLMT, Zero) + Name (WKLD, Zero) + Name (DSTA, Zero) + Name (RES1, Zero) + Method (DSCP, 7, Serialized) + { + Name (CHNG, Zero) + If (LNotEqual (Arg0, Zero)) + { + Return (Zero) + } + + If (LOr (LEqual (Arg1, Zero), LEqual (Arg1, One))) + { + If (LNotEqual (Arg1, CTYP)) + { + Store (One, CHNG) /* \_SB_.IETM.DSCP.CHNG */ + Store (Arg1, CTYP) /* \_SB_.IETM.CTYP */ + } + } + + If (LOr (LGreaterEqual (Arg1, Zero), LLessEqual (Arg1, 0x05))) + { + If (LNotEqual (Arg2, ALMT)) + { + Store (One, CHNG) /* \_SB_.IETM.DSCP.CHNG */ + Store (Arg2, ALMT) /* \_SB_.IETM.ALMT */ + } + } + + If (LOr (LGreaterEqual (Arg1, Zero), LLessEqual (Arg1, 0x05))) + { + If (LNotEqual (Arg3, PLMT)) + { + Store (One, CHNG) /* \_SB_.IETM.DSCP.CHNG */ + Store (Arg3, PLMT) /* \_SB_.IETM.PLMT */ + } + } + + If (LNotEqual (Arg4, WKLD)) + { + Store (One, CHNG) /* \_SB_.IETM.DSCP.CHNG */ + Store (Arg4, WKLD) /* \_SB_.IETM.WKLD */ + } + + If (LNotEqual (Arg5, DSTA)) + { + Store (One, CHNG) /* \_SB_.IETM.DSCP.CHNG */ + Store (Arg5, DSTA) /* \_SB_.IETM.DSTA */ + } + + If (LNotEqual (Arg6, RES1)) + { + Store (One, CHNG) /* \_SB_.IETM.DSCP.CHNG */ + Store (Arg6, RES1) /* \_SB_.IETM.RES1 */ + } + + If (CHNG) + { + If (LEqual (\DPPP, One)) + { + Notify (\_SB.IETM, 0x83) // Device-Specific Change + } + + If (LEqual (\DPPP, 0x02)) + { + Notify (\_SB.IETM, 0x87) // Device-Specific + } + + If (LEqual (\DPAP, One)) + { + Notify (\_SB.IETM, 0x84) // Reserved + } + } + } + + Method (DCFG, 0, NotSerialized) + { + Return (\DCFE) /* External reference */ + } + + Name (ODVX, Package (0x14) + { + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero + }) + Method (ODVP, 0, Serialized) + { + Store (\ODV0, Index (ODVX, Zero)) + Store (\ODV1, Index (ODVX, One)) + Store (\ODV2, Index (ODVX, 0x02)) + Store (\ODV3, Index (ODVX, 0x03)) + Store (\ODV4, Index (ODVX, 0x04)) + Store (\ODV5, Index (ODVX, 0x05)) + Store (\ODV6, Index (ODVX, 0x06)) + Store (\ODV7, Index (ODVX, 0x07)) + Store (\ODV8, Index (ODVX, 0x08)) + Store (\ODV9, Index (ODVX, 0x09)) + Store (\ODVA, Index (ODVX, 0x0A)) + Store (\ODVB, Index (ODVX, 0x0B)) + Store (\ODVC, Index (ODVX, 0x0C)) + Store (\ODVD, Index (ODVX, 0x0D)) + Store (\ODVE, Index (ODVX, 0x0E)) + Store (\ODVF, Index (ODVX, 0x0F)) + Store (\ODVG, Index (ODVX, 0x10)) + Store (\ODVH, Index (ODVX, 0x11)) + Store (\ODVI, Index (ODVX, 0x12)) + Store (\ODVJ, Index (ODVX, 0x13)) + Return (ODVX) /* \_SB_.IETM.ODVX */ + } + } + } + + Scope (\_SB.PCI0.B0D4) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (\SADE, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + + OperationRegion (MBAR, SystemMemory, Add (ShiftLeft (MHBR, 0x0F), 0x5000), 0x1000) + Field (MBAR, ByteAcc, NoLock, Preserve) + { + Offset (0x930), + PTDP, 15, + Offset (0x932), + PMIN, 15, + Offset (0x934), + PMAX, 15, + Offset (0x936), + TMAX, 7, + Offset (0x938), + PWRU, 4, + Offset (0x939), + EGYU, 5, + Offset (0x93A), + TIMU, 4, + Offset (0x958), + Offset (0x95C), + LPMS, 1, + CTNL, 2, + Offset (0x978), + PCTP, 8, + Offset (0x998), + RP0C, 8, + RP1C, 8, + RPNC, 8, + Offset (0xF3C), + TRAT, 8, + Offset (0xF40), + PTD1, 15, + Offset (0xF42), + TRA1, 8, + Offset (0xF44), + PMX1, 15, + Offset (0xF46), + PMN1, 15, + Offset (0xF48), + PTD2, 15, + Offset (0xF4A), + TRA2, 8, + Offset (0xF4C), + PMX2, 15, + Offset (0xF4E), + PMN2, 15, + Offset (0xF50), + CTCL, 2, + , 29, + CLCK, 1, + MNTR, 8 + } + + Name (XPCC, Zero) + Method (PPCC, 0, Serialized) + { + If (LAnd (LEqual (XPCC, Zero), CondRefOf (\_PR.CBMI))) + { + Switch (ToInteger (\_PR.CBMI)) + { + Case (Zero) + { + If (LAnd (LGreaterEqual (\_PR.CLVL, One), LLessEqual (\_PR.CLVL, 0x03))) + { + CPL0 () + Store (One, XPCC) /* \_SB_.PCI0.B0D4.XPCC */ + } + } + Case (One) + { + If (LOr (LEqual (\_PR.CLVL, 0x02), LEqual (\_PR.CLVL, 0x03))) + { + CPL1 () + Store (One, XPCC) /* \_SB_.PCI0.B0D4.XPCC */ + } + } + Case (0x02) + { + If (LEqual (\_PR.CLVL, 0x03)) + { + CPL2 () + Store (One, XPCC) /* \_SB_.PCI0.B0D4.XPCC */ + } + } + + } + } + + Return (NPCC) /* \_SB_.PCI0.B0D4.NPCC */ + } + + Name (NPCC, Package (0x03) + { + 0x02, + Package (0x06) + { + Zero, + 0x88B8, + 0xAFC8, + 0x6D60, + 0x7D00, + 0x03E8 + }, + + Package (0x06) + { + One, + 0xDBBA, + 0xDBBA, + Zero, + Zero, + 0x03E8 + } + }) + Method (CPNU, 2, Serialized) + { + Name (CNVT, Zero) + Name (PPUU, Zero) + Name (RMDR, Zero) + If (LEqual (PWRU, Zero)) + { + Store (One, PPUU) /* \_SB_.PCI0.B0D4.CPNU.PPUU */ + } + Else + { + ShiftLeft (Decrement (PWRU), 0x02, PPUU) /* \_SB_.PCI0.B0D4.CPNU.PPUU */ + } + + Divide (Arg0, PPUU, RMDR, CNVT) /* \_SB_.PCI0.B0D4.CPNU.CNVT */ + If (LEqual (Arg1, Zero)) + { + Return (CNVT) /* \_SB_.PCI0.B0D4.CPNU.CNVT */ + } + Else + { + Multiply (CNVT, 0x03E8, CNVT) /* \_SB_.PCI0.B0D4.CPNU.CNVT */ + Multiply (RMDR, 0x03E8, RMDR) /* \_SB_.PCI0.B0D4.CPNU.RMDR */ + Divide (RMDR, PPUU, , RMDR) /* \_SB_.PCI0.B0D4.CPNU.RMDR */ + Add (CNVT, RMDR, CNVT) /* \_SB_.PCI0.B0D4.CPNU.CNVT */ + Return (CNVT) /* \_SB_.PCI0.B0D4.CPNU.CNVT */ + } + } + + Method (CPL0, 0, NotSerialized) + { + Store (0x02, Index (\_SB.PCI0.B0D4.NPCC, Zero)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), Zero)) + Store (\MPL0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), One)) + Store (CPNU (\_PR.PL10, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x02)) + Multiply (\_PR.PLW0, 0x03E8, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x03)) + Add (Multiply (\_PR.PLW0, 0x03E8), 0x0FA0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), + 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x05)) + Store (One, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), Zero)) + Store (CPNU (\_PR.PL20, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), One)) + Store (CPNU (\_PR.PL20, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x02)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x03)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x05)) + } + + Method (CPL1, 0, NotSerialized) + { + Store (0x02, Index (\_SB.PCI0.B0D4.NPCC, Zero)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), Zero)) + Store (\MPL1, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), One)) + Store (CPNU (\_PR.PL11, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x02)) + Multiply (\_PR.PLW1, 0x03E8, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x03)) + Add (Multiply (\_PR.PLW1, 0x03E8), 0x0FA0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), + 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x05)) + Store (One, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), Zero)) + Store (CPNU (\_PR.PL21, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), One)) + Store (CPNU (\_PR.PL21, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x02)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x03)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x05)) + } + + Method (CPL2, 0, NotSerialized) + { + Store (0x02, Index (\_SB.PCI0.B0D4.NPCC, Zero)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), Zero)) + Store (\MPL2, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), One)) + Store (CPNU (\_PR.PL12, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x02)) + Multiply (\_PR.PLW2, 0x03E8, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x03)) + Add (Multiply (\_PR.PLW2, 0x03E8), 0x0FA0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), + 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x05)) + Store (One, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), Zero)) + Store (CPNU (\_PR.PL22, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), One)) + Store (CPNU (\_PR.PL22, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x02)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x03)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x05)) + } + + Name (LSTM, Zero) + Name (_PPC, Zero) // _PPC: Performance Present Capabilities + Method (SPPC, 1, Serialized) + { + If (CondRefOf (\_PR.CPPC)) + { + Store (Arg0, \_PR.CPPC) /* External reference */ + } + + Switch (ToInteger (\TCNT)) + { + Case (0x10) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + Notify (\_PR.PR05, 0x80) // Status Change + Notify (\_PR.PR06, 0x80) // Status Change + Notify (\_PR.PR07, 0x80) // Status Change + Notify (\_PR.PR08, 0x80) // Status Change + Notify (\_PR.PR09, 0x80) // Status Change + Notify (\_PR.PR10, 0x80) // Status Change + Notify (\_PR.PR11, 0x80) // Status Change + Notify (\_PR.PR12, 0x80) // Status Change + Notify (\_PR.PR13, 0x80) // Status Change + Notify (\_PR.PR14, 0x80) // Status Change + Notify (\_PR.PR15, 0x80) // Status Change + } + Case (0x0E) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + Notify (\_PR.PR05, 0x80) // Status Change + Notify (\_PR.PR06, 0x80) // Status Change + Notify (\_PR.PR07, 0x80) // Status Change + Notify (\_PR.PR08, 0x80) // Status Change + Notify (\_PR.PR09, 0x80) // Status Change + Notify (\_PR.PR10, 0x80) // Status Change + Notify (\_PR.PR11, 0x80) // Status Change + Notify (\_PR.PR12, 0x80) // Status Change + Notify (\_PR.PR13, 0x80) // Status Change + } + Case (0x0C) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + Notify (\_PR.PR05, 0x80) // Status Change + Notify (\_PR.PR06, 0x80) // Status Change + Notify (\_PR.PR07, 0x80) // Status Change + Notify (\_PR.PR08, 0x80) // Status Change + Notify (\_PR.PR09, 0x80) // Status Change + Notify (\_PR.PR10, 0x80) // Status Change + Notify (\_PR.PR11, 0x80) // Status Change + } + Case (0x0A) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + Notify (\_PR.PR05, 0x80) // Status Change + Notify (\_PR.PR06, 0x80) // Status Change + Notify (\_PR.PR07, 0x80) // Status Change + Notify (\_PR.PR08, 0x80) // Status Change + Notify (\_PR.PR09, 0x80) // Status Change + } + Case (0x08) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + Notify (\_PR.PR05, 0x80) // Status Change + Notify (\_PR.PR06, 0x80) // Status Change + Notify (\_PR.PR07, 0x80) // Status Change + } + Case (0x07) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + Notify (\_PR.PR05, 0x80) // Status Change + Notify (\_PR.PR06, 0x80) // Status Change + } + Case (0x06) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + Notify (\_PR.PR05, 0x80) // Status Change + } + Case (0x05) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + Notify (\_PR.PR04, 0x80) // Status Change + } + Case (0x04) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + Notify (\_PR.PR03, 0x80) // Status Change + } + Case (0x03) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + Notify (\_PR.PR02, 0x80) // Status Change + } + Case (0x02) + { + Notify (\_PR.PR00, 0x80) // Status Change + Notify (\_PR.PR01, 0x80) // Status Change + } + Default + { + Notify (\_PR.PR00, 0x80) // Status Change + } + + } + } + + Name (TLPO, Package (0x06) + { + One, + One, + Zero, + One, + One, + 0x02 + }) + Method (CLPO, 0, NotSerialized) + { + Store (LPOE, Index (TLPO, One)) + If (CondRefOf (\_PR.PR00._PSS)) + { + If (And (\_SB.OSCP, 0x0400)) + { + Store (SizeOf (\_PR.PR00.TPSS), Local1) + } + Else + { + Store (SizeOf (\_PR.PR00.LPSS), Local1) + } + } + Else + { + Store (Zero, Local1) + } + + If (LLess (LPOP, Local1)) + { + Store (LPOP, Index (TLPO, 0x02)) + } + Else + { + Decrement (Local1) + Store (Local1, Index (TLPO, 0x02)) + } + + Store (LPOS, Index (TLPO, 0x03)) + Store (LPOW, Index (TLPO, 0x04)) + Store (LPER, Index (TLPO, 0x05)) + Return (TLPO) /* \_SB_.PCI0.B0D4.TLPO */ + } + + Method (SPUR, 1, NotSerialized) + { + If (LLessEqual (Arg0, \TCNT)) + { + If (LEqual (\_SB.PAGD._STA (), 0x0F)) + { + Store (Arg0, Index (\_SB.PAGD._PUR, One)) + Notify (\_SB.PAGD, 0x80) // Status Change + } + } + } + + Name (AEXL, Package (0x04) + { + "svchost.exe", + "dllhost.exe", + "smss.exe", + "WinSAT.exe" + }) + Method (PCCC, 0, Serialized) + { + Store (One, Index (PCCX, Zero)) + Switch (ToInteger (CPNU (PTDP, Zero))) + { + Case (0x39) + { + Store (0xA7F8, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x00017318, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x2F) + { + Store (0x9858, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x00014C08, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x25) + { + Store (0x7148, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0xD6D8, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x19) + { + Store (0x3E80, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x7D00, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x0F) + { + Store (0x36B0, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x7D00, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x0B) + { + Store (0x36B0, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x61A8, Index (DerefOf (Index (PCCX, One)), One)) + } + Default + { + Store (0xFF, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0xFF, Index (DerefOf (Index (PCCX, One)), One)) + } + + } + + Return (PCCX) /* \_SB_.PCI0.B0D4.PCCX */ + } + + Name (PCCX, Package (0x02) + { + 0x80000000, + Package (0x02) + { + 0x80000000, + 0x80000000 + } + }) + Name (KEFF, Package (0x1E) + { + Package (0x02) + { + 0x01BC, + Zero + }, + + Package (0x02) + { + 0x01CF, + 0x27 + }, + + Package (0x02) + { + 0x01E1, + 0x4B + }, + + Package (0x02) + { + 0x01F3, + 0x6C + }, + + Package (0x02) + { + 0x0206, + 0x8B + }, + + Package (0x02) + { + 0x0218, + 0xA8 + }, + + Package (0x02) + { + 0x022A, + 0xC3 + }, + + Package (0x02) + { + 0x023D, + 0xDD + }, + + Package (0x02) + { + 0x024F, + 0xF4 + }, + + Package (0x02) + { + 0x0261, + 0x010B + }, + + Package (0x02) + { + 0x0274, + 0x011F + }, + + Package (0x02) + { + 0x032C, + 0x01BD + }, + + Package (0x02) + { + 0x03D7, + 0x0227 + }, + + Package (0x02) + { + 0x048B, + 0x026D + }, + + Package (0x02) + { + 0x053E, + 0x02A1 + }, + + Package (0x02) + { + 0x05F7, + 0x02C6 + }, + + Package (0x02) + { + 0x06A8, + 0x02E6 + }, + + Package (0x02) + { + 0x075D, + 0x02FF + }, + + Package (0x02) + { + 0x0818, + 0x0311 + }, + + Package (0x02) + { + 0x08CF, + 0x0322 + }, + + Package (0x02) + { + 0x179C, + 0x0381 + }, + + Package (0x02) + { + 0x2DDC, + 0x039C + }, + + Package (0x02) + { + 0x44A8, + 0x039E + }, + + Package (0x02) + { + 0x5C35, + 0x0397 + }, + + Package (0x02) + { + 0x747D, + 0x038D + }, + + Package (0x02) + { + 0x8D7F, + 0x0382 + }, + + Package (0x02) + { + 0xA768, + 0x0376 + }, + + Package (0x02) + { + 0xC23B, + 0x0369 + }, + + Package (0x02) + { + 0xDE26, + 0x035A + }, + + Package (0x02) + { + 0xFB7C, + 0x034A + } + }) + Name (CEUP, Package (0x06) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }) + Method (CEUC, 0, NotSerialized) + { + Store (One, Index (CEUP, Zero)) + Store (ECEU, Index (CEUP, One)) + Store (TGFG, Index (CEUP, 0x02)) + Store (0x28, Index (CEUP, 0x03)) + Store (0x14, Index (CEUP, 0x04)) + Store (0x14, Index (CEUP, 0x05)) + Return (CEUP) /* \_SB_.PCI0.B0D4.CEUP */ + } + + Method (_TMP, 0, Serialized) // _TMP: Temperature + { + Return (\_TZ.THM0._TMP ()) + } + + Method (_DTI, 1, NotSerialized) // _DTI: Device Temperature Indication + { + Store (Arg0, LSTM) /* \_SB_.PCI0.B0D4.LSTM */ + Notify (\_SB.PCI0.B0D4, 0x91) // Device-Specific + } + + Method (_NTT, 0, NotSerialized) // _NTT: Notification Temperature Threshold + { + Return (0x0ADE) + } + + Name (PTYP, Zero) + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + If (CondRefOf (\_PR.PR00._PSS)) + { + Return (\_PR.PR00._PSS ()) + } + Else + { + Return (Package (0x02) + { + Package (0x06) + { + Zero, + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x06) + { + Zero, + Zero, + Zero, + Zero, + Zero, + Zero + } + }) + } + } + + Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States + { + If (CondRefOf (\_PR.PR00._TSS)) + { + Return (\_PR.PR00._TSS ()) + } + Else + { + Return (Package (0x02) + { + Package (0x05) + { + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x05) + { + Zero, + Zero, + Zero, + Zero, + Zero + } + }) + } + } + + Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities + { + If (CondRefOf (\_PR.PR00._TPC)) + { + Return (\_PR.PR00._TPC) /* External reference */ + } + Else + { + Return (Zero) + } + } + + Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control + { + If (LAnd (CondRefOf (\PC00), LNotEqual (\PC00, 0x80000000))) + { + If (And (\PC00, 0x04)) + { + Return (Package (0x02) + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + } + }) + } + Else + { + Return (Package (0x02) + { + ResourceTemplate () + { + Register (SystemIO, + 0x05, // Bit Width + 0x00, // Bit Offset + 0x0000000000001810, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemIO, + 0x05, // Bit Width + 0x00, // Bit Offset + 0x0000000000001810, // Address + ,) + } + }) + } + } + Else + { + Return (Package (0x02) + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + } + }) + } + } + + Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies + { + If (CondRefOf (\_PR.PR00._TSD)) + { + Return (\_PR.PR00._TSD ()) + } + Else + { + Return (Package (0x02) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x05) + { + 0x05, + Zero, + Zero, + Zero, + Zero + } + }) + } + } + + Method (_TDL, 0, NotSerialized) // _TDL: T-State Depth Limit + { + If (LAnd (CondRefOf (\_PR.PR00._TSS), CondRefOf (\_PR.CFGD))) + { + If (And (\_PR.CFGD, 0x2000)) + { + Return (Subtract (SizeOf (\_PR.PR00.TSMF), One)) + } + Else + { + Return (Subtract (SizeOf (\_PR.PR00.TSMC), One)) + } + } + Else + { + Return (Zero) + } + } + + Method (_PDL, 0, NotSerialized) // _PDL: P-state Depth Limit + { + If (CondRefOf (\_PR.PR00._PSS)) + { + If (And (\_SB.OSCP, 0x0400)) + { + Return (Subtract (SizeOf (\_PR.PR00.TPSS), One)) + } + Else + { + Return (Subtract (SizeOf (\_PR.PR00.LPSS), One)) + } + } + Else + { + Return (Zero) + } + } + + Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period + { + Return (\CPUS) /* External reference */ + } + + Method (_PSV, 0, Serialized) // _PSV: Passive Temperature + { + Return (\_SB.IETM.CTOK (\PTMC)) + } + + Method (_CRT, 0, Serialized) // _CRT: Critical Temperature + { + If (LEqual (\SACR, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (\SACR)) + } + + Method (_CR3, 0, Serialized) // _CR3: Warm/Standby Temperature + { + If (LEqual (\SAC3, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (\SAC3)) + } + + Method (_HOT, 0, Serialized) // _HOT: Hot Temperature + { + If (LEqual (\SAHT, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (\SAHT)) + } + + Method (_SCP, 3, Serialized) // _SCP: Set Cooling Policy + { + If (LOr (LEqual (Arg0, Zero), LEqual (Arg0, One))) + { + Store (Arg0, CTYP) /* \_SB_.PCI0.B0D4.CTYP */ + Notify (\_SB.PCI0.B0D4, 0x91) // Device-Specific + } + } + + Name (VERS, Zero) + Name (CTYP, Zero) + Name (ALMT, Zero) + Name (PLMT, Zero) + Name (WKLD, Zero) + Name (DSTA, Zero) + Name (RES1, Zero) + Method (DSCP, 7, Serialized) + { + If (LOr (LEqual (Arg1, Zero), LEqual (Arg1, One))) + { + Store (Arg0, VERS) /* \_SB_.PCI0.B0D4.VERS */ + Store (Arg1, CTYP) /* \_SB_.PCI0.B0D4.CTYP */ + Store (Arg2, ALMT) /* \_SB_.PCI0.B0D4.ALMT */ + Store (Arg3, PLMT) /* \_SB_.PCI0.B0D4.PLMT */ + Store (Arg4, WKLD) /* \_SB_.PCI0.B0D4.WKLD */ + Store (Arg5, DSTA) /* \_SB_.PCI0.B0D4.DSTA */ + Store (Arg6, RES1) /* \_SB_.PCI0.B0D4.RES1 */ + Notify (\_SB.PCI0.B0D4, 0x91) // Device-Specific + } + } + } + + Scope (\_SB.IETM) + { + Name (CTSP, Package (0x01) + { + ToUUID ("e145970a-e4c1-4d73-900e-c9c5a69dd067") + }) + } + + Scope (\_SB.PCI0.B0D4) + { + Method (TDPL, 0, Serialized) + { + Name (AAAA, Zero) + Name (BBBB, Zero) + Name (CCCC, Zero) + Store (CTNL, Local0) + If (LOr (LEqual (Local0, One), LEqual (Local0, 0x02))) + { + Store (\_PR.CLVL, Local0) + } + Else + { + Return (Package (0x01) + { + Zero + }) + } + + If (LEqual (CLCK, One)) + { + Store (One, Local0) + } + + Store (CPNU (\_PR.PL10, One), AAAA) /* \_SB_.PCI0.B0D4.TDPL.AAAA */ + Store (CPNU (\_PR.PL11, One), BBBB) /* \_SB_.PCI0.B0D4.TDPL.BBBB */ + Store (CPNU (\_PR.PL12, One), CCCC) /* \_SB_.PCI0.B0D4.TDPL.CCCC */ + Name (TMP1, Package (0x01) + { + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Name (TMP2, Package (0x02) + { + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Name (TMP3, Package (0x03) + { + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + If (LEqual (Local0, 0x03)) + { + If (LGreater (AAAA, BBBB)) + { + If (LGreater (AAAA, CCCC)) + { + If (LGreater (BBBB, CCCC)) + { + Store (Zero, Local3) + Store (Zero, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, Local4) + Store (One, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (0x02, Local5) + Store (0x02, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + Else + { + Store (Zero, Local3) + Store (Zero, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, Local5) + Store (0x02, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (0x02, Local4) + Store (One, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + } + Else + { + Store (Zero, Local5) + Store (0x02, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, Local3) + Store (Zero, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (0x02, Local4) + Store (One, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + } + ElseIf (LGreater (BBBB, CCCC)) + { + If (LGreater (AAAA, CCCC)) + { + Store (Zero, Local4) + Store (One, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, Local3) + Store (Zero, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (0x02, Local5) + Store (0x02, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + Else + { + Store (Zero, Local4) + Store (One, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, Local5) + Store (0x02, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (0x02, Local3) + Store (Zero, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + } + Else + { + Store (Zero, Local5) + Store (0x02, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, Local4) + Store (One, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (0x02, Local3) + Store (Zero, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + + Store (Add (\_PR.TAR0, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (AAAA, Index (DerefOf (Index (TMP3, Local3)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP3, Local3)), One)) + Store (\_PR.CTC0, Index (DerefOf (Index (TMP3, Local3)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP3, Local3)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP3, Local3)), 0x04)) + Store (Add (\_PR.TAR1, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (BBBB, Index (DerefOf (Index (TMP3, Local4)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP3, Local4)), One)) + Store (\_PR.CTC1, Index (DerefOf (Index (TMP3, Local4)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP3, Local4)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP3, Local4)), 0x04)) + Store (Add (\_PR.TAR2, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (CCCC, Index (DerefOf (Index (TMP3, Local5)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP3, Local5)), One)) + Store (\_PR.CTC2, Index (DerefOf (Index (TMP3, Local5)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP3, Local5)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP3, Local5)), 0x04)) + Return (TMP3) /* \_SB_.PCI0.B0D4.TDPL.TMP3 */ + } + + If (LEqual (Local0, 0x02)) + { + If (LGreater (AAAA, BBBB)) + { + Store (Zero, Local3) + Store (One, Local4) + Store (Zero, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (Zero, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + Else + { + Store (Zero, Local4) + Store (One, Local3) + Store (One, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (Zero, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (Zero, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + + Store (Add (\_PR.TAR0, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (AAAA, Index (DerefOf (Index (TMP2, Local3)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP2, Local3)), One)) + Store (\_PR.CTC0, Index (DerefOf (Index (TMP2, Local3)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP2, Local3)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP2, Local3)), 0x04)) + Store (Add (\_PR.TAR1, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (BBBB, Index (DerefOf (Index (TMP2, Local4)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP2, Local4)), One)) + Store (\_PR.CTC1, Index (DerefOf (Index (TMP2, Local4)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP2, Local4)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP2, Local4)), 0x04)) + Return (TMP2) /* \_SB_.PCI0.B0D4.TDPL.TMP2 */ + } + + If (LEqual (Local0, One)) + { + Switch (ToInteger (\_PR.CBMI)) + { + Case (Zero) + { + Store (Add (\_PR.TAR0, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (AAAA, Index (DerefOf (Index (TMP1, Zero)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP1, Zero)), One)) + Store (\_PR.CTC0, Index (DerefOf (Index (TMP1, Zero)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP1, Zero)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP1, Zero)), 0x04)) + Store (Zero, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (Zero, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (Zero, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + Case (One) + { + Store (Add (\_PR.TAR1, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (BBBB, Index (DerefOf (Index (TMP1, Zero)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP1, Zero)), One)) + Store (\_PR.CTC1, Index (DerefOf (Index (TMP1, Zero)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP1, Zero)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP1, Zero)), 0x04)) + Store (One, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (One, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (One, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + Case (0x02) + { + Store (Add (\_PR.TAR2, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (CCCC, Index (DerefOf (Index (TMP1, Zero)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP1, Zero)), One)) + Store (\_PR.CTC2, Index (DerefOf (Index (TMP1, Zero)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP1, Zero)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP1, Zero)), 0x04)) + Store (0x02, LEV0) /* \_SB_.PCI0.B0D4.LEV0 */ + Store (0x02, LEV1) /* \_SB_.PCI0.B0D4.LEV1 */ + Store (0x02, LEV2) /* \_SB_.PCI0.B0D4.LEV2 */ + } + + } + + Return (TMP1) /* \_SB_.PCI0.B0D4.TDPL.TMP1 */ + } + + Return (Zero) + } + + Name (MAXT, Zero) + Method (TDPC, 0, NotSerialized) + { + Return (MAXT) /* \_SB_.PCI0.B0D4.MAXT */ + } + + Name (LEV0, Zero) + Name (LEV1, Zero) + Name (LEV2, Zero) + Method (STDP, 1, Serialized) + { + If (LGreaterEqual (Arg0, \_PR.CLVL)) + { + Return (Zero) + } + + Switch (ToInteger (Arg0)) + { + Case (Zero) + { + Store (LEV0, Local0) + } + Case (One) + { + Store (LEV1, Local0) + } + Case (0x02) + { + Store (LEV2, Local0) + } + + } + + Switch (ToInteger (Local0)) + { + Case (Zero) + { + CPL0 () + } + Case (One) + { + CPL1 () + } + Case (0x02) + { + CPL2 () + } + + } + + Notify (\_SB.PCI0.B0D4, 0x83) // Device-Specific Change + } + } + + Scope (\_SB.IETM) + { + Name (LPSP, Package (0x01) + { + ToUUID ("b9455b06-7949-40c6-abf2-363a70c8706c") + }) + Method (CLPM, 0, NotSerialized) + { + If (LEqual (\_SB.PCI0.B0D4.LPMS, Zero)) + { + Return (Zero) + } + + Return (LPMV) /* External reference */ + } + + Name (LPMT, Package (0x05) + { + One, + Package (0x06) + { + \_SB.PCI0.B0D4, + Zero, + 0x00020000, + 0x32, + 0x80000000, + 0x80000000 + }, + + Package (0x06) + { + \_SB.PCI0.B0D4, + Zero, + 0x00040000, + 0x02, + 0x80000000, + 0x80000000 + }, + + Package (0x06) + { + \_SB.PCI0.B0D4, + One, + 0x00020000, + 0x32, + 0x80000000, + 0x80000000 + }, + + Package (0x06) + { + \_SB.PCI0.B0D4, + 0x09, + 0x00010000, + 0x3A98, + 0x80000000, + 0x80000000 + } + }) + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Device (SEN1) + { + Name (_HID, EisaId ("INT3403") /* DPTF Temperature Sensor */) // _HID: Hardware ID + Name (_UID, "SEN1") // _UID: Unique ID + Name (FAUX, Zero) + Name (SAUX, Zero) + Name (_STR, Unicode ("Sensor 1 CPU FIN Remote4 Sd")) // _STR: Description String + Name (PTYP, 0x03) + Name (CTYP, Zero) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (S1DE, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + + Method (_TMP, 0, Serialized) // _TMP: Temperature + { + Store (\GTST (), Local0) + Store (\_TZ._C2K (Local0), Local1) + Return (Local1) + } + + Name (PATC, Zero) + Name (GTSH, 0x14) + Name (LSTM, Zero) + Method (_DTI, 1, NotSerialized) // _DTI: Device Temperature Indication + { + Store (Arg0, LSTM) /* \_SB_.PCI0.LPCB.EC__.SEN1.LSTM */ + Notify (\_SB.PCI0.LPCB.EC.SEN1, 0x91) // Device-Specific + } + + Method (_NTT, 0, NotSerialized) // _NTT: Notification Temperature Threshold + { + Return (0x0ADE) + } + + Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period + { + Return (\SSP1) /* External reference */ + } + + Method (_PSV, 0, Serialized) // _PSV: Passive Temperature + { + Return (\_SB.IETM.CTOK (S1PT)) + } + + Method (_CRT, 0, Serialized) // _CRT: Critical Temperature + { + If (LEqual (S1CT, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (S1CT)) + } + + Method (_CR3, 0, Serialized) // _CR3: Warm/Standby Temperature + { + If (LEqual (S1S3, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (S1S3)) + } + + Method (_HOT, 0, Serialized) // _HOT: Hot Temperature + { + If (LEqual (S1HT, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (S1HT)) + } + + Method (_SCP, 3, Serialized) // _SCP: Set Cooling Policy + { + If (LOr (LEqual (Arg0, Zero), LEqual (Arg0, One))) + { + Store (Arg0, CTYP) /* \_SB_.PCI0.LPCB.EC__.SEN1.CTYP */ + Notify (\_SB.PCI0.LPCB.EC.SEN1, 0x91) // Device-Specific + } + } + + Name (VERS, Zero) + Name (ALMT, Zero) + Name (PLMT, Zero) + Name (WKLD, Zero) + Name (DSTA, Zero) + Name (RES1, Zero) + Method (DSCP, 7, Serialized) + { + If (LOr (LEqual (Arg1, Zero), LEqual (Arg1, One))) + { + Store (Arg0, VERS) /* \_SB_.PCI0.LPCB.EC__.SEN1.VERS */ + Store (Arg1, CTYP) /* \_SB_.PCI0.LPCB.EC__.SEN1.CTYP */ + Store (Arg2, ALMT) /* \_SB_.PCI0.LPCB.EC__.SEN1.ALMT */ + Store (Arg3, PLMT) /* \_SB_.PCI0.LPCB.EC__.SEN1.PLMT */ + Store (Arg4, WKLD) /* \_SB_.PCI0.LPCB.EC__.SEN1.WKLD */ + Store (Arg5, DSTA) /* \_SB_.PCI0.LPCB.EC__.SEN1.DSTA */ + Store (Arg6, RES1) /* \_SB_.PCI0.LPCB.EC__.SEN1.RES1 */ + Notify (\_SB.PCI0.LPCB.EC.SEN1, 0x91) // Device-Specific + } + } + } + } + + Scope (\_SB.IETM) + { + Name (ETRM, Package (0x02) + { + Package (0x04) + { + \_SB.PCI0.LPCB.EC.SEN1, + "INT3403", + 0x06, + "SEN1" + }, + + Package (0x04) + { + \_SB.PCI0.B0D4, + "8086_1903", + Zero, + "0x00040000" + } + }) + } + + Scope (\_SB.IETM) + { + Name (TRT0, Package (0x01) + { + Package (0x08) + { + \_SB.PCI0.B0D4, + \_SB.PCI0.B0D4, + 0x12, + 0x32, + Zero, + Zero, + Zero, + Zero + } + }) + Method (TRTR, 0, NotSerialized) + { + Return (TRTV) /* External reference */ + } + + Method (_TRT, 0, NotSerialized) // _TRT: Thermal Relationship Table + { + Return (TRT0) /* \_SB_.IETM.TRT0 */ + } + } + + Scope (\_SB.IETM) + { + Name (PTTL, 0x14) + Name (PSVT, Package (0x03) + { + 0x02, + Package (0x0C) + { + \_SB.PCI0.B0D4, + \_SB.PCI0.B0D4, + 0x02, + 0x05, + 0x0E94, + Zero, + 0x00010000, + "MIN", + 0x7D, + 0x0A, + 0x0190, + Zero + }, + + Package (0x0C) + { + \_SB.PCI0.B0D4, + \_SB.PCI0.LPCB.EC.SEN1, + One, + 0x0A, + 0x0E8A, + 0x0E, + 0x00010000, + "MIN", + 0x01F4, + 0x0A, + 0x14, + Zero + } + }) + } + + Scope (\_SB.IETM) + { + Name (DP2P, Package (0x01) + { + ToUUID ("9e04115a-ae87-4d1c-9500-0f3e340bfe75") + }) + Name (DPSP, Package (0x01) + { + ToUUID ("42a441d6-ae6a-462b-a84b-4a8ce79027d3") + }) + Name (DASP, Package (0x01) + { + ToUUID ("3a95c389-e4b8-4629-a526-c52c88626bae") + }) + Name (DA2P, Package (0x01) + { + ToUUID ("0e56fab6-bdfc-4e8c-8246-40ecfd4d74ea") + }) + Name (DCSP, Package (0x01) + { + ToUUID ("97c68ae7-15fa-499c-b8c9-5da81d606e0a") + }) + Name (DMSP, Package (0x01) + { + ToUUID ("16caf1b7-dd38-40ed-b1c1-1b8a1913d531") + }) + Name (POBP, Package (0x01) + { + ToUUID ("f5a35014-c209-46a4-993a-eb56de7530a1") + }) + Name (HDCP, Package (0x01) + { + ToUUID ("be84babf-c4d4-403d-b495-3128fd44dac1") + }) + Name (DAPP, Package (0x01) + { + ToUUID ("63be270f-1c11-48fd-a6f7-3af253ff3e2d") + }) + Name (DVSP, Package (0x01) + { + ToUUID ("6ed722a7-9240-48a5-b479-31eef723d7cf") + }) + Name (DPID, Package (0x01) + { + ToUUID ("42496e14-bc1b-46e8-a798-ca915464426f") + }) + } + + Scope (\_SB.IETM) + { + Name (BDV1, Package (0x01) + { + Buffer (0x5F5B) + { + /* 0000 */ 0xE5, 0x1F, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x01, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x1B, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, // ..../par + /* 0018 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, // ticipant + /* 0020 */ 0x73, 0x2F, 0x49, 0x45, 0x54, 0x4D, 0x2E, 0x44, // s/IETM.D + /* 0028 */ 0x30, 0x2F, 0x70, 0x73, 0x76, 0x74, 0x00, 0x07, // 0/psvt.. + /* 0030 */ 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, // ........ + /* 0038 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0040 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // ........ + /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 0050 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 0058 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x08, // 0.B0D4.. + /* 0060 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0068 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, // ...\_SB_ + /* 0070 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x4C, 0x50, // .PCI0.LP + /* 0078 */ 0x43, 0x42, 0x2E, 0x45, 0x43, 0x5F, 0x5F, 0x2E, // CB.EC__. + /* 0080 */ 0x53, 0x45, 0x4E, 0x31, 0x00, 0x04, 0x00, 0x00, // SEN1.... + /* 0088 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0090 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, // ........ + /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 00A0 */ 0x00, 0x6E, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, // .n...... + /* 00A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 00B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, // ........ + /* 00C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x38, 0x4A, 0x00, // .....8J. + /* 00C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 00D0 */ 0x00, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // .}...... + /* 00D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, // ........ + /* 00E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 00E8 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 00F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 00F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 0100 */ 0x00, 0x1B, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, // ...../pa + /* 0108 */ 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, // rticipan + /* 0110 */ 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, // ts/TCPU. + /* 0118 */ 0x44, 0x30, 0x2F, 0x67, 0x74, 0x73, 0x68, 0x00, // D0/gtsh. + /* 0120 */ 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 0128 */ 0xC0, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // ........ + /* 0130 */ 0x26, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, // &.../par + /* 0138 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, // ticipant + /* 0140 */ 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, // s/TCPU.D + /* 0148 */ 0x30, 0x2F, 0x6C, 0x61, 0x73, 0x74, 0x5F, 0x65, // 0/last_e + /* 0150 */ 0x77, 0x6D, 0x61, 0x5F, 0x70, 0x6F, 0x77, 0x65, // wma_powe + /* 0158 */ 0x72, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x04, 0x00, // r....... + /* 0160 */ 0x00, 0x00, 0xCE, 0x58, 0x00, 0x00, 0x01, 0x00, // ...X.... + /* 0168 */ 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x2F, 0x70, // ..&.../p + /* 0170 */ 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, // articipa + /* 0178 */ 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, // nts/TCPU + /* 0180 */ 0x2E, 0x44, 0x30, 0x2F, 0x6C, 0x61, 0x73, 0x74, // .D0/last + /* 0188 */ 0x5F, 0x70, 0x6F, 0x77, 0x65, 0x72, 0x5F, 0x75, // _power_u + /* 0190 */ 0x73, 0x65, 0x64, 0x00, 0x1A, 0x00, 0x00, 0x00, // sed..... + /* 0198 */ 0x04, 0x00, 0x00, 0x00, 0x50, 0x5A, 0x00, 0x00, // ....PZ.. + /* 01A0 */ 0x01, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, // ........ + /* 01A8 */ 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, // /partici + /* 01B0 */ 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, // pants/TC + /* 01B8 */ 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x70, 0x70, // PU.D0/pp + /* 01C0 */ 0x63, 0x63, 0x00, 0x07, 0x00, 0x00, 0x00, 0x9C, // cc...... + /* 01C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, // ........ + /* 01D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 01D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 01E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x98, // ........ + /* 01E8 */ 0x3A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // :....... + /* 01F0 */ 0x00, 0x00, 0x00, 0x98, 0x3A, 0x00, 0x00, 0x00, // ....:... + /* 01F8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 0208 */ 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x00, // ........ + /* 0210 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7D, // .......} + /* 0218 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 0220 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0228 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x94, // ........ + /* 0230 */ 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 0238 */ 0x00, 0x00, 0x00, 0xE0, 0xAB, 0x00, 0x00, 0x00, // ........ + /* 0240 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0248 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 0250 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0258 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xF4, // ........ + /* 0260 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, // ........ + /* 0268 */ 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, // ...%.../ + /* 0270 */ 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, // particip + /* 0278 */ 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, // ants/TCP + /* 0280 */ 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, // U.D0/tri + /* 0288 */ 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, // ppoint/_ + /* 0290 */ 0x61, 0x63, 0x30, 0x00, 0x06, 0x00, 0x00, 0x00, // ac0..... + /* 0298 */ 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 02A0 */ 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, // ....%... + /* 02A8 */ 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, // /partici + /* 02B0 */ 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, // pants/TC + /* 02B8 */ 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, // PU.D0/tr + /* 02C0 */ 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, // ippoint/ + /* 02C8 */ 0x5F, 0x61, 0x63, 0x31, 0x00, 0x06, 0x00, 0x00, // _ac1.... + /* 02D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, // ........ + /* 02D8 */ 0xFF, 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, // .....%.. + /* 02E0 */ 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, // ./partic + /* 02E8 */ 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, // ipants/T + /* 02F0 */ 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, // CPU.D0/t + /* 02F8 */ 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, // rippoint + /* 0300 */ 0x2F, 0x5F, 0x61, 0x63, 0x32, 0x00, 0x06, 0x00, // /_ac2... + /* 0308 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, // ........ + /* 0310 */ 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, // ......%. + /* 0318 */ 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, // ../parti + /* 0320 */ 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, // cipants/ + /* 0328 */ 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, // TCPU.D0/ + /* 0330 */ 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, // trippoin + /* 0338 */ 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x33, 0x00, 0x06, // t/_ac3.. + /* 0340 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, // ........ + /* 0348 */ 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x25, // .......% + /* 0350 */ 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, // .../part + /* 0358 */ 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, // icipants + /* 0360 */ 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, // /TCPU.D0 + /* 0368 */ 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, // /trippoi + /* 0370 */ 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x34, 0x00, // nt/_ac4. + /* 0378 */ 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 0380 */ 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, // ........ + /* 0388 */ 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, // %.../par + /* 0390 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, // ticipant + /* 0398 */ 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, // s/TCPU.D + /* 03A0 */ 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, // 0/trippo + /* 03A8 */ 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x35, // int/_ac5 + /* 03B0 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 03B8 */ 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, // ........ + /* 03C0 */ 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, // .%.../pa + /* 03C8 */ 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, // rticipan + /* 03D0 */ 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, // ts/TCPU. + /* 03D8 */ 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, // D0/tripp + /* 03E0 */ 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, // oint/_ac + /* 03E8 */ 0x36, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, // 6....... + /* 03F0 */ 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, // ........ + /* 03F8 */ 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, // ..%.../p + /* 0400 */ 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, // articipa + /* 0408 */ 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, // nts/TCPU + /* 0410 */ 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, // .D0/trip + /* 0418 */ 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x61, // point/_a + /* 0420 */ 0x63, 0x37, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, // c7...... + /* 0428 */ 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, // ........ + /* 0430 */ 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, // ...%.../ + /* 0438 */ 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, // particip + /* 0440 */ 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, // ants/TCP + /* 0448 */ 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, // U.D0/tri + /* 0450 */ 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, // ppoint/_ + /* 0458 */ 0x61, 0x63, 0x38, 0x00, 0x06, 0x00, 0x00, 0x00, // ac8..... + /* 0460 */ 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0468 */ 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, // ....%... + /* 0470 */ 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, // /partici + /* 0478 */ 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, // pants/TC + /* 0480 */ 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, // PU.D0/tr + /* 0488 */ 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, // ippoint/ + /* 0490 */ 0x5F, 0x61, 0x63, 0x39, 0x00, 0x06, 0x00, 0x00, // _ac9.... + /* 0498 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, // ........ + /* 04A0 */ 0xFF, 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, // .....%.. + /* 04A8 */ 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, // ./partic + /* 04B0 */ 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, // ipants/T + /* 04B8 */ 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, // CPU.D0/t + /* 04C0 */ 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, // rippoint + /* 04C8 */ 0x2F, 0x5F, 0x63, 0x72, 0x33, 0x00, 0x06, 0x00, // /_cr3... + /* 04D0 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x76, 0x0E, // ......v. + /* 04D8 */ 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, // ......%. + /* 04E0 */ 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, // ../parti + /* 04E8 */ 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, // cipants/ + /* 04F0 */ 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, // TCPU.D0/ + /* 04F8 */ 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, // trippoin + /* 0500 */ 0x74, 0x2F, 0x5F, 0x63, 0x72, 0x74, 0x00, 0x06, // t/_crt.. + /* 0508 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x94, // ........ + /* 0510 */ 0x0E, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x25, // .......% + /* 0518 */ 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, // .../part + /* 0520 */ 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, // icipants + /* 0528 */ 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, // /TCPU.D0 + /* 0530 */ 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, // /trippoi + /* 0538 */ 0x6E, 0x74, 0x2F, 0x5F, 0x68, 0x6F, 0x74, 0x00, // nt/_hot. + /* 0540 */ 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 0548 */ 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, // ........ + /* 0550 */ 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, // %.../par + /* 0558 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, // ticipant + /* 0560 */ 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, // s/TCPU.D + /* 0568 */ 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, // 0/trippo + /* 0570 */ 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x70, 0x73, 0x76, // int/_psv + /* 0578 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 0580 */ 0x00, 0xCC, 0x0D, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 0588 */ 0x00, 0x14, 0x00, 0x00, 0x00, 0x2F, 0x73, 0x68, // ...../sh + /* 0590 */ 0x61, 0x72, 0x65, 0x64, 0x2F, 0x65, 0x78, 0x70, // ared/exp + /* 0598 */ 0x6F, 0x72, 0x74, 0x2F, 0x61, 0x70, 0x61, 0x74, // ort/apat + /* 05A0 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x28, 0x34, 0x00, // .....(4. + /* 05A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, // ........ + /* 05B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 05B8 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 05C0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 05C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, // .....STP + /* 05D0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 05D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 05E0 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 05E8 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 05F0 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 05F8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, // ........ + /* 0600 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, // .....PL1 + /* 0608 */ 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, // MAX..... + /* 0610 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0618 */ 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 4500.... + /* 0620 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0628 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 0630 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, // .....STP + /* 0638 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 0640 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 0648 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 0650 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 0658 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0660 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, // ........ + /* 0668 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, // .....PL1 + /* 0670 */ 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, // MIN..... + /* 0678 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0680 */ 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 4500.... + /* 0688 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0690 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 0698 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, // .....STP + /* 06A0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 06A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 06B0 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 06B8 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 06C0 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 06C8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 06D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, // .....PL1 + /* 06D8 */ 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, // STEP.... + /* 06E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 06E8 */ 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // .500.... + /* 06F0 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 06F8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 0700 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, // .....STP + /* 0708 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 0710 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 0718 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 0720 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 0728 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0730 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 0738 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, // .....PL1 + /* 0740 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, // PowerLim + /* 0748 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, // it...... + /* 0750 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, // .......4 + /* 0758 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 500..... + /* 0760 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0768 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 0770 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, 0x00, // ....STP. + /* 0778 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 0780 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 0788 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 0790 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 0798 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 07A0 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 07A8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, // ....PL2P + /* 07B0 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, // owerLimi + /* 07B8 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, // t....... + /* 07C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x39, // ......29 + /* 07C8 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 000..... + /* 07D0 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 07D8 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 07E0 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, 0x00, // ....STP. + /* 07E8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 07F0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 07F8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 0800 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 0808 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0810 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 0818 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, 0x50, // ....PL4P + /* 0820 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, // owerLimi + /* 0828 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, // t....... + /* 0830 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x31, // ......71 + /* 0838 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 000..... + /* 0840 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0848 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 0850 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, 0x00, // ....STP. + /* 0858 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 0860 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 0868 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 0870 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 0878 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0880 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, // ........ + /* 0888 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, // ....TccO + /* 0890 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, // ffset... + /* 0898 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 08A0 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, // ..3..... + /* 08A8 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 08B0 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 08B8 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x50, 0x00, // ....STP. + /* 08C0 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, // ........ + /* 08C8 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 08D0 */ 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, // _.IETM.. + /* 08D8 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, // ........ + /* 08E0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, // ........ + /* 08E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 08F0 */ 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, // SVT..... + /* 08F8 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0900 */ 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, 0x00, // std..... + /* 0908 */ 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // $....... + /* 0910 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0918 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x32, // ....PSC2 + /* 0920 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _DC..... + /* 0928 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0930 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 0938 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 0940 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 0948 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0950 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0958 */ 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, // PL1MAX.. + /* 0960 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0968 */ 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, 0x30, 0x30, // ...15000 + /* 0970 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, // .....$.. + /* 0978 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 0980 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0988 */ 0x00, 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, 0x43, // .PSC2_DC + /* 0990 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 0998 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 09A0 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 09A8 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 09B0 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 09B8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, // ........ + /* 09C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, // .....PL1 + /* 09C8 */ 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, // MIN..... + /* 09D0 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 09D8 */ 0x31, 0x33, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, // 13500... + /* 09E0 */ 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, // ..$..... + /* 09E8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 09F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 09F8 */ 0x43, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // C2_DC... + /* 0A00 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0A08 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 0A10 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 0A18 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 0A20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0A28 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0A30 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, // ..PL1STE + /* 0A38 */ 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // P....... + /* 0A40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, // ......50 + /* 0A48 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, // 0.....$. + /* 0A50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0A58 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0A60 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, // ..PSC2_D + /* 0A68 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 0A70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 0A78 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 0A80 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 0A88 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0A90 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, // ........ + /* 0A98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 0AA0 */ 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, // 1PowerLi + /* 0AA8 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // mit..... + /* 0AB0 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0AB8 */ 0x31, 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, // 15000... + /* 0AC0 */ 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, // ..$..... + /* 0AC8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0AD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 0AD8 */ 0x43, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // C2_DC... + /* 0AE0 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0AE8 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 0AF0 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 0AF8 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 0B00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0B08 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0B10 */ 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, // ..PL2Pow + /* 0B18 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, // erLimit. + /* 0B20 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 0B28 */ 0x00, 0x00, 0x00, 0x00, 0x32, 0x35, 0x30, 0x30, // ....2500 + /* 0B30 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, // 0.....$. + /* 0B38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0B40 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0B48 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, // ..PSC2_D + /* 0B50 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 0B58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 0B60 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 0B68 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 0B70 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0B78 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, // ........ + /* 0B80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 0B88 */ 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, // 4PowerLi + /* 0B90 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // mit..... + /* 0B98 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0BA0 */ 0x34, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, // 43000... + /* 0BA8 */ 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, // ..$..... + /* 0BB0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0BB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 0BC0 */ 0x43, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // C2_DC... + /* 0BC8 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0BD0 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 0BD8 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 0BE0 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 0BE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0BF0 */ 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0BF8 */ 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, // ..TccOff + /* 0C00 */ 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // set..... + /* 0C08 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0C10 */ 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, // 3.....$. + /* 0C18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0C20 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0C28 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, // ..PSC2_D + /* 0C30 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, // C....... + /* 0C38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 0C40 */ 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, // SB_.IETM + /* 0C48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 0C50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 0C58 */ 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0C60 */ 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, // .PSVT... + /* 0C68 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0C70 */ 0x00, 0x00, 0x63, 0x71, 0x6C, 0x00, 0x04, 0x00, // ..cql... + /* 0C78 */ 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, // .. ..... + /* 0C80 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0C88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 0C90 */ 0x43, 0x37, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, // C7_AC... + /* 0C98 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0CA0 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 0CA8 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 0CB0 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 0CB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 0CC0 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0CC8 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, // ..PL1MAX + /* 0CD0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 0CD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, // .....230 + /* 0CE0 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x20, // 00..... + /* 0CE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 0CF0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0CF8 */ 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x37, 0x5F, // ...PSC7_ + /* 0D00 */ 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // AC...... + /* 0D08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 0D10 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 0D18 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 0D20 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0D28 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, // ........ + /* 0D30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 0D38 */ 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, // L1MIN... + /* 0D40 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0D48 */ 0x00, 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, 0x00, // ..13500. + /* 0D50 */ 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, // .... ... + /* 0D58 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0D60 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0D68 */ 0x50, 0x53, 0x43, 0x37, 0x5F, 0x41, 0x43, 0x00, // PSC7_AC. + /* 0D70 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 0D78 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 0D80 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 0D88 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 0D90 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0D98 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0DA0 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, // ....PL1S + /* 0DA8 */ 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, // TEP..... + /* 0DB0 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0DB8 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 500..... + /* 0DC0 */ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ....... + /* 0DC8 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0DD0 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x37, // ....PSC7 + /* 0DD8 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 0DE0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0DE8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 0DF0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 0DF8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 0E00 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0E08 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0E10 */ 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, // PL1Power + /* 0E18 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, // Limit... + /* 0E20 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0E28 */ 0x00, 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, // ..23000. + /* 0E30 */ 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, // .... ... + /* 0E38 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0E40 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0E48 */ 0x50, 0x53, 0x43, 0x37, 0x5F, 0x41, 0x43, 0x00, // PSC7_AC. + /* 0E50 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 0E58 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 0E60 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 0E68 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 0E70 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0E78 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 0E80 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, // ....PL2P + /* 0E88 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, // owerLimi + /* 0E90 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, // t....... + /* 0E98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x39, // ......29 + /* 0EA0 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 000..... + /* 0EA8 */ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ....... + /* 0EB0 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0EB8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x37, // ....PSC7 + /* 0EC0 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 0EC8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0ED0 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 0ED8 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 0EE0 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 0EE8 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0EF0 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0EF8 */ 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, // PL4Power + /* 0F00 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, // Limit... + /* 0F08 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0F10 */ 0x00, 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, // ..71000. + /* 0F18 */ 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, // .... ... + /* 0F20 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0F28 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0F30 */ 0x50, 0x53, 0x43, 0x37, 0x5F, 0x41, 0x43, 0x00, // PSC7_AC. + /* 0F38 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 0F40 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 0F48 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 0F50 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 0F58 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0F60 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, // ........ + /* 0F68 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, // ....TccO + /* 0F70 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, // ffset... + /* 0F78 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0F80 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, // ..3..... + /* 0F88 */ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ....... + /* 0F90 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0F98 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x37, // ....PSC7 + /* 0FA0 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 0FA8 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0FB0 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, // \_SB_.IE + /* 0FB8 */ 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, // TM...... + /* 0FC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 0FC8 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0FD0 */ 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, // ...PSVT. + /* 0FD8 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 0FE0 */ 0x00, 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, // ....std. + /* 0FE8 */ 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, // ....%... + /* 0FF0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0FF8 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1000 */ 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, 0x43, 0x00, // PSC8_DC. + /* 1008 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 1010 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 1018 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 1020 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 1028 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1030 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, // ........ + /* 1038 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, // ....PL1M + /* 1040 */ 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // AX...... + /* 1048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, // .......1 + /* 1050 */ 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 5000.... + /* 1058 */ 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // .%...... + /* 1060 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 1068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, // .....PSC + /* 1070 */ 0x38, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, // 8_DC.... + /* 1078 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1080 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 1088 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 1090 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 1098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 10A0 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 10A8 */ 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, // .PL1MIN. + /* 10B0 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 10B8 */ 0x00, 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, 0x30, // ....1350 + /* 10C0 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, // 0.....%. + /* 10C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 10D0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 10D8 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, // ..PSC8_D + /* 10E0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 10E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 10F0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 10F8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 1100 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1108 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 1118 */ 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, // 1STEP... + /* 1120 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1128 */ 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, // ..500... + /* 1130 */ 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, // ..%..... + /* 1138 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1140 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 1148 */ 0x43, 0x38, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // C8_DC... + /* 1150 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1158 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1160 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 1168 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 1170 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1178 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1180 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, // ..PL1Pow + /* 1188 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, // erLimit. + /* 1190 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 1198 */ 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, 0x30, // ....1500 + /* 11A0 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, // 0.....%. + /* 11A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 11B0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 11B8 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, // ..PSC8_D + /* 11C0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 11C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 11D0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 11D8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 11E0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 11E8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, // ........ + /* 11F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 11F8 */ 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, // 2PowerLi + /* 1200 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // mit..... + /* 1208 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1210 */ 0x32, 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, // 25000... + /* 1218 */ 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, // ..%..... + /* 1220 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1228 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 1230 */ 0x43, 0x38, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // C8_DC... + /* 1238 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1240 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1248 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 1250 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 1258 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1260 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1268 */ 0x00, 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, // ..PL4Pow + /* 1270 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, // erLimit. + /* 1278 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 1280 */ 0x00, 0x00, 0x00, 0x00, 0x34, 0x33, 0x30, 0x30, // ....4300 + /* 1288 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, // 0.....%. + /* 1290 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1298 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 12A0 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, // ..PSC8_D + /* 12A8 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 12B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 12B8 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 12C0 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 12C8 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 12D0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, // ........ + /* 12D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, // ......Tc + /* 12E0 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, // cOffset. + /* 12E8 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, // ........ + /* 12F0 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, // ....3... + /* 12F8 */ 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, // ..%..... + /* 1300 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1308 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 1310 */ 0x43, 0x38, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // C8_DC... + /* 1318 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1320 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1328 */ 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, // IETM.... + /* 1330 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1338 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 1340 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, // .....PSV + /* 1348 */ 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // T....... + /* 1350 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x73, 0x74, // ......st + /* 1358 */ 0x64, 0x00, 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, // d....... + /* 1360 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1368 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1370 */ 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x43, 0x4F, // ..MMC_CO + /* 1378 */ 0x4F, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // OL...... + /* 1380 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 1388 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 1390 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 1398 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 13A0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, // ........ + /* 13A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 13B0 */ 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, // L1MAX... + /* 13B8 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 13C0 */ 0x00, 0x00, 0x31, 0x32, 0x30, 0x30, 0x30, 0x00, // ..12000. + /* 13C8 */ 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, // ........ + /* 13D0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 13D8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 13E0 */ 0x4D, 0x4D, 0x43, 0x5F, 0x43, 0x4F, 0x4F, 0x4C, // MMC_COOL + /* 13E8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 13F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 13F8 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 1400 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 1408 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1410 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, // ........ + /* 1418 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, // .....PL1 + /* 1420 */ 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, // MIN..... + /* 1428 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1430 */ 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 4500.... + /* 1438 */ 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1440 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 1448 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, // .....MMC + /* 1450 */ 0x5F, 0x43, 0x4F, 0x4F, 0x4C, 0x00, 0x08, 0x00, // _COOL... + /* 1458 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1460 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1468 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 1470 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 1478 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1480 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1488 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, // ..PL1STE + /* 1490 */ 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // P....... + /* 1498 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, // ......50 + /* 14A0 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, // 0....... + /* 14A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 14B0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 14B8 */ 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x43, 0x4F, // ..MMC_CO + /* 14C0 */ 0x4F, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // OL...... + /* 14C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 14D0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 14D8 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 14E0 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 14E8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, // ........ + /* 14F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 14F8 */ 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, // L1PowerL + /* 1500 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, // imit.... + /* 1508 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1510 */ 0x00, 0x31, 0x32, 0x30, 0x30, 0x30, 0x00, 0x04, // .12000.. + /* 1518 */ 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1520 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, // ........ + /* 1528 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, // .......M + /* 1530 */ 0x4D, 0x43, 0x5F, 0x43, 0x4F, 0x4F, 0x4C, 0x00, // MC_COOL. + /* 1538 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 1540 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 1548 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 1550 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 1558 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1560 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 1568 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, // ....PL2P + /* 1570 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, // owerLimi + /* 1578 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, // t....... + /* 1580 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x39, // ......29 + /* 1588 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 000..... + /* 1590 */ 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1598 */ 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 15A0 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, // ....MMC_ + /* 15A8 */ 0x43, 0x4F, 0x4F, 0x4C, 0x00, 0x08, 0x00, 0x00, // COOL.... + /* 15B0 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 15B8 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 15C0 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 15C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 15D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 15D8 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 15E0 */ 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, // .PL4Powe + /* 15E8 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 15F0 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 15F8 */ 0x00, 0x00, 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, // ...71000 + /* 1600 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, // ........ + /* 1608 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 1610 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1618 */ 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x43, 0x4F, 0x4F, // .MMC_COO + /* 1620 */ 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // L....... + /* 1628 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 1630 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 1638 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 1640 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1648 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, // ........ + /* 1650 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, // ......Tc + /* 1658 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, // cOffset. + /* 1660 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, // ........ + /* 1668 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, // ....3... + /* 1670 */ 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1678 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, // ........ + /* 1680 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, // ......MM + /* 1688 */ 0x43, 0x5F, 0x43, 0x4F, 0x4F, 0x4C, 0x00, 0x08, // C_COOL.. + /* 1690 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1698 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, // ...\_SB_ + /* 16A0 */ 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, // .IETM... + /* 16A8 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 16B0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, // ........ + /* 16B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 16C0 */ 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, // VT...... + /* 16C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, // .......c + /* 16D0 */ 0x71, 0x6C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, // ql.....! + /* 16D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 16E0 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, // ........ + /* 16E8 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, // ...MMC_P + /* 16F0 */ 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, // ERFORMAN + /* 16F8 */ 0x43, 0x45, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, // CE_AC... + /* 1700 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1708 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1710 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 1718 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 1720 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1728 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1730 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, // ..PL1MAX + /* 1738 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 1740 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, // .....230 + /* 1748 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, // 00.....! + /* 1750 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 1758 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1760 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, // ...MMC_P + /* 1768 */ 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, // ERFORMAN + /* 1770 */ 0x43, 0x45, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, // CE_AC... + /* 1778 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1780 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1788 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 1790 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 1798 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 17A0 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 17A8 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, // ..PL1MIN + /* 17B0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 17B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, // .....135 + /* 17C0 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, // 00.....! + /* 17C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 17D0 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, // ........ + /* 17D8 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, // ...MMC_P + /* 17E0 */ 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, // ERFORMAN + /* 17E8 */ 0x43, 0x45, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, // CE_AC... + /* 17F0 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 17F8 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1800 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 1808 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 1810 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1818 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1820 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, // ..PL1STE + /* 1828 */ 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // P....... + /* 1830 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, // ......50 + /* 1838 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, // 0.....!. + /* 1840 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1848 */ 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1850 */ 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, // ..MMC_PE + /* 1858 */ 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, // RFORMANC + /* 1860 */ 0x45, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, // E_AC.... + /* 1868 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1870 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 1878 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 1880 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 1888 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 1890 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1898 */ 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, // .PL1Powe + /* 18A0 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 18A8 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 18B0 */ 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, // ...23000 + /* 18B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, // .....!.. + /* 18C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 18C8 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 18D0 */ 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, // .MMC_PER + /* 18D8 */ 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, // FORMANCE + /* 18E0 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 18E8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 18F0 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 18F8 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 1900 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 1908 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 1910 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1918 */ 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, // PL2Power + /* 1920 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, // Limit... + /* 1928 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1930 */ 0x00, 0x00, 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, // ..29000. + /* 1938 */ 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, // ....!... + /* 1940 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 1948 */ 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1950 */ 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, // MMC_PERF + /* 1958 */ 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, // ORMANCE_ + /* 1960 */ 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // AC...... + /* 1968 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 1970 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 1978 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 1980 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1988 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, // ........ + /* 1990 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 1998 */ 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, // L4PowerL + /* 19A0 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, // imit.... + /* 19A8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 19B0 */ 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, // .71000.. + /* 19B8 */ 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, // ...!.... + /* 19C0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, // ........ + /* 19C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, // .......M + /* 19D0 */ 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, // MC_PERFO + /* 19D8 */ 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x41, // RMANCE_A + /* 19E0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 19E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 19F0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 19F8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 1A00 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1A08 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, // ........ + /* 1A10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, // ......Tc + /* 1A18 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, // cOffset. + /* 1A20 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, // ........ + /* 1A28 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, // ....3... + /* 1A30 */ 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, // ..!..... + /* 1A38 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, // ........ + /* 1A40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, // ......MM + /* 1A48 */ 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, // C_PERFOR + /* 1A50 */ 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x41, 0x43, // MANCE_AC + /* 1A58 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, // ........ + /* 1A60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 1A68 */ 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, // B_.IETM. + /* 1A70 */ 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 1A78 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 1A80 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1A88 */ 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, // PSVT.... + /* 1A90 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1A98 */ 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, // .std.... + /* 1AA0 */ 0x00, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1AA8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, // ........ + /* 1AB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, // .....MMC + /* 1AB8 */ 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, // _PERFORM + /* 1AC0 */ 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, // ANCE_DC. + /* 1AC8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 1AD0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 1AD8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 1AE0 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 1AE8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1AF0 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, // ........ + /* 1AF8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, // ....PL1M + /* 1B00 */ 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // AX...... + /* 1B08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, // .......1 + /* 1B10 */ 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 5000.... + /* 1B18 */ 0x00, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1B20 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, // ........ + /* 1B28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, // .....MMC + /* 1B30 */ 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, // _PERFORM + /* 1B38 */ 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, // ANCE_DC. + /* 1B40 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 1B48 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 1B50 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 1B58 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 1B60 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1B68 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, // ........ + /* 1B70 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, // ....PL1M + /* 1B78 */ 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // IN...... + /* 1B80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, // .......1 + /* 1B88 */ 0x33, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 3500.... + /* 1B90 */ 0x00, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1B98 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, // ........ + /* 1BA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, // .....MMC + /* 1BA8 */ 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, // _PERFORM + /* 1BB0 */ 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, // ANCE_DC. + /* 1BB8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 1BC0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 1BC8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 1BD0 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 1BD8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1BE0 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 1BE8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, // ....PL1S + /* 1BF0 */ 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, // TEP..... + /* 1BF8 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1C00 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 500..... + /* 1C08 */ 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1C10 */ 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, // ........ + /* 1C18 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, // ....MMC_ + /* 1C20 */ 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, // PERFORMA + /* 1C28 */ 0x4E, 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, 0x08, // NCE_DC.. + /* 1C30 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1C38 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, // ...\_SB_ + /* 1C40 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, // .PCI0.B0 + /* 1C48 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, // D4...... + /* 1C50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 1C58 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1C60 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, // ...PL1Po + /* 1C68 */ 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, // werLimit + /* 1C70 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 1C78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, // .....150 + /* 1C80 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, // 00...... + /* 1C88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 1C90 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1C98 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, // ...MMC_P + /* 1CA0 */ 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, // ERFORMAN + /* 1CA8 */ 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // CE_DC... + /* 1CB0 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1CB8 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 1CC0 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 1CC8 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 1CD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1CD8 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1CE0 */ 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, // ..PL2Pow + /* 1CE8 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, // erLimit. + /* 1CF0 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 1CF8 */ 0x00, 0x00, 0x00, 0x00, 0x32, 0x35, 0x30, 0x30, // ....2500 + /* 1D00 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, 0x00, // 0....... + /* 1D08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1D10 */ 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1D18 */ 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, // ..MMC_PE + /* 1D20 */ 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, // RFORMANC + /* 1D28 */ 0x45, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, // E_DC.... + /* 1D30 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1D38 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 1D40 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 1D48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 1D50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 1D58 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1D60 */ 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, // .PL4Powe + /* 1D68 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 1D70 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1D78 */ 0x00, 0x00, 0x00, 0x34, 0x33, 0x30, 0x30, 0x30, // ...43000 + /* 1D80 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, // ........ + /* 1D88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 1D90 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1D98 */ 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, // .MMC_PER + /* 1DA0 */ 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, // FORMANCE + /* 1DA8 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _DC..... + /* 1DB0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1DB8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 1DC0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 1DC8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 1DD0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 1DD8 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1DE0 */ 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, // TccOffse + /* 1DE8 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, // t....... + /* 1DF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, // ......3. + /* 1DF8 */ 0x04, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, // ........ + /* 1E00 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 1E08 */ 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1E10 */ 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, // MMC_PERF + /* 1E18 */ 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, // ORMANCE_ + /* 1E20 */ 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, // DC...... + /* 1E28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 1E30 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, // _SB_.IET + /* 1E38 */ 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, // M....... + /* 1E40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 1E48 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1E50 */ 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, // ..PSVT.. + /* 1E58 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1E60 */ 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, // ...std.. + /* 1E68 */ 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1E70 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, // ........ + /* 1E78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, // .......M + /* 1E80 */ 0x53, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // SC...... + /* 1E88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 1E90 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 1E98 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 1EA0 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1EA8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, // ........ + /* 1EB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 1EB8 */ 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, // L1MAX... + /* 1EC0 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1EC8 */ 0x00, 0x00, 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, // ..4500.. + /* 1ED0 */ 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1ED8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, // ........ + /* 1EE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, // .......M + /* 1EE8 */ 0x53, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // SC...... + /* 1EF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 1EF8 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 1F00 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 1F08 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1F10 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, // ........ + /* 1F18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 1F20 */ 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, // L1MIN... + /* 1F28 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1F30 */ 0x00, 0x00, 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, // ..4500.. + /* 1F38 */ 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1F40 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, // ........ + /* 1F48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, // .......M + /* 1F50 */ 0x53, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // SC...... + /* 1F58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 1F60 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 1F68 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 1F70 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1F78 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, // ........ + /* 1F80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 1F88 */ 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, // L1STEP.. + /* 1F90 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1F98 */ 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, // ...500.. + /* 1FA0 */ 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1FA8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, // ........ + /* 1FB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, // .......M + /* 1FB8 */ 0x53, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // SC...... + /* 1FC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 1FC8 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 1FD0 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 1FD8 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 1FE0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, // ........ + /* 1FE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 1FF0 */ 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, // L1PowerL + /* 1FF8 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, // imit.... + /* 2000 */ 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2008 */ 0x00, 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, // .4500... + /* 2010 */ 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2018 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, // ......MS + /* 2028 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 2030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 2038 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 2040 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 2048 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2050 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, // ........ + /* 2058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 2060 */ 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, // 2PowerLi + /* 2068 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // mit..... + /* 2070 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2078 */ 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, // 29000... + /* 2080 */ 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2088 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, // ......MS + /* 2098 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 20A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 20A8 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 20B0 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 20B8 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 20C0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, // ........ + /* 20C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 20D0 */ 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, // 4PowerLi + /* 20D8 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // mit..... + /* 20E0 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 20E8 */ 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, // 71000... + /* 20F0 */ 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 20F8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, // ......MS + /* 2108 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 2110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 2118 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 2120 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 2128 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2130 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, // ........ + /* 2138 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, // ......Tc + /* 2140 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, // cOffset. + /* 2148 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, // ........ + /* 2150 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, // ....3... + /* 2158 */ 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2160 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2168 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, // ......MS + /* 2170 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, // C....... + /* 2178 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 2180 */ 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, // SB_.IETM + /* 2188 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 2190 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2198 */ 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 21A0 */ 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, // .PSVT... + /* 21A8 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 21B0 */ 0x00, 0x00, 0x63, 0x71, 0x6C, 0x00, 0x04, 0x00, // ..cql... + /* 21B8 */ 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 21C0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 21C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, // ......IF + /* 21D0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 21D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 21E0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 21E8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 21F0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 21F8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, // ........ + /* 2200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 2208 */ 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, // 1MAX.... + /* 2210 */ 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2218 */ 0x00, 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, // .4500... + /* 2220 */ 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2228 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2230 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, // ......IF + /* 2238 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 2240 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 2248 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 2250 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 2258 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2260 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, // ........ + /* 2268 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 2270 */ 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, // 1MIN.... + /* 2278 */ 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2280 */ 0x00, 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, // .4500... + /* 2288 */ 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2290 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2298 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, // ......IF + /* 22A0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 22A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 22B0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 22B8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 22C0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 22C8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 22D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 22D8 */ 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, // 1STEP... + /* 22E0 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 22E8 */ 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, // ..500... + /* 22F0 */ 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 22F8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2300 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, // ......IF + /* 2308 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 2310 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 2318 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 2320 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 2328 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2330 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, // ........ + /* 2338 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 2340 */ 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, // 1PowerLi + /* 2348 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // mit..... + /* 2350 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2358 */ 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 4500.... + /* 2360 */ 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2368 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 2370 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, // .....IFC + /* 2378 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 2380 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 2388 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 2390 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 2398 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 23A0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 23A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, // .....PL2 + /* 23B0 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, // PowerLim + /* 23B8 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // it...... + /* 23C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, // .......2 + /* 23C8 */ 0x39, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 9000.... + /* 23D0 */ 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 23D8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 23E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, // .....IFC + /* 23E8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 23F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 23F8 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 2400 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 2408 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2410 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 2418 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, // .....PL4 + /* 2420 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, // PowerLim + /* 2428 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // it...... + /* 2430 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, // .......7 + /* 2438 */ 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 1000.... + /* 2440 */ 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2448 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 2450 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, // .....IFC + /* 2458 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 2460 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 2468 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 2470 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 2478 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2480 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, // ........ + /* 2488 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, // .....Tcc + /* 2490 */ 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, // Offset.. + /* 2498 */ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, // ........ + /* 24A0 */ 0x00, 0x00, 0x00, 0x35, 0x30, 0x00, 0x04, 0x00, // ...50... + /* 24A8 */ 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 24B0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 24B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, // ......IF + /* 24C0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, // C....... + /* 24C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 24D0 */ 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, // SB_.IETM + /* 24D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 24E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 24E8 */ 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 24F0 */ 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, // .PSVT... + /* 24F8 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2500 */ 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, // ..std... + /* 2508 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2510 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // ........ + /* 2518 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, // ......DM + /* 2520 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 2528 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 2530 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 2538 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 2540 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2548 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, // ........ + /* 2550 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 2558 */ 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, // 1MAX.... + /* 2560 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2568 */ 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, // .23000.. + /* 2570 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2578 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, // ........ + /* 2580 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, // .......D + /* 2588 */ 0x4D, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // MC...... + /* 2590 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 2598 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 25A0 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 25A8 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 25B0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, // ........ + /* 25B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 25C0 */ 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, // L1MIN... + /* 25C8 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 25D0 */ 0x00, 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, 0x00, // ..13500. + /* 25D8 */ 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 25E0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 25E8 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 25F0 */ 0x44, 0x4D, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // DMC..... + /* 25F8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2600 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 2608 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 2610 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 2618 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2620 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2628 */ 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, // PL1STEP. + /* 2630 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 2638 */ 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, // ....500. + /* 2640 */ 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 2648 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2650 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2658 */ 0x44, 0x4D, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // DMC..... + /* 2660 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2668 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 2670 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 2678 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 2680 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2688 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2690 */ 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, // PL1Power + /* 2698 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, // Limit... + /* 26A0 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 26A8 */ 0x00, 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, // ..23000. + /* 26B0 */ 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 26B8 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 26C0 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 26C8 */ 0x44, 0x4D, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // DMC..... + /* 26D0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 26D8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 26E0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 26E8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 26F0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 26F8 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2700 */ 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, // PL2Power + /* 2708 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, // Limit... + /* 2710 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2718 */ 0x00, 0x00, 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, // ..29000. + /* 2720 */ 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 2728 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2730 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2738 */ 0x44, 0x4D, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // DMC..... + /* 2740 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2748 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 2750 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 2758 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 2760 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2768 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2770 */ 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, // PL4Power + /* 2778 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, // Limit... + /* 2780 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2788 */ 0x00, 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, // ..71000. + /* 2790 */ 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 2798 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 27A0 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 27A8 */ 0x44, 0x4D, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // DMC..... + /* 27B0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 27B8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 27C0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 27C8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 27D0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 27D8 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 27E0 */ 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, // TccOffse + /* 27E8 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, // t....... + /* 27F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, // ......3. + /* 27F8 */ 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 2800 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2808 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2810 */ 0x44, 0x4D, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // DMC..... + /* 2818 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2820 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, // \_SB_.IE + /* 2828 */ 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, // TM...... + /* 2830 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 2838 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2840 */ 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, // ...PSVT. + /* 2848 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 2850 */ 0x00, 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, // ....std. + /* 2858 */ 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, // ........ + /* 2860 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2868 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2870 */ 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, // CQL..... + /* 2878 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2880 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 2888 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 2890 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 2898 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 28A0 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 28A8 */ 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, // PL1MAX.. + /* 28B0 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 28B8 */ 0x00, 0x00, 0x00, 0x31, 0x32, 0x30, 0x30, 0x30, // ...12000 + /* 28C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 28C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 28D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 28D8 */ 0x00, 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, // .CQL.... + /* 28E0 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 28E8 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 28F0 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 28F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 2900 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2908 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2910 */ 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, // .PL1MIN. + /* 2918 */ 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, // ........ + /* 2920 */ 0x00, 0x00, 0x00, 0x00, 0x34, 0x35, 0x30, 0x30, // ....4500 + /* 2928 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 2930 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2938 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2940 */ 0x00, 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, // .CQL.... + /* 2948 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2950 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 2958 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 2960 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 2968 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2970 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2978 */ 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, // .PL1STEP + /* 2980 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 2988 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, // .....500 + /* 2990 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 2998 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 29A0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 29A8 */ 0x00, 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, // .CQL.... + /* 29B0 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 29B8 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 29C0 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 29C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 29D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 29D8 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 29E0 */ 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, // .PL1Powe + /* 29E8 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 29F0 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 29F8 */ 0x00, 0x00, 0x00, 0x31, 0x32, 0x30, 0x30, 0x30, // ...12000 + /* 2A00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 2A08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2A10 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2A18 */ 0x00, 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, // .CQL.... + /* 2A20 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2A28 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 2A30 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 2A38 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 2A40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2A48 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2A50 */ 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, // .PL2Powe + /* 2A58 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 2A60 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2A68 */ 0x00, 0x00, 0x00, 0x32, 0x39, 0x30, 0x30, 0x30, // ...29000 + /* 2A70 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 2A78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2A80 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2A88 */ 0x00, 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, // .CQL.... + /* 2A90 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2A98 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 2AA0 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 2AA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 2AB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2AB8 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2AC0 */ 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, // .PL4Powe + /* 2AC8 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 2AD0 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2AD8 */ 0x00, 0x00, 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, // ...71000 + /* 2AE0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 2AE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2AF0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2AF8 */ 0x00, 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, // .CQL.... + /* 2B00 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2B08 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 2B10 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 2B18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 2B20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2B28 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2B30 */ 0x00, 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, // .TccOffs + /* 2B38 */ 0x65, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, // et...... + /* 2B40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, // .......3 + /* 2B48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 2B50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2B58 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2B60 */ 0x00, 0x43, 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, // .CQL.... + /* 2B68 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2B70 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, // .\_SB_.I + /* 2B78 */ 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, // ETM..... + /* 2B80 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2B88 */ 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, // ........ + /* 2B90 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, // ....PSVT + /* 2B98 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 2BA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x71, 0x6C, // .....cql + /* 2BA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, // ........ + /* 2BB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2BB8 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2BC0 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, // .STD_U42 + /* 2BC8 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 2BD0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2BD8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 2BE0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 2BE8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 2BF0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2BF8 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2C00 */ 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, // PL1MAX.. + /* 2C08 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2C10 */ 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, // ...23000 + /* 2C18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, // ........ + /* 2C20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2C28 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2C30 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, // .STD_U42 + /* 2C38 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 2C40 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2C48 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 2C50 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 2C58 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 2C60 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2C68 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2C70 */ 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, // PL1MIN.. + /* 2C78 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2C80 */ 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, // ...13500 + /* 2C88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, // ........ + /* 2C90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 2C98 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2CA0 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, // .STD_U42 + /* 2CA8 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 2CB0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2CB8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 2CC0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 2CC8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 2CD0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2CD8 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2CE0 */ 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, // PL1STEP. + /* 2CE8 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, // ........ + /* 2CF0 */ 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, // ....500. + /* 2CF8 */ 0x04, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, // ........ + /* 2D00 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 2D08 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2D10 */ 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, // STD_U42_ + /* 2D18 */ 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // AC...... + /* 2D20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 2D28 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 2D30 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 2D38 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2D40 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, // ........ + /* 2D48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 2D50 */ 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, // L1PowerL + /* 2D58 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, // imit.... + /* 2D60 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2D68 */ 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, // .23000.. + /* 2D70 */ 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2D78 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, // ........ + /* 2D80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, // .......S + /* 2D88 */ 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, // TD_U42_A + /* 2D90 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 2D98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 2DA0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 2DA8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 2DB0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2DB8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, // ........ + /* 2DC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 2DC8 */ 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, // 2PowerLi + /* 2DD0 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // mit..... + /* 2DD8 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2DE0 */ 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, // 29000... + /* 2DE8 */ 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2DF0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, // ........ + /* 2DF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, // ......ST + /* 2E00 */ 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, 0x43, // D_U42_AC + /* 2E08 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 2E10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 2E18 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 2E20 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 2E28 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2E30 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 2E38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, // .....PL4 + /* 2E40 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, // PowerLim + /* 2E48 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // it...... + /* 2E50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, // .......7 + /* 2E58 */ 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 1000.... + /* 2E60 */ 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2E68 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, // ........ + /* 2E70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, // .....STD + /* 2E78 */ 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, 0x43, 0x00, // _U42_AC. + /* 2E80 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 2E88 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 2E90 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 2E98 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 2EA0 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2EA8 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, // ........ + /* 2EB0 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, // ....TccO + /* 2EB8 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, // ffset... + /* 2EC0 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2EC8 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, // ..3..... + /* 2ED0 */ 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2ED8 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, // ........ + /* 2EE0 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, // ....STD_ + /* 2EE8 */ 0x55, 0x34, 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, // U42_AC.. + /* 2EF0 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2EF8 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, // ...\_SB_ + /* 2F00 */ 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, // .IETM... + /* 2F08 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2F10 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, // ........ + /* 2F18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, // ......PS + /* 2F20 */ 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, // VT...... + /* 2F28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x73, // .......s + /* 2F30 */ 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, // td.....# + /* 2F38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 2F40 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2F48 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, // ...STD_U + /* 2F50 */ 0x32, 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, // 22_AC... + /* 2F58 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2F60 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 2F68 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 2F70 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 2F78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 2F80 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2F88 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, // ..PL1MAX + /* 2F90 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 2F98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, // .....230 + /* 2FA0 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, // 00.....# + /* 2FA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 2FB0 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2FB8 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, // ...STD_U + /* 2FC0 */ 0x32, 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, // 22_AC... + /* 2FC8 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2FD0 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 2FD8 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 2FE0 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 2FE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 2FF0 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 2FF8 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, // ..PL1MIN + /* 3000 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 3008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, // .....135 + /* 3010 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, // 00.....# + /* 3018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 3020 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3028 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, // ...STD_U + /* 3030 */ 0x32, 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, // 22_AC... + /* 3038 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3040 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 3048 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 3050 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 3058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 3060 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3068 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, // ..PL1STE + /* 3070 */ 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, // P....... + /* 3078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, // ......50 + /* 3080 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, // 0.....#. + /* 3088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 3090 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3098 */ 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, // ..STD_U2 + /* 30A0 */ 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, // 2_AC.... + /* 30A8 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 30B0 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 30B8 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 30C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 30C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 30D0 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 30D8 */ 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, // .PL1Powe + /* 30E0 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 30E8 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 30F0 */ 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, // ...23000 + /* 30F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, // .....#.. + /* 3100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 3108 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3110 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, // .STD_U22 + /* 3118 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _AC..... + /* 3120 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3128 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 3130 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 3138 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 3140 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 3148 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3150 */ 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, // PL2Power + /* 3158 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, // Limit... + /* 3160 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3168 */ 0x00, 0x00, 0x32, 0x35, 0x30, 0x30, 0x30, 0x00, // ..25000. + /* 3170 */ 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, // ....#... + /* 3178 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 3180 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3188 */ 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, // STD_U22_ + /* 3190 */ 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // AC...... + /* 3198 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 31A0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 31A8 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, // 0.B0D4.. + /* 31B0 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 31B8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, // ........ + /* 31C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, // .......P + /* 31C8 */ 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, // L4PowerL + /* 31D0 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, // imit.... + /* 31D8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 31E0 */ 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, // .71000.. + /* 31E8 */ 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, // ...#.... + /* 31F0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, // ........ + /* 31F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, // .......S + /* 3200 */ 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x41, // TD_U22_A + /* 3208 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 3210 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 3218 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 3220 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 3228 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3230 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, // ........ + /* 3238 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, // ......Tc + /* 3240 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, // cOffset. + /* 3248 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, // ........ + /* 3250 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, // ....3... + /* 3258 */ 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, // ..#..... + /* 3260 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, // ........ + /* 3268 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, // ......ST + /* 3270 */ 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x41, 0x43, // D_U22_AC + /* 3278 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, // ........ + /* 3280 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 3288 */ 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, // B_.IETM. + /* 3290 */ 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 3298 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 32A0 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 32A8 */ 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, // PSVT.... + /* 32B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 32B8 */ 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, // .std.... + /* 32C0 */ 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ."...... + /* 32C8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, // ........ + /* 32D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, // .....STD + /* 32D8 */ 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, // _U42_DC. + /* 32E0 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 32E8 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 32F0 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 32F8 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 3300 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3308 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, // ........ + /* 3310 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, // ....PL1M + /* 3318 */ 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // AX...... + /* 3320 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, // .......1 + /* 3328 */ 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 5000.... + /* 3330 */ 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ."...... + /* 3338 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, // ........ + /* 3340 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, // .....STD + /* 3348 */ 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, // _U42_DC. + /* 3350 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 3358 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 3360 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 3368 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 3370 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3378 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, // ........ + /* 3380 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, // ....PL1M + /* 3388 */ 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // IN...... + /* 3390 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, // .......1 + /* 3398 */ 0x33, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 3500.... + /* 33A0 */ 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ."...... + /* 33A8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, // ........ + /* 33B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, // .....STD + /* 33B8 */ 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, // _U42_DC. + /* 33C0 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 33C8 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 33D0 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 33D8 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 33E0 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 33E8 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 33F0 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, // ....PL1S + /* 33F8 */ 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, // TEP..... + /* 3400 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3408 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 500..... + /* 3410 */ 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // "....... + /* 3418 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, // ........ + /* 3420 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, // ....STD_ + /* 3428 */ 0x55, 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, // U42_DC.. + /* 3430 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3438 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, // ...\_SB_ + /* 3440 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, // .PCI0.B0 + /* 3448 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, // D4...... + /* 3450 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 3458 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3460 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, // ...PL1Po + /* 3468 */ 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, // werLimit + /* 3470 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 3478 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, // .....150 + /* 3480 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, // 00....." + /* 3488 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 3490 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3498 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, // ...STD_U + /* 34A0 */ 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // 42_DC... + /* 34A8 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 34B0 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 34B8 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 34C0 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 34C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 34D0 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 34D8 */ 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, // ..PL2Pow + /* 34E0 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, // erLimit. + /* 34E8 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 34F0 */ 0x00, 0x00, 0x00, 0x00, 0x32, 0x35, 0x30, 0x30, // ....2500 + /* 34F8 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, 0x00, // 0.....". + /* 3500 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 3508 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3510 */ 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, // ..STD_U4 + /* 3518 */ 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, // 2_DC.... + /* 3520 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3528 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 3530 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 3538 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 3540 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 3548 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3550 */ 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, // .PL4Powe + /* 3558 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, // rLimit.. + /* 3560 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3568 */ 0x00, 0x00, 0x00, 0x34, 0x33, 0x30, 0x30, 0x30, // ...43000 + /* 3570 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, // .....".. + /* 3578 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 3580 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3588 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, // .STD_U42 + /* 3590 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, // _DC..... + /* 3598 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 35A0 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, // \_SB_.PC + /* 35A8 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, // I0.B0D4. + /* 35B0 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, // ........ + /* 35B8 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 35C0 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 35C8 */ 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, // TccOffse + /* 35D0 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, // t....... + /* 35D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, // ......3. + /* 35E0 */ 0x04, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, // ...."... + /* 35E8 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 35F0 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 35F8 */ 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, // STD_U42_ + /* 3600 */ 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, // DC...... + /* 3608 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 3610 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, // _SB_.IET + /* 3618 */ 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, // M....... + /* 3620 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 3628 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3630 */ 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, // ..PSVT.. + /* 3638 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3640 */ 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, // ...std.. + /* 3648 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3650 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, // ........ + /* 3658 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, // .......S + /* 3660 */ 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, // TD_U22_D + /* 3668 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 3670 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 3678 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 3680 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 3688 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3690 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, // ........ + /* 3698 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 36A0 */ 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, // 1MAX.... + /* 36A8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 36B0 */ 0x00, 0x31, 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, // .15000.. + /* 36B8 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, // ........ + /* 36C0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, // ........ + /* 36C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, // .......S + /* 36D0 */ 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, // TD_U22_D + /* 36D8 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 36E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 36E8 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 36F0 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 36F8 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3700 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, // ........ + /* 3708 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 3710 */ 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, // 1MIN.... + /* 3718 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3720 */ 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, 0x00, 0x04, // .13500.. + /* 3728 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3730 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, // ........ + /* 3738 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, // .......S + /* 3740 */ 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, // TD_U22_D + /* 3748 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, // C....... + /* 3750 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, // ......\_ + /* 3758 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, // SB_.PCI0 + /* 3760 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, // .B0D4... + /* 3768 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3770 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 3778 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, // ......PL + /* 3780 */ 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, // 1STEP... + /* 3788 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3790 */ 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, // ..500... + /* 3798 */ 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 37A0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, // ........ + /* 37A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, // ......ST + /* 37B0 */ 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, 0x43, // D_U22_DC + /* 37B8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 37C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 37C8 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 37D0 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, // B0D4.... + /* 37D8 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 37E0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, // ........ + /* 37E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, // .....PL1 + /* 37F0 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, // PowerLim + /* 37F8 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, // it...... + /* 3800 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, // .......1 + /* 3808 */ 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, // 5000.... + /* 3810 */ 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3818 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, // ........ + /* 3820 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, // .....STD + /* 3828 */ 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, // _U22_DC. + /* 3830 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 3838 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, // ....\_SB + /* 3840 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, // _.PCI0.B + /* 3848 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, // 0D4..... + /* 3850 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3858 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 3860 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, // ....PL2P + /* 3868 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, // owerLimi + /* 3870 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, // t....... + /* 3878 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x35, // ......25 + /* 3880 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, // 000..... + /* 3888 */ 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3890 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, // ........ + /* 3898 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, // ....STD_ + /* 38A0 */ 0x55, 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, // U22_DC.. + /* 38A8 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, // ........ + /* 38B0 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, // ...\_SB_ + /* 38B8 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, // .PCI0.B0 + /* 38C0 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, // D4...... + /* 38C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 38D0 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, // ........ + /* 38D8 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, // ...PL4Po + /* 38E0 */ 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, // werLimit + /* 38E8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 38F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x33, 0x30, // .....430 + /* 38F8 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, // 00...... + /* 3900 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ........ + /* 3908 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3910 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, // ...STD_U + /* 3918 */ 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, // 22_DC... + /* 3920 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3928 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, // ..\_SB_. + /* 3930 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, // PCI0.B0D + /* 3938 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, // 4....... + /* 3940 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 3948 */ 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3950 */ 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, // ..TccOff + /* 3958 */ 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, // set..... + /* 3960 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3968 */ 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, // 3....... + /* 3970 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, // ........ + /* 3978 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3980 */ 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, // ..STD_U2 + /* 3988 */ 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, // 2_DC.... + /* 3990 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3998 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, // .\_SB_.I + /* 39A0 */ 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, // ETM..... + /* 39A8 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 39B0 */ 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, // ........ + /* 39B8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, // ....PSVT + /* 39C0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 39C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, // .....std + /* 39D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, // ........ + /* 39D8 */ 0x00, 0x2F, 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, // ./shared + /* 39E0 */ 0x2F, 0x65, 0x78, 0x70, 0x6F, 0x72, 0x74, 0x2F, // /export/ + /* 39E8 */ 0x61, 0x70, 0x63, 0x74, 0x00, 0x07, 0x00, 0x00, // apct.... + /* 39F0 */ 0x00, 0xCC, 0x21, 0x00, 0x00, 0x04, 0x00, 0x00, // ..!..... + /* 39F8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3A00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, // ........ + /* 3A08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3A10 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3A18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3A20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3A28 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3A30 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3A38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3A40 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3A48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3A50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3A58 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3A60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3A68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3A70 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3A78 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3A80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3A88 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3A90 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3A98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3AA0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3AA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3AB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3AB8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3AC0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3AC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3AD0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3AD8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3AE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3AE8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3AF0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3AF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3B00 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3B08 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3B10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3B18 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3B20 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3B28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3B30 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3B38 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3B40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3B48 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3B50 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3B58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3B60 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3B68 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3B70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3B78 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3B80 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3B88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3B90 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3B98 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3BA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3BA8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3BB0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3BB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3BC0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3BC8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3BD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3BD8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3BE0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, // .....$.. + /* 3BE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3BF0 */ 0x00, 0x0C, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3BF8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3C00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3C08 */ 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3C10 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3C18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3C20 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3C28 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3C30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3C38 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3C40 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3C48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3C50 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3C58 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3C60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3C68 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3C70 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3C78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3C80 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3C88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3C90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3C98 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3CA0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3CA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3CB0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3CB8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3CC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3CC8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3CD0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3CD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3CE0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3CE8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3CF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3CF8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3D00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3D08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3D10 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3D18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3D20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3D28 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3D30 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3D38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3D40 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3D48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3D50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3D58 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3D60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3D68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3D70 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3D78 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3D80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3D88 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3D90 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3D98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3DA0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3DA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3DB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3DB8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3DC0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, // ..... .. + /* 3DC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3DD0 */ 0x00, 0x0C, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3DD8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3DE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3DE8 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3DF0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3DF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3E00 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3E08 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3E10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3E18 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3E20 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3E28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3E30 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3E38 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3E40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3E48 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3E50 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3E58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3E60 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3E68 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3E70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3E78 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3E80 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3E88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3E90 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3E98 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3EA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3EA8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3EB0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3EB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3EC0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3EC8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3ED0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3ED8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3EE0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3EE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3EF0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3EF8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3F00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3F08 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3F10 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3F18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3F20 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3F28 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3F30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3F38 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3F40 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3F48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3F50 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3F58 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3F60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3F68 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3F70 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3F78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3F80 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3F88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3F90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3F98 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3FA0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, // .....%.. + /* 3FA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3FB0 */ 0x00, 0x0C, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3FB8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3FC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3FC8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3FD0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3FD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3FE0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 3FE8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 3FF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 3FF8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4000 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4010 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4018 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4028 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4030 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4040 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4048 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4058 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4060 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4070 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4078 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4088 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4090 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 40A0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 40A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 40B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 40B8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 40C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 40C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 40D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 40D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 40E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 40E8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 40F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 40F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4100 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4108 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4118 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4120 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4128 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4130 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4138 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4140 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4148 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4150 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4158 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4160 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4168 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4170 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4178 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4180 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, // ........ + /* 4188 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4190 */ 0x00, 0x03, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4198 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 41A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 41A8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 41B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 41B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 41C0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 41C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 41D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 41D8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 41E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 41E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 41F0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 41F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4208 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4210 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4218 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4220 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4228 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4230 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4238 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4240 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4248 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4250 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4258 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4260 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4268 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4270 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4278 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4280 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4288 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4290 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4298 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 42A0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 42A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 42B0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 42B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 42C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 42C8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 42D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 42D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 42E0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 42E8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 42F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 42F8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4300 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4308 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4310 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4318 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4320 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4328 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4330 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4338 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4340 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4348 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4350 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4358 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4360 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 4368 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4370 */ 0x00, 0x02, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4378 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4380 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4388 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4390 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4398 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 43A0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 43A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 43B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 43B8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 43C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 43C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 43D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 43D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 43E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 43E8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 43F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 43F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4400 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4408 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4410 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4418 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4420 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4428 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4430 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4438 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4440 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4448 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4450 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4458 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4460 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4468 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4470 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4478 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4480 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4488 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4490 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4498 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 44A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 44A8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 44B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 44B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 44C0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 44C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 44D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 44D8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 44E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 44E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 44F0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 44F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4500 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4508 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4510 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4518 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4520 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4528 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4530 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4538 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4540 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 4548 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4550 */ 0x00, 0x01, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4558 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4560 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4568 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4570 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4578 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4580 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4588 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4590 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4598 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 45A0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 45A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 45B0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 45B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 45C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 45C8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 45D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 45D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 45E0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 45E8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 45F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 45F8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4600 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4608 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4610 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4618 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4620 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4628 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4630 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4638 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4640 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4648 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4650 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4658 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4660 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4668 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4670 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4678 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4680 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4688 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4690 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4698 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 46A0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 46A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 46B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 46B8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 46C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 46C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 46D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 46D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 46E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 46E8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 46F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 46F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4700 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4708 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4710 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4718 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4720 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, // ........ + /* 4728 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4730 */ 0x00, 0x08, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4738 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4740 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4748 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4750 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4758 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4760 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4768 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4770 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4778 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4780 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4788 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4790 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4798 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 47A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 47A8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 47B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 47B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 47C0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 47C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 47D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 47D8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 47E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 47E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 47F0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 47F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4800 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4808 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4810 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4818 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4820 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4828 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4830 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4838 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4840 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4848 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4850 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4858 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4860 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4868 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4870 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4878 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4880 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4888 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4890 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4898 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 48A0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 48A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 48B0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 48B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 48C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 48C8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 48D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 48D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 48E0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 48E8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 48F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 48F8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4900 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, // .....!.. + /* 4908 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4910 */ 0x00, 0x09, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4918 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4920 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4928 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4930 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4938 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4940 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4948 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4950 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4958 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4960 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4968 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4970 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4978 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4980 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4988 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4990 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4998 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 49A0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 49A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 49B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 49B8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 49C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 49C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 49D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 49D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 49E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 49E8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 49F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 49F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4A00 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4A08 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4A10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4A18 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4A20 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4A28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4A30 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4A38 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4A40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4A48 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4A50 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4A58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4A60 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4A68 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4A70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4A78 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4A80 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4A88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4A90 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4A98 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4AA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4AA8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4AB0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4AB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4AC0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4AC8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4AD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4AD8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4AE0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, // ........ + /* 4AE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4AF0 */ 0x00, 0x09, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4AF8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4B00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4B08 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4B10 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4B18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4B20 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4B28 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4B30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4B38 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4B40 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4B48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4B50 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4B58 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4B60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4B68 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4B70 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4B78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4B80 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4B88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4B90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4B98 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4BA0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4BA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4BB0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4BB8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4BC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4BC8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4BD0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4BD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4BE0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4BE8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4BF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4BF8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4C00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4C08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4C10 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4C18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4C20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4C28 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4C30 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4C38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4C40 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4C48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4C50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4C58 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4C60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4C68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4C70 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4C78 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4C80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4C88 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4C90 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4C98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4CA0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4CA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4CB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4CB8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4CC0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, // ........ + /* 4CC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4CD0 */ 0x00, 0x0A, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4CD8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4CE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4CE8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4CF0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4CF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4D00 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4D08 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4D10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4D18 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4D20 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4D28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4D30 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4D38 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4D40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4D48 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4D50 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4D58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4D60 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4D68 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4D70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4D78 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4D80 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4D88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4D90 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4D98 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4DA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4DA8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4DB0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4DB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4DC0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4DC8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4DD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4DD8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4DE0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4DE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4DF0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4DF8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4E00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4E08 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4E10 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4E18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4E20 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4E28 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4E30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4E38 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4E40 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4E48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4E50 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4E58 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4E60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4E68 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4E70 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4E78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4E80 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4E88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4E90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4E98 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4EA0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, // ........ + /* 4EA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4EB0 */ 0x00, 0x06, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4EB8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4EC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4EC8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4ED0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4ED8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4EE0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4EE8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4EF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4EF8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4F00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4F08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4F10 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4F18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4F20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4F28 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4F30 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4F38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4F40 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4F48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4F50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4F58 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4F60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4F68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4F70 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4F78 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4F80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4F88 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4F90 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4F98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4FA0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4FA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4FB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4FB8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4FC0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4FC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4FD0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4FD8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4FE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 4FE8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 4FF0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 4FF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5000 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5008 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5018 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5020 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5030 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5038 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5048 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5050 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5060 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5068 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5078 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5080 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // ........ + /* 5088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5090 */ 0x00, 0x04, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5098 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 50A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 50A8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 50B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 50B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 50C0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 50C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 50D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 50D8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 50E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 50E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 50F0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 50F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5108 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5110 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5118 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5120 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5128 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5130 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5138 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5140 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5148 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5150 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5158 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5160 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5168 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5170 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5178 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5180 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5188 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5190 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5198 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 51A0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 51A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 51B0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 51B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 51C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 51C8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 51D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 51D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 51E0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 51E8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 51F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 51F8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5200 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5208 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5210 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5218 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5220 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5228 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5230 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5238 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5240 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5248 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5250 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5258 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5260 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, // ........ + /* 5268 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5270 */ 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5278 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5280 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5288 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5290 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5298 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 52A0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 52A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 52B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 52B8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 52C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 52C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 52D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 52D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 52E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 52E8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 52F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 52F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5300 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5308 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5310 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5318 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5320 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5328 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5330 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5338 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5340 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5348 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5350 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5358 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5360 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5368 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5370 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5378 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5380 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5388 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5390 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5398 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 53A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 53A8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 53B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 53B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 53C0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 53C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 53D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 53D8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 53E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 53E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 53F0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 53F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5400 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5408 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5410 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5418 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5420 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5428 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5430 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5438 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5440 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, // ........ + /* 5448 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5450 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5458 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5460 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5468 */ 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5470 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5478 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5480 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5488 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5490 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5498 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 54A0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 54A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 54B0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 54B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 54C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 54C8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 54D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 54D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 54E0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 54E8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 54F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 54F8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5500 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5508 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5510 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5518 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5520 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5528 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5530 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5538 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5540 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5548 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5550 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5558 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5560 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5568 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5570 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5578 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5580 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5588 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5590 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5598 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 55A0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 55A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 55B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 55B8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 55C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 55C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 55D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 55D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 55E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 55E8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 55F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 55F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5600 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5608 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5610 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5618 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5620 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, // .....".. + /* 5628 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5630 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5638 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5640 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5648 */ 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5650 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5658 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5660 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5668 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5670 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5678 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5680 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5688 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5690 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5698 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 56A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 56A8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 56B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 56B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 56C0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 56C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 56D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 56D8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 56E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 56E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 56F0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 56F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5700 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5708 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5710 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5718 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5720 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5728 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5730 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5738 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5740 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5748 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5750 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5758 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5760 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5768 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5770 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5778 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5780 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5788 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5790 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5798 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 57A0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 57A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 57B0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 57B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 57C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 57C8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 57D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 57D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 57E0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 57E8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 57F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 57F8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5800 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, // .....#.. + /* 5808 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5810 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5818 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5820 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5828 */ 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5830 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5838 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5840 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5848 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5850 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5858 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5860 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5868 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5870 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5878 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5880 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5888 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5890 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5898 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 58A0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 58A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 58B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 58B8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 58C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 58C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 58D0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 58D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 58E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 58E8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 58F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 58F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5900 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5908 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5910 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5918 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5920 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5928 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5930 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5938 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5940 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5948 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5950 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5958 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5960 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5968 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5970 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5978 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5980 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5988 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5990 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5998 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 59A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 59A8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 59B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 59B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 59C0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 59C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 59D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 59D8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 59E0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, // ........ + /* 59E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 59F0 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 59F8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5A00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5A08 */ 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5A10 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5A18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5A20 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5A28 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5A30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5A38 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5A40 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5A48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5A50 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5A58 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5A60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5A68 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5A70 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5A78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5A80 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5A88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5A90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5A98 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5AA0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5AA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5AB0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5AB8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5AC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5AC8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5AD0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5AD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5AE0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5AE8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5AF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5AF8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5B00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5B08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5B10 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5B18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5B20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5B28 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5B30 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5B38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5B40 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5B48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5B50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5B58 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5B60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5B68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5B70 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5B78 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5B80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5B88 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5B90 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5B98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5BA0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5BA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5BB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5BB8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5BC0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, // ........ + /* 5BC8 */ 0x00, 0x2F, 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, // ./shared + /* 5BD0 */ 0x2F, 0x65, 0x78, 0x70, 0x6F, 0x72, 0x74, 0x2F, // /export/ + /* 5BD8 */ 0x61, 0x70, 0x70, 0x63, 0x00, 0x07, 0x00, 0x00, // appc.... + /* 5BE0 */ 0x00, 0xAC, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5BE8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5BF0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, // ........ + /* 5BF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 5C00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5C08 */ 0x00, 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, // .STP.... + /* 5C10 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5C18 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 5C20 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 5C28 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 5C30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5C38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5C40 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x01, // ........ + /* 5C48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 5C50 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5C58 */ 0x00, 0x46, 0x48, 0x50, 0x00, 0x08, 0x00, 0x00, // .FHP.... + /* 5C60 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5C68 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 5C70 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 5C78 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 5C80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5C88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5C90 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, // ........ + /* 5C98 */ 0x00, 0x2F, 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, // ./shared + /* 5CA0 */ 0x2F, 0x74, 0x61, 0x62, 0x6C, 0x65, 0x73, 0x2F, // /tables/ + /* 5CA8 */ 0x70, 0x69, 0x64, 0x61, 0x2F, 0x70, 0x69, 0x64, // pida/pid + /* 5CB0 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, // ........ + /* 5CB8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, // ........ + /* 5CC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, // ........ + /* 5CC8 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5CD0 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 5CD8 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, // CI0.B0D4 + /* 5CE0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 5CE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5CF0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5CF8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, // ........ + /* 5D00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 5D08 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 5D10 */ 0x4C, 0x50, 0x43, 0x42, 0x2E, 0x45, 0x43, 0x5F, // LPCB.EC_ + /* 5D18 */ 0x5F, 0x2E, 0x53, 0x45, 0x4E, 0x31, 0x00, 0x04, // _.SEN1.. + /* 5D20 */ 0x00, 0x00, 0x00, 0x96, 0x0C, 0x00, 0x00, 0x00, // ........ + /* 5D28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x96, // ........ + /* 5D30 */ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5D38 */ 0x00, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0x00, // ........ + /* 5D40 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x14, // ........ + /* 5D48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5D50 */ 0x00, 0x00, 0x00, 0xC4, 0x09, 0x00, 0x00, 0x00, // ........ + /* 5D58 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, // ........ + /* 5D60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5D68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5D70 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, // ........ + /* 5D78 */ 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x01, // ........ + /* 5D80 */ 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x2F, // ......./ + /* 5D88 */ 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, 0x2F, 0x74, // shared/t + /* 5D90 */ 0x61, 0x62, 0x6C, 0x65, 0x73, 0x2F, 0x70, 0x73, // ables/ps + /* 5D98 */ 0x76, 0x74, 0x2F, 0x63, 0x71, 0x6C, 0x00, 0x07, // vt/cql.. + /* 5DA0 */ 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5DA8 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5DB0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, // ........ + /* 5DB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, // .......\ + /* 5DC0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, // _SB_.PCI + /* 5DC8 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x08, // 0.B0D4.. + /* 5DD0 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5DD8 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, // ...\_SB_ + /* 5DE0 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x4C, 0x50, // .PCI0.LP + /* 5DE8 */ 0x43, 0x42, 0x2E, 0x45, 0x43, 0x5F, 0x5F, 0x2E, // CB.EC__. + /* 5DF0 */ 0x53, 0x45, 0x4E, 0x31, 0x00, 0x04, 0x00, 0x00, // SEN1.... + /* 5DF8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5E00 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, // ........ + /* 5E08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5E10 */ 0x00, 0x5A, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, // .Z...... + /* 5E18 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, // ........ + /* 5E20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5E28 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5E30 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x38, 0x4A, 0x00, // .....8J. + /* 5E38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5E40 */ 0x00, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // .}...... + /* 5E48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, // ........ + /* 5E50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5E58 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5E60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5E68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........ + /* 5E70 */ 0x00, 0x18, 0x00, 0x00, 0x00, 0x2F, 0x73, 0x68, // ...../sh + /* 5E78 */ 0x61, 0x72, 0x65, 0x64, 0x2F, 0x74, 0x61, 0x62, // ared/tab + /* 5E80 */ 0x6C, 0x65, 0x73, 0x2F, 0x70, 0x73, 0x76, 0x74, // les/psvt + /* 5E88 */ 0x2F, 0x73, 0x74, 0x64, 0x00, 0x07, 0x00, 0x00, // /std.... + /* 5E90 */ 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, // ........ + /* 5E98 */ 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5EA0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, // ........ + /* 5EA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, // .....\_S + /* 5EB0 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, // B_.PCI0. + /* 5EB8 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x08, 0x00, 0x00, // B0D4.... + /* 5EC0 */ 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5EC8 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, // .\_SB_.P + /* 5ED0 */ 0x43, 0x49, 0x30, 0x2E, 0x4C, 0x50, 0x43, 0x42, // CI0.LPCB + /* 5ED8 */ 0x2E, 0x45, 0x43, 0x5F, 0x5F, 0x2E, 0x53, 0x45, // .EC__.SE + /* 5EE0 */ 0x4E, 0x31, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, // N1...... + /* 5EE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5EF0 */ 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5EF8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x6E, // .......n + /* 5F00 */ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5F08 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5F10 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5F18 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5F20 */ 0x00, 0x00, 0x00, 0x38, 0x4A, 0x00, 0x00, 0x00, // ...8J... + /* 5F28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7D, // .......} + /* 5F30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5F38 */ 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5F40 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, // ........ + /* 5F48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // ........ + /* 5F50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 5F58 */ 0x00, 0x00, 0x00 // ... + } + }) + Method (GDDV, 0, Serialized) + { + Return (BDV1) /* \_SB_.IETM.BDV1 */ + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-1-SaSsdt.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-1-SaSsdt.dsl new file mode 100644 index 0000000..a47a7ce --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-1-SaSsdt.dsl @@ -0,0 +1,2842 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-1-SaSsdt.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000030DA (12506) + * Revision 0x02 + * Checksum 0xA0 + * OEM ID "LENOVO" + * OEM Table ID "SaSsdt " + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "SaSsdt ", 0x00003000) +{ + External (_SB_.LID_._LID, MethodObj) // 0 Arguments + External (_SB_.PCI0, DeviceObj) + External (_SB_.PCI0.GFX0, DeviceObj) + External (_SB_.PCI0.GFX0.HDOS, MethodObj) // 0 Arguments + External (_SB_.PCI0.GFX0.HNOT, MethodObj) // 1 Arguments + External (_SB_.PCI0.LPCB.EC__.BRNS, MethodObj) // 0 Arguments + External (_SB_.PCI0.LPCB.EC__.BRTW, PkgObj) + External (BRLV, UnknownObj) + External (CPSC, UnknownObj) + External (DSEN, UnknownObj) + External (ECON, IntObj) + External (GUAM, MethodObj) // 1 Arguments + External (OSYS, IntObj) + External (PNHM, IntObj) + External (S0ID, UnknownObj) + + OperationRegion (SANV, SystemMemory, 0x5B567418, 0x01F7) + Field (SANV, AnyAcc, Lock, Preserve) + { + ASLB, 32, + IMON, 8, + IGDS, 8, + IBTT, 8, + IPAT, 8, + IPSC, 8, + IBIA, 8, + ISSC, 8, + IDMS, 8, + IF1E, 8, + HVCO, 8, + GSMI, 8, + PAVP, 8, + CADL, 8, + CSTE, 16, + NSTE, 16, + NDID, 8, + DID1, 32, + DID2, 32, + DID3, 32, + DID4, 32, + DID5, 32, + DID6, 32, + DID7, 32, + DID8, 32, + DID9, 32, + DIDA, 32, + DIDB, 32, + DIDC, 32, + DIDD, 32, + DIDE, 32, + DIDF, 32, + DIDX, 32, + NXD1, 32, + NXD2, 32, + NXD3, 32, + NXD4, 32, + NXD5, 32, + NXD6, 32, + NXD7, 32, + NXD8, 32, + NXDX, 32, + LIDS, 8, + KSV0, 32, + KSV1, 8, + BRTL, 8, + ALSE, 8, + ALAF, 8, + LLOW, 8, + LHIH, 8, + ALFP, 8, + IMTP, 8, + EDPV, 8, + SGMD, 8, + SGFL, 8, + SGGP, 8, + HRE0, 8, + HRG0, 32, + HRA0, 8, + PWE0, 8, + PWG0, 32, + PWA0, 8, + P1GP, 8, + HRE1, 8, + HRG1, 32, + HRA1, 8, + PWE1, 8, + PWG1, 32, + PWA1, 8, + P2GP, 8, + HRE2, 8, + HRG2, 32, + HRA2, 8, + PWE2, 8, + PWG2, 32, + PWA2, 8, + DLPW, 16, + DLHR, 16, + EECP, 8, + XBAS, 32, + GBAS, 16, + NVGA, 32, + NVHA, 32, + AMDA, 32, + LTRX, 8, + OBFX, 8, + LTRY, 8, + OBFY, 8, + LTRZ, 8, + OBFZ, 8, + SMSL, 16, + SNSL, 16, + P0UB, 8, + P1UB, 8, + P2UB, 8, + PCSL, 8, + PBGE, 8, + M64B, 64, + M64L, 64, + CPEX, 32, + EEC1, 8, + EEC2, 8, + SBN0, 8, + SBN1, 8, + SBN2, 8, + M32B, 32, + M32L, 32, + P0WK, 32, + P1WK, 32, + P2WK, 32, + CKM0, 32, + CKM1, 32, + CKM2, 32, + DLAO, 16, + DLAL, 16, + GSCE, 8, + Offset (0x1F4), + Offset (0x1F7) + } + + Scope (\_SB.PCI0.GFX0) + { + Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching + { + Store (And (Arg0, 0x07), DSEN) /* External reference */ + If (LEqual (And (Arg0, 0x03), Zero)) + { + If (CondRefOf (HDOS)) + { + HDOS () + } + } + } + + Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices + { + If (LNotEqual (CLID, \_SB.LID._LID ())) + { + VLOC (\_SB.LID._LID ()) + } + + If (LEqual (IMTP, One)) + { + Store (One, NDID) /* \NDID */ + } + Else + { + Store (Zero, NDID) /* \NDID */ + } + + If (LNotEqual (DIDL, Zero)) + { + Store (SDDL (DIDL), DID1) /* \DID1 */ + } + + If (LNotEqual (DDL2, Zero)) + { + Store (SDDL (DDL2), DID2) /* \DID2 */ + } + + If (LNotEqual (DDL3, Zero)) + { + Store (SDDL (DDL3), DID3) /* \DID3 */ + } + + If (LNotEqual (DDL4, Zero)) + { + Store (SDDL (DDL4), DID4) /* \DID4 */ + } + + If (LNotEqual (DDL5, Zero)) + { + Store (SDDL (DDL5), DID5) /* \DID5 */ + } + + If (LNotEqual (DDL6, Zero)) + { + Store (SDDL (DDL6), DID6) /* \DID6 */ + } + + If (LNotEqual (DDL7, Zero)) + { + Store (SDDL (DDL7), DID7) /* \DID7 */ + } + + If (LNotEqual (DDL8, Zero)) + { + Store (SDDL (DDL8), DID8) /* \DID8 */ + } + + If (LNotEqual (DDL9, Zero)) + { + Store (SDDL (DDL9), DID9) /* \DID9 */ + } + + If (LNotEqual (DD10, Zero)) + { + Store (SDDL (DD10), DIDA) /* \DIDA */ + } + + If (LNotEqual (DD11, Zero)) + { + Store (SDDL (DD11), DIDB) /* \DIDB */ + } + + If (LNotEqual (DD12, Zero)) + { + Store (SDDL (DD12), DIDC) /* \DIDC */ + } + + If (LNotEqual (DD13, Zero)) + { + Store (SDDL (DD13), DIDD) /* \DIDD */ + } + + If (LNotEqual (DD14, Zero)) + { + Store (SDDL (DD14), DIDE) /* \DIDE */ + } + + If (LNotEqual (DD15, Zero)) + { + Store (SDDL (DD15), DIDF) /* \DIDF */ + } + + If (LEqual (NDID, One)) + { + Name (TMP1, Package (0x01) + { + 0xFFFFFFFF + }) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP1, Zero)) + } + Else + { + Store (Or (0x00010000, DID1), Index (TMP1, Zero)) + } + + Return (TMP1) /* \_SB_.PCI0.GFX0._DOD.TMP1 */ + } + + If (LEqual (NDID, 0x02)) + { + Name (TMP2, Package (0x02) + { + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP2, Zero)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP2, One)) + } + Else + { + Store (Or (0x00010000, DID2), Index (TMP2, One)) + } + + Return (TMP2) /* \_SB_.PCI0.GFX0._DOD.TMP2 */ + } + + If (LEqual (NDID, 0x03)) + { + Name (TMP3, Package (0x03) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP3, Zero)) + Store (Or (0x00010000, DID2), Index (TMP3, One)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP3, 0x02)) + } + Else + { + Store (Or (0x00010000, DID3), Index (TMP3, 0x02)) + } + + Return (TMP3) /* \_SB_.PCI0.GFX0._DOD.TMP3 */ + } + + If (LEqual (NDID, 0x04)) + { + Name (TMP4, Package (0x04) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP4, Zero)) + Store (Or (0x00010000, DID2), Index (TMP4, One)) + Store (Or (0x00010000, DID3), Index (TMP4, 0x02)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP4, 0x03)) + } + Else + { + Store (Or (0x00010000, DID4), Index (TMP4, 0x03)) + } + + Return (TMP4) /* \_SB_.PCI0.GFX0._DOD.TMP4 */ + } + + If (LEqual (NDID, 0x05)) + { + Name (TMP5, Package (0x05) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP5, Zero)) + Store (Or (0x00010000, DID2), Index (TMP5, One)) + Store (Or (0x00010000, DID3), Index (TMP5, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP5, 0x03)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP5, 0x04)) + } + Else + { + Store (Or (0x00010000, DID5), Index (TMP5, 0x04)) + } + + Return (TMP5) /* \_SB_.PCI0.GFX0._DOD.TMP5 */ + } + + If (LEqual (NDID, 0x06)) + { + Name (TMP6, Package (0x06) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP6, Zero)) + Store (Or (0x00010000, DID2), Index (TMP6, One)) + Store (Or (0x00010000, DID3), Index (TMP6, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP6, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP6, 0x04)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP6, 0x05)) + } + Else + { + Store (Or (0x00010000, DID6), Index (TMP6, 0x05)) + } + + Return (TMP6) /* \_SB_.PCI0.GFX0._DOD.TMP6 */ + } + + If (LEqual (NDID, 0x07)) + { + Name (TMP7, Package (0x07) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP7, Zero)) + Store (Or (0x00010000, DID2), Index (TMP7, One)) + Store (Or (0x00010000, DID3), Index (TMP7, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP7, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP7, 0x04)) + Store (Or (0x00010000, DID6), Index (TMP7, 0x05)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP7, 0x06)) + } + Else + { + Store (Or (0x00010000, DID7), Index (TMP7, 0x06)) + } + + Return (TMP7) /* \_SB_.PCI0.GFX0._DOD.TMP7 */ + } + + If (LEqual (NDID, 0x08)) + { + Name (TMP8, Package (0x08) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP8, Zero)) + Store (Or (0x00010000, DID2), Index (TMP8, One)) + Store (Or (0x00010000, DID3), Index (TMP8, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP8, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP8, 0x04)) + Store (Or (0x00010000, DID6), Index (TMP8, 0x05)) + Store (Or (0x00010000, DID7), Index (TMP8, 0x06)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP8, 0x07)) + } + Else + { + Store (Or (0x00010000, DID8), Index (TMP8, 0x07)) + } + + Return (TMP8) /* \_SB_.PCI0.GFX0._DOD.TMP8 */ + } + + If (LEqual (NDID, 0x09)) + { + Name (TMP9, Package (0x09) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP9, Zero)) + Store (Or (0x00010000, DID2), Index (TMP9, One)) + Store (Or (0x00010000, DID3), Index (TMP9, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP9, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP9, 0x04)) + Store (Or (0x00010000, DID6), Index (TMP9, 0x05)) + Store (Or (0x00010000, DID7), Index (TMP9, 0x06)) + Store (Or (0x00010000, DID8), Index (TMP9, 0x07)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP9, 0x08)) + } + Else + { + Store (Or (0x00010000, DID9), Index (TMP9, 0x08)) + } + + Return (TMP9) /* \_SB_.PCI0.GFX0._DOD.TMP9 */ + } + + If (LEqual (NDID, 0x0A)) + { + Name (TMPA, Package (0x0A) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPA, Zero)) + Store (Or (0x00010000, DID2), Index (TMPA, One)) + Store (Or (0x00010000, DID3), Index (TMPA, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPA, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPA, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPA, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPA, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPA, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPA, 0x08)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPA, 0x09)) + } + Else + { + Store (Or (0x00010000, DIDA), Index (TMPA, 0x09)) + } + + Return (TMPA) /* \_SB_.PCI0.GFX0._DOD.TMPA */ + } + + If (LEqual (NDID, 0x0B)) + { + Name (TMPB, Package (0x0B) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPB, Zero)) + Store (Or (0x00010000, DID2), Index (TMPB, One)) + Store (Or (0x00010000, DID3), Index (TMPB, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPB, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPB, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPB, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPB, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPB, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPB, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPB, 0x09)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPB, 0x0A)) + } + Else + { + Store (Or (0x00010000, DIDB), Index (TMPB, 0x0A)) + } + + Return (TMPB) /* \_SB_.PCI0.GFX0._DOD.TMPB */ + } + + If (LEqual (NDID, 0x0C)) + { + Name (TMPC, Package (0x0C) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPC, Zero)) + Store (Or (0x00010000, DID2), Index (TMPC, One)) + Store (Or (0x00010000, DID3), Index (TMPC, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPC, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPC, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPC, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPC, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPC, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPC, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPC, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPC, 0x0A)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPC, 0x0B)) + } + Else + { + Store (Or (0x00010000, DIDC), Index (TMPC, 0x0B)) + } + + Return (TMPC) /* \_SB_.PCI0.GFX0._DOD.TMPC */ + } + + If (LEqual (NDID, 0x0D)) + { + Name (TMPD, Package (0x0D) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPD, Zero)) + Store (Or (0x00010000, DID2), Index (TMPD, One)) + Store (Or (0x00010000, DID3), Index (TMPD, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPD, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPD, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPD, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPD, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPD, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPD, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPD, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPD, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPD, 0x0B)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPD, 0x0C)) + } + Else + { + Store (Or (0x00010000, DIDD), Index (TMPD, 0x0C)) + } + + Return (TMPD) /* \_SB_.PCI0.GFX0._DOD.TMPD */ + } + + If (LEqual (NDID, 0x0E)) + { + Name (TMPE, Package (0x0E) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPE, Zero)) + Store (Or (0x00010000, DID2), Index (TMPE, One)) + Store (Or (0x00010000, DID3), Index (TMPE, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPE, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPE, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPE, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPE, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPE, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPE, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPE, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPE, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPE, 0x0B)) + Store (Or (0x00010000, DIDD), Index (TMPE, 0x0C)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPE, 0x0D)) + } + Else + { + Store (Or (0x00010000, DIDE), Index (TMPE, 0x0D)) + } + + Return (TMPE) /* \_SB_.PCI0.GFX0._DOD.TMPE */ + } + + If (LEqual (NDID, 0x0F)) + { + Name (TMPF, Package (0x0F) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPF, Zero)) + Store (Or (0x00010000, DID2), Index (TMPF, One)) + Store (Or (0x00010000, DID3), Index (TMPF, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPF, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPF, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPF, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPF, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPF, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPF, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPF, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPF, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPF, 0x0B)) + Store (Or (0x00010000, DIDD), Index (TMPF, 0x0C)) + Store (Or (0x00010000, DIDE), Index (TMPF, 0x0D)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPF, 0x0E)) + } + Else + { + Store (Or (0x00010000, DIDF), Index (TMPF, 0x0E)) + } + + Return (TMPF) /* \_SB_.PCI0.GFX0._DOD.TMPF */ + } + + If (LEqual (NDID, 0x10)) + { + Name (TMPG, Package (0x10) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPG, Zero)) + Store (Or (0x00010000, DID2), Index (TMPG, One)) + Store (Or (0x00010000, DID3), Index (TMPG, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPG, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPG, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPG, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPG, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPG, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPG, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPG, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPG, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPG, 0x0B)) + Store (Or (0x00010000, DIDD), Index (TMPG, 0x0C)) + Store (Or (0x00010000, DIDE), Index (TMPG, 0x0D)) + Store (Or (0x00010000, DIDF), Index (TMPG, 0x0E)) + Store (0x0002CA00, Index (TMPG, 0x0F)) + Return (TMPG) /* \_SB_.PCI0.GFX0._DOD.TMPG */ + } + + Return (Package (0x01) + { + 0x0400 + }) + } + + Device (DD01) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID1), 0x0400)) + { + Store (One, EDPV) /* \EDPV */ + Store (NXD1, NXDX) /* \NXDX */ + Store (DID1, DIDX) /* \DIDX */ + Return (One) + } + + If (LEqual (DID1, Zero)) + { + Return (One) + } + Else + { + Return (And (0xFFFF, DID1)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + Return (CDDS (DID1)) + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD1) /* \NXD1 */ + } + + Return (NDDS (DID1)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD02) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID2), 0x0400)) + { + Store (0x02, EDPV) /* \EDPV */ + Store (NXD2, NXDX) /* \NXDX */ + Store (DID2, DIDX) /* \DIDX */ + Return (0x02) + } + + If (LEqual (DID2, Zero)) + { + Return (0x02) + } + Else + { + Return (And (0xFFFF, DID2)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (LIDS, Zero)) + { + Return (Zero) + } + + Return (CDDS (DID2)) + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD2) /* \NXD2 */ + } + + Return (NDDS (DID2)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD03) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID3), 0x0400)) + { + Store (0x03, EDPV) /* \EDPV */ + Store (NXD3, NXDX) /* \NXDX */ + Store (DID3, DIDX) /* \DIDX */ + Return (0x03) + } + + If (LEqual (DID3, Zero)) + { + Return (0x03) + } + Else + { + Return (And (0xFFFF, DID3)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID3, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID3)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD3) /* \NXD3 */ + } + + Return (NDDS (DID3)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD04) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID4), 0x0400)) + { + Store (0x04, EDPV) /* \EDPV */ + Store (NXD4, NXDX) /* \NXDX */ + Store (DID4, DIDX) /* \DIDX */ + Return (0x04) + } + + If (LEqual (DID4, Zero)) + { + Return (0x04) + } + Else + { + Return (And (0xFFFF, DID4)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID4, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID4)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD4) /* \NXD4 */ + } + + Return (NDDS (DID4)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD05) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID5), 0x0400)) + { + Store (0x05, EDPV) /* \EDPV */ + Store (NXD5, NXDX) /* \NXDX */ + Store (DID5, DIDX) /* \DIDX */ + Return (0x05) + } + + If (LEqual (DID5, Zero)) + { + Return (0x05) + } + Else + { + Return (And (0xFFFF, DID5)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID5, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID5)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD5) /* \NXD5 */ + } + + Return (NDDS (DID5)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD06) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID6), 0x0400)) + { + Store (0x06, EDPV) /* \EDPV */ + Store (NXD6, NXDX) /* \NXDX */ + Store (DID6, DIDX) /* \DIDX */ + Return (0x06) + } + + If (LEqual (DID6, Zero)) + { + Return (0x06) + } + Else + { + Return (And (0xFFFF, DID6)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID6, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID6)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD6) /* \NXD6 */ + } + + Return (NDDS (DID6)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD07) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID7), 0x0400)) + { + Store (0x07, EDPV) /* \EDPV */ + Store (NXD7, NXDX) /* \NXDX */ + Store (DID7, DIDX) /* \DIDX */ + Return (0x07) + } + + If (LEqual (DID7, Zero)) + { + Return (0x07) + } + Else + { + Return (And (0xFFFF, DID7)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID7, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID7)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD7) /* \NXD7 */ + } + + Return (NDDS (DID7)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD08) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID8), 0x0400)) + { + Store (0x08, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DID8, DIDX) /* \DIDX */ + Return (0x08) + } + + If (LEqual (DID8, Zero)) + { + Return (0x08) + } + Else + { + Return (And (0xFFFF, DID8)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID8, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID8)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DID8)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD09) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID9), 0x0400)) + { + Store (0x09, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DID9, DIDX) /* \DIDX */ + Return (0x09) + } + + If (LEqual (DID9, Zero)) + { + Return (0x09) + } + Else + { + Return (And (0xFFFF, DID9)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID9, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID9)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DID9)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0A) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDA), 0x0400)) + { + Store (0x0A, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DIDA, DIDX) /* \DIDX */ + Return (0x0A) + } + + If (LEqual (DIDA, Zero)) + { + Return (0x0A) + } + Else + { + Return (And (0xFFFF, DIDA)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDA, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DIDA)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DIDA)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0B) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDB), 0x0400)) + { + Store (0x0B, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DIDB, DIDX) /* \DIDX */ + Return (0x0B) + } + + If (LEqual (DIDB, Zero)) + { + Return (0x0B) + } + Else + { + Return (And (0xFFFF, DIDB)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDB, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DIDB)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DIDB)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0C) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDC), 0x0400)) + { + Store (0x0C, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DIDC, DIDX) /* \DIDX */ + Return (0x0C) + } + + If (LEqual (DIDC, Zero)) + { + Return (0x0C) + } + Else + { + Return (And (0xFFFF, DIDC)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDC, Zero)) + { + Return (0x0C) + } + Else + { + Return (CDDS (DIDC)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DIDC)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0D) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDD), 0x0400)) + { + Store (0x0D, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DIDD, DIDX) /* \DIDX */ + Return (0x0D) + } + + If (LEqual (DIDD, Zero)) + { + Return (0x0D) + } + Else + { + Return (And (0xFFFF, DIDD)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDD, Zero)) + { + Return (0x0D) + } + Else + { + Return (CDDS (DIDD)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DIDD)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0E) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDE), 0x0400)) + { + Store (0x0E, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DIDE, DIDX) /* \DIDX */ + Return (0x0E) + } + + If (LEqual (DIDE, Zero)) + { + Return (0x0E) + } + Else + { + Return (And (0xFFFF, DIDE)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDE, Zero)) + { + Return (0x0E) + } + Else + { + Return (CDDS (DIDE)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DIDE)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0F) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDF), 0x0400)) + { + Store (0x0F, EDPV) /* \EDPV */ + Store (NXD8, NXDX) /* \NXDX */ + Store (DIDF, DIDX) /* \DIDX */ + Return (0x0F) + } + + If (LEqual (DIDF, Zero)) + { + Return (0x0F) + } + Else + { + Return (And (0xFFFF, DIDF)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDC, Zero)) + { + Return (0x0F) + } + Else + { + Return (CDDS (DIDF)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) /* \NXD8 */ + } + + Return (NDDS (DIDF)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD1F) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (EDPV, Zero)) + { + Return (0x1F) + } + Else + { + Return (And (0xFFFF, DIDX)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (EDPV, Zero)) + { + Return (Zero) + } + Else + { + Return (CDDS (DIDX)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXDX) /* \NXDX */ + } + + Return (NDDS (DIDX)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + + Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels + { + If (LGreaterEqual (OSYS, 0x07DC)) + { + Return (Package (0x67) + { + 0x64, + 0x64, + Zero, + One, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08, + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10, + 0x11, + 0x12, + 0x13, + 0x14, + 0x15, + 0x16, + 0x17, + 0x18, + 0x19, + 0x1A, + 0x1B, + 0x1C, + 0x1D, + 0x1E, + 0x1F, + 0x20, + 0x21, + 0x22, + 0x23, + 0x24, + 0x25, + 0x26, + 0x27, + 0x28, + 0x29, + 0x2A, + 0x2B, + 0x2C, + 0x2D, + 0x2E, + 0x2F, + 0x30, + 0x31, + 0x32, + 0x33, + 0x34, + 0x35, + 0x36, + 0x37, + 0x38, + 0x39, + 0x3A, + 0x3B, + 0x3C, + 0x3D, + 0x3E, + 0x3F, + 0x40, + 0x41, + 0x42, + 0x43, + 0x44, + 0x45, + 0x46, + 0x47, + 0x48, + 0x49, + 0x4A, + 0x4B, + 0x4C, + 0x4D, + 0x4E, + 0x4F, + 0x50, + 0x51, + 0x52, + 0x53, + 0x54, + 0x55, + 0x56, + 0x57, + 0x58, + 0x59, + 0x5A, + 0x5B, + 0x5C, + 0x5D, + 0x5E, + 0x5F, + 0x60, + 0x61, + 0x62, + 0x63, + 0x64 + }) + } + + Return (\_SB.PCI0.LPCB.EC.BRTW) /* External reference */ + } + + Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method + { + If (LGreaterEqual (OSYS, 0x07DC)) + { + If (LAnd (LGreaterEqual (Arg0, Zero), LLessEqual (Arg0, 0x64))) + { + Store (Divide (Multiply (Arg0, 0xFF), 0x64, ), Local0) + \_SB.PCI0.GFX0.AINT (One, Local0) + Store (Arg0, BRTL) /* \BRTL */ + } + } + Else + { + Store (Match (\_SB.PCI0.LPCB.EC.BRTW, MEQ, Arg0, MTR, Zero, 0x02), Local0) + If (LNotEqual (Local0, Ones)) + { + Subtract (Local0, 0x02, Local1) + Store (Local1, \BRLV) /* External reference */ + \_SB.PCI0.LPCB.EC.BRNS () + } + } + } + + Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current + { + If (LGreaterEqual (OSYS, 0x07DC)) + { + Return (BRTL) /* \BRTL */ + } + Else + { + Store (\BRLV, Local0) + Add (Local0, 0x02, Local1) + If (LLessEqual (Local1, 0x11)) + { + Return (DerefOf (Index (\_SB.PCI0.LPCB.EC.BRTW, Local1))) + } + Else + { + Return (Zero) + } + } + } + } + + Method (SDDL, 1, NotSerialized) + { + Increment (NDID) + Store (And (Arg0, 0x0F0F), Local0) + Or (0x80000000, Local0, Local1) + If (LEqual (DIDL, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL2, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL3, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL4, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL5, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL6, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL7, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL8, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL9, Local0)) + { + Return (Local1) + } + + If (LEqual (DD10, Local0)) + { + Return (Local1) + } + + If (LEqual (DD11, Local0)) + { + Return (Local1) + } + + If (LEqual (DD12, Local0)) + { + Return (Local1) + } + + If (LEqual (DD13, Local0)) + { + Return (Local1) + } + + If (LEqual (DD14, Local0)) + { + Return (Local1) + } + + If (LEqual (DD15, Local0)) + { + Return (Local1) + } + + Return (Zero) + } + + Method (CDDS, 1, NotSerialized) + { + Store (And (Arg0, 0x0F0F), Local0) + If (LEqual (Zero, Local0)) + { + Return (0x1D) + } + + If (LEqual (CADL, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL2, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL3, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL4, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL5, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL6, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL7, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL8, Local0)) + { + Return (0x1F) + } + + Return (0x1D) + } + + Method (NDDS, 1, NotSerialized) + { + Store (And (Arg0, 0x0F0F), Local0) + If (LEqual (Zero, Local0)) + { + Return (Zero) + } + + If (LEqual (NADL, Local0)) + { + Return (One) + } + + If (LEqual (NDL2, Local0)) + { + Return (One) + } + + If (LEqual (NDL3, Local0)) + { + Return (One) + } + + If (LEqual (NDL4, Local0)) + { + Return (One) + } + + If (LEqual (NDL5, Local0)) + { + Return (One) + } + + If (LEqual (NDL6, Local0)) + { + Return (One) + } + + If (LEqual (NDL7, Local0)) + { + Return (One) + } + + If (LEqual (NDL8, Local0)) + { + Return (One) + } + + Return (Zero) + } + + Method (DSST, 1, NotSerialized) + { + If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) + { + Store (NSTE, CSTE) /* \CSTE */ + } + } + + Method (VLOC, 1, NotSerialized) + { + If (LEqual (Arg0, \_SB.LID._LID ())) + { + Store (Arg0, CLID) /* \_SB_.PCI0.GFX0.CLID */ + GNOT (0x02, Zero) + } + } + + Scope (\_SB.PCI0) + { + OperationRegion (MCHP, PCI_Config, 0x40, 0xC0) + Field (MCHP, AnyAcc, NoLock, Preserve) + { + Offset (0x14), + AUDE, 8, + Offset (0x60), + TASM, 10, + Offset (0x62) + } + } + + OperationRegion (IGDP, PCI_Config, 0x40, 0xC0) + Field (IGDP, AnyAcc, NoLock, Preserve) + { + Offset (0x10), + , 1, + GIVD, 1, + , 2, + GUMA, 3, + Offset (0x12), + Offset (0x14), + , 4, + GMFN, 1, + Offset (0x18), + Offset (0xA4), + ASLE, 8, + Offset (0xA8), + GSSE, 1, + GSSB, 14, + GSES, 1, + Offset (0xB0), + , 12, + CDVL, 1, + Offset (0xB2), + Offset (0xB5), + LBPC, 8, + Offset (0xBC), + ASLS, 32 + } + + OperationRegion (IGDM, SystemMemory, ASLB, 0x2000) + Field (IGDM, AnyAcc, NoLock, Preserve) + { + SIGN, 128, + SIZE, 32, + OVER, 32, + SVER, 256, + VVER, 128, + GVER, 128, + MBOX, 32, + DMOD, 32, + PCON, 32, + DVER, 64, + Offset (0x100), + DRDY, 32, + CSTS, 32, + CEVT, 32, + Offset (0x120), + DIDL, 32, + DDL2, 32, + DDL3, 32, + DDL4, 32, + DDL5, 32, + DDL6, 32, + DDL7, 32, + DDL8, 32, + CPDL, 32, + CPL2, 32, + CPL3, 32, + CPL4, 32, + CPL5, 32, + CPL6, 32, + CPL7, 32, + CPL8, 32, + CADL, 32, + CAL2, 32, + CAL3, 32, + CAL4, 32, + CAL5, 32, + CAL6, 32, + CAL7, 32, + CAL8, 32, + NADL, 32, + NDL2, 32, + NDL3, 32, + NDL4, 32, + NDL5, 32, + NDL6, 32, + NDL7, 32, + NDL8, 32, + ASLP, 32, + TIDX, 32, + CHPD, 32, + CLID, 32, + CDCK, 32, + SXSW, 32, + EVTS, 32, + CNOT, 32, + NRDY, 32, + DDL9, 32, + DD10, 32, + DD11, 32, + DD12, 32, + DD13, 32, + DD14, 32, + DD15, 32, + CPL9, 32, + CP10, 32, + CP11, 32, + CP12, 32, + CP13, 32, + CP14, 32, + CP15, 32, + Offset (0x200), + SCIE, 1, + GEFC, 4, + GXFC, 3, + GESF, 8, + Offset (0x204), + PARM, 32, + DSLP, 32, + Offset (0x300), + ARDY, 32, + ASLC, 32, + TCHE, 32, + ALSI, 32, + BCLP, 32, + PFIT, 32, + CBLV, 32, + BCLM, 320, + CPFM, 32, + EPFM, 32, + PLUT, 592, + PFMB, 32, + CCDV, 32, + PCFT, 32, + SROT, 32, + IUER, 32, + FDSP, 64, + FDSS, 32, + STAT, 32, + Offset (0x400), + GVD1, 49152, + PHED, 32, + BDDC, 2048 + } + + Name (DBTB, Package (0x15) + { + Zero, + 0x07, + 0x38, + 0x01C0, + 0x0E00, + 0x3F, + 0x01C7, + 0x0E07, + 0x01F8, + 0x0E38, + 0x0FC0, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x7000, + 0x7007, + 0x7038, + 0x71C0, + 0x7E00 + }) + Name (CDCT, Package (0x05) + { + Package (0x02) + { + 0xE4, + 0x0140 + }, + + Package (0x02) + { + 0xDE, + 0x014D + }, + + Package (0x02) + { + 0xDE, + 0x014D + }, + + Package (0x02) + { + Zero, + Zero + }, + + Package (0x02) + { + 0xDE, + 0x014D + } + }) + Name (SUCC, One) + Name (NVLD, 0x02) + Name (CRIT, 0x04) + Name (NCRT, 0x06) + Method (GSCI, 0, Serialized) + { + Method (GBDA, 0, Serialized) + { + If (LEqual (GESF, Zero)) + { + Store (0x0659, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, One)) + { + Store (0x00300482, PARM) /* \_SB_.PCI0.GFX0.PARM */ + If (LEqual (S0ID, One)) + { + Or (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */ + } + + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x04)) + { + And (PARM, 0xEFFF0000, PARM) /* \_SB_.PCI0.GFX0.PARM */ + And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (IBTT, PARM, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x05)) + { + Store (IPSC, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (PARM, ShiftLeft (IPAT, 0x08), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Add (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (PARM, ShiftLeft (LIDS, 0x10), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Add (PARM, 0x00010000, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (PARM, ShiftLeft (IBIA, 0x14), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x07)) + { + Store (GIVD, PARM) /* \_SB_.PCI0.GFX0.PARM */ + XOr (PARM, One, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (PARM, ShiftLeft (GMFN, One), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (PARM, 0x1800, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (PARM, ShiftLeft (IDMS, 0x11), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL)), 0x15 + ), PARM, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (One, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x0A)) + { + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + If (ISSC) + { + Or (PARM, 0x03, PARM) /* \_SB_.PCI0.GFX0.PARM */ + } + + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x0B)) + { + Store (KSV0, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (KSV1, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */ + } + + Method (SBCB, 0, Serialized) + { + If (LEqual (GESF, Zero)) + { + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (0x000F87DD, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, One)) + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x03)) + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x04)) + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x05)) + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x07)) + { + If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF))) + { + If (LEqual (And (PARM, 0xFF), One)) + { + \GUAM (One) + } + + If (LEqual (And (PARM, 0xFF), Zero)) + { + \GUAM (Zero) + } + } + + If (LEqual (PARM, Zero)) + { + Store (CLID, Local0) + If (And (0x80000000, Local0)) + { + And (CLID, 0x0F, CLID) /* \_SB_.PCI0.GFX0.CLID */ + GLID (CLID) + } + } + + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x08)) + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x09)) + { + And (PARM, 0xFF, IBTT) /* \IBTT */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x0A)) + { + And (PARM, 0xFF, IPSC) /* \IPSC */ + If (And (ShiftRight (PARM, 0x08), 0xFF)) + { + And (ShiftRight (PARM, 0x08), 0xFF, IPAT) /* \IPAT */ + Decrement (IPAT) + } + + And (ShiftRight (PARM, 0x14), 0x07, IBIA) /* \IBIA */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x0B)) + { + And (ShiftRight (PARM, One), One, IF1E) /* \IF1E */ + If (And (PARM, 0x0001E000)) + { + And (ShiftRight (PARM, 0x0D), 0x0F, IDMS) /* \IDMS */ + } + Else + { + And (ShiftRight (PARM, 0x11), 0x0F, IDMS) /* \IDMS */ + } + + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x10)) + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x11)) + { + Store (ShiftLeft (LIDS, 0x08), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Add (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x12)) + { + If (And (PARM, One)) + { + If (LEqual (ShiftRight (PARM, One), One)) + { + Store (One, ISSC) /* \ISSC */ + } + Else + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */ + } + } + Else + { + Store (Zero, ISSC) /* \ISSC */ + } + + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x13)) + { + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GESF, 0x14)) + { + And (PARM, 0x0F, PAVP) /* \PAVP */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + } + + If (LEqual (GEFC, 0x04)) + { + Store (GBDA (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */ + } + + If (LEqual (GEFC, 0x06)) + { + Store (SBCB (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */ + } + + Store (Zero, GEFC) /* \_SB_.PCI0.GFX0.GEFC */ + Store (One, CPSC) /* External reference */ + Store (Zero, GSSE) /* \_SB_.PCI0.GFX0.GSSE */ + Store (Zero, SCIE) /* \_SB_.PCI0.GFX0.SCIE */ + Return (Zero) + } + + Method (PDRD, 0, NotSerialized) + { + Return (LNot (DRDY)) + } + + Method (PSTS, 0, NotSerialized) + { + If (LGreater (CSTS, 0x02)) + { + Sleep (ASLP) + } + + Return (LEqual (CSTS, 0x03)) + } + + Method (GNOT, 2, NotSerialized) + { + If (PDRD ()) + { + Return (One) + } + + Store (Arg0, CEVT) /* \_SB_.PCI0.GFX0.CEVT */ + Store (0x03, CSTS) /* \_SB_.PCI0.GFX0.CSTS */ + If (LAnd (LEqual (CHPD, Zero), LEqual (Arg1, Zero))) + { + Notify (\_SB.PCI0.GFX0, Arg1) + } + + If (CondRefOf (HNOT)) + { + HNOT (Arg0) + } + Else + { + Notify (\_SB.PCI0.GFX0, 0x80) // Status Change + } + + Return (Zero) + } + + Method (GHDS, 1, NotSerialized) + { + Store (Arg0, TIDX) /* \_SB_.PCI0.GFX0.TIDX */ + Return (GNOT (One, Zero)) + } + + Method (GLID, 1, NotSerialized) + { + If (LEqual (Arg0, One)) + { + Store (0x03, CLID) /* \_SB_.PCI0.GFX0.CLID */ + } + Else + { + Store (Arg0, CLID) /* \_SB_.PCI0.GFX0.CLID */ + } + + If (GNOT (0x02, Zero)) + { + Or (CLID, 0x80000000, CLID) /* \_SB_.PCI0.GFX0.CLID */ + Return (One) + } + + Return (Zero) + } + + Method (GDCK, 1, NotSerialized) + { + Store (Arg0, CDCK) /* \_SB_.PCI0.GFX0.CDCK */ + Return (GNOT (0x04, Zero)) + } + + Method (PARD, 0, NotSerialized) + { + If (LNot (ARDY)) + { + Sleep (ASLP) + } + + Return (LNot (ARDY)) + } + + Method (IUEH, 1, Serialized) + { + And (IUER, 0xC0, IUER) /* \_SB_.PCI0.GFX0.IUER */ + XOr (IUER, ShiftLeft (One, Arg0), IUER) /* \_SB_.PCI0.GFX0.IUER */ + If (LLessEqual (Arg0, 0x04)) + { + Return (AINT (0x05, Zero)) + } + Else + { + Return (AINT (Arg0, Zero)) + } + } + + Method (AINT, 2, NotSerialized) + { + If (LNot (And (TCHE, ShiftLeft (One, Arg0)))) + { + Return (One) + } + + If (PARD ()) + { + Return (One) + } + + If (LAnd (LGreaterEqual (Arg0, 0x05), LLessEqual (Arg0, 0x07))) + { + Store (ShiftLeft (One, Arg0), ASLC) /* \_SB_.PCI0.GFX0.ASLC */ + Store (One, ASLE) /* \_SB_.PCI0.GFX0.ASLE */ + Store (Zero, Local2) + While (LAnd (LLess (Local2, 0xFA), LNotEqual (ASLC, Zero))) + { + Sleep (0x04) + Increment (Local2) + } + + Return (Zero) + } + + If (LEqual (Arg0, 0x02)) + { + If (CPFM) + { + And (CPFM, 0x0F, Local0) + And (EPFM, 0x0F, Local1) + If (LEqual (Local0, One)) + { + If (And (Local1, 0x06)) + { + Store (0x06, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + ElseIf (And (Local1, 0x08)) + { + Store (0x08, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + Else + { + Store (One, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + } + + If (LEqual (Local0, 0x06)) + { + If (And (Local1, 0x08)) + { + Store (0x08, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + ElseIf (And (Local1, One)) + { + Store (One, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + Else + { + Store (0x06, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + } + + If (LEqual (Local0, 0x08)) + { + If (And (Local1, One)) + { + Store (One, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + ElseIf (And (Local1, 0x06)) + { + Store (0x06, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + Else + { + Store (0x08, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + } + } + Else + { + XOr (PFIT, 0x07, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + } + + Or (PFIT, 0x80000000, PFIT) /* \_SB_.PCI0.GFX0.PFIT */ + Store (0x04, ASLC) /* \_SB_.PCI0.GFX0.ASLC */ + } + ElseIf (LEqual (Arg0, One)) + { + Store (Arg1, BCLP) /* \_SB_.PCI0.GFX0.BCLP */ + Or (BCLP, 0x80000000, BCLP) /* \_SB_.PCI0.GFX0.BCLP */ + Store (0x02, ASLC) /* \_SB_.PCI0.GFX0.ASLC */ + } + ElseIf (LEqual (Arg0, Zero)) + { + Store (Arg1, ALSI) /* \_SB_.PCI0.GFX0.ALSI */ + Store (One, ASLC) /* \_SB_.PCI0.GFX0.ASLC */ + } + Else + { + Return (One) + } + + Store (One, ASLE) /* \_SB_.PCI0.GFX0.ASLE */ + Return (Zero) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("3e5b41c6-eb1d-4260-9d15-c71fbadae414"))) + { + Switch (ToInteger (Arg2)) + { + Case (Zero) + { + If (LEqual (Arg1, One)) + { + Return (0x0001E7FF) + } + } + Case (One) + { + If (LEqual (Arg1, One)) + { + If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF))) + { + If (LEqual (And (DerefOf (Index (Arg3, Zero)), 0xFF), One)) + { + \GUAM (One) + } + + Store (And (DerefOf (Index (Arg3, One)), 0xFF), Local0) + If (LEqual (Local0, Zero)) + { + \GUAM (Zero) + } + } + + If (LEqual (DerefOf (Index (Arg3, Zero)), Zero)) + { + Store (CLID, Local0) + If (And (0x80000000, Local0)) + { + And (CLID, 0x0F, CLID) /* \_SB_.PCI0.GFX0.CLID */ + GLID (CLID) + } + } + + Return (One) + } + } + Case (0x02) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x03) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x04) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x05) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x06) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x07) + { + If (LEqual (Arg1, One)) + { + And (DerefOf (Index (Arg3, Zero)), 0xFF, IBTT) /* \IBTT */ + Return (One) + } + } + Case (0x08) + { + If (LEqual (Arg1, One)) + { + And (DerefOf (Index (Arg3, Zero)), 0xFF, IPSC) /* \IPSC */ + If (And (DerefOf (Index (Arg3, One)), 0xFF)) + { + And (DerefOf (Index (Arg3, One)), 0xFF, IPAT) /* \IPAT */ + Decrement (IPAT) + } + + And (ShiftRight (DerefOf (Index (Arg3, 0x02)), 0x04), 0x07, IBIA) /* \IBIA */ + Return (One) + } + } + Case (0x09) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x0A) + { + If (LEqual (Arg1, One)) + { + Store (ShiftLeft (LIDS, 0x08), Local0) + Add (Local0, 0x0100, Local0) + Return (Local0) + } + } + Case (0x0D) + { + If (LEqual (Arg1, One)) + { + Or (ShiftLeft (DerefOf (Index (Arg3, 0x03)), 0x18), ShiftLeft (DerefOf (Index ( + Arg3, 0x02)), 0x10), Local0) + And (Local0, 0xEFFF0000, Local0) + And (Local0, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10), Local0) + Or (IBTT, Local0, Local0) + Return (Local0) + } + } + Case (0x0E) + { + If (LEqual (Arg1, One)) + { + Store (IPSC, Local0) + Or (Local0, ShiftLeft (IPAT, 0x08), Local0) + Add (Local0, 0x0100, Local0) + Or (Local0, ShiftLeft (LIDS, 0x10), Local0) + Add (Local0, 0x00010000, Local0) + Or (Local0, ShiftLeft (IBIA, 0x14), Local0) + Return (Local0) + } + } + Case (0x0F) + { + If (LEqual (Arg1, One)) + { + Store (GIVD, Local0) + XOr (Local0, One, Local0) + Or (Local0, ShiftLeft (GMFN, One), Local0) + Or (Local0, 0x1800, Local0) + Or (Local0, ShiftLeft (IDMS, 0x11), Local0) + Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL)), 0x15 + ), Local0, Local0) + Return (Local0) + } + } + Case (0x10) + { + If (LEqual (Arg1, One)) + { + Name (KSVP, Package (0x02) + { + 0x80000000, + 0x8000 + }) + Store (KSV0, Index (KSVP, Zero)) + Store (KSV1, Index (KSVP, One)) + Return (KSVP) /* \_SB_.PCI0.GFX0._DSM.KSVP */ + } + } + + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + } + + Scope (\_SB) + { + Device (SKC0) + { + Name (_HID, "INT3470") // _HID: Hardware ID + Name (_CID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _CID: Compatible ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (IMTP, 0x02)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + } + } + + Scope (\_SB.PCI0.GFX0) + { + Device (SKC0) + { + Name (_ADR, 0xCA00) // _ADR: Address + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (IMTP, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-10-Wwan.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-10-Wwan.dsl new file mode 100644 index 0000000..98af8a4 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-10-Wwan.dsl @@ -0,0 +1,117 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-10-Wwan.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000002D1 (721) + * Revision 0x02 + * Checksum 0x26 + * OEM ID "LENOVO" + * OEM Table ID "Wwan" + * OEM Revision 0x00000001 (1) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "Wwan", 0x00000001) +{ + External (_SB_.GPC0, MethodObj) // 1 Arguments + External (_SB_.PCI0.GPCB, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP03, DeviceObj) + External (_SB_.PCI0.RP03._ADR, MethodObj) // 0 Arguments + External (_SB_.PCI0.RP03.PXSX, DeviceObj) + External (_SB_.PCI0.RP03.PXSX._ADR, IntObj) + External (_SB_.SPC0, MethodObj) // 2 Arguments + External (NEXP, IntObj) + External (WDC2, IntObj) + External (WDCT, IntObj) + External (WGUR, IntObj) + External (WLCT, IntObj) + External (WMNS, IntObj) + External (WMXS, IntObj) + + Name (RSTP, Package (0x04) + { + Zero, + Zero, + Zero, + Zero + }) + Scope (\_SB.PCI0.RP03) + { + Method (M2PC, 1, Serialized) + { + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftRight (And (Arg0, 0x001F0000), One), Local0) + Add (Local0, ShiftLeft (And (Arg0, 0x07), 0x0C), Local0) + Return (Local0) + } + + Method (GMIO, 1, Serialized) + { + OperationRegion (PXCS, SystemMemory, M2PC (\_SB.PCI0.RP03._ADR ()), 0x20) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + Offset (0x18), + PBUS, 8, + SBUS, 8 + } + + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftRight (And (Arg0, 0x001F0000), One), Local0) + Add (Local0, ShiftLeft (And (Arg0, 0x07), 0x0C), Local0) + Add (Local0, ShiftLeft (SBUS, 0x14), Local0) + Return (Local0) + } + + Scope (PXSX) + { + Method (_RST, 0, Serialized) // _RST: Device Reset + { + OperationRegion (PXCS, SystemMemory, GMIO (\_SB.PCI0.RP03.PXSX._ADR), 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 16, + DVID, 16, + Offset (0x78), + DCTL, 16, + DSTS, 16, + Offset (0x80), + LCTL, 16, + LSTS, 16, + Offset (0x98), + DCT2, 16, + Offset (0x148), + Offset (0x14C), + MXSL, 16, + MNSL, 16 + } + + Store (\_SB.GPC0 (\WGUR), Local0) + And (Local0, 0xFFFFFFFFFFFFFEFF, Local0) + \_SB.SPC0 (\WGUR, Local0) + Sleep (0xC8) + Notify (\_SB.PCI0.RP03.PXSX, One) // Device Check + Or (Local0, 0x0100, Local0) + \_SB.SPC0 (\WGUR, Local0) + Sleep (0xC8) + If (LEqual (NEXP, Zero)) + { + Store (\WDCT, DCTL) /* \_SB_.PCI0.RP03.PXSX._RST.DCTL */ + Store (\WLCT, LCTL) /* \_SB_.PCI0.RP03.PXSX._RST.LCTL */ + Store (\WDC2, DCT2) /* \_SB_.PCI0.RP03.PXSX._RST.DCT2 */ + Store (\WMXS, MXSL) /* \_SB_.PCI0.RP03.PXSX._RST.MXSL */ + Store (\WMNS, MNSL) /* \_SB_.PCI0.RP03.PXSX._RST.MNSL */ + } + + Notify (\_SB.PCI0.RP03.PXSX, One) // Device Check + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-2-PerfTune.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-2-PerfTune.dsl new file mode 100644 index 0000000..8fb7865 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-2-PerfTune.dsl @@ -0,0 +1,344 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-2-PerfTune.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000005C6 (1478) + * Revision 0x02 + * Checksum 0x9F + * OEM ID "LENOVO" + * OEM Table ID "PerfTune" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "PerfTune", 0x00001000) +{ + External (_SB_.PCI0.LPCB.H_EC.CFSP, UnknownObj) + External (_SB_.PCI0.LPCB.H_EC.DIM0, UnknownObj) + External (_SB_.PCI0.LPCB.H_EC.DIM1, UnknownObj) + External (_SB_.PCI0.LPCB.H_EC.ECRD, MethodObj) // 1 Arguments + External (_TZ_.TZ01._TMP, MethodObj) // 0 Arguments + External (ADBG, MethodObj) // 1 Arguments + External (DDRF, UnknownObj) + External (ECON, IntObj) + External (TSOD, IntObj) + External (XMPB, UnknownObj) + External (XSMI, UnknownObj) + External (XTUB, UnknownObj) + External (XTUS, UnknownObj) + + Scope (\_SB) + { + Device (PTMD) + { + Name (_HID, EisaId ("INT3394") /* ACPI System Fan */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _CID: Compatible ID + Name (IVER, 0x00010000) + Name (SIZE, 0x055C) + Method (GACI, 0, NotSerialized) + { + Name (RPKG, Package (0x02){}) + Store (Zero, Index (RPKG, Zero)) + If (LNotEqual (XTUB, Zero)) + { + ADBG ("XTUB") + ADBG (XTUB) + ADBG ("XTUS") + ADBG (XTUS) + OperationRegion (XNVS, SystemMemory, XTUB, SIZE) + Field (XNVS, ByteAcc, NoLock, Preserve) + { + XBUF, 10976 + } + + Name (TEMP, Buffer (XTUS){}) + Store (XBUF, TEMP) /* \_SB_.PTMD.GACI.TEMP */ + Store (TEMP, Index (RPKG, One)) + } + Else + { + ADBG ("XTUB ZERO") + Store (Zero, Index (RPKG, One)) + } + + Return (RPKG) /* \_SB_.PTMD.GACI.RPKG */ + } + + Method (GDSV, 1, Serialized) + { + If (LEqual (Arg0, 0x05)) + { + Return (Package (0x02) + { + Zero, + Buffer (0x68) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x4C, 0x04, 0x00, 0x00, // ....L... + /* 0010 */ 0x02, 0x00, 0x00, 0x00, 0x7E, 0x04, 0x00, 0x00, // ....~... + /* 0018 */ 0x03, 0x00, 0x00, 0x00, 0xB0, 0x04, 0x00, 0x00, // ........ + /* 0020 */ 0x04, 0x00, 0x00, 0x00, 0xE2, 0x04, 0x00, 0x00, // ........ + /* 0028 */ 0x05, 0x00, 0x00, 0x00, 0x14, 0x05, 0x00, 0x00, // ........ + /* 0030 */ 0x06, 0x00, 0x00, 0x00, 0x46, 0x05, 0x00, 0x00, // ....F... + /* 0038 */ 0x07, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, // ....x... + /* 0040 */ 0x08, 0x00, 0x00, 0x00, 0xAA, 0x05, 0x00, 0x00, // ........ + /* 0048 */ 0x09, 0x00, 0x00, 0x00, 0xDC, 0x05, 0x00, 0x00, // ........ + /* 0050 */ 0x0A, 0x00, 0x00, 0x00, 0x0E, 0x06, 0x00, 0x00, // ........ + /* 0058 */ 0x0B, 0x00, 0x00, 0x00, 0x40, 0x06, 0x00, 0x00, // ....@... + /* 0060 */ 0x0C, 0x00, 0x00, 0x00, 0x72, 0x06, 0x00, 0x00 // ....r... + } + }) + } + + If (LEqual (Arg0, 0x13)) + { + ADBG ("DDR MULT") + If (LEqual (DDRF, One)) + { + ADBG ("DDR 1") + Return (Package (0x02) + { + Zero, + Buffer (0x50) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x04, 0x00, 0x00, 0x00, 0x2B, 0x04, 0x00, 0x00, // ....+... + /* 0010 */ 0x05, 0x00, 0x00, 0x00, 0x35, 0x05, 0x00, 0x00, // ....5... + /* 0018 */ 0x06, 0x00, 0x00, 0x00, 0x40, 0x06, 0x00, 0x00, // ....@... + /* 0020 */ 0x07, 0x00, 0x00, 0x00, 0x4B, 0x07, 0x00, 0x00, // ....K... + /* 0028 */ 0x08, 0x00, 0x00, 0x00, 0x55, 0x08, 0x00, 0x00, // ....U... + /* 0030 */ 0x09, 0x00, 0x00, 0x00, 0x60, 0x09, 0x00, 0x00, // ....`... + /* 0038 */ 0x0A, 0x00, 0x00, 0x00, 0x6B, 0x0A, 0x00, 0x00, // ....k... + /* 0040 */ 0x0B, 0x00, 0x00, 0x00, 0x75, 0x0B, 0x00, 0x00, // ....u... + /* 0048 */ 0x0C, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x00, 0x00 // ........ + } + }) + } + Else + { + ADBG ("DDR ELSE") + Return (Package (0x02) + { + Zero, + Buffer (0x68) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x05, 0x00, 0x00, 0x00, 0x2B, 0x04, 0x00, 0x00, // ....+... + /* 0010 */ 0x06, 0x00, 0x00, 0x00, 0xB0, 0x04, 0x00, 0x00, // ........ + /* 0018 */ 0x07, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, // ....x... + /* 0020 */ 0x08, 0x00, 0x00, 0x00, 0x40, 0x06, 0x00, 0x00, // ....@... + /* 0028 */ 0x09, 0x00, 0x00, 0x00, 0x08, 0x07, 0x00, 0x00, // ........ + /* 0030 */ 0x0A, 0x00, 0x00, 0x00, 0xD0, 0x07, 0x00, 0x00, // ........ + /* 0038 */ 0x0B, 0x00, 0x00, 0x00, 0x98, 0x08, 0x00, 0x00, // ........ + /* 0040 */ 0x0C, 0x00, 0x00, 0x00, 0x60, 0x09, 0x00, 0x00, // ....`... + /* 0048 */ 0x0D, 0x00, 0x00, 0x00, 0x28, 0x0A, 0x00, 0x00, // ....(... + /* 0050 */ 0x0E, 0x00, 0x00, 0x00, 0xF0, 0x0A, 0x00, 0x00, // ........ + /* 0058 */ 0x0F, 0x00, 0x00, 0x00, 0xB8, 0x0B, 0x00, 0x00, // ........ + /* 0060 */ 0x10, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x00, 0x00 // ........ + } + }) + } + + ADBG ("DDR EXIT") + } + + If (LEqual (Arg0, 0x0B)) + { + Return (Package (0x02) + { + Zero, + Buffer (0x60) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x05, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, // ........ + /* 0018 */ 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, // ........ + /* 0020 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, // ........ + /* 0028 */ 0x0A, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, // ........ + /* 0030 */ 0x0C, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, // ........ + /* 0038 */ 0x0E, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, // ........ + /* 0040 */ 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, // ........ + /* 0048 */ 0x12, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, // ........ + /* 0050 */ 0x14, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, // ........ + /* 0058 */ 0x18, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00 // ........ + } + }) + } + + If (LEqual (Arg0, 0x49)) + { + Return (Package (0x02) + { + Zero, + Buffer (0x18) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x85, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00 // ....d... + } + }) + } + + Return (Package (0x01) + { + One + }) + } + + Method (GXDV, 1, Serialized) + { + If (LNotEqual (XMPB, Zero)) + { + OperationRegion (XMPN, SystemMemory, XMPB, SIZE) + Field (XMPN, ByteAcc, NoLock, Preserve) + { + XMP1, 576, + XMP2, 576 + } + + If (LEqual (Arg0, One)) + { + Name (XP_1, Package (0x02){}) + Store (Zero, Index (XP_1, Zero)) + Store (XMP1, Index (XP_1, One)) + Return (XP_1) /* \_SB_.PTMD.GXDV.XP_1 */ + } + + If (LEqual (Arg0, 0x02)) + { + Name (XP_2, Package (0x02){}) + Store (Zero, Index (XP_2, Zero)) + Store (XMP2, Index (XP_2, One)) + Return (XP_2) /* \_SB_.PTMD.GXDV.XP_2 */ + } + } + + Return (Package (0x01) + { + One + }) + } + + Method (GSCV, 0, NotSerialized) + { + Return (Package (0x01) + { + 0x72 + }) + } + + Method (GSCB, 0, NotSerialized) + { + Return (XSMI) /* External reference */ + } + + Method (CDRD, 1, Serialized) + { + Return (Package (0x01) + { + One + }) + } + + Method (CDWR, 2, Serialized) + { + Return (One) + } + + Name (RPMV, Package (0x04) + { + One, + 0x07, + Zero, + Zero + }) + Name (TMP1, Package (0x0C) + { + One, + 0x02, + Zero, + Zero, + 0x05, + 0x04, + Zero, + Zero, + 0x06, + 0x05, + Zero, + Zero + }) + Name (TMP2, Package (0x08) + { + One, + 0x02, + Zero, + Zero, + 0x05, + 0x04, + Zero, + Zero + }) + Name (TMP3, Package (0x04) + { + One, + 0x02, + Zero, + Zero + }) + Method (TSDD, 0, NotSerialized) + { + If (LEqual (XTUS, Zero)) + { + Return (Zero) + } + + If (\ECON) + { + If (\TSOD) + { + Store (\_TZ.TZ01._TMP (), Index (TMP1, 0x02)) + Return (TMP1) /* \_SB_.PTMD.TMP1 */ + } + Else + { + Store (\_TZ.TZ01._TMP (), Index (TMP2, 0x02)) + Return (TMP2) /* \_SB_.PTMD.TMP2 */ + } + } + Else + { + Store (\_TZ.TZ01._TMP (), Index (TMP3, 0x02)) + Return (TMP3) /* \_SB_.PTMD.TMP3 */ + } + } + + Method (FSDD, 0, NotSerialized) + { + If (LEqual (XTUS, Zero)) + { + Return (Zero) + } + + If (\ECON) + { + Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.CFSP)), Index (RPMV, 0x02)) + } + + Return (RPMV) /* \_SB_.PTMD.RPMV */ + } + + Method (SDSP, 0, NotSerialized) + { + Return (0x0A) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-3-RVP7Rtd3.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-3-RVP7Rtd3.dsl new file mode 100644 index 0000000..113d8f2 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-3-RVP7Rtd3.dsl @@ -0,0 +1,804 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-3-RVP7Rtd3.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00001D1D (7453) + * Revision 0x02 + * Checksum 0x3D + * OEM ID "LENOVO" + * OEM Table ID "RVP7Rtd3" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "RVP7Rtd3", 0x00001000) +{ + External (_SB_.GGOV, MethodObj) // 1 Arguments + External (_SB_.GPC0, MethodObj) // 1 Arguments + External (_SB_.OSCO, UnknownObj) + External (_SB_.PCI0, DeviceObj) + External (_SB_.PCI0.GEXP, DeviceObj) + External (_SB_.PCI0.GEXP.GEPS, MethodObj) // 2 Arguments + External (_SB_.PCI0.GEXP.SGEP, MethodObj) // 3 Arguments + External (_SB_.PCI0.GLAN, DeviceObj) + External (_SB_.PCI0.I2C0, DeviceObj) + External (_SB_.PCI0.I2C0.TPD0, DeviceObj) + External (_SB_.PCI0.I2C1, DeviceObj) + External (_SB_.PCI0.I2C1.TPL1, DeviceObj) + External (_SB_.PCI0.LPCB.H_EC.ECAV, IntObj) + External (_SB_.PCI0.LPCB.H_EC.SPT2, UnknownObj) + External (_SB_.PCI0.RP01, DeviceObj) + External (_SB_.PCI0.RP01.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP01.DPGE, UnknownObj) + External (_SB_.PCI0.RP01.L23E, UnknownObj) + External (_SB_.PCI0.RP01.L23R, UnknownObj) + External (_SB_.PCI0.RP01.LASX, UnknownObj) + External (_SB_.PCI0.RP01.LDIS, UnknownObj) + External (_SB_.PCI0.RP01.LEDM, UnknownObj) + External (_SB_.PCI0.RP01.VDID, UnknownObj) + External (_SB_.PCI0.RP02, DeviceObj) + External (_SB_.PCI0.RP02.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP02.DPGE, UnknownObj) + External (_SB_.PCI0.RP02.L23E, UnknownObj) + External (_SB_.PCI0.RP02.L23R, UnknownObj) + External (_SB_.PCI0.RP02.LASX, UnknownObj) + External (_SB_.PCI0.RP02.LDIS, UnknownObj) + External (_SB_.PCI0.RP02.LEDM, UnknownObj) + External (_SB_.PCI0.RP02.VDID, UnknownObj) + External (_SB_.PCI0.RP03, DeviceObj) + External (_SB_.PCI0.RP03.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP03.DPGE, UnknownObj) + External (_SB_.PCI0.RP03.L23E, UnknownObj) + External (_SB_.PCI0.RP03.L23R, UnknownObj) + External (_SB_.PCI0.RP03.LASX, UnknownObj) + External (_SB_.PCI0.RP03.LDIS, UnknownObj) + External (_SB_.PCI0.RP03.LEDM, UnknownObj) + External (_SB_.PCI0.RP03.VDID, UnknownObj) + External (_SB_.PCI0.RP04, DeviceObj) + External (_SB_.PCI0.RP04.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP04.DPGE, UnknownObj) + External (_SB_.PCI0.RP04.L23E, UnknownObj) + External (_SB_.PCI0.RP04.L23R, UnknownObj) + External (_SB_.PCI0.RP04.LASX, UnknownObj) + External (_SB_.PCI0.RP04.LDIS, UnknownObj) + External (_SB_.PCI0.RP04.LEDM, UnknownObj) + External (_SB_.PCI0.RP04.VDID, UnknownObj) + External (_SB_.PCI0.RP05, DeviceObj) + External (_SB_.PCI0.RP05.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP05.DPGE, UnknownObj) + External (_SB_.PCI0.RP05.L23E, UnknownObj) + External (_SB_.PCI0.RP05.L23R, UnknownObj) + External (_SB_.PCI0.RP05.LASX, UnknownObj) + External (_SB_.PCI0.RP05.LDIS, UnknownObj) + External (_SB_.PCI0.RP05.LEDM, UnknownObj) + External (_SB_.PCI0.RP05.VDID, UnknownObj) + External (_SB_.PCI0.RP06, DeviceObj) + External (_SB_.PCI0.RP06.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP06.DPGE, UnknownObj) + External (_SB_.PCI0.RP06.L23E, UnknownObj) + External (_SB_.PCI0.RP06.L23R, UnknownObj) + External (_SB_.PCI0.RP06.LASX, UnknownObj) + External (_SB_.PCI0.RP06.LDIS, UnknownObj) + External (_SB_.PCI0.RP06.LEDM, UnknownObj) + External (_SB_.PCI0.RP06.VDID, UnknownObj) + External (_SB_.PCI0.RP07, DeviceObj) + External (_SB_.PCI0.RP07.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP07.DPGE, UnknownObj) + External (_SB_.PCI0.RP07.L23E, UnknownObj) + External (_SB_.PCI0.RP07.L23R, UnknownObj) + External (_SB_.PCI0.RP07.LASX, UnknownObj) + External (_SB_.PCI0.RP07.LDIS, UnknownObj) + External (_SB_.PCI0.RP07.LEDM, UnknownObj) + External (_SB_.PCI0.RP07.VDID, UnknownObj) + External (_SB_.PCI0.RP08, DeviceObj) + External (_SB_.PCI0.RP08.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP08.DPGE, UnknownObj) + External (_SB_.PCI0.RP08.L23E, UnknownObj) + External (_SB_.PCI0.RP08.L23R, UnknownObj) + External (_SB_.PCI0.RP08.LASX, UnknownObj) + External (_SB_.PCI0.RP08.LDIS, UnknownObj) + External (_SB_.PCI0.RP08.LEDM, UnknownObj) + External (_SB_.PCI0.RP08.VDID, UnknownObj) + External (_SB_.PCI0.RP09, DeviceObj) + External (_SB_.PCI0.RP09.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP09.DPGE, UnknownObj) + External (_SB_.PCI0.RP09.L23E, UnknownObj) + External (_SB_.PCI0.RP09.L23R, UnknownObj) + External (_SB_.PCI0.RP09.LASX, UnknownObj) + External (_SB_.PCI0.RP09.LDIS, UnknownObj) + External (_SB_.PCI0.RP09.LEDM, UnknownObj) + External (_SB_.PCI0.RP09.PCRA, MethodObj) // 3 Arguments + External (_SB_.PCI0.RP09.PCRO, MethodObj) // 3 Arguments + External (_SB_.PCI0.RP09.VDID, UnknownObj) + External (_SB_.PCI0.RP10, DeviceObj) + External (_SB_.PCI0.RP10.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP10.DPGE, UnknownObj) + External (_SB_.PCI0.RP10.L23E, UnknownObj) + External (_SB_.PCI0.RP10.L23R, UnknownObj) + External (_SB_.PCI0.RP10.LASX, UnknownObj) + External (_SB_.PCI0.RP10.LDIS, UnknownObj) + External (_SB_.PCI0.RP10.LEDM, UnknownObj) + External (_SB_.PCI0.RP10.VDID, UnknownObj) + External (_SB_.PCI0.RP11, DeviceObj) + External (_SB_.PCI0.RP11.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP11.DPGE, UnknownObj) + External (_SB_.PCI0.RP11.L23E, UnknownObj) + External (_SB_.PCI0.RP11.L23R, UnknownObj) + External (_SB_.PCI0.RP11.LASX, UnknownObj) + External (_SB_.PCI0.RP11.LDIS, UnknownObj) + External (_SB_.PCI0.RP11.LEDM, UnknownObj) + External (_SB_.PCI0.RP11.VDID, UnknownObj) + External (_SB_.PCI0.RP12, DeviceObj) + External (_SB_.PCI0.RP12.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP12.DPGE, UnknownObj) + External (_SB_.PCI0.RP12.L23E, UnknownObj) + External (_SB_.PCI0.RP12.L23R, UnknownObj) + External (_SB_.PCI0.RP12.LASX, UnknownObj) + External (_SB_.PCI0.RP12.LDIS, UnknownObj) + External (_SB_.PCI0.RP12.LEDM, UnknownObj) + External (_SB_.PCI0.RP12.VDID, UnknownObj) + External (_SB_.PCI0.RP13, DeviceObj) + External (_SB_.PCI0.RP13.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP13.DPGE, UnknownObj) + External (_SB_.PCI0.RP13.L23E, UnknownObj) + External (_SB_.PCI0.RP13.L23R, UnknownObj) + External (_SB_.PCI0.RP13.LASX, UnknownObj) + External (_SB_.PCI0.RP13.LDIS, UnknownObj) + External (_SB_.PCI0.RP13.LEDM, UnknownObj) + External (_SB_.PCI0.RP13.VDID, UnknownObj) + External (_SB_.PCI0.RP14, DeviceObj) + External (_SB_.PCI0.RP14.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP14.DPGE, UnknownObj) + External (_SB_.PCI0.RP14.L23E, UnknownObj) + External (_SB_.PCI0.RP14.L23R, UnknownObj) + External (_SB_.PCI0.RP14.LASX, UnknownObj) + External (_SB_.PCI0.RP14.LDIS, UnknownObj) + External (_SB_.PCI0.RP14.LEDM, UnknownObj) + External (_SB_.PCI0.RP14.VDID, UnknownObj) + External (_SB_.PCI0.RP15, DeviceObj) + External (_SB_.PCI0.RP15.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP15.DPGE, UnknownObj) + External (_SB_.PCI0.RP15.L23E, UnknownObj) + External (_SB_.PCI0.RP15.L23R, UnknownObj) + External (_SB_.PCI0.RP15.LASX, UnknownObj) + External (_SB_.PCI0.RP15.LDIS, UnknownObj) + External (_SB_.PCI0.RP15.LEDM, UnknownObj) + External (_SB_.PCI0.RP15.VDID, UnknownObj) + External (_SB_.PCI0.RP16, DeviceObj) + External (_SB_.PCI0.RP16.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP16.DPGE, UnknownObj) + External (_SB_.PCI0.RP16.L23E, UnknownObj) + External (_SB_.PCI0.RP16.L23R, UnknownObj) + External (_SB_.PCI0.RP16.LASX, UnknownObj) + External (_SB_.PCI0.RP16.LDIS, UnknownObj) + External (_SB_.PCI0.RP16.LEDM, UnknownObj) + External (_SB_.PCI0.RP16.VDID, UnknownObj) + External (_SB_.PCI0.RP17, DeviceObj) + External (_SB_.PCI0.RP17.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP17.DPGE, UnknownObj) + External (_SB_.PCI0.RP17.L23E, UnknownObj) + External (_SB_.PCI0.RP17.L23R, UnknownObj) + External (_SB_.PCI0.RP17.LASX, UnknownObj) + External (_SB_.PCI0.RP17.LDIS, UnknownObj) + External (_SB_.PCI0.RP17.LEDM, UnknownObj) + External (_SB_.PCI0.RP17.VDID, UnknownObj) + External (_SB_.PCI0.RP18, DeviceObj) + External (_SB_.PCI0.RP18.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP18.DPGE, UnknownObj) + External (_SB_.PCI0.RP18.L23E, UnknownObj) + External (_SB_.PCI0.RP18.L23R, UnknownObj) + External (_SB_.PCI0.RP18.LASX, UnknownObj) + External (_SB_.PCI0.RP18.LDIS, UnknownObj) + External (_SB_.PCI0.RP18.LEDM, UnknownObj) + External (_SB_.PCI0.RP18.VDID, UnknownObj) + External (_SB_.PCI0.RP19, DeviceObj) + External (_SB_.PCI0.RP19.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP19.DPGE, UnknownObj) + External (_SB_.PCI0.RP19.L23E, UnknownObj) + External (_SB_.PCI0.RP19.L23R, UnknownObj) + External (_SB_.PCI0.RP19.LASX, UnknownObj) + External (_SB_.PCI0.RP19.LDIS, UnknownObj) + External (_SB_.PCI0.RP19.LEDM, UnknownObj) + External (_SB_.PCI0.RP19.VDID, UnknownObj) + External (_SB_.PCI0.RP20, DeviceObj) + External (_SB_.PCI0.RP20.D3HT, FieldUnitObj) + External (_SB_.PCI0.RP20.DPGE, UnknownObj) + External (_SB_.PCI0.RP20.L23E, UnknownObj) + External (_SB_.PCI0.RP20.L23R, UnknownObj) + External (_SB_.PCI0.RP20.LASX, UnknownObj) + External (_SB_.PCI0.RP20.LDIS, UnknownObj) + External (_SB_.PCI0.RP20.LEDM, UnknownObj) + External (_SB_.PCI0.RP20.VDID, UnknownObj) + External (_SB_.PCI0.SAT0, DeviceObj) + External (_SB_.PCI0.SAT0.PRT0, DeviceObj) + External (_SB_.PCI0.SAT0.PRT1, DeviceObj) + External (_SB_.PCI0.SAT0.PRT2, DeviceObj) + External (_SB_.PCI0.SAT0.PRT3, DeviceObj) + External (_SB_.PCI0.SAT0.PRT4, DeviceObj) + External (_SB_.PCI0.SAT0.PRT5, DeviceObj) + External (_SB_.PCI0.XDCI, DeviceObj) + External (_SB_.PCI0.XDCI.D0I3, UnknownObj) + External (_SB_.PCI0.XDCI.XDCB, UnknownObj) + External (_SB_.PCI0.XHC_, DeviceObj) + External (_SB_.PCI0.XHC_.MEMB, UnknownObj) + External (_SB_.PCI0.XHC_.PMEE, UnknownObj) + External (_SB_.PCI0.XHC_.PMES, UnknownObj) + External (_SB_.PCI0.XHC_.RHUB, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS01, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS02, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS01, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS02, DeviceObj) + External (_SB_.SGOV, MethodObj) // 2 Arguments + External (_SB_.SHPO, MethodObj) // 2 Arguments + External (_SB_.SPC0, MethodObj) // 2 Arguments + External (ADBG, MethodObj) // 1 Arguments + External (AUDD, FieldUnitObj) + External (DVID, UnknownObj) + External (ECON, IntObj) + External (GBEP, UnknownObj) + External (I20D, FieldUnitObj) + External (I21D, FieldUnitObj) + External (IC0D, FieldUnitObj) + External (IC1D, FieldUnitObj) + External (IC1S, FieldUnitObj) + External (MMRP, MethodObj) // 1 Arguments + External (MMTB, MethodObj) // 1 Arguments + External (OSYS, UnknownObj) + External (PCHG, UnknownObj) + External (PCHS, UnknownObj) + External (PEP0, UnknownObj) + External (PEP3, UnknownObj) + External (PWRM, UnknownObj) + External (RCG0, IntObj) + External (RCG1, IntObj) + External (RIC0, FieldUnitObj) + External (RTBC, IntObj) + External (RTBT, IntObj) + External (RTD3, IntObj) + External (S0ID, UnknownObj) + External (SDS0, FieldUnitObj) + External (SDS1, FieldUnitObj) + External (SGMD, UnknownObj) + External (SHSB, FieldUnitObj) + External (SPST, IntObj) + External (TBCD, IntObj) + External (TBHR, IntObj) + External (TBOD, IntObj) + External (TBPE, IntObj) + External (TBRP, IntObj) + External (TBSE, IntObj) + External (TBTS, IntObj) + External (TOFF, IntObj) + External (TRD3, IntObj) + External (TRDO, IntObj) + External (UAMS, UnknownObj) + External (VRRD, FieldUnitObj) + External (VRSD, FieldUnitObj) + External (XDST, IntObj) + External (XHPR, UnknownObj) + + If (LAnd (LEqual (\RTBT, 0x01), LEqual (\TBTS, 0x01))) + { + Scope (\_SB.PCI0.RP09) + { + Name (SLOT, 0x09) + ADBG ("Rvp7Rtd3:Slot:") + ADBG (SLOT) + Name (RSTG, Package (0x04) + { + 0x01, + 0x00, + 0x02060006, + 0x01 + }) + Name (PWRG, Package (0x04) + { + 0x01, + 0x00, + 0x02060004, + 0x01 + }) + Name (WAKG, Package (0x04) + { + 0x01, + 0x00, + 0x02060007, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x01, + 0x20, + 0x00 + }) + Name (G2SD, 0x00) + Name (WKEN, 0x00) + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + OperationRegion (PLTR, SystemMemory, PWRM, 0x0800) + Field (PLTR, AnyAcc, NoLock, Preserve) + { + Offset (0x3EC), + Offset (0x3EE), + BI16, 1, + Offset (0x3EF), + BI24, 1 + } + + Store (0x01, BI16) /* \_SB_.PCI0.RP09._PS0.BI16 */ + Store (0x00, BI24) /* \_SB_.PCI0.RP09._PS0.BI24 */ + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + OperationRegion (PLTR, SystemMemory, PWRM, 0x0800) + Field (PLTR, AnyAcc, NoLock, Preserve) + { + Offset (0x3EC), + Offset (0x3EE), + BI16, 1, + Offset (0x3EF), + BI24, 1 + } + + Store (0x00, BI16) /* \_SB_.PCI0.RP09._PS3.BI16 */ + Store (0x00, BI24) /* \_SB_.PCI0.RP09._PS3.BI24 */ + } + + Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State + { + Return (0x04) + } + + Method (_DSD, 0, NotSerialized) // _DSD: Device-Specific Data + { + ADBG ("Tbt:_DSD") + Return (Package (0x02) + { + ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"), + Package (0x01) + { + Package (0x02) + { + "HotPlugSupportInD3", + 0x01 + } + } + }) + } + + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + ADBG ("Tbt:_DSW") + ADBG (Arg0) + ADBG (Arg1) + ADBG (Arg2) + If (LGreaterEqual (Arg1, 0x01)) + { + Store (0x00, WKEN) /* \_SB_.PCI0.RP09.WKEN */ + Store (0x02, TOFF) /* External reference */ + } + ElseIf (LAnd (Arg0, Arg2)) + { + Store (0x01, WKEN) /* \_SB_.PCI0.RP09.WKEN */ + Store (0x01, TOFF) /* External reference */ + } + Else + { + Store (0x00, WKEN) /* \_SB_.PCI0.RP09.WKEN */ + Store (0x00, TOFF) /* External reference */ + } + } + + PowerResource (PXP, 0x00, 0x0000) + { + ADBG ("TBT:PXP") + Method (_STA, 0, NotSerialized) // _STA: Status + { + ADBG ("PSTA") + Return (PSTA ()) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + ADBG ("S_ON") + Store (0x01, TRDO) /* External reference */ + PON () + Store (0x00, TRDO) /* External reference */ + ADBG ("E_ON") + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + ADBG ("S_OFF") + Store (0x01, TRD3) /* External reference */ + POFF () + Store (0x00, TRD3) /* External reference */ + ADBG ("E_OFF") + } + } + + Method (PSTA, 0, NotSerialized) + { + If (LNotEqual (DerefOf (Index (PWRG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x01)) + { + If (LEqual (\_SB.GGOV (DerefOf (Index (PWRG, 0x02))), DerefOf (Index (PWRG, 0x03 + )))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x02)) + { + If (LEqual (\_SB.PCI0.GEXP.GEPS (DerefOf (Index (PWRG, 0x01)), DerefOf (Index (PWRG, 0x02 + ))), DerefOf (Index (PWRG, 0x03)))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + } + + If (LNotEqual (DerefOf (Index (RSTG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x01)) + { + If (LEqual (\_SB.GGOV (DerefOf (Index (RSTG, 0x02))), DerefOf (Index (RSTG, 0x03 + )))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x02)) + { + If (LEqual (\_SB.PCI0.GEXP.GEPS (DerefOf (Index (RSTG, 0x01)), DerefOf (Index (RSTG, 0x02 + ))), DerefOf (Index (RSTG, 0x03)))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + } + + Return (0x00) + } + + Method (SXEX, 0, Serialized) + { + Store (\MMTB (TBSE), Local7) + OperationRegion (TBDI, SystemMemory, Local7, 0x0550) + Field (TBDI, DWordAcc, NoLock, Preserve) + { + DIVI, 32, + CMDR, 32, + Offset (0x548), + TB2P, 32, + P2TB, 32 + } + + Store (0x64, Local1) + Store (0x09, P2TB) /* \_SB_.PCI0.RP09.SXEX.P2TB */ + While (LGreater (Local1, 0x00)) + { + Store (Subtract (Local1, 0x01), Local1) + Store (TB2P, Local2) + If (LEqual (Local2, 0xFFFFFFFF)) + { + Return (Zero) + } + + If (And (Local2, 0x01)) + { + Break + } + + Sleep (0x05) + } + + Store (0x00, P2TB) /* \_SB_.PCI0.RP09.SXEX.P2TB */ + Store (0x01F4, Local1) + While (LGreater (Local1, 0x00)) + { + Store (Subtract (Local1, 0x01), Local1) + Store (TB2P, Local2) + If (LEqual (Local2, 0xFFFFFFFF)) + { + Return (Zero) + } + + If (LNotEqual (DIVI, 0xFFFFFFFF)) + { + Break + } + + Sleep (0x0A) + } + } + + Method (PON, 0, NotSerialized) + { + Store (\MMRP (\TBSE), Local7) + OperationRegion (L23P, SystemMemory, Local7, 0xE4) + Field (L23P, WordAcc, NoLock, Preserve) + { + Offset (0xA4), + PSD0, 2, + Offset (0xE2), + , 2, + L2TE, 1, + L2TR, 1 + } + + Store (\MMTB (\TBSE), Local6) + OperationRegion (TBDI, SystemMemory, Local6, 0x0550) + Field (TBDI, DWordAcc, NoLock, Preserve) + { + DIVI, 32, + CMDR, 32, + Offset (0xA4), + TBPS, 2, + Offset (0x548), + TB2P, 32, + P2TB, 32 + } + + If (TBPE) + { + Return (Zero) + } + + Store (0x00, TOFF) /* External reference */ + Store (0x00, G2SD) /* \_SB_.PCI0.RP09.G2SD */ + If (\RTBC) + { + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + } + + Sleep (\TBCD) + } + + If (LNotEqual (DerefOf (Index (PWRG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x01)) + { + \_SB.SGOV (DerefOf (Index (PWRG, 0x02)), DerefOf (Index (PWRG, 0x03))) + Store (0x01, TBPE) /* External reference */ + Sleep (0x0A) + } + + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (PWRG, 0x01)), DerefOf (Index (PWRG, 0x02)), DerefOf ( + Index (PWRG, 0x03))) + Store (0x01, TBPE) /* External reference */ + Sleep (0x0A) + } + } + + If (LNotEqual (DerefOf (Index (RSTG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x01)) + { + \_SB.SPC0 (DerefOf (Index (RSTG, 0x02)), Or (\_SB.GPC0 (DerefOf (Index (RSTG, 0x02 + ))), 0x0100)) + } + + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (RSTG, 0x01)), DerefOf (Index (RSTG, 0x02)), DerefOf ( + Index (RSTG, 0x03))) + } + } + + Store (0x00, DPGE) /* External reference */ + Store (0x01, L2TR) /* \_SB_.PCI0.RP09.PON_.L2TR */ + Sleep (0x10) + Store (0x00, Local0) + While (L2TR) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + Store (0x01, DPGE) /* External reference */ + Store (0x00, Local0) + While (LEqual (LASX, 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + Store (0x00, LEDM) /* External reference */ + Store (PSD0, Local1) + Store (0x00, PSD0) /* \_SB_.PCI0.RP09.PON_.PSD0 */ + Store (0x14, Local2) + While (LGreater (Local2, 0x00)) + { + Store (Subtract (Local2, 0x01), Local2) + Store (TB2P, Local3) + If (LNotEqual (Local3, 0xFFFFFFFF)) + { + Break + } + + Sleep (0x0A) + } + + If (LLessEqual (Local2, 0x00)){} + SXEX () + Store (Local1, PSD0) /* \_SB_.PCI0.RP09.PON_.PSD0 */ + } + + Method (POFF, 0, NotSerialized) + { + If (LEqual (TOFF, 0x00)) + { + Return (Zero) + } + + Store (\MMRP (\TBSE), Local7) + OperationRegion (L23P, SystemMemory, Local7, 0xE4) + Field (L23P, WordAcc, NoLock, Preserve) + { + Offset (0xA4), + PSD0, 2, + Offset (0xE2), + , 2, + L2TE, 1, + L2TR, 1 + } + + Store (\MMTB (TBSE), Local6) + OperationRegion (TBDI, SystemMemory, Local6, 0x0550) + Field (TBDI, DWordAcc, NoLock, Preserve) + { + DIVI, 32, + CMDR, 32, + Offset (0xA4), + TBPS, 2, + Offset (0x548), + TB2P, 32, + P2TB, 32 + } + + Store (PSD0, Local1) + Store (0x00, PSD0) /* \_SB_.PCI0.RP09.POFF.PSD0 */ + Store (P2TB, Local3) + If (LGreater (TOFF, 0x01)) + { + Sleep (0x0A) + Store (Local1, PSD0) /* \_SB_.PCI0.RP09.POFF.PSD0 */ + Return (Zero) + } + + Store (0x00, TOFF) /* External reference */ + Store (Local1, PSD0) /* \_SB_.PCI0.RP09.POFF.PSD0 */ + Store (0x01, L2TE) /* \_SB_.PCI0.RP09.POFF.L2TE */ + Sleep (0x10) + Store (0x00, Local0) + While (L2TE) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + Store (0x01, LEDM) /* External reference */ + If (LNotEqual (DerefOf (Index (RSTG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x01)) + { + \_SB.SPC0 (DerefOf (Index (RSTG, 0x02)), And (\_SB.GPC0 (DerefOf (Index (RSTG, 0x02 + ))), 0xFFFFFEFF, Local4)) + Sleep (0x0A) + } + + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (RSTG, 0x01)), DerefOf (Index (RSTG, 0x02)), XOr ( + DerefOf (Index (RSTG, 0x03)), 0x01)) + Sleep (0x0A) + } + } + + If (\RTBC) + { + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + } + + If (LNotEqual (DerefOf (Index (PWRG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x01)) + { + \_SB.SGOV (DerefOf (Index (PWRG, 0x02)), XOr (DerefOf (Index (PWRG, 0x03)), + 0x01)) + } + + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (PWRG, 0x01)), DerefOf (Index (PWRG, 0x02)), XOr ( + DerefOf (Index (PWRG, 0x03)), 0x01)) + } + } + + Store (0x00, TBPE) /* External reference */ + Store (0x01, LDIS) /* External reference */ + Store (0x00, LDIS) /* External reference */ + If (WKEN) + { + If (LNotEqual (DerefOf (Index (WAKG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (WAKG, 0x00)), 0x01)) + { + \_SB.SGOV (DerefOf (Index (WAKG, 0x02)), DerefOf (Index (WAKG, 0x03))) + \_SB.SHPO (DerefOf (Index (WAKG, 0x02)), 0x00) + } + + If (LEqual (DerefOf (Index (WAKG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (WAKG, 0x01)), DerefOf (Index (WAKG, 0x02)), DerefOf ( + Index (WAKG, 0x03))) + } + } + } + + Sleep (\TBOD) + } + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + PXP + }) + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + PXP + }) + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-4-ProjSsdt.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-4-ProjSsdt.dsl new file mode 100644 index 0000000..a49a883 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-4-ProjSsdt.dsl @@ -0,0 +1,1223 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-4-ProjSsdt.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000017D7 (6103) + * Revision 0x02 + * Checksum 0x27 + * OEM ID "LENOVO" + * OEM Table ID "ProjSsdt" + * OEM Revision 0x00000010 (16) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "ProjSsdt", 0x00000010) +{ + External (_SB_.PCI0.LPCB.EC__.DOCD, UnknownObj) + External (_SB_.PCI0.SAT0, DeviceObj) + External (_SB_.PCI0.SAT0.PRT0, DeviceObj) + External (_SB_.PCI0.SAT0.PRT1, DeviceObj) + External (_SB_.PCI0.SAT0.PRT2, DeviceObj) + External (_SB_.PCI0.SAT0.PRT3, DeviceObj) + External (_SB_.PCI0.SAT0.PRT4, DeviceObj) + External (_SB_.PCI0.SAT0.PRT5, DeviceObj) + External (_SB_.PCI0.XHC_, DeviceObj) + External (_SB_.PCI0.XHC_.MEMB, UnknownObj) + External (_SB_.PCI0.XHC_.RHUB, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS01, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS02, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS03, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS04, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS05, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS06, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS07, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS08, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS09, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.HS10, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS01, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS02, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS03, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS04, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS05, DeviceObj) + External (_SB_.PCI0.XHC_.RHUB.SS06, DeviceObj) + External (ADBG, MethodObj) // 1 Arguments + External (DPP0, UnknownObj) + External (DPP1, UnknownObj) + External (DPP2, UnknownObj) + External (DPP3, UnknownObj) + External (DPP4, UnknownObj) + External (DVS0, UnknownObj) + External (DVS1, UnknownObj) + External (DVS2, UnknownObj) + External (DVS3, UnknownObj) + External (TBAS, UnknownObj) + External (UPT1, IntObj) + External (UPT2, IntObj) + External (WIN8, UnknownObj) + + Scope (\) + { + Name (UPC0, Package (0x04) + { + 0xFF, + 0x00, + 0x00, + 0x00 + }) + Name (PLD0, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x59, 0x12, 0x80, 0x00, 0x03, 0x00, 0x00, 0x00 // Y....... + }) + Name (UPC1, Package (0x04) + { + 0xFF, + 0x00, + 0x00, + 0x00 + }) + Name (PLD1, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x51, 0x11, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00 // Q....... + }) + Name (UPC3, Package (0x04) + { + 0xFF, + 0x09, + 0x00, + 0x00 + }) + Name (PLD3, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x08, 0x00, 0x03, 0x00, // ........ + /* 0008 */ 0x51, 0x11, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00 // Q....... + }) + Name (UPC4, Package (0x04) + { + 0xFF, + 0x08, + 0x00, + 0x00 + }) + Name (PLD4, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x08, 0x00, 0x03, 0x00, // ........ + /* 0008 */ 0x51, 0x11, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00 // Q....... + }) + Name (PLD5, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x08, 0x00, 0x03, 0x00, // ........ + /* 0008 */ 0x51, 0x11, 0x80, 0x02, 0x03, 0x00, 0x00, 0x00 // Q....... + }) + Name (UPCI, Package (0x04) + { + 0x00, + 0xFF, + 0x00, + 0x00 + }) + Name (PLDI, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... + }) + Name (PLDC, Buffer (0x14) + { + /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x24, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // $....... + /* 0010 */ 0xDD, 0x00, 0x95, 0x00 // .... + }) + } + + Scope (\_SB.PCI0.XHC.RHUB) + { + Method (TPLD, 2, Serialized) + { + Name (PCKG, Package (0x01) + { + Buffer (0x10){} + }) + CreateField (DerefOf (Index (PCKG, 0x00)), 0x00, 0x07, REV) + Store (0x01, REV) /* \_SB_.PCI0.XHC_.RHUB.TPLD.REV_ */ + CreateField (DerefOf (Index (PCKG, 0x00)), 0x40, 0x01, VISI) + Store (Arg0, VISI) /* \_SB_.PCI0.XHC_.RHUB.TPLD.VISI */ + CreateField (DerefOf (Index (PCKG, 0x00)), 0x57, 0x08, GPOS) + Store (Arg1, GPOS) /* \_SB_.PCI0.XHC_.RHUB.TPLD.GPOS */ + CreateField (DerefOf (Index (PCKG, 0x00)), 0x4A, 0x04, SHAP) + Store (0x01, SHAP) /* \_SB_.PCI0.XHC_.RHUB.TPLD.SHAP */ + CreateField (DerefOf (Index (PCKG, 0x00)), 0x20, 0x10, WID) + Store (0x08, WID) /* \_SB_.PCI0.XHC_.RHUB.TPLD.WID_ */ + CreateField (DerefOf (Index (PCKG, 0x00)), 0x30, 0x10, HGT) + Store (0x03, HGT) /* \_SB_.PCI0.XHC_.RHUB.TPLD.HGT_ */ + Return (PCKG) /* \_SB_.PCI0.XHC_.RHUB.TPLD.PCKG */ + } + + Method (TUPC, 2, Serialized) + { + Name (PCKG, Package (0x04) + { + 0x01, + 0x00, + 0x00, + 0x00 + }) + Store (Arg0, Index (PCKG, 0x00)) + Store (Arg1, Index (PCKG, 0x01)) + Return (PCKG) /* \_SB_.PCI0.XHC_.RHUB.TUPC.PCKG */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS01) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC0, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS01._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS01._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD0, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS01._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS01._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS02) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC1, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS02._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS02._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD1, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS02._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS02._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS03) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + If (TBAS) + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC4, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS03._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS03._UPC.UPCP */ + } + Else + { + Return (TUPC (0x01, 0x0A)) + } + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + If (TBAS) + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD4, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS03._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS03._PLD.PLDP */ + } + Else + { + Return (TPLD (0x01, UPT1)) + } + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS04) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + If (TBAS) + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC4, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS04._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS04._UPC.UPCP */ + } + Else + { + Return (TUPC (0x01, 0x0A)) + } + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + If (TBAS) + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD5, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS04._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS04._PLD.PLDP */ + } + Else + { + Return (TPLD (0x01, UPT2)) + } + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS05) + { + Device (WCAM) + { + Name (_ADR, 0x05) // _ADR: Address + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS05._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS05._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS05._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS05._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS06) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS06._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS06._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS06._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS06._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS07) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS07._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS07._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS07._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS07._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS08) + { + Device (WCAM) + { + Name (_ADR, 0x08) // _ADR: Address + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS08._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS08._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS08._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS08._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS09) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS09._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS09._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS09._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS09._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS10) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS10._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS10._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS10._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS10._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS01) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC0, UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS01._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS01._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD0, PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS01._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS01._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS02) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC1, UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS02._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS02._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD1, PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS02._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS02._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS03) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS03._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS03._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS03._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS03._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS04) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS04._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS04._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS04._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS04._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS05) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS05._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS05._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS05._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS05._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS06) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS06._UPC.UPCP */ + Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SS06._UPC.UPCP */ + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS06._PLD.PLDP */ + Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SS06._PLD.PLDP */ + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS08.WCAM) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\WIN8) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Return (\UPCI) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (\PLDC) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS05.WCAM) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\WIN8) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Return (\UPCI) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (\PLDC) + } + } + + Scope (\_SB.PCI0.XHC) + { + Name (UPWR, 0x00) + Name (USPP, 0x00) + } + + Scope (\_SB.PCI0.XHC.RHUB) + { + Method (PS0X, 0, Serialized) + { + Store (0x00, \_SB.PCI0.XHC.USPP) + } + + Method (PS2X, 0, Serialized) + { + OperationRegion (XHCM, SystemMemory, And (ToInteger (MEMB), 0xFFFFFFFFFFFF0000), 0x0600) + Field (XHCM, DWordAcc, NoLock, Preserve) + { + Offset (0x02), + XHCV, 16, + Offset (0x480), + HP01, 1, + Offset (0x490), + HP02, 1, + Offset (0x530), + SP00, 1, + Offset (0x540), + SP01, 1 + } + + If (LEqual (XHCV, 0xFFFF)) + { + Return (Zero) + } + + If (LAnd (LEqual (HP01, 0x00), LEqual (SP00, 0x00))) + { + Or (\_SB.PCI0.XHC.USPP, 0x02, \_SB.PCI0.XHC.USPP) + } + + If (LAnd (LEqual (HP02, 0x00), LEqual (SP01, 0x00))) + { + Or (\_SB.PCI0.XHC.USPP, 0x04, \_SB.PCI0.XHC.USPP) + } + } + + Method (PS3X, 0, Serialized) + { + } + } + + Scope (\_SB.PCI0.SAT0) + { + Scope (PRT0) + { + Name (DIP0, 0x00) + Name (FDEV, Zero) + Name (FDRP, Zero) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 // ...... + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 // ...... + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT0: _SDD") + Store (0x00, DIP0) /* \_SB_.PCI0.SAT0.PRT0.DIP0 */ + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP0, And (M078, 0x08))) + { + Store (0x01, DIP0) /* \_SB_.PCI0.SAT0.PRT0.DIP0 */ + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT0.FDEV */ + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT0.FDRP */ + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT0: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS0, 0x01), LEqual (And (FDEV, 0x01), 0x01)), + LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) /* \_SB_.PCI0.SAT0.PRT0.HQTF */ + } + Else + { + Return (HPTF) /* \_SB_.PCI0.SAT0.PRT0.HPTF */ + } + } + ElseIf (LAnd (LAnd (LEqual (DVS0, 0x01), LEqual (And (FDEV, 0x01), + 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) /* \_SB_.PCI0.SAT0.PRT0.HETF */ + } + Else + { + Return (HDTF) /* \_SB_.PCI0.SAT0.PRT0.HDTF */ + } + } + } + + Scope (PRT1) + { + Name (DIP0, 0x00) + Name (FDEV, 0x00) + Name (FDRP, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 // ...... + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 // ...... + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT1: _SDD") + Store (0x00, DIP0) /* \_SB_.PCI0.SAT0.PRT1.DIP0 */ + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP1, And (M078, 0x08))) + { + Store (0x01, DIP0) /* \_SB_.PCI0.SAT0.PRT1.DIP0 */ + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT1.FDEV */ + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT1.FDRP */ + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT1: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS1, 0x01), LEqual (And (FDEV, 0x01), 0x01)), + LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) /* \_SB_.PCI0.SAT0.PRT1.HQTF */ + } + Else + { + Return (HPTF) /* \_SB_.PCI0.SAT0.PRT1.HPTF */ + } + } + ElseIf (LAnd (LAnd (LEqual (DVS1, 0x01), LEqual (And (FDEV, 0x01), + 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) /* \_SB_.PCI0.SAT0.PRT1.HETF */ + } + Else + { + Return (HDTF) /* \_SB_.PCI0.SAT0.PRT1.HDTF */ + } + } + } + + Scope (PRT2) + { + Name (DIP0, 0x00) + Name (FDEV, 0x00) + Name (FDRP, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 // ...... + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 // ...... + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT2: _SDD") + Store (0x00, DIP0) /* \_SB_.PCI0.SAT0.PRT2.DIP0 */ + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP2, And (M078, 0x08))) + { + Store (0x01, DIP0) /* \_SB_.PCI0.SAT0.PRT2.DIP0 */ + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT2.FDEV */ + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT2.FDRP */ + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT2: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS2, 0x01), LEqual (And (FDEV, 0x01), 0x01)), + LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) /* \_SB_.PCI0.SAT0.PRT2.HQTF */ + } + Else + { + Return (HPTF) /* \_SB_.PCI0.SAT0.PRT2.HPTF */ + } + } + ElseIf (LAnd (LAnd (LEqual (DVS2, 0x01), LEqual (And (FDEV, 0x01), + 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) /* \_SB_.PCI0.SAT0.PRT2.HETF */ + } + Else + { + Return (HDTF) /* \_SB_.PCI0.SAT0.PRT2.HDTF */ + } + } + } + + Scope (PRT3) + { + Name (DIP0, 0x00) + Name (FDEV, 0x00) + Name (FDRP, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 // ...... + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 // ...... + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT3: _SDD") + Store (0x00, DIP0) /* \_SB_.PCI0.SAT0.PRT3.DIP0 */ + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP3, And (M078, 0x08))) + { + Store (0x01, DIP0) /* \_SB_.PCI0.SAT0.PRT3.DIP0 */ + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT3.FDEV */ + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT3.FDRP */ + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT3: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS3, 0x01), LEqual (And (FDEV, 0x01), 0x01)), + LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) /* \_SB_.PCI0.SAT0.PRT3.HQTF */ + } + Else + { + Return (HPTF) /* \_SB_.PCI0.SAT0.PRT3.HPTF */ + } + } + ElseIf (LAnd (LAnd (LEqual (DVS3, 0x01), LEqual (And (FDEV, 0x01), + 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) /* \_SB_.PCI0.SAT0.PRT3.HETF */ + } + Else + { + Return (HDTF) /* \_SB_.PCI0.SAT0.PRT3.HDTF */ + } + } + } + + Scope (PRT4) + { + Name (DIP0, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 // ...... + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, // ......_. + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, // ........ + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF // .... + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 // ...... + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, // ........ + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // ..... + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT4: _SDD") + Store (0x00, DIP0) /* \_SB_.PCI0.SAT0.PRT4.DIP0 */ + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP4, And (M078, 0x08))) + { + Store (0x01, DIP0) /* \_SB_.PCI0.SAT0.PRT4.DIP0 */ + } + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT4: _GTF") + If (DIP0) + { + Return (HPTF) /* \_SB_.PCI0.SAT0.PRT4.HPTF */ + } + + Return (HDTF) /* \_SB_.PCI0.SAT0.PRT4.HDTF */ + } + } + } + + Scope (\_SB.PCI0.SAT0) + { + Scope (PRT0) + { + Name (PORT, 0x00) + Name (PBAR, 0x0118) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + } + + Scope (PRT1) + { + Name (PORT, 0x01) + Name (PBAR, 0x0198) + Name (PWRG, Package (0x04) + { + 0x02, + 0x00, + 0x00, + 0x00 + }) + } + + Scope (PRT2) + { + Name (PORT, 0x02) + Name (PBAR, 0x0218) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x01 + }) + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-5-CpuSsdt.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-5-CpuSsdt.dsl new file mode 100644 index 0000000..c3cf3b8 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-5-CpuSsdt.dsl @@ -0,0 +1,1134 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-5-CpuSsdt.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000017AE (6062) + * Revision 0x02 + * Checksum 0x56 + * OEM ID "LENOVO" + * OEM Table ID "CpuSsdt" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "CpuSsdt", 0x00003000) +{ + External (_PR_.PR00, DeviceObj) + External (_PR_.PR01, DeviceObj) + External (_PR_.PR02, DeviceObj) + External (_PR_.PR03, DeviceObj) + External (_PR_.PR04, DeviceObj) + External (_PR_.PR05, DeviceObj) + External (_PR_.PR06, DeviceObj) + External (_PR_.PR07, DeviceObj) + External (_PR_.PR08, DeviceObj) + External (_PR_.PR09, DeviceObj) + External (_PR_.PR10, DeviceObj) + External (_PR_.PR11, DeviceObj) + External (_PR_.PR12, DeviceObj) + External (_PR_.PR13, DeviceObj) + External (_PR_.PR14, DeviceObj) + External (_PR_.PR15, DeviceObj) + External (_SB_.OSCP, IntObj) + External (OSYS, UnknownObj) + + Scope (\) + { + Name (SSDT, Package (0x15) + { + "CPU0IST ", + 0x5B51B098, + 0x000005EE, + "APIST ", + 0x5B4A1018, + 0x00000D14, + "CPU0CST ", + 0x5B4A2698, + 0x000003FF, + "APCST ", + 0x5B51B718, + 0x0000030A, + "CPU0HWP ", + 0x5B51BE18, + 0x000000BA, + "APHWP ", + 0x5B4A0018, + 0x00000317, + "HWPLVT ", + 0x5B4A2018, + 0x00000628 + }) + Name (\PC00, 0x80000000) + Name (\PC01, 0x80000000) + Name (\PC02, 0x80000000) + Name (\PC03, 0x80000000) + Name (\PC04, 0x80000000) + Name (\PC05, 0x80000000) + Name (\PC06, 0x80000000) + Name (\PC07, 0x80000000) + Name (\PC08, 0x80000000) + Name (\PC09, 0x80000000) + Name (\PC10, 0x80000000) + Name (\PC11, 0x80000000) + Name (\PC12, 0x80000000) + Name (\PC13, 0x80000000) + Name (\PC14, 0x80000000) + Name (\PC15, 0x80000000) + Name (\SDTL, Zero) + } + + Scope (\_PR) + { + Name (CTPC, Zero) + OperationRegion (PNVS, SystemMemory, 0x4D121000, 0x006C) + Field (PNVS, AnyAcc, Lock, Preserve) + { + PGRV, 8, + CFGD, 32, + Offset (0x06), + ACRT, 8, + APSV, 8, + AAC0, 8, + CPID, 32, + CPPC, 8, + CLVL, 8, + CBMI, 8, + PL10, 16, + PL20, 16, + PLW0, 8, + CTC0, 8, + TAR0, 8, + PPC0, 8, + PL11, 16, + PL21, 16, + PLW1, 8, + CTC1, 8, + TAR1, 8, + PPC1, 8, + PL12, 16, + PL22, 16, + PLW2, 8, + CTC2, 8, + TAR2, 8, + PPC2, 8, + C3MW, 8, + C6MW, 8, + C7MW, 8, + CDMW, 8, + C3LT, 16, + C6LT, 16, + C7LT, 16, + CDLT, 16, + CDLV, 16, + CDPW, 16, + MPMF, 8, + DTSE, 8, + DTS1, 8, + DTS2, 8, + DTSF, 8, + PDTS, 8, + PKGA, 8, + DTS3, 8, + DTS4, 8, + BGMA, 64, + BGMS, 8, + BGIA, 16, + BGIL, 16, + DSIA, 16, + DSIL, 8, + DSAE, 8, + EPCS, 8, + EMNA, 64, + ELNG, 64, + HWPV, 8, + HWPA, 16, + HWPL, 16, + POWS, 8, + HDCE, 8, + HWPI, 8, + DTSI, 8 + } + + OperationRegion (IO_D, SystemIO, \_PR.DSIA, \_PR.DSIL) + Field (IO_D, ByteAcc, NoLock, Preserve) + { + TRPD, 8 + } + + OperationRegion (IO_P, SystemIO, \_PR.BGIA, \_PR.BGIL) + Field (IO_P, ByteAcc, NoLock, Preserve) + { + TRPF, 8 + } + } + + Scope (\_PR.PR00) + { + Name (HI0, Zero) + Name (HC0, Zero) + Name (HW0, Zero) + Name (HW2, Zero) + Method (_PDC, 1, Serialized) // _PDC: Processor Driver Capabilities + { + Store (CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Store (COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Name (STS0, Buffer (0x04) + { + 0x00, 0x00, 0x00, 0x00 // .... + }) + Method (CPDC, 1, Serialized) + { + CreateDWordField (Arg0, Zero, REVS) + CreateDWordField (Arg0, 0x04, SIZE) + Store (SizeOf (Arg0), Local0) + Store (Subtract (Local0, 0x08), Local1) + CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP) + Concatenate (STS0, TEMP, Local2) + Return (COSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)) + } + + Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953")) + OperationRegion (SMIP, SystemIO, 0xB2, One) + Field (SMIP, ByteAcc, NoLock, Preserve) + { + IOB2, 8 + } + + Method (COSC, 4, Serialized) + { + CreateDWordField (Arg3, Zero, STS0) + CreateDWordField (Arg3, 0x04, CAP0) + CreateDWordField (Arg0, Zero, IID0) + CreateDWordField (Arg0, 0x04, IID1) + CreateDWordField (Arg0, 0x08, IID2) + CreateDWordField (Arg0, 0x0C, IID3) + CreateDWordField (UID0, Zero, EID0) + CreateDWordField (UID0, 0x04, EID1) + CreateDWordField (UID0, 0x08, EID2) + CreateDWordField (UID0, 0x0C, EID3) + If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual ( + IID2, EID2), LEqual (IID3, EID3))))) + { + Store (0x06, STS0) /* \_PR_.PR00.COSC.STS0 */ + Return (Arg3) + } + + If (LNotEqual (Arg1, One)) + { + Store (0x0A, STS0) /* \_PR_.PR00.COSC.STS0 */ + Return (Arg3) + } + + If (LNot (LGreaterEqual (Arg2, 0x02))) + { + Store (0x02, STS0) /* \_PR_.PR00.COSC.STS0 */ + Return (Arg3) + } + + If (Not (And (STS0, One))) + { + If (And (CAP0, 0x2000)) + { + Store (Zero, \_PR.HDCE) + } + Else + { + Store (0x28, IOB2) /* \_PR_.PR00.IOB2 */ + } + } + + Return (Arg3) + } + + Method (GCAP, 1, Serialized) + { + CreateDWordField (Arg0, Zero, STS0) + CreateDWordField (Arg0, 0x04, CAP0) + If (LOr (LEqual (STS0, 0x06), LEqual (STS0, 0x0A))) + { + Return (Zero) + } + + If (And (STS0, One)) + { + And (CAP0, 0x0BFF, CAP0) /* \_PR_.PR00.GCAP.CAP0 */ + Return (Zero) + } + + Or (And (PC00, 0x7FFFFFFF), CAP0, PC00) /* \PC00 */ + If (And (CFGD, 0x7A)) + { + If (LAnd (LAnd (And (CFGD, 0x0200), And (PC00, 0x18)), LNot ( + And (SDTL, 0x02)))) + { + Or (SDTL, 0x02, SDTL) /* \SDTL */ + OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08))) + Load (CST0, HC0) /* \_PR_.PR00.HC0_ */ + } + } + + If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x08)))) + { + Or (SDTL, 0x08, SDTL) /* \SDTL */ + OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, One)), DerefOf (Index (SSDT, 0x02))) + Load (IST0, HI0) /* \_PR_.PR00.HI0_ */ + } + + If (LGreaterEqual (OSYS, 0x07DF)) + { + If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x40)))) + { + If (And (\_SB.OSCP, 0x40)) + { + Or (SDTL, 0x40, SDTL) /* \SDTL */ + OperationRegion (HWP0, SystemMemory, DerefOf (Index (SSDT, 0x0D)), DerefOf (Index (SSDT, 0x0E))) + Load (HWP0, HW0) /* \_PR_.PR00.HW0_ */ + If (And (CFGD, 0x00800000)) + { + OperationRegion (HWPL, SystemMemory, DerefOf (Index (SSDT, 0x13)), DerefOf (Index (SSDT, 0x14))) + Load (HWPL, HW2) /* \_PR_.PR00.HW2_ */ + } + } + + If (And (\_SB.OSCP, 0x20)) + { + If (LNot (And (\_SB.OSCP, 0x40))) + { + Store (Zero, HWPV) /* \_PR_.HWPV */ + } + } + + If (And (\_SB.OSCP, 0x40)) + { + Store (0x02, HWPV) /* \_PR_.HWPV */ + } + } + } + + If (LNot (And (PC00, 0x1000))) + { + Store (0x27, IOB2) /* \_PR_.PR00.IOB2 */ + } + + Return (Zero) + } + } + + Scope (\_PR.PR01) + { + Name (HI1, Zero) + Name (HC1, Zero) + Name (HW1, Zero) + Method (_PDC, 1, Serialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, Serialized) + { + CreateDWordField (Arg0, Zero, ST01) + CreateDWordField (Arg0, 0x04, CP01) + If (LOr (LEqual (ST01, 0x06), LEqual (ST01, 0x0A))) + { + Return (Zero) + } + + If (And (ST01, One)) + { + And (CP01, 0x0BFF, CP01) /* \_PR_.PR01.GCAP.CP01 */ + Return (Zero) + } + + Or (And (PC01, 0x7FFFFFFF), CP01, PC01) /* \PC01 */ + If (LEqual (And (PC01, 0x09), 0x09)) + { + APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + HWPT () + } + + If (And (PC01, 0x18)) + { + APCT () + } + + Store (PC01, PC00) /* \PC00 */ + Return (Zero) + } + + Method (APCT, 0, Serialized) + { + If (LAnd (And (CFGD, 0x7A), LNot (And (SDTL, 0x20)))) + { + Or (SDTL, 0x20, SDTL) /* \SDTL */ + OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B))) + Load (CST1, HC1) /* \_PR_.PR01.HC1_ */ + } + } + + Method (APPT, 0, Serialized) + { + If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x10)))) + { + Or (SDTL, 0x10, SDTL) /* \SDTL */ + OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, 0x04)), DerefOf (Index (SSDT, 0x05))) + Load (IST1, HI1) /* \_PR_.PR01.HI1_ */ + } + } + + Method (HWPT, 0, Serialized) + { + If (LGreaterEqual (OSYS, 0x07DF)) + { + If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x80)))) + { + Or (SDTL, 0x80, SDTL) /* \SDTL */ + OperationRegion (HWP1, SystemMemory, DerefOf (Index (SSDT, 0x10)), DerefOf (Index (SSDT, 0x11))) + Load (HWP1, HW1) /* \_PR_.PR01.HW1_ */ + } + } + } + } + + Scope (\_PR.PR02) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST02) + CreateDWordField (Arg0, 0x04, CP02) + If (LOr (LEqual (ST02, 0x06), LEqual (ST02, 0x0A))) + { + Return (Zero) + } + + If (And (ST02, One)) + { + And (CP02, 0x0BFF, CP02) /* \_PR_.PR02.GCAP.CP02 */ + Return (Zero) + } + + Or (And (PC02, 0x7FFFFFFF), CP02, PC02) /* \PC02 */ + If (LEqual (And (PC02, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC02, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC02, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR03) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST03) + CreateDWordField (Arg0, 0x04, CP03) + If (LOr (LEqual (ST03, 0x06), LEqual (ST03, 0x0A))) + { + Return (Zero) + } + + If (And (ST03, One)) + { + And (CP03, 0x0BFF, CP03) /* \_PR_.PR03.GCAP.CP03 */ + Return (Zero) + } + + Or (And (PC03, 0x7FFFFFFF), CP03, PC03) /* \PC03 */ + If (LEqual (And (PC03, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC03, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC03, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR04) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST04) + CreateDWordField (Arg0, 0x04, CP04) + If (LOr (LEqual (ST04, 0x06), LEqual (ST04, 0x0A))) + { + Return (Zero) + } + + If (And (ST04, One)) + { + And (CP04, 0x0BFF, CP04) /* \_PR_.PR04.GCAP.CP04 */ + Return (Zero) + } + + Or (And (PC04, 0x7FFFFFFF), CP04, PC04) /* \PC04 */ + If (LEqual (And (PC04, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC04, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC04, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR05) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST05) + CreateDWordField (Arg0, 0x04, CP05) + If (LOr (LEqual (ST05, 0x06), LEqual (ST05, 0x0A))) + { + Return (Zero) + } + + If (And (ST05, One)) + { + And (CP05, 0x0BFF, CP05) /* \_PR_.PR05.GCAP.CP05 */ + Return (Zero) + } + + Or (And (PC05, 0x7FFFFFFF), CP05, PC05) /* \PC05 */ + If (LEqual (And (PC05, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC05, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC05, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR06) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST06) + CreateDWordField (Arg0, 0x04, CP06) + If (LOr (LEqual (ST06, 0x06), LEqual (ST06, 0x0A))) + { + Return (Zero) + } + + If (And (ST06, One)) + { + And (CP06, 0x0BFF, CP06) /* \_PR_.PR06.GCAP.CP06 */ + Return (Zero) + } + + Or (And (PC06, 0x7FFFFFFF), CP06, PC06) /* \PC06 */ + If (LEqual (And (PC06, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC06, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC06, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR07) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST07) + CreateDWordField (Arg0, 0x04, CP07) + If (LOr (LEqual (ST07, 0x06), LEqual (ST07, 0x0A))) + { + Return (Zero) + } + + If (And (ST07, One)) + { + And (CP07, 0x0BFF, CP07) /* \_PR_.PR07.GCAP.CP07 */ + Return (Zero) + } + + Or (And (PC07, 0x7FFFFFFF), CP07, PC07) /* \PC07 */ + If (LEqual (And (PC07, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC07, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC07, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR08) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST08) + CreateDWordField (Arg0, 0x04, CP08) + If (LOr (LEqual (ST08, 0x06), LEqual (ST08, 0x0A))) + { + Return (Zero) + } + + If (And (ST08, One)) + { + And (CP08, 0x0BFF, CP08) /* \_PR_.PR08.GCAP.CP08 */ + Return (Zero) + } + + Or (And (PC08, 0x7FFFFFFF), CP08, PC08) /* \PC08 */ + If (LEqual (And (PC08, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC08, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC08, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR09) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST09) + CreateDWordField (Arg0, 0x04, CP09) + If (LOr (LEqual (ST09, 0x06), LEqual (ST09, 0x0A))) + { + Return (Zero) + } + + If (And (ST09, One)) + { + And (CP09, 0x0BFF, CP09) /* \_PR_.PR09.GCAP.CP09 */ + Return (Zero) + } + + Or (And (PC09, 0x7FFFFFFF), CP09, PC09) /* \PC09 */ + If (LEqual (And (PC09, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC09, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC09, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR10) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST10) + CreateDWordField (Arg0, 0x04, CP10) + If (LOr (LEqual (ST10, 0x06), LEqual (ST10, 0x0A))) + { + Return (Zero) + } + + If (And (ST10, One)) + { + And (ST10, 0x0BFF, CP10) /* \_PR_.PR10.GCAP.CP10 */ + Return (Zero) + } + + Or (And (PC10, 0x7FFFFFFF), CP10, PC10) /* \PC10 */ + If (LEqual (And (PC10, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC10, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC10, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR11) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST11) + CreateDWordField (Arg0, 0x04, CP11) + If (LOr (LEqual (ST11, 0x06), LEqual (ST11, 0x0A))) + { + Return (Zero) + } + + If (And (ST11, One)) + { + And (ST11, 0x0BFF, CP11) /* \_PR_.PR11.GCAP.CP11 */ + Return (Zero) + } + + Or (And (PC11, 0x7FFFFFFF), CP11, PC11) /* \PC11 */ + If (LEqual (And (PC11, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC11, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC11, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR12) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST12) + CreateDWordField (Arg0, 0x04, CP12) + If (LOr (LEqual (ST12, 0x06), LEqual (ST12, 0x0A))) + { + Return (Zero) + } + + If (And (ST12, One)) + { + And (ST12, 0x0BFF, CP12) /* \_PR_.PR12.GCAP.CP12 */ + Return (Zero) + } + + Or (And (PC12, 0x7FFFFFFF), CP12, PC12) /* \PC12 */ + If (LEqual (And (PC12, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC12, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC12, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR13) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST13) + CreateDWordField (Arg0, 0x04, CP13) + If (LOr (LEqual (ST13, 0x06), LEqual (ST13, 0x0A))) + { + Return (Zero) + } + + If (And (ST13, One)) + { + And (ST13, 0x0BFF, CP13) /* \_PR_.PR13.GCAP.CP13 */ + Return (Zero) + } + + Or (And (PC13, 0x7FFFFFFF), CP13, PC13) /* \PC13 */ + If (LEqual (And (PC13, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC13, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC13, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR14) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST14) + CreateDWordField (Arg0, 0x04, CP14) + If (LOr (LEqual (ST14, 0x06), LEqual (ST14, 0x0A))) + { + Return (Zero) + } + + If (And (ST14, One)) + { + And (ST14, 0x0BFF, CP14) /* \_PR_.PR14.GCAP.CP14 */ + Return (Zero) + } + + Or (And (PC14, 0x7FFFFFFF), CP14, PC14) /* \PC14 */ + If (LEqual (And (PC14, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC14, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC14, PC00) /* \PC00 */ + Return (Zero) + } + } + + Scope (\_PR.PR15) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST15) + CreateDWordField (Arg0, 0x04, CP15) + If (LOr (LEqual (ST15, 0x06), LEqual (ST15, 0x0A))) + { + Return (Zero) + } + + If (And (ST15, One)) + { + And (ST15, 0x0BFF, CP15) /* \_PR_.PR15.GCAP.CP15 */ + Return (Zero) + } + + Or (And (PC15, 0x7FFFFFFF), CP15, PC15) /* \PC15 */ + If (LEqual (And (PC15, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC15, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC15, PC00) /* \PC00 */ + Return (Zero) + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-6-CtdpB.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-6-CtdpB.dsl new file mode 100644 index 0000000..ed49201 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-6-CtdpB.dsl @@ -0,0 +1,253 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-6-CtdpB.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x0000056D (1389) + * Revision 0x02 + * Checksum 0x55 + * OEM ID "LENOVO" + * OEM Table ID "CtdpB" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "CtdpB", 0x00001000) +{ + External (_PR_.CPPC, IntObj) + External (_PR_.PR00, DeviceObj) + External (_PR_.PR00.LPSS, PkgObj) + External (_PR_.PR00.TPSS, PkgObj) + External (_PR_.PR01, DeviceObj) + External (_PR_.PR02, DeviceObj) + External (_PR_.PR03, DeviceObj) + External (_PR_.PR04, DeviceObj) + External (_PR_.PR05, DeviceObj) + External (_PR_.PR06, DeviceObj) + External (_PR_.PR07, DeviceObj) + External (_PR_.PR08, DeviceObj) + External (_PR_.PR09, DeviceObj) + External (_PR_.PR10, DeviceObj) + External (_PR_.PR11, DeviceObj) + External (_PR_.PR12, DeviceObj) + External (_PR_.PR13, DeviceObj) + External (_PR_.PR14, DeviceObj) + External (_PR_.PR15, DeviceObj) + External (_SB_.OSCP, IntObj) + External (_SB_.PCI0, DeviceObj) + External (CTPC, UnknownObj) + External (CTPR, UnknownObj) + External (FTPS, UnknownObj) + External (PNHM, FieldUnitObj) + External (PNTF, MethodObj) // 1 Arguments + External (PT0D, UnknownObj) + External (PT1D, UnknownObj) + External (PT2D, UnknownObj) + External (TCNT, FieldUnitObj) + + Scope (\_SB.PCI0) + { + OperationRegion (MBAR, SystemMemory, 0xFED15000, 0x1000) + Field (MBAR, ByteAcc, NoLock, Preserve) + { + Offset (0x930), + PTDP, 15, + Offset (0x932), + PMIN, 15, + Offset (0x934), + PMAX, 15, + Offset (0x936), + TMAX, 7, + Offset (0x938), + PWRU, 4, + Offset (0x939), + EGYU, 5, + Offset (0x93A), + TIMU, 4, + Offset (0x958), + Offset (0x95C), + LPMS, 1, + CTNL, 2, + Offset (0x9A0), + PPL1, 15, + PL1E, 1, + , 1, + PL1T, 7, + Offset (0x9A4), + PPL2, 15, + PL2E, 1, + , 1, + PL2T, 7, + Offset (0xF3C), + TARN, 8, + Offset (0xF40), + PTD1, 15, + Offset (0xF42), + TAR1, 8, + Offset (0xF44), + PMX1, 15, + Offset (0xF46), + PMN1, 15, + Offset (0xF48), + PTD2, 15, + Offset (0xF4A), + TAR2, 8, + Offset (0xF4C), + PMX2, 15, + Offset (0xF4E), + PMN2, 15, + Offset (0xF50), + CTCL, 2, + , 29, + CLCK, 1, + TAR, 8 + } + + Method (CTCU, 0, NotSerialized) + { + Store (PT2D, PPL1) /* \_SB_.PCI0.PPL1 */ + Store (One, PL1E) /* \_SB_.PCI0.PL1E */ + Store (One, \CTPC) /* External reference */ + If (LEqual (Zero, \FTPS)) + { + Store (\CTPC, \CTPR) /* External reference */ + } + ElseIf (LEqual (\CTPR, \FTPS)) + { + Store (\CTPC, \CTPR) /* External reference */ + Store (\CTPC, \FTPS) /* External reference */ + } + Else + { + Store (\CTPC, \CTPR) /* External reference */ + Store (\CTPC, \FTPS) /* External reference */ + Increment (\FTPS) + } + + \PNTF (0x80) + Subtract (TAR2, One, TAR) /* \_SB_.PCI0.TAR_ */ + Store (0x02, CTCL) /* \_SB_.PCI0.CTCL */ + } + + Method (CTCN, 0, NotSerialized) + { + If (LEqual (CTCL, One)) + { + Store (PT0D, PPL1) /* \_SB_.PCI0.PPL1 */ + Store (One, PL1E) /* \_SB_.PCI0.PL1E */ + NPPC (TARN) + Subtract (TARN, One, TAR) /* \_SB_.PCI0.TAR_ */ + Store (Zero, CTCL) /* \_SB_.PCI0.CTCL */ + } + ElseIf (LEqual (CTCL, 0x02)) + { + Store (Zero, CTCL) /* \_SB_.PCI0.CTCL */ + Subtract (TARN, One, TAR) /* \_SB_.PCI0.TAR_ */ + NPPC (TARN) + Store (PT0D, PPL1) /* \_SB_.PCI0.PPL1 */ + Store (One, PL1E) /* \_SB_.PCI0.PL1E */ + } + Else + { + Store (Zero, CTCL) /* \_SB_.PCI0.CTCL */ + Subtract (TARN, One, TAR) /* \_SB_.PCI0.TAR_ */ + NPPC (TARN) + Store (PT0D, PPL1) /* \_SB_.PCI0.PPL1 */ + Store (One, PL1E) /* \_SB_.PCI0.PL1E */ + } + } + + Method (CTCD, 0, NotSerialized) + { + Store (One, CTCL) /* \_SB_.PCI0.CTCL */ + Subtract (TAR1, One, TAR) /* \_SB_.PCI0.TAR_ */ + NPPC (TAR1) + Store (PT1D, PPL1) /* \_SB_.PCI0.PPL1 */ + Store (One, PL1E) /* \_SB_.PCI0.PL1E */ + } + + Name (TRAT, Zero) + Name (PRAT, Zero) + Name (TMPI, Zero) + Method (NPPC, 1, Serialized) + { + Store (Arg0, TRAT) /* \_SB_.PCI0.TRAT */ + If (CondRefOf (\_PR.PR00._PSS)) + { + If (And (\_SB.OSCP, 0x0400)) + { + Store (SizeOf (\_PR.PR00.TPSS), TMPI) /* \_SB_.PCI0.TMPI */ + } + Else + { + Store (SizeOf (\_PR.PR00.LPSS), TMPI) /* \_SB_.PCI0.TMPI */ + } + + While (LNotEqual (TMPI, Zero)) + { + Decrement (TMPI) + If (And (\_SB.OSCP, 0x0400)) + { + Store (DerefOf (Index (DerefOf (Index (\_PR.PR00.TPSS, TMPI)), 0x04)), PRAT) /* \_SB_.PCI0.PRAT */ + } + Else + { + Store (DerefOf (Index (DerefOf (Index (\_PR.PR00.LPSS, TMPI)), 0x04)), PRAT) /* \_SB_.PCI0.PRAT */ + } + + ShiftRight (PRAT, 0x08, PRAT) /* \_SB_.PCI0.PRAT */ + If (LGreaterEqual (PRAT, TRAT)) + { + Store (TMPI, \CTPC) /* External reference */ + If (LEqual (Zero, \FTPS)) + { + Store (\CTPC, \CTPR) /* External reference */ + } + ElseIf (LEqual (\CTPR, \FTPS)) + { + Store (\CTPC, \CTPR) /* External reference */ + Store (\CTPC, \FTPS) /* External reference */ + } + Else + { + Store (\CTPC, \CTPR) /* External reference */ + Store (\CTPC, \FTPS) /* External reference */ + Increment (\FTPS) + } + + \PNTF (0x80) + Break + } + } + } + } + + Method (CLC2, 1, Serialized) + { + And (PNHM, 0x0FFF0FF0, Local0) + Switch (ToInteger (Local0)) + { + Case (0x000306C0) + { + Return (Divide (Multiply (Arg0, 0x05), 0x04, )) + } + Case (0x00040650) + { + Return (0xC8) + } + Default + { + Return (Divide (Multiply (Arg0, 0x05), 0x04, )) + } + + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-7-UsbCTabl.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-7-UsbCTabl.dsl new file mode 100644 index 0000000..dcda66a --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-7-UsbCTabl.dsl @@ -0,0 +1,280 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-7-UsbCTabl.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000006BF (1727) + * Revision 0x02 + * Checksum 0xBC + * OEM ID "LENOVO" + * OEM Table ID "UsbCTabl" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "UsbCTabl", 0x00001000) +{ + External (_SB_.PCI0.LPCB.EC__.HKEY.MHPF, MethodObj) // 1 Arguments + External (_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD, MethodObj) // 2 Arguments + External (_SB_.PCI0.XHC_.RHUB, DeviceObj) + External (ADBG, MethodObj) // 1 Arguments + External (OSYS, UnknownObj) + External (TBTS, UnknownObj) + External (UBCB, UnknownObj) + External (USTC, UnknownObj) + External (UTCM, UnknownObj) + External (XDCE, UnknownObj) + + Scope (\_SB) + { + Device (UBTC) + { + Name (_HID, EisaId ("USBC000")) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0CA0")) // _CID: Compatible ID + Name (_UID, Zero) // _UID: Unique ID + Name (_DDN, "USB Type C") // _DDN: DOS Device Name + Name (_ADR, Zero) // _ADR: Address + Name (CRS, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y48) + }) + Device (CR01) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USTC, One)) + { + Return (\_SB.PCI0.RP09.PXSX.TBDU.XHC.RHUB.TPLD (One, One)) + } + } + } + + Device (CR02) + { + Name (_ADR, One) // _ADR: Address + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USTC, One)) + { + Return (\_SB.PCI0.RP09.PXSX.TBDU.XHC.RHUB.TPLD (One, 0x02)) + } + } + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + CreateDWordField (CRS, \_SB.UBTC._Y48._BAS, CBAS) // _BAS: Base Address + Store (UBCB, CBAS) /* \_SB_.UBTC._CRS.CBAS */ + Return (CRS) /* \_SB_.UBTC.CRS_ */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LAnd (LGreaterEqual (OSYS, 0x07DF), LEqual (TBTS, One))) + { + If (LEqual (USTC, One)) + { + Return (0x0F) + } + } + + Return (Zero) + } + + OperationRegion (USBC, SystemMemory, UBCB, 0x38) + Field (USBC, ByteAcc, Lock, Preserve) + { + VER1, 8, + VER2, 8, + RSV1, 8, + RSV2, 8, + CCI0, 8, + CCI1, 8, + CCI2, 8, + CCI3, 8, + CTL0, 8, + CTL1, 8, + CTL2, 8, + CTL3, 8, + CTL4, 8, + CTL5, 8, + CTL6, 8, + CTL7, 8, + MGI0, 8, + MGI1, 8, + MGI2, 8, + MGI3, 8, + MGI4, 8, + MGI5, 8, + MGI6, 8, + MGI7, 8, + MGI8, 8, + MGI9, 8, + MGIA, 8, + MGIB, 8, + MGIC, 8, + MGID, 8, + MGIE, 8, + MGIF, 8, + MGO0, 8, + MGO1, 8, + MGO2, 8, + MGO3, 8, + MGO4, 8, + MGO5, 8, + MGO6, 8, + MGO7, 8, + MGO8, 8, + MGO9, 8, + MGOA, 8, + MGOB, 8, + MGOC, 8, + MGOD, 8, + MGOE, 8, + MGOF, 8 + } + + Mutex (UBSY, 0x00) + Method (ECWR, 0, Serialized) + { + ADBG ("ECWR") + Acquire (UBSY, 0xFFFF) + Store (Buffer (0x25){}, Local0) + Store (0x0A, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x06, Index (Local0, 0x03)) + Store (MGO0, Index (Local0, 0x04)) + Store (MGO1, Index (Local0, 0x05)) + Store (MGO2, Index (Local0, 0x06)) + Store (MGO3, Index (Local0, 0x07)) + Store (MGO4, Index (Local0, 0x08)) + Store (MGO5, Index (Local0, 0x09)) + Store (MGO6, Index (Local0, 0x0A)) + Store (MGO7, Index (Local0, 0x0B)) + Store (MGO8, Index (Local0, 0x0C)) + Store (MGO9, Index (Local0, 0x0D)) + Store (MGOA, Index (Local0, 0x0E)) + Store (MGOB, Index (Local0, 0x0F)) + Store (MGOC, Index (Local0, 0x10)) + Store (MGOD, Index (Local0, 0x11)) + Store (MGOE, Index (Local0, 0x12)) + Store (MGOF, Index (Local0, 0x13)) + Store (0x10, Index (Local0, 0x24)) + \_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0) + Store (0x0A, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x04, Index (Local0, 0x03)) + Store (CTL0, Index (Local0, 0x04)) + Store (CTL1, Index (Local0, 0x05)) + Store (CTL2, Index (Local0, 0x06)) + Store (CTL3, Index (Local0, 0x07)) + Store (CTL4, Index (Local0, 0x08)) + Store (CTL5, Index (Local0, 0x09)) + Store (CTL6, Index (Local0, 0x0A)) + Store (CTL7, Index (Local0, 0x0B)) + Store (0x08, Index (Local0, 0x24)) + \_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0) + Release (UBSY) + } + + Method (ECRD, 0, Serialized) + { + ADBG ("ECRD") + Acquire (UBSY, 0xFFFF) + Store (Buffer (0x25){}, Local0) + Store (0x0B, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x05, Index (Local0, 0x03)) + Store (0x10, Index (Local0, 0x24)) + Store (\_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0), Local1) + Store (DerefOf (Index (Local1, 0x04)), MGI0) /* \_SB_.UBTC.MGI0 */ + Store (DerefOf (Index (Local1, 0x05)), MGI1) /* \_SB_.UBTC.MGI1 */ + Store (DerefOf (Index (Local1, 0x06)), MGI2) /* \_SB_.UBTC.MGI2 */ + Store (DerefOf (Index (Local1, 0x07)), MGI3) /* \_SB_.UBTC.MGI3 */ + Store (DerefOf (Index (Local1, 0x08)), MGI4) /* \_SB_.UBTC.MGI4 */ + Store (DerefOf (Index (Local1, 0x09)), MGI5) /* \_SB_.UBTC.MGI5 */ + Store (DerefOf (Index (Local1, 0x0A)), MGI6) /* \_SB_.UBTC.MGI6 */ + Store (DerefOf (Index (Local1, 0x0B)), MGI7) /* \_SB_.UBTC.MGI7 */ + Store (DerefOf (Index (Local1, 0x0C)), MGI8) /* \_SB_.UBTC.MGI8 */ + Store (DerefOf (Index (Local1, 0x0D)), MGI9) /* \_SB_.UBTC.MGI9 */ + Store (DerefOf (Index (Local1, 0x0E)), MGIA) /* \_SB_.UBTC.MGIA */ + Store (DerefOf (Index (Local1, 0x0F)), MGIB) /* \_SB_.UBTC.MGIB */ + Store (DerefOf (Index (Local1, 0x10)), MGIC) /* \_SB_.UBTC.MGIC */ + Store (DerefOf (Index (Local1, 0x11)), MGID) /* \_SB_.UBTC.MGID */ + Store (DerefOf (Index (Local1, 0x12)), MGIE) /* \_SB_.UBTC.MGIE */ + Store (DerefOf (Index (Local1, 0x13)), MGIF) /* \_SB_.UBTC.MGIF */ + Store (0x0B, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x03, Index (Local0, 0x03)) + Store (0x04, Index (Local0, 0x24)) + Store (\_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0), Local1) + Store (DerefOf (Index (Local1, 0x04)), CCI0) /* \_SB_.UBTC.CCI0 */ + Store (DerefOf (Index (Local1, 0x05)), CCI1) /* \_SB_.UBTC.CCI1 */ + Store (DerefOf (Index (Local1, 0x06)), CCI2) /* \_SB_.UBTC.CCI2 */ + Store (DerefOf (Index (Local1, 0x07)), CCI3) /* \_SB_.UBTC.CCI3 */ + Release (UBSY) + } + + Method (NTFY, 0, Serialized) + { + ADBG ("NTFY_EC") + ECRD () + Sleep (One) + Notify (\_SB.UBTC, 0x80) // Status Change + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("6f8398c2-7ca4-11e4-ad36-631042b5008f"))) + { + ADBG (Concatenate ("S_UCSI=", ToHexString (Arg2))) + Switch (ToInteger (Arg2)) + { + Case (Zero) + { + Return (Buffer (One) + { + 0x0F // . + }) + } + Case (One) + { + ECWR () + } + Case (0x02) + { + ECRD () + } + Case (0x03) + { + Return (XDCE) /* External reference */ + } + + } + + ADBG ("E_UCSI") + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-8-HdaDsp.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-8-HdaDsp.dsl new file mode 100644 index 0000000..089ed42 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-8-HdaDsp.dsl @@ -0,0 +1,95 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-8-HdaDsp.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000001D8 (472) + * Revision 0x02 + * Checksum 0xFF + * OEM ID "LENOVO" + * OEM Table ID "HdaDsp" + * OEM Revision 0x00000000 (0) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "HdaDsp", 0x00000000) +{ + External (_SB_.PCI0.HDAS, DeviceObj) + External (ADBG, MethodObj) // 1 Arguments + External (ADPM, IntObj) + External (AG1H, IntObj) + External (AG1L, IntObj) + External (AG2H, IntObj) + External (AG2L, IntObj) + External (AG3H, IntObj) + External (AG3L, IntObj) + + Scope (\_SB.PCI0.HDAS) + { + Method (PPMS, 1, Serialized) + { + If (LEqual (Arg0, ToUUID ("7111001f-d35f-44d9-81d2-7ac685bed3d7"))) + { + Store (And (ADPM, 0x2000), Local0) + ADBG ("RkSA:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ToUUID ("7c708106-3aff-40fe-88be-8c999b3f7445"))) + { + Store (And (ADPM, 0x04), Local0) + ADBG ("iSSP:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ToUUID ("ec774fa9-28d3-424a-90e4-69f984f1eeb7"))) + { + Store (And (ADPM, 0x0100), Local0) + ADBG ("WoV:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ToUUID ("849f0d73-1678-4d57-8c78-61c548253993"))) + { + Store (And (ADPM, 0x08), Local0) + ADBG ("Dolby:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ACCG (AG1L, AG1H))) + { + Return (And (ADPM, 0x20000000)) + } + + If (LEqual (Arg0, ACCG (AG2L, AG2H))) + { + Return (And (ADPM, 0x40000000)) + } + + If (LEqual (Arg0, ACCG (AG3L, AG3H))) + { + Return (And (ADPM, 0x80000000)) + } + + Return (Zero) + } + + Method (ACCG, 2, NotSerialized) + { + Name (GBUF, Buffer (0x10){}) + Concatenate (Arg0, Arg1, GBUF) /* \_SB_.PCI0.HDAS.ACCG.GBUF */ + Return (GBUF) /* \_SB_.PCI0.HDAS.ACCG.GBUF */ + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-9-TbtTypeC.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-9-TbtTypeC.dsl new file mode 100644 index 0000000..a4cd619 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-9-TbtTypeC.dsl @@ -0,0 +1,391 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-9-TbtTypeC.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000590 (1424) + * Revision 0x02 + * Checksum 0x32 + * OEM ID "LENOVO" + * OEM Table ID "TbtTypeC" + * OEM Revision 0x00000000 (0) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "TbtTypeC", 0x00000000) +{ + External (_SB_.PCI0.RP01.PXSX, DeviceObj) + External (_SB_.PCI0.RP09.PXSX, DeviceObj) + External (TBSE, IntObj) + External (TBTS, IntObj) + External (UPT1, IntObj) + External (UPT2, IntObj) + External (USME, IntObj) + + If (LAnd (LEqual (TBTS, One), LEqual (TBSE, One))) + { + Scope (\_SB.PCI0.RP01.PXSX) + { + Name (TUSB, Package (0x02) + { + One, + 0x04 + }) + Device (TBDU) + { + Name (_ADR, 0x00020000) // _ADR: Address + Device (XHC) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + Sleep (0xC8) + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + Sleep (0xC8) + } + + Device (RHUB) + { + Name (_ADR, Zero) // _ADR: Address + Method (TPLD, 2, Serialized) + { + Name (PCKG, Package (0x01) + { + Buffer (0x10){} + }) + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) + Store (One, REV) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TPLD.REV_ */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) + Store (Arg0, VISI) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TPLD.VISI */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x57, 0x08, GPOS) + Store (Arg1, GPOS) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TPLD.GPOS */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x4A, 0x04, SHAP) + Store (One, SHAP) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TPLD.SHAP */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x20, 0x10, WID) + Store (0x08, WID) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TPLD.WID_ */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x30, 0x10, HGT) + Store (0x03, HGT) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TPLD.HGT_ */ + Return (PCKG) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TPLD.PCKG */ + } + + Method (TUPC, 2, Serialized) + { + Name (PCKG, Package (0x04) + { + One, + Zero, + Zero, + Zero + }) + Store (Arg0, Index (PCKG, Zero)) + Store (Arg1, Index (PCKG, One)) + Return (PCKG) /* \_SB_.PCI0.RP01.PXSX.TBDU.XHC_.RHUB.TUPC.PCKG */ + } + + Device (HS01) + { + Name (_ADR, One) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (HS02) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (SS01) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (One, UPT1)) + } + } + } + + Device (SS02) + { + Name (_ADR, 0x04) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (One, UPT2)) + } + } + } + } + } + } + } + } + + If (LAnd (LEqual (TBTS, One), LEqual (TBSE, 0x09))) + { + Scope (\_SB.PCI0.RP09.PXSX) + { + Name (TUSB, Package (0x02) + { + 0x03, + 0x04 + }) + Device (TBDU) + { + Name (_ADR, 0x00020000) // _ADR: Address + Device (XHC) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + Sleep (0xC8) + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + Sleep (0xC8) + } + + Device (RHUB) + { + Name (_ADR, Zero) // _ADR: Address + Method (TPLD, 2, Serialized) + { + Name (PCKG, Package (0x01) + { + Buffer (0x10){} + }) + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) + Store (One, REV) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD.REV_ */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) + Store (Arg0, VISI) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD.VISI */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x57, 0x08, GPOS) + Store (Arg1, GPOS) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD.GPOS */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x4A, 0x04, SHAP) + Store (One, SHAP) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD.SHAP */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x20, 0x10, WID) + Store (0x08, WID) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD.WID_ */ + CreateField (DerefOf (Index (PCKG, Zero)), 0x30, 0x10, HGT) + Store (0x03, HGT) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD.HGT_ */ + Return (PCKG) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD.PCKG */ + } + + Method (TUPC, 2, Serialized) + { + Name (PCKG, Package (0x04) + { + One, + Zero, + Zero, + Zero + }) + Store (Arg0, Index (PCKG, Zero)) + Store (Arg1, Index (PCKG, One)) + Return (PCKG) /* \_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TUPC.PCKG */ + } + + Device (HS01) + { + Name (_ADR, One) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (HS02) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (SS01) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (One, UPT1)) + } + } + } + + Device (SS02) + { + Name (_ADR, 0x04) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (One, UPT2)) + } + } + } + } + } + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_0-Cpu0Ist.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_0-Cpu0Ist.dsl new file mode 100644 index 0000000..890fa6b --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_0-Cpu0Ist.dsl @@ -0,0 +1,465 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_0-Cpu0Ist.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000005EE (1518) + * Revision 0x02 + * Checksum 0x8C + * OEM ID "PmRef" + * OEM Table ID "Cpu0Ist" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "Cpu0Ist", 0x00003000) +{ + External (_PR_.CFGD, FieldUnitObj) + External (_PR_.CPPC, FieldUnitObj) + External (_PR_.PR00, DeviceObj) + External (_SB_.OSCP, IntObj) + External (PC00, IntObj) + External (TCNT, FieldUnitObj) + + Scope (\_PR.PR00) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.CPPC) /* External reference */ + } + + Name (_PCT, Package (0x02) // _PCT: Performance Control + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + } + }) + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + If (And (\_SB.OSCP, 0x0400)) + { + Return (TPSS) /* \_PR_.PR00.TPSS */ + } + Else + { + Return (LPSS) /* \_PR_.PR00.LPSS */ + } + } + + Name (LPSS, Package (0x10) + { + Package (0x06) + { + 0x00000835, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00002A00, + 0x00002A00 + }, + + Package (0x06) + { + 0x00000834, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00001500, + 0x00001500 + }, + + Package (0x06) + { + 0x0000076C, + 0x00003389, + 0x0000000A, + 0x0000000A, + 0x00001300, + 0x00001300 + }, + + Package (0x06) + { + 0x00000708, + 0x0000301D, + 0x0000000A, + 0x0000000A, + 0x00001200, + 0x00001200 + }, + + Package (0x06) + { + 0x000006A4, + 0x00002CC3, + 0x0000000A, + 0x0000000A, + 0x00001100, + 0x00001100 + }, + + Package (0x06) + { + 0x00000640, + 0x00002A07, + 0x0000000A, + 0x0000000A, + 0x00001000, + 0x00001000 + }, + + Package (0x06) + { + 0x000005DC, + 0x000026D0, + 0x0000000A, + 0x0000000A, + 0x00000F00, + 0x00000F00 + }, + + Package (0x06) + { + 0x00000578, + 0x000023A7, + 0x0000000A, + 0x0000000A, + 0x00000E00, + 0x00000E00 + }, + + Package (0x06) + { + 0x000004B0, + 0x00001E10, + 0x0000000A, + 0x0000000A, + 0x00000C00, + 0x00000C00 + }, + + Package (0x06) + { + 0x0000044C, + 0x00001B19, + 0x0000000A, + 0x0000000A, + 0x00000B00, + 0x00000B00 + }, + + Package (0x06) + { + 0x000003E8, + 0x00001834, + 0x0000000A, + 0x0000000A, + 0x00000A00, + 0x00000A00 + }, + + Package (0x06) + { + 0x00000320, + 0x00001318, + 0x0000000A, + 0x0000000A, + 0x00000800, + 0x00000800 + }, + + Package (0x06) + { + 0x000002BC, + 0x00001061, + 0x0000000A, + 0x0000000A, + 0x00000700, + 0x00000700 + }, + + Package (0x06) + { + 0x00000258, + 0x00000DBA, + 0x0000000A, + 0x0000000A, + 0x00000600, + 0x00000600 + }, + + Package (0x06) + { + 0x000001F4, + 0x00000B22, + 0x0000000A, + 0x0000000A, + 0x00000500, + 0x00000500 + }, + + Package (0x06) + { + 0x00000190, + 0x00000915, + 0x0000000A, + 0x0000000A, + 0x00000400, + 0x00000400 + } + }) + Name (TPSS, Package (0x13) + { + Package (0x06) + { + 0x00000835, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00002A00, + 0x00002A00 + }, + + Package (0x06) + { + 0x00000834, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00001500, + 0x00001500 + }, + + Package (0x06) + { + 0x000007D0, + 0x00003708, + 0x0000000A, + 0x0000000A, + 0x00001400, + 0x00001400 + }, + + Package (0x06) + { + 0x0000076C, + 0x00003389, + 0x0000000A, + 0x0000000A, + 0x00001300, + 0x00001300 + }, + + Package (0x06) + { + 0x00000708, + 0x0000301D, + 0x0000000A, + 0x0000000A, + 0x00001200, + 0x00001200 + }, + + Package (0x06) + { + 0x000006A4, + 0x00002CC3, + 0x0000000A, + 0x0000000A, + 0x00001100, + 0x00001100 + }, + + Package (0x06) + { + 0x00000640, + 0x00002A07, + 0x0000000A, + 0x0000000A, + 0x00001000, + 0x00001000 + }, + + Package (0x06) + { + 0x000005DC, + 0x000026D0, + 0x0000000A, + 0x0000000A, + 0x00000F00, + 0x00000F00 + }, + + Package (0x06) + { + 0x00000578, + 0x000023A7, + 0x0000000A, + 0x0000000A, + 0x00000E00, + 0x00000E00 + }, + + Package (0x06) + { + 0x00000514, + 0x00002090, + 0x0000000A, + 0x0000000A, + 0x00000D00, + 0x00000D00 + }, + + Package (0x06) + { + 0x000004B0, + 0x00001E10, + 0x0000000A, + 0x0000000A, + 0x00000C00, + 0x00000C00 + }, + + Package (0x06) + { + 0x0000044C, + 0x00001B19, + 0x0000000A, + 0x0000000A, + 0x00000B00, + 0x00000B00 + }, + + Package (0x06) + { + 0x000003E8, + 0x00001834, + 0x0000000A, + 0x0000000A, + 0x00000A00, + 0x00000A00 + }, + + Package (0x06) + { + 0x00000384, + 0x0000155D, + 0x0000000A, + 0x0000000A, + 0x00000900, + 0x00000900 + }, + + Package (0x06) + { + 0x00000320, + 0x00001318, + 0x0000000A, + 0x0000000A, + 0x00000800, + 0x00000800 + }, + + Package (0x06) + { + 0x000002BC, + 0x00001061, + 0x0000000A, + 0x0000000A, + 0x00000700, + 0x00000700 + }, + + Package (0x06) + { + 0x00000258, + 0x00000DBA, + 0x0000000A, + 0x0000000A, + 0x00000600, + 0x00000600 + }, + + Package (0x06) + { + 0x000001F4, + 0x00000B22, + 0x0000000A, + 0x0000000A, + 0x00000500, + 0x00000500 + }, + + Package (0x06) + { + 0x00000190, + 0x00000915, + 0x0000000A, + 0x0000000A, + 0x00000400, + 0x00000400 + } + }) + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR00.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR00.HPSD */ + } + + Return (SPSD) /* \_PR_.PR00.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_1-ApIst.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_1-ApIst.dsl new file mode 100644 index 0000000..ad4b8d3 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_1-ApIst.dsl @@ -0,0 +1,930 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_1-ApIst.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000D14 (3348) + * Revision 0x02 + * Checksum 0x2A + * OEM ID "PmRef" + * OEM Table ID "ApIst" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "ApIst", 0x00003000) +{ + External (_PR_.PR00, DeviceObj) + External (_PR_.PR00._PCT, MethodObj) // 0 Arguments + External (_PR_.PR00._PPC, MethodObj) // 0 Arguments + External (_PR_.PR00._PSS, MethodObj) // 0 Arguments + External (_PR_.PR01, DeviceObj) + External (_PR_.PR02, DeviceObj) + External (_PR_.PR03, DeviceObj) + External (_PR_.PR04, DeviceObj) + External (_PR_.PR05, DeviceObj) + External (_PR_.PR06, DeviceObj) + External (_PR_.PR07, DeviceObj) + External (_PR_.PR08, DeviceObj) + External (_PR_.PR09, DeviceObj) + External (_PR_.PR10, DeviceObj) + External (_PR_.PR11, DeviceObj) + External (_PR_.PR12, DeviceObj) + External (_PR_.PR13, DeviceObj) + External (_PR_.PR14, DeviceObj) + External (_PR_.PR15, DeviceObj) + External (PC00, IntObj) + External (TCNT, FieldUnitObj) + + Scope (\_PR.PR01) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR01.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR01.HPSD */ + } + + Return (SPSD) /* \_PR_.PR01.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR02) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR02.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR02.HPSD */ + } + + Return (SPSD) /* \_PR_.PR02.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR03) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR03.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR03.HPSD */ + } + + Return (SPSD) /* \_PR_.PR03.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR04) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR04.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR04.HPSD */ + } + + Return (SPSD) /* \_PR_.PR04.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR05) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR05.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR05.HPSD */ + } + + Return (SPSD) /* \_PR_.PR05.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR06) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR06.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR06.HPSD */ + } + + Return (SPSD) /* \_PR_.PR06.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR07) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR07.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR07.HPSD */ + } + + Return (SPSD) /* \_PR_.PR07.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR08) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR08.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR08.HPSD */ + } + + Return (SPSD) /* \_PR_.PR08.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR09) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR09.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR09.HPSD */ + } + + Return (SPSD) /* \_PR_.PR09.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR10) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR10.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR10.HPSD */ + } + + Return (SPSD) /* \_PR_.PR10.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR11) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR11.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR11.HPSD */ + } + + Return (SPSD) /* \_PR_.PR11.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR12) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR12.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR12.HPSD */ + } + + Return (SPSD) /* \_PR_.PR12.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR13) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR13.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR13.HPSD */ + } + + Return (SPSD) /* \_PR_.PR13.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR14) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR14.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR14.HPSD */ + } + + Return (SPSD) /* \_PR_.PR14.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR15) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) /* \_PR_.PR15.PSDF */ + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) /* \_PR_.PR15.HPSD */ + } + + Return (SPSD) /* \_PR_.PR15.SPSD */ + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_2-Cpu0Cst.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_2-Cpu0Cst.dsl new file mode 100644 index 0000000..632a081 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_2-Cpu0Cst.dsl @@ -0,0 +1,259 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_2-Cpu0Cst.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000003FF (1023) + * Revision 0x02 + * Checksum 0x11 + * OEM ID "PmRef" + * OEM Table ID "Cpu0Cst" + * OEM Revision 0x00003001 (12289) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "Cpu0Cst", 0x00003001) +{ + External (_PR_.C3LT, FieldUnitObj) + External (_PR_.C3MW, FieldUnitObj) + External (_PR_.C6LT, FieldUnitObj) + External (_PR_.C6MW, FieldUnitObj) + External (_PR_.C7LT, FieldUnitObj) + External (_PR_.C7MW, FieldUnitObj) + External (_PR_.CDLT, FieldUnitObj) + External (_PR_.CDLV, FieldUnitObj) + External (_PR_.CDMW, FieldUnitObj) + External (_PR_.CDPW, FieldUnitObj) + External (_PR_.CFGD, UnknownObj) + External (_PR_.PR00, DeviceObj) + External (C3LT, UnknownObj) + External (C3MW, UnknownObj) + External (C6LT, UnknownObj) + External (C6MW, UnknownObj) + External (C7LT, UnknownObj) + External (C7MW, UnknownObj) + External (CDLT, UnknownObj) + External (CDLV, UnknownObj) + External (CDMW, UnknownObj) + External (CDPW, UnknownObj) + External (CFGD, UnknownObj) + External (FEMD, UnknownObj) + External (FMBL, UnknownObj) + External (PC00, UnknownObj) + External (PFLV, UnknownObj) + + Scope (\_PR.PR00) + { + Name (C1TM, Package (0x04) + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + One, + One, + 0x03E8 + }) + Name (C3TM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001814, // Address + ,) + }, + + 0x02, + Zero, + 0x01F4 + }) + Name (C6TM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001815, // Address + ,) + }, + + 0x02, + Zero, + 0x015E + }) + Name (C7TM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001816, // Address + ,) + }, + + 0x02, + Zero, + 0xC8 + }) + Name (CDTM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001816, // Address + ,) + }, + + 0x03, + Zero, + Zero + }) + Name (MWES, ResourceTemplate () + { + Register (FFixedHW, + 0x01, // Bit Width + 0x02, // Bit Offset + 0x0000000000000000, // Address + 0x01, // Access Size + ) + }) + Name (AC2V, Zero) + Name (AC3V, Zero) + Name (C3ST, Package (0x04) + { + 0x03, + Package (0x01) + { + Zero + }, + + Package (0x01) + { + Zero + }, + + Package (0x01) + { + Zero + } + }) + Name (C2ST, Package (0x03) + { + 0x02, + Package (0x01) + { + Zero + }, + + Package (0x01) + { + Zero + } + }) + Name (C1ST, Package (0x02) + { + One, + Package (0x01) + { + Zero + } + }) + Name (CSTF, Zero) + Method (_CST, 0, Serialized) // _CST: C-States + { + If (LNot (CSTF)) + { + Store (C3LT, Index (C3TM, 0x02)) + Store (C6LT, Index (C6TM, 0x02)) + Store (C7LT, Index (C7TM, 0x02)) + Store (CDLT, Index (CDTM, 0x02)) + Store (CDPW, Index (CDTM, 0x03)) + Store (CDLV, Index (DerefOf (Index (CDTM, Zero)), 0x07)) + If (LAnd (And (CFGD, 0x0800), And (PC00, 0x0200))) + { + Store (MWES, Index (C1TM, Zero)) + Store (MWES, Index (C3TM, Zero)) + Store (MWES, Index (C6TM, Zero)) + Store (MWES, Index (C7TM, Zero)) + Store (MWES, Index (CDTM, Zero)) + Store (C3MW, Index (DerefOf (Index (C3TM, Zero)), 0x07)) + Store (C6MW, Index (DerefOf (Index (C6TM, Zero)), 0x07)) + Store (C7MW, Index (DerefOf (Index (C7TM, Zero)), 0x07)) + Store (CDMW, Index (DerefOf (Index (CDTM, Zero)), 0x07)) + } + ElseIf (LAnd (And (CFGD, 0x0800), And (PC00, 0x0100))) + { + Store (MWES, Index (C1TM, Zero)) + } + + Store (Ones, CSTF) /* \_PR_.PR00.CSTF */ + } + + Store (Zero, AC2V) /* \_PR_.PR00.AC2V */ + Store (Zero, AC3V) /* \_PR_.PR00.AC3V */ + Store (C1TM, Index (C3ST, One)) + If (And (CFGD, 0x20)) + { + Store (C7TM, Index (C3ST, 0x02)) + Store (Ones, AC2V) /* \_PR_.PR00.AC2V */ + } + ElseIf (And (CFGD, 0x10)) + { + Store (C6TM, Index (C3ST, 0x02)) + Store (Ones, AC2V) /* \_PR_.PR00.AC2V */ + } + ElseIf (And (CFGD, 0x08)) + { + Store (C3TM, Index (C3ST, 0x02)) + Store (Ones, AC2V) /* \_PR_.PR00.AC2V */ + } + + If (And (CFGD, 0x4000)) + { + Store (CDTM, Index (C3ST, 0x03)) + Store (Ones, AC3V) /* \_PR_.PR00.AC3V */ + } + + If (LAnd (AC2V, AC3V)) + { + Return (C3ST) /* \_PR_.PR00.C3ST */ + } + ElseIf (AC2V) + { + Store (DerefOf (Index (C3ST, One)), Index (C2ST, One)) + Store (DerefOf (Index (C3ST, 0x02)), Index (C2ST, 0x02)) + Return (C2ST) /* \_PR_.PR00.C2ST */ + } + ElseIf (AC3V) + { + Store (DerefOf (Index (C3ST, One)), Index (C2ST, One)) + Store (DerefOf (Index (C3ST, 0x03)), Index (C2ST, 0x02)) + Store (0x02, Index (DerefOf (Index (C2ST, 0x02)), One)) + Return (C2ST) /* \_PR_.PR00.C2ST */ + } + Else + { + Store (DerefOf (Index (C3ST, One)), Index (C1ST, One)) + Return (C1ST) /* \_PR_.PR00.C1ST */ + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_3-ApCst.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_3-ApCst.dsl new file mode 100644 index 0000000..bd4460f --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_3-ApCst.dsl @@ -0,0 +1,160 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_3-ApCst.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x0000030A (778) + * Revision 0x02 + * Checksum 0x93 + * OEM ID "PmRef" + * OEM Table ID "ApCst" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "ApCst", 0x00003000) +{ + External (_PR_.PR00._CST, UnknownObj) + External (_PR_.PR01, DeviceObj) + External (_PR_.PR02, DeviceObj) + External (_PR_.PR03, DeviceObj) + External (_PR_.PR04, DeviceObj) + External (_PR_.PR05, DeviceObj) + External (_PR_.PR06, DeviceObj) + External (_PR_.PR07, DeviceObj) + External (_PR_.PR08, DeviceObj) + External (_PR_.PR09, DeviceObj) + External (_PR_.PR10, DeviceObj) + External (_PR_.PR11, DeviceObj) + External (_PR_.PR12, DeviceObj) + External (_PR_.PR13, DeviceObj) + External (_PR_.PR14, DeviceObj) + External (_PR_.PR15, DeviceObj) + + Scope (\_PR.PR01) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR02) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR03) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR04) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR05) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR06) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR07) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR08) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR09) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR10) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR11) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR12) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR13) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR14) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } + + Scope (\_PR.PR15) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) /* External reference */ + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_4-Cpu0Hwp.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_4-Cpu0Hwp.dsl new file mode 100644 index 0000000..92470a2 --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_4-Cpu0Hwp.dsl @@ -0,0 +1,48 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_4-Cpu0Hwp.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000000BA (186) + * Revision 0x02 + * Checksum 0x7D + * OEM ID "PmRef" + * OEM Table ID "Cpu0Hwp" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "Cpu0Hwp", 0x00003000) +{ + External (_PR_.CFGD, IntObj) + External (_PR_.HWPA, FieldUnitObj) + External (_PR_.HWPV, IntObj) + External (_PR_.PR00, DeviceObj) + External (_PR_.PR00.CPC2, PkgObj) + External (_PR_.PR00.CPOC, PkgObj) + External (CPC2, IntObj) + External (CPOC, IntObj) + External (TCNT, FieldUnitObj) + + Scope (\_PR.PR00) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + If (And (\_PR.CFGD, 0x01000000)) + { + Return (CPOC) /* External reference */ + } + Else + { + Return (CPC2) /* External reference */ + } + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_5-ApHwp.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_5-ApHwp.dsl new file mode 100644 index 0000000..f9cb0cb --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_5-ApHwp.dsl @@ -0,0 +1,161 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_5-ApHwp.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000317 (791) + * Revision 0x02 + * Checksum 0x80 + * OEM ID "PmRef" + * OEM Table ID "ApHwp" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "ApHwp", 0x00003000) +{ + External (_PR_.PR00, ProcessorObj) + External (_PR_.PR00._CPC, MethodObj) // 0 Arguments + External (_PR_.PR01, ProcessorObj) + External (_PR_.PR02, ProcessorObj) + External (_PR_.PR03, ProcessorObj) + External (_PR_.PR04, ProcessorObj) + External (_PR_.PR05, ProcessorObj) + External (_PR_.PR06, ProcessorObj) + External (_PR_.PR07, ProcessorObj) + External (_PR_.PR08, ProcessorObj) + External (_PR_.PR09, ProcessorObj) + External (_PR_.PR10, ProcessorObj) + External (_PR_.PR11, ProcessorObj) + External (_PR_.PR12, ProcessorObj) + External (_PR_.PR13, ProcessorObj) + External (_PR_.PR14, ProcessorObj) + External (_PR_.PR15, ProcessorObj) + + Scope (\_PR.PR01) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR02) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR03) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR04) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR05) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR06) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR07) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR08) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR09) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR10) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR11) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR12) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR13) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR14) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR15) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } +} + diff --git a/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_6-HwpLvt.dsl b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_6-HwpLvt.dsl new file mode 100644 index 0000000..3b7232a --- /dev/null +++ b/ACPI/Disassembled ACPI/BIOS-v1.41/SSDT-x5_6-HwpLvt.dsl @@ -0,0 +1,176 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_6-HwpLvt.aml, Thu Oct 3 00:56:10 2019 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000628 (1576) + * Revision 0x02 + * Checksum 0x85 + * OEM ID "PmRef" + * OEM Table ID "HwpLvt" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "HwpLvt", 0x00003000) +{ + External (_PR_.PR00, DeviceObj) + External (_PR_.PR01, ProcessorObj) + External (_PR_.PR02, ProcessorObj) + External (_PR_.PR03, ProcessorObj) + External (_PR_.PR04, ProcessorObj) + External (_PR_.PR05, ProcessorObj) + External (_PR_.PR06, ProcessorObj) + External (_PR_.PR07, ProcessorObj) + External (_PR_.PR08, ProcessorObj) + External (_PR_.PR09, ProcessorObj) + External (_PR_.PR10, ProcessorObj) + External (_PR_.PR11, ProcessorObj) + External (_PR_.PR12, ProcessorObj) + External (_PR_.PR13, ProcessorObj) + External (_PR_.PR14, ProcessorObj) + External (_PR_.PR15, ProcessorObj) + External (TCNT, FieldUnitObj) + + Scope (\_GPE) + { + Method (HLVT, 0, Serialized) + { + Switch (ToInteger (TCNT)) + { + Case (0x10) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + Notify (\_PR.PR05, 0x83) // Device-Specific Change + Notify (\_PR.PR06, 0x83) // Device-Specific Change + Notify (\_PR.PR07, 0x83) // Device-Specific Change + Notify (\_PR.PR08, 0x83) // Device-Specific Change + Notify (\_PR.PR09, 0x83) // Device-Specific Change + Notify (\_PR.PR10, 0x83) // Device-Specific Change + Notify (\_PR.PR11, 0x83) // Device-Specific Change + Notify (\_PR.PR12, 0x83) // Device-Specific Change + Notify (\_PR.PR13, 0x83) // Device-Specific Change + Notify (\_PR.PR14, 0x83) // Device-Specific Change + Notify (\_PR.PR15, 0x83) // Device-Specific Change + } + Case (0x0E) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + Notify (\_PR.PR05, 0x83) // Device-Specific Change + Notify (\_PR.PR06, 0x83) // Device-Specific Change + Notify (\_PR.PR07, 0x83) // Device-Specific Change + Notify (\_PR.PR08, 0x83) // Device-Specific Change + Notify (\_PR.PR09, 0x83) // Device-Specific Change + Notify (\_PR.PR10, 0x83) // Device-Specific Change + Notify (\_PR.PR11, 0x83) // Device-Specific Change + Notify (\_PR.PR12, 0x83) // Device-Specific Change + Notify (\_PR.PR13, 0x83) // Device-Specific Change + } + Case (0x0C) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + Notify (\_PR.PR05, 0x83) // Device-Specific Change + Notify (\_PR.PR06, 0x83) // Device-Specific Change + Notify (\_PR.PR07, 0x83) // Device-Specific Change + Notify (\_PR.PR08, 0x83) // Device-Specific Change + Notify (\_PR.PR09, 0x83) // Device-Specific Change + Notify (\_PR.PR10, 0x83) // Device-Specific Change + Notify (\_PR.PR11, 0x83) // Device-Specific Change + } + Case (0x0A) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + Notify (\_PR.PR05, 0x83) // Device-Specific Change + Notify (\_PR.PR06, 0x83) // Device-Specific Change + Notify (\_PR.PR07, 0x83) // Device-Specific Change + Notify (\_PR.PR08, 0x83) // Device-Specific Change + Notify (\_PR.PR09, 0x83) // Device-Specific Change + } + Case (0x08) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + Notify (\_PR.PR05, 0x83) // Device-Specific Change + Notify (\_PR.PR06, 0x83) // Device-Specific Change + Notify (\_PR.PR07, 0x83) // Device-Specific Change + } + Case (0x07) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + Notify (\_PR.PR05, 0x83) // Device-Specific Change + Notify (\_PR.PR06, 0x83) // Device-Specific Change + } + Case (0x06) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + Notify (\_PR.PR05, 0x83) // Device-Specific Change + } + Case (0x05) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + Notify (\_PR.PR04, 0x83) // Device-Specific Change + } + Case (0x04) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + Notify (\_PR.PR03, 0x83) // Device-Specific Change + } + Case (0x03) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + Notify (\_PR.PR02, 0x83) // Device-Specific Change + } + Case (0x02) + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + Notify (\_PR.PR01, 0x83) // Device-Specific Change + } + Default + { + Notify (\_PR.PR00, 0x83) // Device-Specific Change + } + + } + } + } +} + diff --git a/ACPI/Stock ACPI/BIOS-v1.41/APIC.aml b/ACPI/Stock ACPI/BIOS-v1.41/APIC.aml new file mode 100755 index 0000000..7c6dd22 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/APIC.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/ASF!.aml b/ACPI/Stock ACPI/BIOS-v1.41/ASF!.aml new file mode 100755 index 0000000..b697ccd Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/ASF!.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/BATB.aml b/ACPI/Stock ACPI/BIOS-v1.41/BATB.aml new file mode 100755 index 0000000..22dfe66 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/BATB.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/BGRT.aml b/ACPI/Stock ACPI/BIOS-v1.41/BGRT.aml new file mode 100755 index 0000000..d0e65df Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/BGRT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/BOOT.aml b/ACPI/Stock ACPI/BIOS-v1.41/BOOT.aml new file mode 100755 index 0000000..8f66c57 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/BOOT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/DBG2.aml b/ACPI/Stock ACPI/BIOS-v1.41/DBG2.aml new file mode 100755 index 0000000..1608feb Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/DBG2.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/DBGP.aml b/ACPI/Stock ACPI/BIOS-v1.41/DBGP.aml new file mode 100755 index 0000000..74046a1 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/DBGP.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/DSDT.aml b/ACPI/Stock ACPI/BIOS-v1.41/DSDT.aml new file mode 100755 index 0000000..5c409d5 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/DSDT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/DumpLog.txt b/ACPI/Stock ACPI/BIOS-v1.41/DumpLog.txt new file mode 100755 index 0000000..555a6e7 --- /dev/null +++ b/ACPI/Stock ACPI/BIOS-v1.41/DumpLog.txt @@ -0,0 +1,120 @@ +4:133 2:511 Found UEFI Acpi 2.0 RSDP at 5B5FE014 +4:133 0:000 Saving ACPI tables from RSDP 5B5FE014 to EFI\CLOVER\ACPI\origin ... +4:133 0:000 5B5FE014: 'RSD PTR ', Rev: 2 (Acpi 2.0 or newer), Len: 36 -> RSDP.aml +4:141 0:008 (Xsdt: 5B5B2188, Rsdt: 5B5B20C4) +4:141 0:000 5B5B2188: 'XSDT', 'TP-N23', Rev: 1, Len: 276 -> XSDT.aml +4:149 0:008 5B5B20C4: 'RSDT', 'TP-N23', Rev: 1, Len: 156 -> RSDT.aml +4:158 0:009 Tables in Xsdt: 30 +4:158 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 -> FACP.aml +4:166 0:007 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +4:166 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 159172 -> DSDT.aml +4:179 0:013 5B546000: 'FACS', Ver: 2, Len: 64 -> FACS.aml +4:187 0:008 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39346 -> SSDT-0-DptfTabl.aml +4:197 0:009 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 -> UEFI.aml +4:205 0:007 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12506 -> SSDT-1-SaSsdt.aml +4:214 0:008 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 -> SSDT-2-PerfTune.aml +4:223 0:009 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 -> HPET.aml +4:231 0:008 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 -> APIC.aml +4:239 0:008 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 -> MCFG.aml +4:248 0:008 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 -> ECDT.aml +4:256 0:008 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7453 -> SSDT-3-RVP7Rtd3.aml +4:264 0:008 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 6103 -> SSDT-4-ProjSsdt.aml +4:272 0:008 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 -> BOOT.aml +4:281 0:008 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 -> BATB.aml +4:290 0:008 13. 5B5BB000: 'SLIC', 'TP-N23', Rev: 1, Len: 374 -> SLIC.aml +4:298 0:008 14. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 -> SSDT-5-CpuSsdt.aml (Found hidden SSDT 7 pcs) +4:307 0:009 * 5B51B098: 'SSDT', 'Cpu0Ist', Rev: 2, Len: 1518 53 53 44 54 EE 05 00 00 02 8C 50 6D 52 65 66 00 Internal length = 1518 -> SSDT-x5_0-Cpu0Ist.aml +4:316 0:008 * 5B4A1018: 'SSDT', 'ApIst', Rev: 2, Len: 3348 53 53 44 54 14 0D 00 00 02 2A 50 6D 52 65 66 00 Internal length = 3348 -> SSDT-x5_1-ApIst.aml +4:324 0:008 * 5B4A2698: 'SSDT', 'Cpu0Cst', Rev: 2, Len: 1023 53 53 44 54 FF 03 00 00 02 11 50 6D 52 65 66 00 Internal length = 1023 -> SSDT-x5_2-Cpu0Cst.aml +4:332 0:008 * 5B51B718: 'SSDT', 'ApCst', Rev: 2, Len: 778 53 53 44 54 0A 03 00 00 02 93 50 6D 52 65 66 00 Internal length = 778 -> SSDT-x5_3-ApCst.aml +4:341 0:008 * 5B51BE18: 'SSDT', 'Cpu0Hwp', Rev: 2, Len: 186 53 53 44 54 BA 00 00 00 02 7D 50 6D 52 65 66 00 Internal length = 186 -> SSDT-x5_4-Cpu0Hwp.aml +4:350 0:008 * 5B4A0018: 'SSDT', 'ApHwp', Rev: 2, Len: 791 53 53 44 54 17 03 00 00 02 80 50 6D 52 65 66 00 Internal length = 791 -> SSDT-x5_5-ApHwp.aml +4:358 0:008 * 5B4A2018: 'SSDT', 'HwpLvt', Rev: 2, Len: 1576 53 53 44 54 28 06 00 00 02 85 50 6D 52 65 66 00 Internal length = 1576 -> SSDT-x5_6-HwpLvt.aml +4:366 0:008 +4:366 0:000 15. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 -> SSDT-6-CtdpB.aml +4:374 0:008 16. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 -> SSDT-7-UsbCTabl.aml +4:383 0:008 17. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 -> LPIT.aml +4:391 0:008 18. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 -> WSMT.aml +4:399 0:008 19. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 -> SSDT-8-HdaDsp.aml +4:415 0:015 20. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 -> SSDT-9-TbtTypeC.aml +4:423 0:007 21. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 -> SSDT-10-Wwan.aml +4:431 0:008 22. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 -> DBGP.aml +4:439 0:008 23. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 -> DBG2.aml +4:448 0:008 24. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 -> MSDM.aml +4:456 0:008 25. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 -> NHLT.aml +4:464 0:008 26. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 -> ASF!.aml +4:472 0:008 27. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 -> FPDT.aml +4:480 0:008 28. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 -> UEFI.aml +4:500 0:019 29. 5B5AB000: 'BGRT', 'TP-N23', Rev: 1, Len: 56 -> BGRT.aml +4:508 0:008 Tables in Rsdt: 30 +4:508 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 +4:508 0:000 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +4:508 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 159172 +4:513 0:005 5B546000: 'FACS', Ver: 2, Len: 64 +4:513 0:000 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39346 +4:513 0:000 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 +4:513 0:000 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12506 +4:513 0:000 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 +4:513 0:000 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 +4:513 0:000 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 +4:513 0:000 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 +4:513 0:000 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 +4:513 0:000 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7453 +4:513 0:000 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 6103 +4:513 0:000 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 +4:513 0:000 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 +4:513 0:000 13. 5B5BB000: 'SLIC', 'TP-N23', Rev: 1, Len: 374 +4:513 0:000 14. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 +4:513 0:000 15. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 +4:513 0:000 16. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 +4:513 0:000 17. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 +4:513 0:000 18. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 +4:513 0:000 19. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 +4:513 0:000 20. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 +4:513 0:000 21. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 +4:513 0:000 22. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 +4:513 0:000 23. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 +4:513 0:000 24. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 +4:513 0:000 25. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 +4:513 0:000 26. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 +4:513 0:000 27. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 +4:513 0:000 28. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 +4:513 0:000 29. 5B5AB000: 'BGRT', 'TP-N23', Rev: 1, Len: 56 +4:513 0:000 Found UEFI Acpi 1.0 RSDP at 5B5FE000 +4:513 0:000 Printing ACPI tables from RSDP 5B5FE000 ... +4:513 0:000 5B5FE000: 'RSD PTR ', Rev: 0 (Acpi 1.0), Len: 20 +4:513 0:000 (Rsdt: 5B5B2000) +4:513 0:000 5B5B2000: 'RSDT', 'TP-N23', Rev: 1, Len: 152 +4:513 0:000 Tables in Rsdt: 29 +4:513 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 +4:513 0:000 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +4:513 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 159172 +4:518 0:005 5B546000: 'FACS', Ver: 2, Len: 64 +4:519 0:000 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39346 +4:519 0:000 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 +4:519 0:000 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12506 +4:519 0:000 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 +4:519 0:000 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 +4:519 0:000 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 +4:519 0:000 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 +4:519 0:000 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 +4:519 0:000 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7453 +4:519 0:000 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 6103 +4:519 0:000 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 +4:519 0:000 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 +4:519 0:000 13. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 +4:519 0:000 14. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 +4:519 0:000 15. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 +4:519 0:000 16. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 +4:519 0:000 17. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 +4:519 0:000 18. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 +4:519 0:000 19. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 +4:519 0:000 20. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 +4:519 0:000 21. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 +4:519 0:000 22. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 +4:519 0:000 23. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 +4:519 0:000 24. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 +4:519 0:000 25. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 +4:519 0:000 26. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 +4:519 0:000 27. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 +4:519 0:000 28. 5B5AB000: 'BGRT', 'TP-N23', Rev: 1, Len: 56 diff --git a/ACPI/Stock ACPI/BIOS-v1.41/ECDT.aml b/ACPI/Stock ACPI/BIOS-v1.41/ECDT.aml new file mode 100755 index 0000000..5ca614d Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/ECDT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/FACP.aml b/ACPI/Stock ACPI/BIOS-v1.41/FACP.aml new file mode 100755 index 0000000..ad2afbc Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/FACP.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/FACS.aml b/ACPI/Stock ACPI/BIOS-v1.41/FACS.aml new file mode 100755 index 0000000..2131642 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/FACS.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/FPDT.aml b/ACPI/Stock ACPI/BIOS-v1.41/FPDT.aml new file mode 100755 index 0000000..628271c Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/FPDT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/HPET.aml b/ACPI/Stock ACPI/BIOS-v1.41/HPET.aml new file mode 100755 index 0000000..8b48712 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/HPET.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/LPIT.aml b/ACPI/Stock ACPI/BIOS-v1.41/LPIT.aml new file mode 100755 index 0000000..0d3a5be Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/LPIT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/MCFG.aml b/ACPI/Stock ACPI/BIOS-v1.41/MCFG.aml new file mode 100755 index 0000000..14dc97a Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/MCFG.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/MSDM.aml b/ACPI/Stock ACPI/BIOS-v1.41/MSDM.aml new file mode 100755 index 0000000..f1bfd81 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/MSDM.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/NHLT.aml b/ACPI/Stock ACPI/BIOS-v1.41/NHLT.aml new file mode 100755 index 0000000..322d7bd Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/NHLT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/RSDP.aml b/ACPI/Stock ACPI/BIOS-v1.41/RSDP.aml new file mode 100755 index 0000000..8c69f33 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/RSDP.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/RSDT.aml b/ACPI/Stock ACPI/BIOS-v1.41/RSDT.aml new file mode 100755 index 0000000..5352e14 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/RSDT.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/SLIC.aml b/ACPI/Stock ACPI/BIOS-v1.41/SLIC.aml new file mode 100755 index 0000000..56d0d7f Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/SLIC.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/SSDT-0-DptfTabl.aml b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-0-DptfTabl.aml new file mode 100755 index 0000000..cb937f8 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-0-DptfTabl.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/SSDT-1-SaSsdt.aml b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-1-SaSsdt.aml new file mode 100755 index 0000000..ed96d39 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-1-SaSsdt.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/SSDT-10-Wwan.aml b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-10-Wwan.aml new file mode 100755 index 0000000..247a9df Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-10-Wwan.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/SSDT-2-PerfTune.aml b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-2-PerfTune.aml new file mode 100755 index 0000000..46164e2 Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-2-PerfTune.aml differ diff --git a/ACPI/Stock ACPI/BIOS-v1.41/SSDT-3-RVP7Rtd3.aml b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-3-RVP7Rtd3.aml new file mode 100755 index 0000000..6155e8c Binary files /dev/null and b/ACPI/Stock ACPI/BIOS-v1.41/SSDT-3-RVP7Rtd3.aml differ diff --git a/ACPI/Stock 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