From cf9e18d5393b0628af676e820df1fe5b66b5ea71 Mon Sep 17 00:00:00 2001 From: Tyler Nguyen Date: Tue, 26 Jun 2018 16:58:04 -0500 Subject: [PATCH] Added ACPI Tables --- ACPI/Disassembled ACPI files/DSDT.dsl | 34717 ++++++++++++++++ .../SSDT-0-DptfTabl.dsl | 5642 +++ .../Disassembled ACPI files/SSDT-1-SaSsdt.dsl | 2832 ++ ACPI/Disassembled ACPI files/SSDT-10-Wwan.dsl | 117 + .../SSDT-2-PerfTune.dsl | 344 + .../SSDT-3-RVP7Rtd3.dsl | 759 + .../SSDT-4-ProjSsdt.dsl | 1166 + .../SSDT-5-CpuSsdt.dsl | 1132 + ACPI/Disassembled ACPI files/SSDT-6-CtdpB.dsl | 253 + .../SSDT-7-UsbCTabl.dsl | 280 + .../Disassembled ACPI files/SSDT-8-HdaDsp.dsl | 95 + .../SSDT-9-TbtTypeC.dsl | 391 + .../SSDT-x5_0-Cpu0Ist.dsl | 465 + .../SSDT-x5_1-ApIst.dsl | 930 + .../SSDT-x5_2-Cpu0Cst.dsl | 259 + .../SSDT-x5_3-ApCst.dsl | 160 + .../SSDT-x5_4-Cpu0Hwp.dsl | 48 + .../SSDT-x5_5-ApHwp.dsl | 161 + .../SSDT-x5_6-HwpLvt.dsl | 176 + ACPI/origin/APIC.aml | Bin 0 -> 300 bytes ACPI/origin/ASF!.aml | Bin 0 -> 160 bytes ACPI/origin/BATB.aml | Bin 0 -> 74 bytes ACPI/origin/BOOT.aml | Bin 0 -> 40 bytes ACPI/origin/DBG2.aml | Bin 0 -> 84 bytes ACPI/origin/DBGP.aml | Bin 0 -> 52 bytes ACPI/origin/DSDT.aml | Bin 0 -> 156035 bytes ACPI/origin/DumpLog.txt | 189 + ACPI/origin/ECDT.aml | Bin 0 -> 83 bytes ACPI/origin/FACP.aml | Bin 0 -> 244 bytes ACPI/origin/FACS.aml | Bin 0 -> 64 bytes ACPI/origin/FPDT.aml | Bin 0 -> 68 bytes ACPI/origin/HPET.aml | Bin 0 -> 56 bytes ACPI/origin/LPIT.aml | Bin 0 -> 148 bytes ACPI/origin/MCFG.aml | Bin 0 -> 60 bytes ACPI/origin/MSDM.aml | Bin 0 -> 85 bytes ACPI/origin/NHLT.aml | Bin 0 -> 45 bytes ACPI/origin/RSDP.aml | Bin 0 -> 36 bytes ACPI/origin/RSDT.aml | Bin 0 -> 152 bytes ACPI/origin/SLIC.aml | Bin 0 -> 374 bytes ACPI/origin/SSDT-0-DptfTabl.aml | Bin 0 -> 39360 bytes ACPI/origin/SSDT-1-SaSsdt.aml | Bin 0 -> 12451 bytes ACPI/origin/SSDT-10-Wwan.aml | Bin 0 -> 721 bytes ACPI/origin/SSDT-2-PerfTune.aml | Bin 0 -> 1478 bytes ACPI/origin/SSDT-3-RVP7Rtd3.aml | Bin 0 -> 7324 bytes ACPI/origin/SSDT-4-ProjSsdt.aml | Bin 0 -> 5951 bytes ACPI/origin/SSDT-5-CpuSsdt.aml | Bin 0 -> 6062 bytes ACPI/origin/SSDT-6-CtdpB.aml | Bin 0 -> 1389 bytes ACPI/origin/SSDT-7-UsbCTabl.aml | Bin 0 -> 1727 bytes ACPI/origin/SSDT-8-HdaDsp.aml | Bin 0 -> 472 bytes ACPI/origin/SSDT-9-TbtTypeC.aml | Bin 0 -> 1424 bytes ACPI/origin/SSDT-x5_0-Cpu0Ist.aml | Bin 0 -> 1518 bytes ACPI/origin/SSDT-x5_1-ApIst.aml | Bin 0 -> 3348 bytes ACPI/origin/SSDT-x5_2-Cpu0Cst.aml | Bin 0 -> 1023 bytes ACPI/origin/SSDT-x5_3-ApCst.aml | Bin 0 -> 778 bytes ACPI/origin/SSDT-x5_4-Cpu0Hwp.aml | Bin 0 -> 186 bytes ACPI/origin/SSDT-x5_5-ApHwp.aml | Bin 0 -> 791 bytes ACPI/origin/SSDT-x5_6-HwpLvt.aml | Bin 0 -> 1576 bytes ACPI/origin/UEFI.aml | Bin 0 -> 318 bytes ACPI/origin/WSMT.aml | Bin 0 -> 40 bytes ACPI/origin/XSDT.aml | Bin 0 -> 268 bytes ACPI/patch-files/1_fix_compile.txt | 34 + ACPI/patch-files/3_Fn_Keys.txt | 83 + README-kexts.md | 9 + README-references.md | 7 + README-utilities.md | 7 + ...May2018-config_HD615_620_630_640_650.plist | 511 + 66 files changed, 50767 insertions(+) create mode 100755 ACPI/Disassembled ACPI files/DSDT.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-0-DptfTabl.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-1-SaSsdt.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-10-Wwan.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-2-PerfTune.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-3-RVP7Rtd3.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-4-ProjSsdt.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-5-CpuSsdt.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-6-CtdpB.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-7-UsbCTabl.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-8-HdaDsp.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-9-TbtTypeC.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-x5_0-Cpu0Ist.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-x5_1-ApIst.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-x5_2-Cpu0Cst.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-x5_3-ApCst.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-x5_4-Cpu0Hwp.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-x5_5-ApHwp.dsl create mode 100755 ACPI/Disassembled ACPI files/SSDT-x5_6-HwpLvt.dsl create mode 100755 ACPI/origin/APIC.aml create mode 100755 ACPI/origin/ASF!.aml create mode 100755 ACPI/origin/BATB.aml create mode 100755 ACPI/origin/BOOT.aml create mode 100755 ACPI/origin/DBG2.aml create mode 100755 ACPI/origin/DBGP.aml create mode 100755 ACPI/origin/DSDT.aml create mode 100755 ACPI/origin/DumpLog.txt create mode 100755 ACPI/origin/ECDT.aml create mode 100755 ACPI/origin/FACP.aml create mode 100755 ACPI/origin/FACS.aml create mode 100755 ACPI/origin/FPDT.aml create mode 100755 ACPI/origin/HPET.aml create mode 100755 ACPI/origin/LPIT.aml create mode 100755 ACPI/origin/MCFG.aml create mode 100755 ACPI/origin/MSDM.aml create mode 100755 ACPI/origin/NHLT.aml create mode 100755 ACPI/origin/RSDP.aml create mode 100755 ACPI/origin/RSDT.aml create mode 100755 ACPI/origin/SLIC.aml create mode 100755 ACPI/origin/SSDT-0-DptfTabl.aml create mode 100755 ACPI/origin/SSDT-1-SaSsdt.aml create mode 100755 ACPI/origin/SSDT-10-Wwan.aml create mode 100755 ACPI/origin/SSDT-2-PerfTune.aml create mode 100755 ACPI/origin/SSDT-3-RVP7Rtd3.aml create mode 100755 ACPI/origin/SSDT-4-ProjSsdt.aml create mode 100755 ACPI/origin/SSDT-5-CpuSsdt.aml create mode 100755 ACPI/origin/SSDT-6-CtdpB.aml create mode 100755 ACPI/origin/SSDT-7-UsbCTabl.aml create mode 100755 ACPI/origin/SSDT-8-HdaDsp.aml create mode 100755 ACPI/origin/SSDT-9-TbtTypeC.aml create mode 100755 ACPI/origin/SSDT-x5_0-Cpu0Ist.aml create mode 100755 ACPI/origin/SSDT-x5_1-ApIst.aml create mode 100755 ACPI/origin/SSDT-x5_2-Cpu0Cst.aml create mode 100755 ACPI/origin/SSDT-x5_3-ApCst.aml create mode 100755 ACPI/origin/SSDT-x5_4-Cpu0Hwp.aml create mode 100755 ACPI/origin/SSDT-x5_5-ApHwp.aml create mode 100755 ACPI/origin/SSDT-x5_6-HwpLvt.aml create mode 100755 ACPI/origin/UEFI.aml create mode 100755 ACPI/origin/WSMT.aml create mode 100755 ACPI/origin/XSDT.aml create mode 100755 ACPI/patch-files/1_fix_compile.txt create mode 100755 ACPI/patch-files/3_Fn_Keys.txt create mode 100644 README-kexts.md create mode 100644 README-references.md create mode 100644 README-utilities.md create mode 100755 RehabMan-May2018-config_HD615_620_630_640_650.plist diff --git a/ACPI/Disassembled ACPI files/DSDT.dsl b/ACPI/Disassembled ACPI files/DSDT.dsl new file mode 100755 index 0000000..44c6c51 --- /dev/null +++ b/ACPI/Disassembled ACPI files/DSDT.dsl @@ -0,0 +1,34717 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of DSDT.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00026183 (156035) + * Revision 0x02 + * Checksum 0x89 + * OEM ID "LENOVO" + * OEM Table ID "SKL " + * OEM Revision 0x00000000 (0) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "DSDT", 2, "LENOVO", "SKL ", 0x00000000) +{ + External (_GPE.TBNF, MethodObj) // 0 Arguments (from opcode) + External (_PR_.BGIA, UnknownObj) // (from opcode) + External (_PR_.BGMA, UnknownObj) // (from opcode) + External (_PR_.BGMS, UnknownObj) // (from opcode) + External (_PR_.CFGD, UnknownObj) // (from opcode) + External (_PR_.CLVL, UnknownObj) // (from opcode) + External (_PR_.CPPC, IntObj) // (from opcode) + External (_PR_.DSAE, UnknownObj) // (from opcode) + External (_PR_.DTS1, UnknownObj) // (from opcode) + External (_PR_.DTS2, UnknownObj) // (from opcode) + External (_PR_.DTS3, UnknownObj) // (from opcode) + External (_PR_.DTS4, UnknownObj) // (from opcode) + External (_PR_.DTSE, UnknownObj) // (from opcode) + External (_PR_.DTSF, UnknownObj) // (from opcode) + External (_PR_.ELNG, UnknownObj) // (from opcode) + External (_PR_.EMNA, UnknownObj) // (from opcode) + External (_PR_.EPCS, UnknownObj) // (from opcode) + External (_PR_.PDTS, UnknownObj) // (from opcode) + External (_PR_.PKGA, UnknownObj) // (from opcode) + External (_PR_.POWS, UnknownObj) // (from opcode) + External (_PR_.PR00, DeviceObj) // (from opcode) + External (_PR_.PR00._PPC, MethodObj) // 0 Arguments + External (_PR_.PR00.LPSS, PkgObj) // (from opcode) + External (_PR_.PR00.TPSS, PkgObj) // (from opcode) + External (_PR_.TRPD, UnknownObj) // (from opcode) + External (_PR_.TRPF, UnknownObj) // (from opcode) + External (_SB_.GGIV, MethodObj) // 1 Arguments (from opcode) + External (_SB_.GGOV, MethodObj) // 1 Arguments (from opcode) + External (_SB_.IETM, DeviceObj) // (from opcode) + External (_SB_.IETM.DPTE, UnknownObj) // (from opcode) + External (_SB_.PCI0.B0D4.NPCC, PkgObj) // (from opcode) + External (_SB_.PCI0.CTCD, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.CTCN, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.GFX0, DeviceObj) // (from opcode) + External (_SB_.PCI0.GFX0.AINT, MethodObj) // 2 Arguments (from opcode) + External (_SB_.PCI0.GFX0.ALSI, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.CBLV, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.CDCK, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.CLID, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.DD1F, DeviceObj) // (from opcode) + External (_SB_.PCI0.GFX0.DRDY, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.GSCI, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.GFX0.GSSE, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.IUEH, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.GFX0.STAT, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.TCHE, UnknownObj) // (from opcode) + External (_SB_.PCI0.GFX0.VLOC, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.HDAS.PPMS, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.HDAS.PS0X, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.HDAS.PS3X, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.HIDW, MethodObj) // 4 Arguments (from opcode) + External (_SB_.PCI0.HIWC, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.ISP0, DeviceObj) // (from opcode) + External (_SB_.PCI0.LPCB.EC__.HKEY.DYTC, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.LPCB.H_EC.XDAT, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.PAUD.PUAM, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.PEG0, DeviceObj) // (from opcode) + External (_SB_.PCI0.PEG0.PEGP, DeviceObj) // (from opcode) + External (_SB_.PCI0.PEG0.PG00.PEGP, DeviceObj) // (from opcode) + External (_SB_.PCI0.PEG1, DeviceObj) // (from opcode) + External (_SB_.PCI0.PEG1.PG01.PEGP, DeviceObj) // (from opcode) + External (_SB_.PCI0.PEG2, DeviceObj) // (from opcode) + External (_SB_.PCI0.PEG2.PG02.PEGP, DeviceObj) // (from opcode) + External (_SB_.PCI0.PTDP, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP01.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP01.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP01.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP02.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP02.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP02.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP02.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP03.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP03.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP03.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP03.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP04.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP04.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP04.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP04.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP05.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP05.PWRG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP05.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP05.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP05.RSTG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.SCLK, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP06.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP06.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP06.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP07.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP07.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP07.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP07.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP08.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP08.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP08.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP08.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP09.PEGP.NVST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP09.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP09.PWRG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP09.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP09.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP09.RSTG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.SCLK, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP10.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP10.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP10.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP11.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP11.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP11.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP11.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP12.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP12.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP12.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP12.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP13.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP13.PWRG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP13.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP13.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP13.RSTG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.SCLK, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP14.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP14.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP14.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP15.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP15.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP15.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP15.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP16.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP16.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP16.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP16.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP17.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP17.PWRG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP17.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP17.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP17.RSTG, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.SCLK, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP18.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP18.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP18.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP19.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP19.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP19.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP19.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP20.PON_, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP20.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP20.PXSX.WGST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP20.PXSX.WIST, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.SAT0.NVM1.VLPM, UnknownObj) // (from opcode) + External (_SB_.PCI0.SAT0.NVM2.VLPM, UnknownObj) // (from opcode) + External (_SB_.PCI0.SAT0.NVM3.VLPM, UnknownObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRIM, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRIM.GTME, IntObj) // (from opcode) + External (_SB_.PCI0.SAT0.SCND, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.SCND.GTME, IntObj) // (from opcode) + External (_SB_.PCI0.SAT0.SCND.MSTR, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.SDSM, MethodObj) // 4 Arguments (from opcode) + External (_SB_.PCI0.XHC_.DUAM, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.XHC_.PS0X, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.XHC_.PS3X, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.XHC_.RHUB.INIR, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.XHC_.RHUB.PS0X, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.XHC_.RHUB.PS2X, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.XHC_.RHUB.PS3X, MethodObj) // 0 Arguments (from opcode) + External (_SB_.SGOV, MethodObj) // 2 Arguments (from opcode) + External (_SB_.TBFP, MethodObj) // 1 Arguments (from opcode) + External (_SB_.TPM_.PTS_, MethodObj) // 1 Arguments (from opcode) + External (_SB_.UBTC.NTFY, MethodObj) // 0 Arguments (from opcode) + External (_TZ_.ETMD, IntObj) // (from opcode) + External (_TZ_.TZ00, DeviceObj) // (from opcode) + External (_TZ_.TZ01, DeviceObj) // (from opcode) + External (ADBG, MethodObj) // 1 Arguments (from opcode) + External (ALSE, UnknownObj) // (from opcode) + External (BNUM, UnknownObj) // (from opcode) + External (BRTL, UnknownObj) // (from opcode) + External (CFGD, UnknownObj) // (from opcode) + External (DIDX, UnknownObj) // (from opcode) + External (DX2H, MethodObj) // 2 Arguments (from opcode) + External (GSMI, UnknownObj) // (from opcode) + External (IGDS, UnknownObj) // (from opcode) + External (LHIH, UnknownObj) // (from opcode) + External (LIDS, UnknownObj) // (from opcode) + External (LLOW, UnknownObj) // (from opcode) + External (M32B, UnknownObj) // (from opcode) + External (M32L, UnknownObj) // (from opcode) + External (M64B, UnknownObj) // (from opcode) + External (M64L, UnknownObj) // (from opcode) + External (MBGS, MethodObj) // 1 Arguments (from opcode) + External (MMRP, MethodObj) // 1 Arguments (from opcode) + External (MMTB, MethodObj) // 1 Arguments (from opcode) + External (ODV0, IntObj) // (from opcode) + External (ODV1, IntObj) // (from opcode) + External (ODV2, IntObj) // (from opcode) + External (ODV3, IntObj) // (from opcode) + External (ODV4, IntObj) // (from opcode) + External (ODV5, IntObj) // (from opcode) + External (ODV6, IntObj) // (from opcode) + External (ODV7, IntObj) // (from opcode) + External (ODV8, IntObj) // (from opcode) + External (ODV9, IntObj) // (from opcode) + External (ODVA, IntObj) // (from opcode) + External (ODVB, IntObj) // (from opcode) + External (ODVC, IntObj) // (from opcode) + External (ODVD, IntObj) // (from opcode) + External (ODVE, IntObj) // (from opcode) + External (ODVF, IntObj) // (from opcode) + External (ODVG, IntObj) // (from opcode) + External (ODVH, IntObj) // (from opcode) + External (ODVI, IntObj) // (from opcode) + External (ODVJ, IntObj) // (from opcode) + External (PC00, IntObj) // (from opcode) + External (PC01, UnknownObj) // (from opcode) + External (PC02, UnknownObj) // (from opcode) + External (PC03, UnknownObj) // (from opcode) + External (PC04, UnknownObj) // (from opcode) + External (PC05, UnknownObj) // (from opcode) + External (PC06, UnknownObj) // (from opcode) + External (PC07, UnknownObj) // (from opcode) + External (PC08, UnknownObj) // (from opcode) + External (PC09, UnknownObj) // (from opcode) + External (PC10, UnknownObj) // (from opcode) + External (PC11, UnknownObj) // (from opcode) + External (PC12, UnknownObj) // (from opcode) + External (PC13, UnknownObj) // (from opcode) + External (PC14, UnknownObj) // (from opcode) + External (PC15, UnknownObj) // (from opcode) + External (PTTB, UnknownObj) // (from opcode) + External (SGMD, UnknownObj) // (from opcode) + External (STDV, IntObj) // (from opcode) + External (TBTD, MethodObj) // 1 Arguments (from opcode) + External (TBTF, MethodObj) // 1 Arguments (from opcode) + + Name (MBUF, Buffer (0x4000){}) + OperationRegion (MDBR, SystemMemory, 0x5B535018, 0x00004008) + Field (MDBR, AnyAcc, Lock, Preserve) + { + ASLD, 1, + LDBG, 7, + BUFN, 16, + Offset (0x04), + MDG0, 131072 + } + + Method (DX2H, 2, Serialized) + { + If (ASLD) + { + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + DB2H (Arg1) + } + Case (0x01) + { + DW2H (Arg1) + } + Case (0x02) + { + DD2H (Arg1) + } + + } + } + } + + Method (DB2H, 1, Serialized) + { + SHOW (Arg0) + MDGC (0x20) + Store (MBUF, MDG0) + } + + Method (DW2H, 1, Serialized) + { + Store (Arg0, Local0) + ShiftRight (Arg0, 0x08, Local1) + And (Local0, 0xFF, Local0) + And (Local1, 0xFF, Local1) + DB2H (Local1) + Decrement (BUFN) + DB2H (Local0) + } + + Method (DD2H, 1, Serialized) + { + Store (Arg0, Local0) + ShiftRight (Arg0, 0x10, Local1) + And (Local0, 0xFFFF, Local0) + And (Local1, 0xFFFF, Local1) + DW2H (Local1) + Decrement (BUFN) + DW2H (Local0) + } + + Method (MBGS, 1, Serialized) + { + If (ASLD) + { + Store (SizeOf (Arg0), Local0) + Name (BUFS, Buffer (Local0){}) + Store (Arg0, BUFS) + MDGC (0x20) + While (Local0) + { + MDGC (DerefOf (Index (BUFS, Subtract (SizeOf (Arg0), Local0)))) + Decrement (Local0) + } + + Store (MBUF, MDG0) + } + } + + Method (SHOW, 1, Serialized) + { + MDGC (NTOC (ShiftRight (Arg0, 0x04))) + MDGC (NTOC (Arg0)) + } + + Method (LINE, 0, Serialized) + { + Store (BUFN, Local0) + And (Local0, 0x0F, Local0) + While (Local0) + { + MDGC (0x00) + Increment (Local0) + And (Local0, 0x0F, Local0) + } + } + + Method (MDGC, 1, Serialized) + { + Store (Arg0, Index (MBUF, BUFN)) + Add (BUFN, 0x01, BUFN) + If (LGreater (BUFN, Subtract (0x4000, 0x01))) + { + Store (0x00, BUFN) + } + } + + Method (UP_L, 1, Serialized) + { + Store (Arg0, Local2) + ShiftLeft (Local2, 0x04, Local2) + MOVE (Local2) + Subtract (0x4000, Local2, Local3) + While (Local2) + { + Store (0x00, Index (MBUF, Local3)) + Increment (Local3) + Decrement (Local2) + } + } + + Method (MOVE, 1, Serialized) + { + Store (Arg0, Local4) + Store (0x00, BUFN) + Subtract (0x4000, Local4, Local5) + While (Local5) + { + Decrement (Local5) + Store (DerefOf (Index (MBUF, Local4)), Index (MBUF, BUFN)) + Increment (BUFN) + Increment (Local4) + } + } + + Method (NTOC, 1, Serialized) + { + And (Arg0, 0x0F, Local0) + If (LLess (Local0, 0x0A)) + { + Add (Local0, 0x30, Local0) + } + Else + { + Add (Local0, 0x37, Local0) + } + + Return (Local0) + } + + Name (SS1, 0x00) + Name (SS2, 0x00) + Name (SS3, One) + One + Name (SS4, One) + One + OperationRegion (GNVS, SystemMemory, 0x5B557000, 0x0771) + Field (GNVS, AnyAcc, Lock, Preserve) + { + OSYS, 16, + SMIF, 8, + PRM0, 8, + PRM1, 8, + SCIF, 8, + PRM2, 8, + PRM3, 8, + LCKF, 8, + PRM4, 8, + PRM5, 8, + P80D, 32, + PWRS, 8, + DBGS, 8, + THOF, 8, + ACT1, 8, + ACTT, 8, + PSVT, 8, + TC1V, 8, + TC2V, 8, + TSPV, 8, + CRTT, 8, + DTSE, 8, + DTS1, 8, + DTS2, 8, + DTSF, 8, + Offset (0x1E), + BNUM, 8, + Offset (0x20), + Offset (0x21), + Offset (0x22), + Offset (0x23), + Offset (0x24), + Offset (0x25), + REVN, 8, + APIC, 8, + TCNT, 8, + PCP0, 8, + PCP1, 8, + PPCM, 8, + PPMF, 32, + C67L, 8, + NATP, 8, + CMAP, 8, + CMBP, 8, + LPTP, 8, + FDCP, 8, + CMCP, 8, + CIRP, 8, + SMSC, 8, + W381, 8, + SMC1, 8, + EMAE, 8, + EMAP, 16, + EMAL, 16, + MEFE, 8, + DSTS, 8, + MORD, 8, + TCGP, 8, + PPRP, 32, + PPRQ, 8, + LPPR, 8, + IDEM, 8, + PLID, 8, + BTYP, 8, + OSCC, 8, + NEXP, 8, + SBV1, 8, + SBV2, 8, + ECON, 8, + DSEN, 8, + GPIC, 8, + CTYP, 8, + L01C, 8, + VFN0, 8, + VFN1, 8, + VFN2, 8, + VFN3, 8, + VFN4, 8, + VFN5, 8, + VFN6, 8, + VFN7, 8, + VFN8, 8, + VFN9, 8, + ATMC, 8, + PTMC, 8, + PNHM, 32, + TBAL, 32, + TBAH, 32, + RTIP, 8, + TSOD, 8, + PFLV, 8, + BREV, 8, + PDTS, 8, + PKGA, 8, + PAMT, 8, + AC0F, 8, + AC1F, 8, + DTS3, 8, + DTS4, 8, + LTR1, 8, + LTR2, 8, + LTR3, 8, + LTR4, 8, + LTR5, 8, + LTR6, 8, + LTR7, 8, + LTR8, 8, + LTR9, 8, + LTRA, 8, + LTRB, 8, + LTRC, 8, + LTRD, 8, + LTRE, 8, + LTRF, 8, + LTRG, 8, + LTRH, 8, + LTRI, 8, + LTRJ, 8, + LTRK, 8, + LTRL, 8, + LTRM, 8, + LTRN, 8, + LTRO, 8, + OBF1, 8, + OBF2, 8, + OBF3, 8, + OBF4, 8, + OBF5, 8, + OBF6, 8, + OBF7, 8, + OBF8, 8, + OBF9, 8, + OBFA, 8, + OBFB, 8, + OBFC, 8, + OBFD, 8, + OBFE, 8, + OBFF, 8, + OBFG, 8, + OBFH, 8, + OBFI, 8, + OBFJ, 8, + OBFK, 8, + OBFL, 8, + OBFM, 8, + OBFN, 8, + OBFO, 8, + XTUB, 32, + XTUS, 32, + XMPB, 32, + DDRF, 8, + RTD3, 8, + PEP0, 8, + PEP3, 8, + DPTF, 8, + DCFE, 16, + SADE, 8, + SACR, 8, + SAHT, 8, + CPUS, 8, + CTDP, 8, + LPMP, 8, + LPMV, 8, + ECEU, 8, + TGFG, 16, + MEMD, 8, + ATRA, 8, + PTRA, 8, + MEMC, 8, + MEMH, 8, + FND1, 8, + FND2, 8, + AMBD, 8, + AMAT, 8, + AMPT, 8, + AMCT, 8, + AMHT, 8, + SKDE, 8, + SKAT, 8, + SKPT, 8, + SKCT, 8, + SKHT, 8, + EFDE, 8, + EFAT, 8, + EFPT, 8, + EFCT, 8, + EFHT, 8, + VRDE, 8, + VRAT, 8, + VRPT, 8, + VRCT, 8, + VRHT, 8, + DPAP, 8, + DPPP, 8, + DPCP, 8, + DCMP, 8, + TRTV, 8, + LPOE, 8, + LPOP, 8, + LPOS, 8, + LPOW, 8, + LPER, 8, + PPSZ, 32, + DISE, 8, + BGMA, 64, + BGMS, 8, + BGIA, 16, + IRMC, 8, + NFCE, 8, + CHEN, 8, + S0ID, 8, + CTDB, 8, + DKSM, 8, + SIO1, 16, + SIO2, 16, + SPBA, 16, + SEC0, 32, + SEC1, 32, + SEC2, 32, + SEC3, 32, + SEC4, 32, + SEC5, 32, + SEC6, 32, + SEC7, 32, + SEC8, 32, + Offset (0x1F4), + WIFD, 8, + WFAT, 8, + WFPT, 8, + WFCT, 8, + WFHT, 8, + PWRE, 8, + Offset (0x1FC), + PPPR, 16, + PBPE, 8, + VSPE, 8, + Offset (0x203), + XHPR, 8, + RIC0, 8, + GBSX, 8, + IUBE, 8, + IUCE, 8, + IUDE, 8, + ECNO, 8, + AUDD, 16, + IC0D, 16, + IC1D, 16, + IC1S, 16, + VRRD, 16, + PSCP, 8, + I20D, 16, + I21D, 16, + RCG0, 16, + RCG1, 16, + ECDB, 8, + P2ME, 8, + P2MK, 8, + SSH0, 16, + SSL0, 16, + SSD0, 16, + FMH0, 16, + FML0, 16, + FMD0, 16, + FPH0, 16, + FPL0, 16, + FPD0, 16, + SSH1, 16, + SSL1, 16, + SSD1, 16, + FMH1, 16, + FML1, 16, + FMD1, 16, + FPH1, 16, + FPL1, 16, + FPD1, 16, + M0C0, 16, + M1C0, 16, + M2C0, 16, + M0C1, 16, + M1C1, 16, + M2C1, 16, + M0C2, 16, + M1C2, 16, + M0C3, 16, + M1C3, 16, + M0C4, 16, + M1C4, 16, + M0C5, 16, + M1C5, 16, + TBSF, 8, + GIRQ, 32, + DMTP, 8, + DMTD, 8, + DMSH, 8, + SHSB, 8, + PLCS, 8, + PLVL, 16, + GN1E, 8, + G1AT, 8, + G1PT, 8, + G1CT, 8, + G1HT, 8, + GN2E, 8, + G2AT, 8, + G2PT, 8, + G2CT, 8, + G2HT, 8, + WWSD, 8, + CVSD, 8, + SSDD, 8, + INLD, 8, + IFAT, 8, + IFPT, 8, + IFCT, 8, + IFHT, 8, + SDWE, 8, + USBH, 8, + BCV4, 8, + WTV0, 8, + WTV1, 8, + APFU, 8, + SOHP, 8, + GP5F, 8, + NOHP, 8, + TBSE, 8, + WKFN, 8, + PEPC, 32, + VRSD, 16, + PB1E, 8, + GNID, 8, + WAND, 8, + WWAT, 8, + WWPT, 8, + WWCT, 8, + WWHT, 8, + Offset (0x2A3), + MPL0, 16, + CHGE, 8, + SAC3, 8, + MEM3, 8, + AMC3, 8, + SKC3, 8, + EFC3, 8, + VRC3, 8, + WFC3, 8, + G1C3, 8, + G2C3, 8, + IFC3, 8, + WWC3, 8, + WGC3, 8, + SPST, 8, + PERE, 8, + PEAT, 8, + PEPV, 8, + PECR, 8, + PEC3, 8, + PEHT, 8, + GN3E, 8, + G3AT, 8, + G3PT, 8, + G3CT, 8, + G3HT, 8, + GN4E, 8, + G4AT, 8, + G4PT, 8, + G4CT, 8, + G4HT, 8, + GN5E, 8, + G5AT, 8, + G5PT, 8, + G5CT, 8, + G5HT, 8, + GN6E, 8, + G6AT, 8, + G6PT, 8, + G6CT, 8, + G6HT, 8, + ECLP, 8, + G3C3, 8, + G4C3, 8, + G5C3, 8, + G6C3, 8, + TSP1, 8, + TSP2, 8, + TSP3, 8, + TSP4, 8, + TSP5, 8, + TSP6, 8, + TSP7, 8, + TSP8, 8, + SSP1, 8, + SSP2, 8, + SSP3, 8, + SSP4, 8, + SSP5, 8, + SSP6, 8, + SSP7, 8, + SSP8, 8, + MEMS, 8, + STGE, 8, + STAT, 8, + STPT, 8, + STCT, 8, + STC3, 8, + STHT, 8, + VSP1, 8, + V1AT, 8, + V1PV, 8, + V1CR, 8, + V1C3, 8, + V1HT, 8, + VSP2, 8, + V2AT, 8, + V2PV, 8, + V2CR, 8, + V2C3, 8, + V2HT, 8, + S1DE, 8, + S1AT, 8, + S1PT, 8, + S1CT, 8, + S1HT, 8, + S2DE, 8, + S2AT, 8, + S2PT, 8, + S2CT, 8, + S2HT, 8, + S3DE, 8, + S3AT, 8, + S3PT, 8, + S3CT, 8, + S3HT, 8, + S4DE, 8, + S4AT, 8, + S4PT, 8, + S4CT, 8, + S4HT, 8, + S5DE, 8, + S5AT, 8, + S5PT, 8, + S5CT, 8, + S5HT, 8, + S6DE, 8, + S6AT, 8, + S6PT, 8, + S6CT, 8, + S6HT, 8, + S7DE, 8, + S7AT, 8, + S7PT, 8, + S7CT, 8, + S7HT, 8, + S1S3, 8, + S2S3, 8, + S3S3, 8, + S4S3, 8, + S5S3, 8, + S6S3, 8, + S7S3, 8, + ICAE, 8, + PSME, 8, + PDT1, 8, + PLM1, 32, + PTW1, 32, + PDT2, 8, + PLM2, 32, + PTW2, 32, + DDT1, 8, + DDP1, 8, + DLI1, 16, + DPL1, 16, + DTW1, 32, + DMI1, 16, + DMA1, 16, + DMT1, 16, + DDT2, 8, + DDP2, 8, + DLI2, 16, + DPL2, 16, + DTW2, 32, + DMI2, 16, + DMA2, 16, + DMT2, 16, + WIFE, 8, + DOM1, 8, + LIM1, 16, + TIM1, 32, + DOM2, 8, + LIM2, 16, + TIM2, 32, + DOM3, 8, + LIM3, 16, + TIM3, 32, + TRD0, 8, + TRL0, 8, + TRD1, 8, + TRL1, 8, + WDM1, 8, + CID1, 16, + WDM2, 8, + CID2, 16, + Offset (0x378), + APPE, 8, + MPL1, 16, + MPL2, 16, + SDS0, 8, + SDS1, 8, + SDS2, 8, + SDS3, 8, + SDS4, 8, + SDS5, 8, + SDS6, 8, + SDS7, 8, + SDS8, 8, + SDS9, 8, + SDSA, 8, + TPLB, 8, + TPLH, 16, + WTVX, 8, + WITX, 8, + GPTD, 8, + GDBT, 16, + UTKX, 8, + SPTD, 8, + GEXN, 8, + TBTS, 8, + TBWS, 8, + AICS, 8, + TARS, 8, + FPAT, 8, + FPEN, 8, + FPGN, 32, + FPLV, 8, + CPAD, 16, + CPAB, 8, + TNAT, 8, + CPGN, 32, + CF2T, 8, + TDGS, 8, + DCSC, 8, + DCKE, 8, + UDCK, 8, + SUDK, 8, + OHPN, 8, + GHPN, 8, + EGPC, 32, + EGPV, 8, + TBDT, 32, + ATLB, 32, + SDM0, 8, + SDM1, 8, + SDM2, 8, + SDM3, 8, + SDM4, 8, + SDM5, 8, + SDM6, 8, + SDM7, 8, + SDM8, 8, + SDM9, 8, + SDMA, 8, + USTP, 8, + SSHI, 16, + SSLI, 16, + SSDI, 16, + FMHI, 16, + FMLI, 16, + FMDI, 16, + FPHI, 16, + FPLI, 16, + FPDI, 16, + M0CI, 16, + M1CI, 16, + M0CS, 16, + M1CS, 16, + M0CU, 16, + M1CU, 16, + CAMT, 8, + IVDF, 8, + IFWG, 64, + IVWS, 8, + IVPR, 8, + DIVO, 16, + DIVF, 16, + IVAD, 8, + IVRS, 8, + IVDG, 64, + DSPR, 8, + DDSO, 16, + DDSF, 16, + DSAD, 8, + DSRS, 8, + DVDG, 64, + EIDF, 8, + GFPS, 32, + GFPI, 32, + GNSM, 8, + GNSC, 8, + GGNR, 32, + GBTW, 32, + GBTK, 32, + GBTI, 32, + GPDI, 32, + GPLI, 32, + CL00, 8, + CL01, 8, + CL02, 8, + CL03, 8, + L0EN, 8, + L1EN, 8, + L2EN, 8, + L3EN, 8, + CDIV, 8, + C0TP, 8, + C0CV, 8, + C0GP, 8, + C0IB, 8, + C0IA, 16, + C0P0, 8, + C0P1, 8, + C0P2, 8, + C0P3, 8, + C0G0, 8, + C0G1, 8, + C0G2, 8, + C0G3, 8, + C0F0, 8, + C0F1, 8, + C0F2, 8, + C0F3, 8, + C0A0, 8, + C0A1, 8, + C0A2, 8, + C0A3, 8, + C0I0, 8, + C0I1, 8, + C0I2, 8, + C0I3, 8, + C0PL, 8, + C1TP, 8, + C1CV, 8, + C1GP, 8, + C1IB, 8, + C1IA, 16, + C1P0, 8, + C1P1, 8, + C1P2, 8, + C1P3, 8, + C1G0, 8, + C1G1, 8, + C1G2, 8, + C1G3, 8, + C1F0, 8, + C1F1, 8, + C1F2, 8, + C1F3, 8, + C1A0, 8, + C1A1, 8, + C1A2, 8, + C1A3, 8, + C1I0, 8, + C1I1, 8, + C1I2, 8, + C1I3, 8, + C1PL, 8, + C2TP, 8, + C2CV, 8, + C2GP, 8, + C2IB, 8, + C2IA, 16, + C2P0, 8, + C2P1, 8, + C2P2, 8, + C2P3, 8, + C2G0, 8, + C2G1, 8, + C2G2, 8, + C2G3, 8, + C2F0, 8, + C2F1, 8, + C2F2, 8, + C2F3, 8, + C2A0, 8, + C2A1, 8, + C2A2, 8, + C2A3, 8, + C2I0, 8, + C2I1, 8, + C2I2, 8, + C2I3, 8, + C2PL, 8, + C3TP, 8, + C3CV, 8, + C3GP, 8, + C3IB, 8, + C3IA, 16, + C3P0, 8, + C3P1, 8, + C3P2, 8, + C3P3, 8, + C3G0, 8, + C3G1, 8, + C3G2, 8, + C3G3, 8, + C3F0, 8, + C3F1, 8, + C3F2, 8, + C3F3, 8, + C3A0, 8, + C3A1, 8, + C3A2, 8, + C3A3, 8, + C3I0, 8, + C3I1, 8, + C3I2, 8, + C3I3, 8, + C3PL, 8, + L0SM, 8, + L0H0, 8, + L0H1, 8, + L0H2, 8, + L0H3, 8, + L0H4, 8, + L0H5, 8, + L0H6, 8, + L0H7, 8, + L0H8, 8, + L0PL, 8, + L0M0, 8, + L0M1, 8, + L0M2, 8, + L0M3, 8, + L0M4, 8, + L0M5, 8, + L0M6, 8, + L0M7, 8, + L0M8, 8, + L0M9, 8, + L0MA, 8, + L0MB, 8, + L0MC, 8, + L0MD, 8, + L0ME, 8, + L0MF, 8, + L0DI, 8, + L0BS, 8, + L0A0, 16, + L0A1, 16, + L0A2, 16, + L0A3, 16, + L0A4, 16, + L0A5, 16, + L0A6, 16, + L0A7, 16, + L0A8, 16, + L0A9, 16, + L0AA, 16, + L0AB, 16, + L0D0, 8, + L0D1, 8, + L0D2, 8, + L0D3, 8, + L0D4, 8, + L0D5, 8, + L0D6, 8, + L0D7, 8, + L0D8, 8, + L0D9, 8, + L0DA, 8, + L0DB, 8, + L0DV, 8, + L0CV, 8, + L0LU, 8, + L0NL, 8, + L0EE, 8, + L0VC, 8, + L0FS, 8, + L0DG, 8, + L0C0, 8, + L0C1, 8, + L0C2, 8, + L0C3, 8, + L0CK, 32, + L0CL, 8, + L1SM, 8, + L1H0, 8, + L1H1, 8, + L1H2, 8, + L1H3, 8, + L1H4, 8, + L1H5, 8, + L1H6, 8, + L1H7, 8, + L1H8, 8, + L1PL, 8, + L1M0, 8, + L1M1, 8, + L1M2, 8, + L1M3, 8, + L1M4, 8, + L1M5, 8, + L1M6, 8, + L1M7, 8, + L1M8, 8, + L1M9, 8, + L1MA, 8, + L1MB, 8, + L1MC, 8, + L1MD, 8, + L1ME, 8, + L1MF, 8, + L1DI, 8, + L1BS, 8, + L1A0, 16, + L1A1, 16, + L1A2, 16, + L1A3, 16, + L1A4, 16, + L1A5, 16, + L1A6, 16, + L1A7, 16, + L1A8, 16, + L1A9, 16, + L1AA, 16, + L1AB, 16, + L1D0, 8, + L1D1, 8, + L1D2, 8, + L1D3, 8, + L1D4, 8, + L1D5, 8, + L1D6, 8, + L1D7, 8, + L1D8, 8, + L1D9, 8, + L1DA, 8, + L1DB, 8, + L1DV, 8, + L1CV, 8, + L1LU, 8, + L1NL, 8, + L1EE, 8, + L1VC, 8, + L1FS, 8, + L1DG, 8, + L1C0, 8, + L1C1, 8, + L1C2, 8, + L1C3, 8, + L1CK, 32, + L1CL, 8, + L2SM, 8, + L2H0, 8, + L2H1, 8, + L2H2, 8, + L2H3, 8, + L2H4, 8, + L2H5, 8, + L2H6, 8, + L2H7, 8, + L2H8, 8, + L2PL, 8, + L2M0, 8, + L2M1, 8, + L2M2, 8, + L2M3, 8, + L2M4, 8, + L2M5, 8, + L2M6, 8, + L2M7, 8, + L2M8, 8, + L2M9, 8, + L2MA, 8, + L2MB, 8, + L2MC, 8, + L2MD, 8, + L2ME, 8, + L2MF, 8, + L2DI, 8, + L2BS, 8, + L2A0, 16, + L2A1, 16, + L2A2, 16, + L2A3, 16, + L2A4, 16, + L2A5, 16, + L2A6, 16, + L2A7, 16, + L2A8, 16, + L2A9, 16, + L2AA, 16, + L2AB, 16, + L2D0, 8, + L2D1, 8, + L2D2, 8, + L2D3, 8, + L2D4, 8, + L2D5, 8, + L2D6, 8, + L2D7, 8, + L2D8, 8, + L2D9, 8, + L2DA, 8, + L2DB, 8, + L2DV, 8, + L2CV, 8, + L2LU, 8, + L2NL, 8, + L2EE, 8, + L2VC, 8, + L2FS, 8, + L2DG, 8, + L2C0, 8, + L2C1, 8, + L2C2, 8, + L2C3, 8, + L2CK, 32, + L2CL, 8, + L3SM, 8, + L3H0, 8, + L3H1, 8, + L3H2, 8, + L3H3, 8, + L3H4, 8, + L3H5, 8, + L3H6, 8, + L3H7, 8, + L3H8, 8, + L3PL, 8, + L3M0, 8, + L3M1, 8, + L3M2, 8, + L3M3, 8, + L3M4, 8, + L3M5, 8, + L3M6, 8, + L3M7, 8, + L3M8, 8, + L3M9, 8, + L3MA, 8, + L3MB, 8, + L3MC, 8, + L3MD, 8, + L3ME, 8, + L3MF, 8, + L3DI, 8, + L3BS, 8, + L3A0, 16, + L3A1, 16, + L3A2, 16, + L3A3, 16, + L3A4, 16, + L3A5, 16, + L3A6, 16, + L3A7, 16, + L3A8, 16, + L3A9, 16, + L3AA, 16, + L3AB, 16, + L3D0, 8, + L3D1, 8, + L3D2, 8, + L3D3, 8, + L3D4, 8, + L3D5, 8, + L3D6, 8, + L3D7, 8, + L3D8, 8, + L3D9, 8, + L3DA, 8, + L3DB, 8, + L3DV, 8, + L3CV, 8, + L3LU, 8, + L3NL, 8, + L3EE, 8, + L3VC, 8, + L3FS, 8, + L3DG, 8, + L3C0, 8, + L3C1, 8, + L3C2, 8, + L3C3, 8, + L3CK, 32, + L3CL, 8, + ECR1, 8, + Offset (0x60E), + I2SC, 8, + ODV0, 8, + ODV1, 8, + ODV2, 8, + ODV3, 8, + ODV4, 8, + ODV5, 8, + UBCB, 32, + EMOD, 8, + WIFC, 8, + Offset (0x622), + TPLS, 8, + TPDB, 8, + TPDH, 16, + TPDS, 8, + ADPM, 32, + AG1L, 64, + AG1H, 64, + AG2L, 64, + AG2H, 64, + AG3L, 64, + AG3H, 64, + HEFE, 8, + XDCE, 8, + STXE, 8, + STX0, 8, + STX1, 8, + STX2, 8, + STX3, 8, + STX4, 8, + STX5, 8, + STX6, 8, + STX7, 8, + STX8, 8, + STX9, 8, + RTVM, 8, + USTC, 8, + BATP, 8, + TSDB, 8, + DEPC, 8, + PDFC, 8, + IVCM, 8, + HEB1, 32, + RBY1, 8, + RBY2, 8, + SCSS, 8, + HAID, 8, + NCTC, 8, + NCTI, 8, + NCTH, 8, + HSIO, 8, + TPPT, 8, + SHAP, 8, + EIAP, 8, + ZPOD, 8, + SRSP, 32, + CEDS, 8, + EHK3, 8, + EHK4, 8, + EHK5, 8, + EHK6, 8, + EHK7, 8, + EHK8, 8, + VBVP, 8, + VBVD, 8, + VBHB, 8, + VBRL, 8, + SMSS, 8, + VBST, 8, + ADAS, 8, + PPBG, 32, + AEAB, 8, + AHDB, 8, + PBSD, 8, + DPLL, 8, + DPHL, 8, + PWIG, 8, + MESE, 8, + ICAT, 8, + ICPV, 8, + ICCR, 8, + ICC3, 8, + ICHT, 8, + XSMI, 32, + PAPE, 32, + PSTW, 32, + MWLR, 32, + UP8P, 32, + MS2R, 32, + MS2P, 32, + UCSI, 8, + UCG1, 32, + UCG2, 32, + WGUR, 32, + WRFE, 8, + WRC1, 8, + WRC2, 8, + WRC3, 8, + WRC4, 8, + AWVI, 32, + Offset (0x6E0), + WTSP, 8, + WGWS, 8, + PIDE, 8, + C0VE, 8, + C0W0, 8, + C0W1, 8, + C0W2, 8, + C0W3, 8, + C0W4, 8, + C0W5, 8, + C1VE, 8, + C1W0, 8, + C1W1, 8, + C1W2, 8, + C1W3, 8, + C1W4, 8, + C1W5, 8, + C2VE, 8, + C2W0, 8, + C2W1, 8, + C2W2, 8, + C2W3, 8, + C2W4, 8, + C2W5, 8, + C3VE, 8, + C3W0, 8, + C3W1, 8, + C3W2, 8, + C3W3, 8, + C3W4, 8, + C3W5, 8, + L0LE, 8, + L0PP, 8, + L0VR, 8, + L1LE, 8, + L1PP, 8, + L1VR, 8, + L2LE, 8, + L2PP, 8, + L2VR, 8, + L3LE, 8, + L3PP, 8, + L3VR, 8, + WLRP, 8, + SSRP, 8, + WIPR, 8, + TBS1, 8, + TBMP, 8, + FPA1, 8, + FPE1, 8, + FPG1, 32, + FP1L, 8, + CPD1, 16, + CPB1, 8, + CPG1, 32, + UTCM, 8, + USME, 8, + UPT1, 8, + UPT2, 8, + TWIN, 8, + TRWA, 8, + PEWE, 8, + ODV6, 8, + ODV7, 8, + ODV8, 8, + ODV9, 8, + ODVA, 8, + ODVB, 8, + ODVC, 8, + ODVD, 8, + ODVE, 8, + ODVF, 8, + ODVG, 8, + ODVH, 8, + ODVI, 8, + ODVJ, 8, + Offset (0x74E), + ELPM, 32, + ELPS, 32, + Offset (0x758), + UCRT, 8, + TBOD, 16, + TSXW, 8, + VRGP, 32, + PVSC, 8, + RTBT, 8, + RTBC, 8, + TBCD, 16, + TBTE, 8, + RWAN, 8, + WDCT, 16, + WLCT, 16, + WDC2, 16, + WMXS, 16, + WMNS, 16 + } + + Scope (\_SB) + { + Name (PR00, Package (0x21) + { + Package (0x04) + { + 0x001FFFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x001FFFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0x0017FFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0x0002FFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x0004FFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x0005FFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0x0008FFFF, + 0x00, + LNKA, + 0x00 + } + }) + Name (AR00, Package (0x2D) + { + Package (0x04) + { + 0x001FFFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x001FFFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x001EFFFF, + 0x00, + 0x00, + 0x14 + }, + + Package (0x04) + { + 0x001EFFFF, + 0x01, + 0x00, + 0x15 + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + 0x00, + 0x16 + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + 0x00, + 0x17 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x0019FFFF, + 0x00, + 0x00, + 0x20 + }, + + Package (0x04) + { + 0x0019FFFF, + 0x01, + 0x00, + 0x21 + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + 0x00, + 0x22 + }, + + Package (0x04) + { + 0x0017FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x0015FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0015FFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x0013FFFF, + 0x00, + 0x00, + 0x14 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0x0002FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0004FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0005FFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0x0008FFFF, + 0x00, + 0x00, + 0x10 + } + }) + Name (PR04, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKD, + 0x00 + } + }) + Name (AR04, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x13 + } + }) + Name (PR05, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKA, + 0x00 + } + }) + Name (AR05, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x10 + } + }) + Name (PR06, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKB, + 0x00 + } + }) + Name (AR06, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x11 + } + }) + Name (PR07, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKC, + 0x00 + } + }) + Name (AR07, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x12 + } + }) + Name (PR08, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKD, + 0x00 + } + }) + Name (AR08, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x13 + } + }) + Name (PR09, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKA, + 0x00 + } + }) + Name (AR09, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x10 + } + }) + Name (PR0E, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKB, + 0x00 + } + }) + Name (AR0E, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x11 + } + }) + Name (PR0F, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKC, + 0x00 + } + }) + Name (AR0F, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x12 + } + }) + Name (PR02, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKD, + 0x00 + } + }) + Name (AR02, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x13 + } + }) + Name (PR0A, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKB, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKA, + 0x00 + } + }) + Name (AR0A, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x11 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x10 + } + }) + Name (PR0B, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + LNKC, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + LNKD, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKA, + 0x00 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKB, + 0x00 + } + }) + Name (AR0B, Package (0x04) + { + Package (0x04) + { + 0xFFFF, + 0x00, + 0x00, + 0x12 + }, + + Package (0x04) + { + 0xFFFF, + 0x01, + 0x00, + 0x13 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + 0x00, + 0x10 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + 0x00, + 0x11 + } + }) + Name (PRSA, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, ) + {3,4,5,6,10,11,12,14,15} + }) + Alias (PRSA, PRSB) + Alias (PRSA, PRSC) + Alias (PRSA, PRSD) + Alias (PRSA, PRSE) + Alias (PRSA, PRSF) + Alias (PRSA, PRSG) + Alias (PRSA, PRSH) + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A08")) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03")) // _CID: Compatible ID + Name (_ADR, 0x00) // _ADR: Address + Method (^BN00, 0, NotSerialized) + { + Return (0x00) + } + + Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number + { + Return (BN00 ()) + } + + Name (_UID, 0x00) // _UID: Unique ID + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR00 ()) + } + + Return (PR00 ()) + } + + OperationRegion (HBUS, PCI_Config, 0x00, 0x0100) + Field (HBUS, DWordAcc, NoLock, Preserve) + { + Offset (0x40), + EPEN, 1, + , 11, + EPBR, 20, + Offset (0x48), + MHEN, 1, + , 14, + MHBR, 17, + Offset (0x50), + GCLK, 1, + Offset (0x54), + D0EN, 1, + D1F2, 1, + D1F1, 1, + D1F0, 1, + Offset (0x60), + PXEN, 1, + PXSZ, 2, + , 23, + PXBR, 6, + Offset (0x68), + DIEN, 1, + , 11, + DIBR, 20, + Offset (0x70), + , 20, + MEBR, 12, + Offset (0x80), + PMLK, 1, + , 3, + PM0H, 2, + Offset (0x81), + PM1L, 2, + , 2, + PM1H, 2, + Offset (0x82), + PM2L, 2, + , 2, + PM2H, 2, + Offset (0x83), + PM3L, 2, + , 2, + PM3H, 2, + Offset (0x84), + PM4L, 2, + , 2, + PM4H, 2, + Offset (0x85), + PM5L, 2, + , 2, + PM5H, 2, + Offset (0x86), + PM6L, 2, + , 2, + PM6H, 2, + Offset (0x87), + Offset (0xA8), + , 20, + TUUD, 19, + Offset (0xBC), + , 20, + TLUD, 12, + Offset (0xC8), + , 7, + HTSE, 1 + } + + Name (BUF0, ResourceTemplate () + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, _Y00) + DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0x00000CF7, // Range Maximum + 0x00000000, // Translation Offset + 0x00000CF8, // Length + ,, , TypeStatic, DenseTranslation) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x00000000, // Granularity + 0x00000D00, // Range Minimum + 0x0000FFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x0000F300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000C0000, // Range Minimum + 0x000C3FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000C4000, // Range Minimum + 0x000C7FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000C8000, // Range Minimum + 0x000CBFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y03, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000CC000, // Range Minimum + 0x000CFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y04, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000D0000, // Range Minimum + 0x000D3FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y05, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000D4000, // Range Minimum + 0x000D7FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y06, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000D8000, // Range Minimum + 0x000DBFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y07, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000DC000, // Range Minimum + 0x000DFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y08, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000E0000, // Range Minimum + 0x000E3FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y09, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000E4000, // Range Minimum + 0x000E7FFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y0A, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000E8000, // Range Minimum + 0x000EBFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y0B, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000EC000, // Range Minimum + 0x000EFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00004000, // Length + ,, _Y0C, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000F0000, // Range Minimum + 0x000FFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00010000, // Length + ,, _Y0D, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xDFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xE0000000, // Length + ,, _Y0E, AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000010000, // Range Minimum + 0x000000000001FFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000000010000, // Length + ,, _Y0F, AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xFD000000, // Range Minimum + 0xFE7FFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x01800000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Name (EP_B, 0x00) + Name (MH_B, 0x00) + Name (PC_B, 0x00) + Name (PC_L, 0x00) + Name (DM_B, 0x00) + Method (GEPB, 0, Serialized) + { + If (LEqual (EP_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.EPBR, 0x0C, EP_B) + } + + Return (EP_B) + } + + Method (GMHB, 0, Serialized) + { + If (LEqual (MH_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.MHBR, 0x0F, MH_B) + } + + Return (MH_B) + } + + Method (GPCB, 0, Serialized) + { + If (LEqual (PC_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.PXBR, 0x1A, PC_B) + } + + Return (PC_B) + } + + Method (GPCL, 0, Serialized) + { + If (LEqual (PC_L, 0x00)) + { + ShiftRight (0x10000000, \_SB.PCI0.PXSZ, PC_L) + } + + Return (PC_L) + } + + Method (GDMB, 0, Serialized) + { + If (LEqual (DM_B, 0x00)) + { + ShiftLeft (\_SB.PCI0.DIBR, 0x0C, DM_B) + } + + Return (DM_B) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Store (\_SB.PCI0.GPCL (), Local0) + CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address + Store (Subtract (ShiftRight (Local0, 0x14), 0x02), PBMX) + CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length + Store (Subtract (ShiftRight (Local0, 0x14), 0x01), PBLN) + If (PM1L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length + Store (Zero, C0LN) + } + + If (LEqual (PM1L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status + Store (Zero, C0RW) + } + + If (PM1H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length + Store (Zero, C4LN) + } + + If (LEqual (PM1H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status + Store (Zero, C4RW) + } + + If (PM2L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length + Store (Zero, C8LN) + } + + If (LEqual (PM2L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status + Store (Zero, C8RW) + } + + If (PM2H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length + Store (Zero, CCLN) + } + + If (LEqual (PM2H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status + Store (Zero, CCRW) + } + + If (PM3L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length + Store (Zero, D0LN) + } + + If (LEqual (PM3L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status + Store (Zero, D0RW) + } + + If (PM3H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length + Store (Zero, D4LN) + } + + If (LEqual (PM3H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status + Store (Zero, D4RW) + } + + If (PM4L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length + Store (Zero, D8LN) + } + + If (LEqual (PM4L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status + Store (Zero, D8RW) + } + + If (PM4H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length + Store (Zero, DCLN) + } + + If (LEqual (PM4H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status + Store (Zero, DCRW) + } + + If (PM5L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length + Store (Zero, E0LN) + } + + If (LEqual (PM5L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status + Store (Zero, E0RW) + } + + If (PM5H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length + Store (Zero, E4LN) + } + + If (LEqual (PM5H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status + Store (Zero, E4RW) + } + + If (PM6L) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length + Store (Zero, E8LN) + } + + If (LEqual (PM6L, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status + Store (Zero, E8RW) + } + + If (PM6H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length + Store (Zero, ECLN) + } + + If (LEqual (PM6H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status + Store (Zero, ECRW) + } + + If (PM0H) + { + CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length + Store (Zero, F0LN) + } + + If (LEqual (PM0H, 0x01)) + { + CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status + Store (Zero, F0RW) + } + + CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address + CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address + CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length + Store (M32L, M1LN) + Store (M32B, M1MN) + Subtract (Add (M1MN, M1LN), 0x01, M1MX) + If (LEqual (M64L, 0x00)) + { + CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, MSLN) // _LEN: Length + Store (0x00, MSLN) + } + Else + { + CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, M2LN) // _LEN: Length + CreateQWordField (BUF0, \_SB.PCI0._Y0F._MIN, M2MN) // _MIN: Minimum Base Address + CreateQWordField (BUF0, \_SB.PCI0._Y0F._MAX, M2MX) // _MAX: Maximum Base Address + Store (M64L, M2LN) + Store (M64B, M2MN) + Subtract (Add (M2MN, M2LN), 0x01, M2MX) + } + + Return (BUF0) + } + + Name (GUID, ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */) + Name (SUPP, 0x00) + Name (CTRL, 0x00) + Name (XCNT, 0x00) + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Store (Arg3, Local0) + CreateDWordField (Local0, 0x00, CDW1) + CreateDWordField (Local0, 0x04, CDW2) + CreateDWordField (Local0, 0x08, CDW3) + If (LEqual (Arg0, GUID)) + { + Store (CDW2, SUPP) + Store (CDW3, CTRL) + If (LEqual (NEXP, 0x00)) + { + And (CTRL, 0xFFFFFFE0, CTRL) + } + ElseIf (LEqual (TBTS, 0x01)) + { + And (CTRL, 0xFFFFFFF7, CTRL) + } + + If (Not (And (CDW1, 0x01))) + { + If (And (CTRL, 0x01)) + { + NHPG () + } + + If (And (CTRL, 0x04)) + { + NPME () + } + } + + If (LNotEqual (Arg1, One)) + { + Or (CDW1, 0x08, CDW1) + } + + If (LNotEqual (CDW3, CTRL)) + { + Or (CDW1, 0x10, CDW1) + } + + Store (CTRL, CDW3) + Store (CTRL, OSCC) + Return (Local0) + } + Else + { + Or (CDW1, 0x04, CDW1) + Return (Local0) + } + } + + Scope (\_SB.PCI0) + { + Method (AR00, 0, NotSerialized) + { + Return (\_SB.AR00) + } + + Method (PR00, 0, NotSerialized) + { + Return (\_SB.PR00) + } + + Method (AR02, 0, NotSerialized) + { + Return (\_SB.AR02) + } + + Method (PR02, 0, NotSerialized) + { + Return (\_SB.PR02) + } + + Method (AR04, 0, NotSerialized) + { + Return (\_SB.AR04) + } + + Method (PR04, 0, NotSerialized) + { + Return (\_SB.PR04) + } + + Method (AR05, 0, NotSerialized) + { + Return (\_SB.AR05) + } + + Method (PR05, 0, NotSerialized) + { + Return (\_SB.PR05) + } + + Method (AR06, 0, NotSerialized) + { + Return (\_SB.AR06) + } + + Method (PR06, 0, NotSerialized) + { + Return (\_SB.PR06) + } + + Method (AR07, 0, NotSerialized) + { + Return (\_SB.AR07) + } + + Method (PR07, 0, NotSerialized) + { + Return (\_SB.PR07) + } + + Method (AR08, 0, NotSerialized) + { + Return (\_SB.AR08) + } + + Method (PR08, 0, NotSerialized) + { + Return (\_SB.PR08) + } + + Method (AR09, 0, NotSerialized) + { + Return (\_SB.AR09) + } + + Method (PR09, 0, NotSerialized) + { + Return (\_SB.PR09) + } + + Method (AR0A, 0, NotSerialized) + { + Return (\_SB.AR0A) + } + + Method (PR0A, 0, NotSerialized) + { + Return (\_SB.PR0A) + } + + Method (AR0B, 0, NotSerialized) + { + Return (\_SB.AR0B) + } + + Method (PR0B, 0, NotSerialized) + { + Return (\_SB.PR0B) + } + + Device (PEG0) + { + Name (_ADR, 0x00010000) // _ADR: Address + Device (PEGP) + { + Name (_ADR, 0x00) // _ADR: Address + } + } + + Device (PEG1) + { + Name (_ADR, 0x00010001) // _ADR: Address + Device (PEGP) + { + Name (_ADR, 0x00) // _ADR: Address + } + } + + Device (PEG2) + { + Name (_ADR, 0x00010002) // _ADR: Address + Device (PEGP) + { + Name (_ADR, 0x00) // _ADR: Address + } + } + + Device (GFX0) + { + Name (_ADR, 0x00020000) // _ADR: Address + } + + Device (B0D4) + { + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Name (_ADR, 0x00040000) // _ADR: Address + } + + Device (ISP0) + { + Name (_ADR, 0x00050000) // _ADR: Address + } + } + } + } + + If (LEqual (ECR1, 0x01)) + { + Scope (\_SB.PCI0) + { + Name (PCIG, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */) + Method (PCID, 4, Serialized) + { + If (LEqual (Arg0, PCIG)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + If (LEqual (Arg2, 0x00)) + { + Return (Buffer (0x02) + { + 0x01, 0x03 + }) + } + + If (LEqual (Arg2, 0x08)) + { + Return (0x01) + } + + If (LEqual (Arg2, 0x09)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + + Scope (\_SB.PCI0) + { + Method (PCIC, 1, Serialized) + { + If (LEqual (ECR1, 0x01)) + { + If (LEqual (Arg0, PCIG)) + { + Return (0x01) + } + } + + Return (0x00) + } + } + + Name (PNVB, 0x5B567018) + Name (PNVL, 0x0287) + OperationRegion (PNVA, SystemMemory, PNVB, PNVL) + Field (PNVA, AnyAcc, Lock, Preserve) + { + PCHS, 16, + PCHG, 16, + RPA1, 32, + RPA2, 32, + RPA3, 32, + RPA4, 32, + RPA5, 32, + RPA6, 32, + RPA7, 32, + RPA8, 32, + RPA9, 32, + RPAA, 32, + RPAB, 32, + RPAC, 32, + RPAD, 32, + RPAE, 32, + RPAF, 32, + RPAG, 32, + RPAH, 32, + RPAI, 32, + RPAJ, 32, + RPAK, 32, + RPAL, 32, + RPAM, 32, + RPAN, 32, + RPAO, 32, + NHLA, 64, + NHLL, 32, + ADFM, 32, + SBRG, 32, + GPEM, 32, + G2L0, 32, + G2L1, 32, + G2L2, 32, + G2L3, 32, + G2L4, 32, + G2L5, 32, + G2L6, 32, + G2L7, 32, + G2L8, 32, + G2L9, 32, + PML1, 16, + PML2, 16, + PML3, 16, + PML4, 16, + PML5, 16, + PML6, 16, + PML7, 16, + PML8, 16, + PML9, 16, + PMLA, 16, + PMLB, 16, + PMLC, 16, + PMLD, 16, + PMLE, 16, + PMLF, 16, + PMLG, 16, + PMLH, 16, + PMLI, 16, + PMLJ, 16, + PMLK, 16, + PMLL, 16, + PMLM, 16, + PMLN, 16, + PMLO, 16, + PNL1, 16, + PNL2, 16, + PNL3, 16, + PNL4, 16, + PNL5, 16, + PNL6, 16, + PNL7, 16, + PNL8, 16, + PNL9, 16, + PNLA, 16, + PNLB, 16, + PNLC, 16, + PNLD, 16, + PNLE, 16, + PNLF, 16, + PNLG, 16, + PNLH, 16, + PNLI, 16, + PNLJ, 16, + PNLK, 16, + PNLL, 16, + PNLM, 16, + PNLN, 16, + PNLO, 16, + U0C0, 32, + U1C0, 32, + XHPC, 8, + XRPC, 8, + XSPC, 8, + XSPA, 8, + HPTB, 32, + HPTE, 8, + SMD0, 8, + SMD1, 8, + SMD2, 8, + SMD3, 8, + SMD4, 8, + SMD5, 8, + SMD6, 8, + SMD7, 8, + SMD8, 8, + SMD9, 8, + SMDA, 8, + SIR0, 8, + SIR1, 8, + SIR2, 8, + SIR3, 8, + SIR4, 8, + SIR5, 8, + SIR6, 8, + SIR7, 8, + SIR8, 8, + SIR9, 8, + SIRA, 8, + SB00, 64, + SB01, 64, + SB02, 64, + SB03, 64, + SB04, 64, + SB05, 64, + SB06, 64, + SB07, 64, + SB08, 64, + SB09, 64, + SB0A, 64, + SB10, 64, + SB11, 64, + SB12, 64, + SB13, 64, + SB14, 64, + SB15, 64, + SB16, 64, + SB17, 64, + SB18, 64, + SB19, 64, + SB1A, 64, + GPEN, 8, + SGIR, 8, + NIT1, 8, + NIT2, 8, + NIT3, 8, + NPM1, 8, + NPM2, 8, + NPM3, 8, + NPC1, 8, + NPC2, 8, + NPC3, 8, + NL11, 16, + NL12, 16, + NL13, 16, + ND21, 8, + ND22, 8, + ND23, 8, + ND11, 32, + ND12, 32, + ND13, 32, + NLR1, 16, + NLR2, 16, + NLR3, 16, + NLD1, 32, + NLD2, 32, + NLD3, 32, + NEA1, 16, + NEA2, 16, + NEA3, 16, + NEB1, 16, + NEB2, 16, + NEB3, 16, + NEC1, 16, + NEC2, 16, + NEC3, 16, + NRA1, 16, + NRA2, 16, + NRA3, 16, + NMB1, 32, + NMB2, 32, + NMB3, 32, + NMV1, 32, + NMV2, 32, + NMV3, 32, + NPB1, 32, + NPB2, 32, + NPB3, 32, + NPV1, 32, + NPV2, 32, + NPV3, 32, + NRP1, 32, + NRP2, 32, + NRP3, 32, + Offset (0x262), + SXRB, 32, + SXRS, 32, + CIOE, 8, + CIOI, 8, + TAEN, 8, + TIRQ, 8, + XWMB, 32, + EMH4, 8, + EMDS, 8, + CSKU, 8, + ITA0, 16, + ITA1, 16, + ITA2, 16, + ITA3, 16, + ITS0, 8, + ITS1, 8, + ITS2, 8, + ITS3, 8, + PMBS, 16, + PWRM, 32 + } + + Scope (\_SB) + { + Name (GPCL, Package (0x08) + { + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x04C0, + 0xD4, + 0x30, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x04C0, + 0xD4, + 0x30, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0580, + 0xD8, + 0x40, + 0x0148 + }, + + Package (0x06) + { + 0x00AC0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AC0000, + 0x08, + 0x04C0, + 0xD4, + 0x30, + 0x0144 + }, + + Package (0x06) + { + 0x00AD0000, + 0x0C, + 0x0400, + 0xD0, + 0x20, + 0x0140 + } + }) + Name (GPCH, Package (0x0A) + { + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AF0000, + 0x18, + 0x04C0, + 0xD4, + 0x2C, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x04C0, + 0xD4, + 0x2C, + 0x0144 + }, + + Package (0x06) + { + 0x00AE0000, + 0x0D, + 0x0580, + 0xD8, + 0x38, + 0x0148 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x05E8, + 0xDC, + 0x40, + 0x014C + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x06A8, + 0xE0, + 0x4C, + 0x0150 + }, + + Package (0x06) + { + 0x00AE0000, + 0x18, + 0x0768, + 0xE4, + 0x58, + 0x0154 + }, + + Package (0x06) + { + 0x00AC0000, + 0x0B, + 0x0400, + 0xD0, + 0x20, + 0x0140 + }, + + Package (0x06) + { + 0x00AD0000, + 0x0C, + 0x0400, + 0xD0, + 0x20, + 0x0140 + } + }) + Name (RXEV, Package (0x0A) + { + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x18){}, + Buffer (0x0B){}, + Buffer (0x0C){} + }) + } + + Scope (\_SB) + { + Method (GINF, 2, NotSerialized) + { + If (LEqual (PCHS, SPTL)) + { + Return (DerefOf (Index (DerefOf (Index (GPCL, Arg0)), Arg1))) + } + Else + { + Return (DerefOf (Index (DerefOf (Index (GPCH, Arg0)), Arg1))) + } + } + + Method (GMXG, 0, NotSerialized) + { + If (LEqual (PCHS, SPTL)) + { + Return (0x08) + } + Else + { + Return (0x0A) + } + } + + Method (GADR, 2, NotSerialized) + { + Store (Add (GINF (Arg0, 0x00), SBRG), Local0) + Store (GINF (Arg0, Arg1), Local1) + Return (Add (Local0, Local1)) + } + + Method (GNUM, 1, NotSerialized) + { + Store (GNMB (Arg0), Local0) + Store (GGRP (Arg0), Local1) + Return (Add (Local0, Multiply (Local1, 0x18))) + } + + Method (INUM, 1, NotSerialized) + { + Store (GNMB (Arg0), Local1) + Store (GGRP (Arg0), Local2) + Store (0x00, Local3) + While (LLess (Local3, Local2)) + { + Add (GINF (Local3, 0x01), Local1, Local1) + Increment (Local3) + } + + Return (Add (0x18, Mod (Local1, 0x60))) + } + + Method (GGRP, 1, Serialized) + { + ShiftRight (And (Arg0, 0x00FF0000), 0x10, Local0) + Return (Local0) + } + + Method (GNMB, 1, Serialized) + { + Return (And (Arg0, 0xFFFF)) + } + + Method (GGPE, 1, NotSerialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + If (LEqual (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03), 0x00)) + { + Return (0x6F) + } + Else + { + Store (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03), Local2) + Return (Add (Multiply (Subtract (Local2, 0x01), 0x20), Local1)) + } + } + + Method (GPC0, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) + } + + Method (SPC0, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg1, TEMP) + } + + Method (GPC1, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), 0x04), Local2) + OperationRegion (PDW1, SystemMemory, Local2, 0x04) + Field (PDW1, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) + } + + Method (SPC1, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), 0x04), Local2) + OperationRegion (PDW1, SystemMemory, Local2, 0x04) + Field (PDW1, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg1, TEMP) + } + + Method (SRXO, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 28, + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) + } + + Method (GGIV, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 1, + TEMP, 1, + Offset (0x04) + } + + Return (TEMP) + } + + Method (GGOV, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 1, + Offset (0x04) + } + + Return (TEMP) + } + + Method (SGOV, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) + } + + Method (GGII, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 23, + TEMP, 1, + Offset (0x04) + } + + Return (TEMP) + } + + Method (SGII, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 23, + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) + } + + Method (GPMV, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 10, + TEMP, 3, + Offset (0x04) + } + + Return (TEMP) + } + + Method (SPMV, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 10, + TEMP, 3, + Offset (0x04) + } + + Store (Arg1, TEMP) + } + + Method (GHPO, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Add (GADR (Local0, 0x03), Multiply (ShiftRight (Local1, 0x05), 0x04), Local3) + And (Local1, 0x1F, Local4) + OperationRegion (PREG, SystemMemory, Local3, 0x04) + Field (PREG, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (And (ShiftRight (TEMP, Local4), 0x01)) + } + + Method (SHPO, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Add (GADR (Local0, 0x03), Multiply (ShiftRight (Local1, 0x05), 0x04), Local3) + And (Local1, 0x1F, Local4) + OperationRegion (PREG, SystemMemory, Local3, 0x04) + Field (PREG, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + If (Arg1) + { + Or (TEMP, ShiftLeft (0x01, Local4), TEMP) + } + Else + { + And (TEMP, Not (ShiftLeft (0x01, Local4)), TEMP) + } + } + + Method (GGPO, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x04), Multiply (ShiftRight (Local1, 0x03), 0x04)), Local2) + OperationRegion (PREG, SystemMemory, Local2, 0x04) + Field (PREG, AnyAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (And (ShiftRight (TEMP, Multiply (And (Local1, 0x07), 0x04)), 0x03)) + } + + Method (SGRA, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 20, + TEMP, 1, + Offset (0x04) + } + + Store (Arg1, TEMP) + } + + Method (SGWP, 2, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), 0x04), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 10, + TEMP, 4, + Offset (0x04) + } + + Store (Arg1, TEMP) + } + + Method (UGPS, 0, Serialized) + { + } + + Method (CGPS, 0, Serialized) + { + } + + Method (CGLS, 0, Serialized) + { + } + + Method (CAGS, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Multiply (ShiftRight (Local1, 0x05), 0x04, Local4) + If (LEqual (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03), 0x00)) + { + OperationRegion (GPPX, SystemMemory, Add (GADR (Local0, 0x05), Local4), 0x04) + Field (GPPX, AnyAcc, NoLock, Preserve) + { + STSX, 32 + } + + ShiftLeft (0x01, Mod (Local1, 0x20), Local2) + Store (Local2, STSX) + } + } + + Method (ISME, 1, NotSerialized) + { + If (LNotEqual (And (ShiftRight (GPEM, Multiply (Arg0, 0x02)), 0x03), 0x00)) + { + Return (0x00) + } + + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Add (GADR (Local0, 0x05), Multiply (ShiftRight (Local1, 0x05), 0x04), Local2) + And (Local1, 0x1F, Local3) + OperationRegion (GPPX, SystemMemory, Local2, 0x24) + Field (GPPX, AnyAcc, NoLock, Preserve) + { + STSX, 32, + Offset (0x20), + GENX, 32 + } + + Return (And (ShiftRight (And (STSX, GENX), Local3), 0x01)) + } + + Method (DIPI, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 9, + RDIS, 1, + , 15, + RCFG, 2, + Offset (0x04) + } + + If (LNotEqual (RCFG, 0x02)) + { + Store (RCFG, Index (DerefOf (Index (RXEV, Local0)), Local1)) + Store (0x02, RCFG) + Store (0x01, RDIS) + } + } + + Method (UIPI, 1, Serialized) + { + Store (GGRP (Arg0), Local0) + Store (GNMB (Arg0), Local1) + Store (Add (GADR (Local0, 0x02), Multiply (Local1, 0x08)), Local2) + OperationRegion (PDW0, SystemMemory, Local2, 0x04) + Field (PDW0, AnyAcc, NoLock, Preserve) + { + , 9, + RDIS, 1, + , 15, + RCFG, 2, + Offset (0x04) + } + + Store (DerefOf (Index (DerefOf (Index (RXEV, Local0)), Local1)), Local3) + If (LNotEqual (Local3, 0x02)) + { + Store (0x00, RDIS) + Store (Local3, RCFG) + } + } + } + + Scope (\) + { + Method (THEN, 0, Serialized) + { + OperationRegion (THBA, SystemMemory, 0xFE200000, 0x10) + Field (THBA, DWordAcc, NoLock, Preserve) + { + DO00, 32 + } + + Return (LNotEqual (DO00, 0xFFFFFFFF)) + } + + Method (THDA, 2, Serialized) + { + Store (0xFE200000, Local0) + Add (Local0, Multiply (0x40, Multiply (0x80, Subtract (Arg0, 0x20))), Local0) + Add (Local0, Multiply (0x40, Arg1), Local0) + Return (Local0) + } + + Method (STRD, 3, Serialized) + { + If (LGreater (Add (Arg1, Arg2), SizeOf (Arg0))) + { + Return (0x00) + } + + ToBuffer (Arg0, Local3) + Store (0x00, Local0) + Store (0x00, Local1) + While (LLess (Local1, Arg2)) + { + Store (DerefOf (Index (Local3, Add (Arg1, Local1))), Local2) + Add (Local0, ShiftLeft (Local2, Multiply (0x08, Local1)), Local0) + Increment (Local1) + } + + Return (Local0) + } + + Method (THDS, 1, Serialized) + { + If (LNot (THEN ())) + { + Return (Zero) + } + + Concatenate (Arg0, "\n", Local2) + Store (SizeOf (Local2), Local0) + Store (THDA (0x20, 0x16), Local1) + OperationRegion (THBA, SystemMemory, Local1, 0x40) + Field (THBA, QWordAcc, NoLock, Preserve) + { + QO00, 64 + } + + Field (THBA, DWordAcc, NoLock, Preserve) + { + DO00, 32, + Offset (0x10), + DO10, 32, + Offset (0x30), + DO30, 32 + } + + Field (THBA, WordAcc, NoLock, Preserve) + { + WO00, 16 + } + + Field (THBA, ByteAcc, NoLock, Preserve) + { + BO00, 8 + } + + Store (0x01000242, DO10) + Store (Local0, WO00) + Store (0x00, Local6) + Store (Local0, Local7) + While (LGreaterEqual (Local7, 0x08)) + { + Store (STRD (Local2, Local6, 0x08), QO00) + Add (Local6, 0x08, Local6) + Subtract (Local7, 0x08, Local7) + } + + If (LGreaterEqual (Local7, 0x04)) + { + Store (STRD (Local2, Local6, 0x04), DO00) + Add (Local6, 0x04, Local6) + Subtract (Local7, 0x04, Local7) + } + + If (LGreaterEqual (Local7, 0x02)) + { + Store (STRD (Local2, Local6, 0x02), WO00) + Add (Local6, 0x02, Local6) + Subtract (Local7, 0x02, Local7) + } + + If (LGreaterEqual (Local7, 0x01)) + { + Store (STRD (Local2, Local6, 0x01), BO00) + Add (Local6, 0x01, Local6) + Subtract (Local7, 0x01, Local7) + } + + Store (0x00, DO30) + } + + Method (THDH, 1, Serialized) + { + THDS (ToHexString (Arg0)) + } + + Method (THDD, 1, Serialized) + { + THDS (ToDecimalString (Arg0)) + } + } + + Name (SPTH, 0x01) + Name (SPTL, 0x02) + Method (PCHV, 0, NotSerialized) + { + If (LEqual (PCHS, 0x01)) + { + Return (SPTH) + } + + If (LEqual (PCHS, 0x02)) + { + Return (SPTL) + } + + Return (0x00) + } + + Scope (\_GPE) + { + Method (_L6D, 0, Serialized) // _Lxx: Level-Triggered GPE + { + \_SB.PCI0.XHC.GPEH () + \_SB.PCI0.HDAS.GPEH () + \_SB.PCI0.GLAN.GPEH () + \_SB.PCI0.XDCI.GPEH () + } + } + + Scope (\_SB.PCI0) + { + Name (TEMP, 0x00) + Device (PRRE) + { + Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID + Name (_UID, "PCHRESV") // _UID: Unique ID + Name (_STA, 0x03) // _STA: Status + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0xFD000000, // Address Base + 0x00AC0000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFDAD0000, // Address Base + 0x00010000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFDB00000, // Address Base + 0x00500000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE000000, // Address Base + 0x00020000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE036000, // Address Base + 0x00006000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE03D000, // Address Base + 0x003C3000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFE410000, // Address Base + 0x003F0000, // Address Length + ) + }) + Return (BUF0) + } + } + + Device (IOTR) + { + Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID + Name (_UID, "IoTraps") // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Store (Buffer (0x02) + { + 0x79, 0x00 + }, Local0) + Name (BUF0, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y10) + }) + Name (BUF1, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y11) + }) + Name (BUF2, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y12) + }) + Name (BUF3, ResourceTemplate () + { + IO (Decode16, + 0x0000, // Range Minimum + 0x0000, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + _Y13) + }) + CreateWordField (BUF0, \_SB.PCI0.IOTR._CRS._Y10._MIN, AMI0) // _MIN: Minimum Base Address + CreateWordField (BUF0, \_SB.PCI0.IOTR._CRS._Y10._MAX, AMA0) // _MAX: Maximum Base Address + CreateWordField (BUF1, \_SB.PCI0.IOTR._CRS._Y11._MIN, AMI1) // _MIN: Minimum Base Address + CreateWordField (BUF1, \_SB.PCI0.IOTR._CRS._Y11._MAX, AMA1) // _MAX: Maximum Base Address + CreateWordField (BUF2, \_SB.PCI0.IOTR._CRS._Y12._MIN, AMI2) // _MIN: Minimum Base Address + CreateWordField (BUF2, \_SB.PCI0.IOTR._CRS._Y12._MAX, AMA2) // _MAX: Maximum Base Address + CreateWordField (BUF3, \_SB.PCI0.IOTR._CRS._Y13._MIN, AMI3) // _MIN: Minimum Base Address + CreateWordField (BUF3, \_SB.PCI0.IOTR._CRS._Y13._MAX, AMA3) // _MAX: Maximum Base Address + Store (ITA0, AMI0) + Store (ITA0, AMA0) + Store (ITA1, AMI1) + Store (ITA1, AMA1) + Store (ITA2, AMI2) + Store (ITA2, AMA2) + Store (ITA3, AMI3) + Store (ITA3, AMA3) + If (LEqual (ITS0, 0x01)) + { + ConcatenateResTemplate (Local0, BUF0, Local1) + Store (Local1, Local0) + } + + If (LEqual (ITS1, 0x01)) + { + ConcatenateResTemplate (Local0, BUF1, Local1) + Store (Local1, Local0) + } + + If (LEqual (ITS2, 0x01)) + { + ConcatenateResTemplate (Local0, BUF2, Local1) + Store (Local1, Local0) + } + + If (LEqual (ITS3, 0x01)) + { + ConcatenateResTemplate (Local0, BUF3, Local1) + Store (Local1, Local0) + } + + Return (Local0) + } + } + + Device (LPCB) + { + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + OperationRegion (LPC, PCI_Config, 0x00, 0x0100) + Field (LPC, AnyAcc, NoLock, Preserve) + { + Offset (0x02), + CDID, 16, + Offset (0x08), + CRID, 8, + Offset (0x80), + IOD0, 8, + IOD1, 8, + Offset (0xA0), + , 9, + PRBL, 1, + Offset (0xDC), + , 2, + ESPI, 1 + } + } + + Device (PPMC) + { + Name (_ADR, 0x001F0002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + + Device (SBUS) + { + Name (_ADR, 0x001F0004) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + + Scope (\_SB) + { + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PARC, 0x80, \_SB.PARC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSA) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLA, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y14) + {} + }) + CreateWordField (RTLA, \_SB.LNKA._CRS._Y14._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PARC, 0x0F), IRQ0) + Return (RTLA) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PARC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PARC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PBRC, 0x80, \_SB.PBRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSB) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLB, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y15) + {} + }) + CreateWordField (RTLB, \_SB.LNKB._CRS._Y15._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PBRC, 0x0F), IRQ0) + Return (RTLB) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PBRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PBRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PCRC, 0x80, \_SB.PCRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSC) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLC, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y16) + {} + }) + CreateWordField (RTLC, \_SB.LNKC._CRS._Y16._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PCRC, 0x0F), IRQ0) + Return (RTLC) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PCRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PCRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PDRC, 0x80, \_SB.PDRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSD) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLD, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y17) + {} + }) + CreateWordField (RTLD, \_SB.LNKD._CRS._Y17._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PDRC, 0x0F), IRQ0) + Return (RTLD) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PDRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PDRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PERC, 0x80, \_SB.PERC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSE) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLE, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y18) + {} + }) + CreateWordField (RTLE, \_SB.LNKE._CRS._Y18._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PERC, 0x0F), IRQ0) + Return (RTLE) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PERC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PERC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PFRC, 0x80, \_SB.PFRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSF) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLF, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y19) + {} + }) + CreateWordField (RTLF, \_SB.LNKF._CRS._Y19._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PFRC, 0x0F), IRQ0) + Return (RTLF) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PFRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PFRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PGRC, 0x80, \_SB.PGRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSG) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLG, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y1A) + {} + }) + CreateWordField (RTLG, \_SB.LNKG._CRS._Y1A._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PGRC, 0x0F), IRQ0) + Return (RTLG) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PGRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PGRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID + Name (_UID, 0x08) // _UID: Unique ID + Method (_DIS, 0, Serialized) // _DIS: Disable Device + { + Or (\_SB.PHRC, 0x80, \_SB.PHRC) + } + + Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings + { + Return (PRSH) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RTLH, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared, _Y1B) + {} + }) + CreateWordField (RTLH, \_SB.LNKH._CRS._Y1B._INT, IRQ0) // _INT: Interrupts + Store (Zero, IRQ0) + ShiftLeft (0x01, And (\_SB.PHRC, 0x0F), IRQ0) + Return (RTLH) + } + + Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings + { + CreateWordField (Arg0, 0x01, IRQ0) + FindSetRightBit (IRQ0, Local0) + Decrement (Local0) + Store (Local0, \_SB.PHRC) + } + + Method (_STA, 0, Serialized) // _STA: Status + { + If (And (\_SB.PHRC, 0x80)) + { + Return (0x09) + } + Else + { + Return (0x0B) + } + } + } + } + + Scope (\) + { + Method (PCRR, 2, Serialized) + { + Add (ShiftLeft (Arg0, 0x10), Arg1, Local0) + Add (SBRG, Local0, Local0) + OperationRegion (PCR0, SystemMemory, Local0, 0x04) + Field (PCR0, DWordAcc, Lock, Preserve) + { + DAT0, 32 + } + + Return (DAT0) + } + + Method (PCRW, 3, Serialized) + { + Add (ShiftLeft (Arg0, 0x10), Arg1, Local0) + Add (SBRG, Local0, Local0) + OperationRegion (PCR0, SystemMemory, Local0, 0x04) + Field (PCR0, DWordAcc, Lock, Preserve) + { + DAT0, 32 + } + + Store (Arg2, DAT0) + Store (PCRR (0xC7, 0x3418), Local0) + } + + Method (PCRO, 3, Serialized) + { + Store (PCRR (Arg0, Arg1), Local0) + Store (Or (Local0, Arg2), Local1) + PCRW (Arg0, Arg1, Local1) + } + + Method (PCRA, 3, Serialized) + { + Store (PCRR (Arg0, Arg1), Local0) + Store (And (Local0, Arg2), Local1) + PCRW (Arg0, Arg1, Local1) + } + + Method (PCAO, 4, Serialized) + { + Store (PCRR (Arg0, Arg1), Local0) + Store (Or (And (Local0, Arg2), Arg3), Local1) + PCRW (Arg0, Arg1, Local1) + } + + Name (TCBV, 0x00) + Method (TCBS, 0, NotSerialized) + { + If (LEqual (TCBV, 0x00)) + { + Store (PCRR (0xEF, 0x2778), Local0) + And (Local0, 0xFFE0, TCBV) + } + + Return (TCBV) + } + + OperationRegion (PMIO, SystemIO, PMBS, 0x60) + Field (PMIO, ByteAcc, NoLock, Preserve) + { + Offset (0x01), + PBSS, 1, + Offset (0x40), + , 17, + GPEC, 1 + } + + OperationRegion (TCBA, SystemIO, TCBS (), 0x10) + Field (TCBA, ByteAcc, NoLock, Preserve) + { + Offset (0x04), + , 9, + CPSC, 1 + } + + OperationRegion (PWMR, SystemMemory, \PWRM, 0x0800) + Field (PWMR, AnyAcc, NoLock, Preserve) + { + Offset (0xE0), + Offset (0xE2), + DWLE, 1, + HWLE, 1, + Offset (0x31C), + , 13, + SLS0, 1, + , 8, + XSQD, 1 + } + + OperationRegion (PMST, SystemMemory, PWRM, 0x80) + Field (PMST, DWordAcc, NoLock, Preserve) + { + Offset (0x18), + , 25, + USBP, 1, + Offset (0x1C), + Offset (0x1F), + PMFS, 1, + Offset (0x20), + MPMC, 32, + , 20, + UWAB, 1 + } + } + + Scope (\_SB.PCI0) + { + Device (GLAN) + { + Name (_ADR, 0x001F0006) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + OperationRegion (GLBA, PCI_Config, 0x00, 0x0100) + Field (GLBA, AnyAcc, NoLock, Preserve) + { + DVID, 16 + } + + Field (GLBA, ByteAcc, NoLock, Preserve) + { + Offset (0xCC), + Offset (0xCD), + PMEE, 1, + , 6, + PMES, 1 + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x6D, 0x04)) + } + + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (DVID, 0xFFFF)) + { + Return (Zero) + } + + If (LAnd (PMEE, PMES)) + { + Store (0x01, PMES) + Notify (GLAN, 0x02) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (XHC) + { + Name (_ADR, 0x00140000) // _ADR: Address + OperationRegion (XPRT, PCI_Config, 0x00, 0x0100) + Field (XPRT, AnyAcc, NoLock, Preserve) + { + DVID, 16, + Offset (0x10), + XADL, 32, + XADH, 32, + Offset (0x50), + , 2, + STGE, 1, + Offset (0xA2), + , 2, + D3HE, 1 + } + + Field (XPRT, ByteAcc, NoLock, Preserve) + { + Offset (0x74), + D0D3, 2, + Offset (0x75), + PMEE, 1, + , 6, + PMES, 1 + } + + Name (XFLT, 0x00) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + ADBG ("_DSM") + ShiftLeft (XADH, 0x20, Local0) + Or (Local0, XADL, Local0) + And (Local0, 0xFFFFFFFFFFFFFFF0, Local0) + OperationRegion (XMIO, SystemMemory, Local0, 0x9000) + Field (XMIO, AnyAcc, Lock, Preserve) + { + Offset (0x550), + PCCS, 1, + , 4, + PPLS, 4, + PTPP, 1, + Offset (0x8420), + PRTM, 2 + } + + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("ac340cb7-e901-45bf-b7e6-2b34ec931e23"))) + { + If (LEqual (Arg1, 0x03)) + { + Store (Arg1, XFLT) + } + + If (LAnd (LGreater (PRTM, 0x00), LOr (LEqual (Arg1, 0x05), LEqual (Arg1, 0x06)))) + { + ADBG ("SSIC") + If (LOr (LOr (LEqual (PCCS, 0x00), LEqual (PTPP, 0x00)), LAnd (LGreaterEqual (PPLS, 0x04), LLessEqual (PPLS, 0x0F)))) + { + If (LEqual (PPLS, 0x08)) + { + Store (One, D3HE) + } + Else + { + Store (Zero, D3HE) + } + } + Else + { + Store (One, D3HE) + } + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State + { + Return (0x03) + } + + Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State + { + Return (0x03) + } + + Method (_S4W, 0, NotSerialized) // _S4W: S4 Device Wake State + { + Return (0x03) + } + + Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State + { + If (LEqual (XFLT, Zero)) + { + Return (0x00) + } + Else + { + Return (0x03) + } + } + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + \_SB.PCI0.LPCB.EC.PUBS + }) + Name (_PR1, Package (0x01) // _PR1: Power Resources for D1 + { + \_SB.PCI0.LPCB.EC.PUBS + }) + Name (_PR2, Package (0x01) // _PR2: Power Resources for D2 + { + \_SB.PCI0.LPCB.EC.PUBS + }) + Name (_PRW, Package (0x03) // _PRW: Power Resources for Wake + { + 0x6D, + 0x03, + \_SB.PCI0.LPCB.EC.PUBS + }) + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (CondRefOf (\_SB.PCI0.XHC.RHUB.INIR)) + { + \_SB.PCI0.XHC.RHUB.INIR () + } + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (PMES, Local0) + Store (0x01, PMES) + If (LAnd (PMEE, Local0)) + { + Notify (XHC, 0x02) + } + } + + OperationRegion (XHCP, SystemMemory, Add (\_SB.PCI0.GPCB (), 0x000A0000), 0x0100) + Field (XHCP, AnyAcc, Lock, Preserve) + { + Offset (0x04), + PDBM, 16, + Offset (0x10), + MEMB, 64 + } + + Method (USRA, 0, Serialized) + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x0F) + } + Else + { + Return (0x0B) + } + } + + Method (SSPA, 0, Serialized) + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x11) + } + Else + { + Return (0x0D) + } + } + + Name (XRST, Zero) + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + If (LEqual (^DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (^MEMB, Local2) + Store (^PDBM, Local1) + And (^PDBM, Not (0x06), ^PDBM) + Store (0x00, D3HE) + Store (0x00, STGE) + Store (0x00, ^D0D3) + Store (\XWMB, ^MEMB) + Or (Local1, 0x02, ^PDBM) + OperationRegion (MC11, SystemMemory, \XWMB, 0x9000) + Field (MC11, DWordAcc, Lock, Preserve) + { + Offset (0x81C4), + , 2, + UPSW, 2 + } + + Store (0x00, UPSW) + And (^PDBM, Not (0x02), ^PDBM) + Store (Local2, ^MEMB) + Store (Local1, ^PDBM) + If (CondRefOf (\_SB.PCI0.XHC.PS0X)) + { + \_SB.PCI0.XHC.PS0X () + } + + If (LAnd (UWAB, LOr (LEqual (D0D3, 0x00), LEqual (\_SB.PCI0.XDCI.D0I3, 0x00)))) + { + Store (0x01, MPMC) + While (PMFS) + { + Sleep (0x0A) + } + } + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + If (LEqual (^DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (^MEMB, Local2) + Store (^PDBM, Local1) + And (^PDBM, Not (0x06), ^PDBM) + Store (0x00, ^D0D3) + Store (\XWMB, ^MEMB) + Or (Local1, 0x02, ^PDBM) + OperationRegion (MC11, SystemMemory, \XWMB, 0x9000) + Field (MC11, DWordAcc, Lock, Preserve) + { + Offset (0x81C4), + , 2, + UPSW, 2 + } + + Name (U3PS, Zero) + If (LEqual (PCHV (), SPTL)) + { + Store (0x0540, U3PS) + } + Else + { + Store (0x0580, U3PS) + } + + OperationRegion (UPSC, SystemMemory, Add (\XWMB, U3PS), 0x0100) + Field (UPSC, DWordAcc, Lock, Preserve) + { + Offset (0x03), + CAS1, 1, + Offset (0x10), + Offset (0x13), + CAS2, 1, + Offset (0x20), + Offset (0x23), + CAS3, 1, + Offset (0x30), + Offset (0x33), + CAS4, 1, + Offset (0x40), + Offset (0x43), + CAS5, 1, + Offset (0x50), + Offset (0x53), + CAS6, 1, + Offset (0x60), + Offset (0x63), + CAS7, 1, + Offset (0x70), + Offset (0x73), + CAS8, 1, + Offset (0x80), + Offset (0x83), + CAS9, 1, + Offset (0x90), + Offset (0x93), + CASA, 1 + } + + Store (0x03, UPSW) + Store (0x01, STGE) + If (LOr (LOr (LOr (LOr (LOr (LOr (CAS1, CAS2), CAS3), CAS4), CAS5), CAS6), LAnd (LEqual (PCHV (), SPTH), LOr (LOr (LOr (CAS7, CAS8), CAS9), CASA)))) + { + Store (0x00, D3HE) + Sleep (0x0A) + } + Else + { + Store (0x01, D3HE) + } + + And (^PDBM, Not (0x02), ^PDBM) + Store (0x03, ^D0D3) + Store (Local2, ^MEMB) + Store (Local1, ^PDBM) + If (CondRefOf (\_SB.PCI0.XHC.PS3X)) + { + \_SB.PCI0.XHC.PS3X () + } + + If (LAnd (UWAB, LAnd (LEqual (D0D3, 0x03), LOr (LEqual (\_SB.PCI0.XDCI.D0I3, 0x03), LEqual (\_SB.PCI0.XDCI.DVID, 0xFFFF))))) + { + Store (0x03, MPMC) + While (PMFS) + { + Sleep (0x0A) + } + } + } + + Method (CUID, 1, Serialized) + { + If (LEqual (Arg0, ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) + { + Return (0x01) + } + + Return (0x00) + } + + Device (RHUB) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + If (LEqual (\_SB.PCI0.XHC.DVID, 0xFFFF)) + { + Return (Zero) + } + + If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS0X)) + { + \_SB.PCI0.XHC.RHUB.PS0X () + } + } + + Method (_PS2, 0, Serialized) // _PS2: Power State 2 + { + If (LEqual (\_SB.PCI0.XHC.DVID, 0xFFFF)) + { + Return (Zero) + } + + If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS2X)) + { + \_SB.PCI0.XHC.RHUB.PS2X () + } + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + If (LEqual (\_SB.PCI0.XHC.DVID, 0xFFFF)) + { + Return (Zero) + } + + If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS3X)) + { + \_SB.PCI0.XHC.RHUB.PS3X () + } + } + + Device (HS01) + { + Name (_ADR, 0x01) // _ADR: Address + } + + Device (HS02) + { + Name (_ADR, 0x02) // _ADR: Address + } + + Device (HS03) + { + Name (_ADR, 0x03) // _ADR: Address + } + + Device (HS04) + { + Name (_ADR, 0x04) // _ADR: Address + } + + Device (HS05) + { + Name (_ADR, 0x05) // _ADR: Address + } + + Device (HS06) + { + Name (_ADR, 0x06) // _ADR: Address + } + + Device (HS07) + { + Name (_ADR, 0x07) // _ADR: Address + } + + Device (HS08) + { + Name (_ADR, 0x08) // _ADR: Address + } + + Device (HS09) + { + Name (_ADR, 0x09) // _ADR: Address + } + + Device (HS10) + { + Name (_ADR, 0x0A) // _ADR: Address + } + + Device (USR1) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (USRA (), 0x00)) + } + } + + Device (USR2) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (USRA (), 0x01)) + } + } + + Device (SS01) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x00)) + } + } + + Device (SS02) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x01)) + } + } + + Device (SS03) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x02)) + } + } + + Device (SS04) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x03)) + } + } + + Device (SS05) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x04)) + } + } + + Device (SS06) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x05)) + } + } + } + } + } + + If (LEqual (PCHV (), SPTH)) + { + Scope (\_SB.PCI0.XHC.RHUB) + { + Device (HS11) + { + Name (_ADR, 0x0B) // _ADR: Address + } + + Device (HS12) + { + Name (_ADR, 0x0C) // _ADR: Address + } + + Device (HS13) + { + Name (_ADR, 0x0D) // _ADR: Address + } + + Device (HS14) + { + Name (_ADR, 0x0E) // _ADR: Address + } + + Device (SS07) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x06)) + } + } + + Device (SS08) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x07)) + } + } + + Device (SS09) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x08)) + } + } + + Device (SS10) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Add (SSPA (), 0x09)) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (XDCI) + { + Name (_ADR, 0x00140001) // _ADR: Address + OperationRegion (OTGD, PCI_Config, 0x00, 0x0100) + Field (OTGD, DWordAcc, NoLock, Preserve) + { + DVID, 16, + Offset (0x10), + XDCB, 64 + } + + Field (OTGD, ByteAcc, NoLock, Preserve) + { + Offset (0x84), + D0I3, 2, + Offset (0x85), + PMEE, 1, + , 6, + PMES, 1 + } + + Method (XDBA, 0, NotSerialized) + { + Return (And (^XDCB, 0xFFFFFFFFFFFFFF00)) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"))) + { + If (LEqual (Arg1, 0x01)) + { + Method (SPPS, 2, Serialized) + { + OperationRegion (XDBW, SystemMemory, XDBA (), 0x00110000) + Field (XDBW, WordAcc, NoLock, Preserve) + { + Offset (0x10F810), + Offset (0x10F811), + U2CP, 2, + U3CP, 2, + Offset (0x10F818), + PUPS, 2, + , 1, + PURC, 1, + Offset (0x10F81A), + Offset (0x10F81C), + , 3, + UXPE, 2, + Offset (0x10F81E) + } + + Store (Arg0, Local1) + Store (Arg1, Local2) + If (LEqual (Local1, 0x00)) + { + Store (0x00, UXPE) + Store (0x00, Local0) + While (LLess (Local0, 0x0A)) + { + Stall (0x64) + Increment (Local0) + } + + Store (0x00, PUPS) + Store (0x00, Local0) + While (LLess (Local0, 0x07D0)) + { + Stall (0x64) + If (LAnd (LEqual (U2CP, 0x00), LEqual (U3CP, 0x00))) + { + Break + } + + Increment (Local0) + } + + If (LNotEqual (U2CP, 0x00)){} + If (LNotEqual (U3CP, 0x00)){} + Return (0x00) + } + + If (LEqual (Local1, 0x03)) + { + If (LNotEqual (U2CP, 0x00)){} + If (LNotEqual (U3CP, 0x00)){} + Store (0x03, PUPS) + Store (0x00, Local0) + While (LLess (Local0, 0x07D0)) + { + Stall (0x64) + If (LAnd (LEqual (U2CP, 0x03), LEqual (U3CP, 0x03))) + { + Break + } + + Increment (Local0) + } + + If (LNotEqual (U2CP, 0x03)){} + If (LNotEqual (U3CP, 0x03)){} + Store (Local2, UXPE) + Return (0x00) + } + + Return (0x00) + } + + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Return (Buffer (0x01) + { + 0xF3 + }) + } + Case (0x01) + { + Return (0x01) + } + Case (0x04) + { + Store (DerefOf (Index (Arg3, 0x00)), Local1) + SPPS (Local1, 0x00) + } + Case (0x05) + { + If (CondRefOf (\_SB.PCI0.LPCB.H_EC.XDAT)) + { + If (LEqual (\_SB.PCI0.LPCB.H_EC.XDAT (), 0x01)) + { + Notify (\_SB.PCI0.XDCI, 0x80) + } + Else + { + Notify (\_SB.PCI0.XDCI, 0x81) + } + } + + Return (0x00) + } + Case (0x06) + { + OperationRegion (XDBD, SystemMemory, XDBA (), 0x00110000) + Field (XDBD, DWordAcc, NoLock, Preserve) + { + Offset (0xC704), + , 30, + CSFR, 1, + Offset (0xC708) + } + + OperationRegion (XDW2, SystemMemory, XDBA (), 0x00110000) + Field (XDW2, WordAcc, NoLock, Preserve) + { + Offset (0x10F820), + , 13, + OTHC, 1 + } + + If (LEqual (OTHC, 0x00)) + { + Store (0x01, CSFR) + Store (0x00, Local0) + While (LLess (Local0, 0x64)) + { + If (LEqual (CSFR, 0x00)) + { + Break + } + + Sleep (0x01) + } + } + + Return (0x00) + } + Case (0x07) + { + OperationRegion (XD22, SystemMemory, XDBA (), 0x00110000) + Field (XD22, WordAcc, NoLock, Preserve) + { + Offset (0x10F818), + P2PS, 2, + Offset (0x10F81A) + } + + Store (P2PS, Local0) + Return (Local0) + } + + } + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Name (_DDN, "SPT XHCI controller") // _DDN: DOS Device Name + Name (_STR, Unicode ("SPT XHCI controller")) // _STR: Description String + Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State + { + Return (0x03) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (DVID, 0xFFFFFFFF)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x6D, 0x04)) + } + + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (DVID, 0xFFFF)) + { + Return (Zero) + } + + Store (PMES, Local0) + Store (0x01, PMES) + If (LAnd (PMEE, Local0)) + { + Notify (XDCI, 0x02) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (HDAS) + { + Name (_ADR, 0x001F0003) // _ADR: Address + OperationRegion (HDAR, PCI_Config, 0x00, 0x0100) + Field (HDAR, WordAcc, NoLock, Preserve) + { + VDID, 32 + } + + Field (HDAR, ByteAcc, NoLock, Preserve) + { + Offset (0x54), + Offset (0x55), + PMEE, 1, + , 6, + PMES, 1 + } + + Name (_S0W, 0x03) // _S0W: S0 Device Wake State + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + Store (Arg0, PMEE) + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x6D, 0x04)) + } + + Method (GPEH, 0, NotSerialized) + { + If (LEqual (VDID, 0xFFFFFFFF)) + { + Return (Zero) + } + + If (LAnd (PMEE, PMES)) + { + ADBG ("HDAS GPEH") + Store (0x01, PMES) + Notify (HDAS, 0x02) + } + } + + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + If (LNotEqual (VDID, 0xFFFFFFFF)) + { + \_SB.VMMH (0x00, 0x01) + } + + If (CondRefOf (\_SB.PCI0.HDAS.PS0X)) + { + \_SB.PCI0.HDAS.PS0X () + } + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + If (LNotEqual (VDID, 0xFFFFFFFF)) + { + \_SB.VMMH (0x00, 0x00) + } + + If (CondRefOf (\_SB.PCI0.HDAS.PS3X)) + { + \_SB.PCI0.HDAS.PS3X () + } + } + + Name (NBUF, ResourceTemplate () + { + QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadOnly, + 0x0000000000000001, // Granularity + 0x0000000000000000, // Range Minimum + 0x0000000000000000, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000000000000, // Length + ,, _Y1C, AddressRangeACPI, TypeStatic) + }) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + ADBG ("HDAS _INI") + CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y1C._MIN, NBAS) // _MIN: Minimum Base Address + CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y1C._MAX, NMAS) // _MAX: Maximum Base Address + CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y1C._LEN, NLEN) // _LEN: Length + Store (NHLA, NBAS) + Add (NHLA, Subtract (NHLL, 0x01), NMAS) + Store (NHLL, NLEN) + If (LNotEqual (VDID, 0xFFFFFFFF)) + { + \_SB.VMMH (0x00, 0x01) + } + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + ADBG ("HDAS _DSM") + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("a69f886e-6ceb-4594-a41f-7b5dce24c553"))) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + ADBG ("_DSM Fun 0") + Return (Buffer (One) + { + 0x0F + }) + } + Case (0x01) + { + ADBG ("_DSM Fun 1 NHLT") + Return (NBUF) + } + Case (0x02) + { + ADBG ("_DSM Fun 2 FMSK") + ADBG ("ADFM:") + ADBG (ADFM) + Return (ADFM) + } + Case (0x03) + { + ADBG ("_DSM Fun 3 PPMS") + If (CondRefOf (\_SB.PCI0.HDAS.PPMS)) + { + ADBG ("PPMS:") + ADBG (Arg3) + Return (\_SB.PCI0.HDAS.PPMS (Arg3)) + } + + ADBG ("BUGBUG") + Return (0x00) + } + Default + { + ADBG ("_DSM Fun NOK") + Return (Buffer (One) + { + 0x00 + }) + } + + } + } + + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + ADBG ("_DSM UUID NOK") + Return (Buffer (0x01) + { + 0x00 + }) + } + } + + Device (RP01) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA1, 0x00)) + { + Return (RPA1) + } + Else + { + Return (0x001C0000) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR1, LTRZ) + Store (PML1, LMSL) + Store (PNL1, LNSL) + Store (OBF1, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP02) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA2, 0x00)) + { + Return (RPA2) + } + Else + { + Return (0x001C0001) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR2, LTRZ) + Store (PML2, LMSL) + Store (PNL2, LNSL) + Store (OBF2, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP03) + { + Name (RID, 0x00) + Method (XPRW, 0, NotSerialized) + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA3, 0x00)) + { + Return (RPA3) + } + Else + { + Return (0x001C0002) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR3, LTRZ) + Store (PML3, LMSL) + Store (PNL3, LNSL) + Store (OBF3, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP04) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA4, 0x00)) + { + Return (RPA4) + } + Else + { + Return (0x001C0003) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR4, LTRZ) + Store (PML4, LMSL) + Store (PNL4, LNSL) + Store (OBF4, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP05) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA5, 0x00)) + { + Return (RPA5) + } + Else + { + Return (0x001C0004) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR5, LTRZ) + Store (PML5, LMSL) + Store (PNL5, LNSL) + Store (OBF5, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP06) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA6, 0x00)) + { + Return (RPA6) + } + Else + { + Return (0x001C0005) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR6, LTRZ) + Store (PML6, LMSL) + Store (PNL6, LNSL) + Store (OBF6, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP07) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA7, 0x00)) + { + Return (RPA7) + } + Else + { + Return (0x001C0006) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR7, LTRZ) + Store (PML7, LMSL) + Store (PNL7, LNSL) + Store (OBF7, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP08) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA8, 0x00)) + { + Return (RPA8) + } + Else + { + Return (0x001C0007) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR8, LTRZ) + Store (PML8, LMSL) + Store (PNL8, LNSL) + Store (OBF8, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP09) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x27, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPA9, 0x00)) + { + Return (RPA9) + } + Else + { + Return (0x001D0000) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTR9, LTRZ) + Store (PML9, LMSL) + Store (PNL9, LNSL) + Store (OBF9, OBFZ) + } + + OperationRegion (PXCS, SystemMemory, 0xF00E8000, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP10) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAA, 0x00)) + { + Return (RPAA) + } + Else + { + Return (0x001D0001) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRA, LTRZ) + Store (PMLA, LMSL) + Store (PNLA, LNSL) + Store (OBFA, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP11) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAB, 0x00)) + { + Return (RPAB) + } + Else + { + Return (0x001D0002) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRB, LTRZ) + Store (PMLB, LMSL) + Store (PNLB, LNSL) + Store (OBFB, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP12) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAC, 0x00)) + { + Return (RPAC) + } + Else + { + Return (0x001D0003) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRC, LTRZ) + Store (PMLC, LMSL) + Store (PNLC, LNSL) + Store (OBFC, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP13) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAD, 0x00)) + { + Return (RPAD) + } + Else + { + Return (0x001D0004) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRD, LTRZ) + Store (PMLD, LMSL) + Store (PNLD, LNSL) + Store (OBFD, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP14) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAE, 0x00)) + { + Return (RPAE) + } + Else + { + Return (0x001D0005) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRE, LTRZ) + Store (PMLE, LMSL) + Store (PNLE, LNSL) + Store (OBFE, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP15) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAF, 0x00)) + { + Return (RPAF) + } + Else + { + Return (0x001D0006) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRF, LTRZ) + Store (PMLF, LMSL) + Store (PNLF, LNSL) + Store (OBFF, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP16) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAG, 0x00)) + { + Return (RPAG) + } + Else + { + Return (0x001D0007) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRG, LTRZ) + Store (PMLG, LMSL) + Store (PNLG, LNSL) + Store (OBFG, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP17) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAH, 0x00)) + { + Return (RPAH) + } + Else + { + Return (0x001B0000) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRH, LTRZ) + Store (PMLH, LMSL) + Store (PNLH, LNSL) + Store (OBFH, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP18) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAI, 0x00)) + { + Return (RPAI) + } + Else + { + Return (0x001B0001) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRI, LTRZ) + Store (PMLI, LMSL) + Store (PNLI, LNSL) + Store (OBFI, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP19) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAJ, 0x00)) + { + Return (RPAJ) + } + Else + { + Return (0x001B0002) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRJ, LTRZ) + Store (PMLJ, LMSL) + Store (PNLJ, LNSL) + Store (OBFJ, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP20) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAK, 0x00)) + { + Return (RPAK) + } + Else + { + Return (0x001B0003) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRK, LTRZ) + Store (PMLK, LMSL) + Store (PNLK, LNSL) + Store (OBFK, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (RP21) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAL, 0x00)) + { + Return (RPAL) + } + Else + { + Return (0x001B0004) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRL, LTRZ) + Store (PMLL, LMSL) + Store (PNLL, LNSL) + Store (OBFL, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR04 ()) + } + + Return (PR04 ()) + } + } + + Device (RP22) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAM, 0x00)) + { + Return (RPAM) + } + Else + { + Return (0x001B0005) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRM, LTRZ) + Store (PMLM, LMSL) + Store (PNLM, LNSL) + Store (OBFM, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR05 ()) + } + + Return (PR05 ()) + } + } + + Device (RP23) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAN, 0x00)) + { + Return (RPAN) + } + Else + { + Return (0x001B0006) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRN, LTRZ) + Store (PMLN, LMSL) + Store (PNLN, LNSL) + Store (OBFN, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR06 ()) + } + + Return (PR06 ()) + } + } + + Device (RP24) + { + Name (RID, 0x00) + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + If (LNotEqual (RPAO, 0x00)) + { + Return (RPAO) + } + Else + { + Return (0x001B0007) + } + } + + Name (LTRZ, 0x00) + Name (OBFZ, 0x00) + Name (LMSL, 0x00) + Name (LNSL, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (LTRO, LTRZ) + Store (PMLO, LMSL) + Store (PNLO, LNSL) + Store (OBFO, OBFZ) + } + + OperationRegion (PXCS, PCI_Config, 0x00, 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x50), + L0SE, 1, + , 3, + LDIS, 1, + Offset (0x51), + Offset (0x52), + , 13, + LASX, 1, + Offset (0x5A), + ABPX, 1, + , 2, + PDCX, 1, + , 2, + PDSX, 1, + Offset (0x5B), + Offset (0x60), + Offset (0x62), + PSPX, 1, + Offset (0xA4), + D3HT, 2, + Offset (0xD8), + , 30, + HPEX, 1, + PMEX, 1, + Offset (0xE2), + , 2, + L23E, 1, + L23R, 1, + Offset (0x324), + , 3, + LEDM, 1, + Offset (0x420), + , 30, + DPGE, 1 + } + + Field (PXCS, AnyAcc, NoLock, WriteAsZeros) + { + Offset (0xDC), + , 30, + HPSX, 1, + PMSX, 1 + } + + Name (LTRV, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + Name (OPTS, Buffer (0x02) + { + 0x00, 0x00 + }) + CreateBitField (OPTS, 0x00, FUN0) + CreateBitField (OPTS, 0x04, FUN4) + CreateBitField (OPTS, 0x06, FUN6) + CreateBitField (OPTS, 0x08, FUN8) + CreateBitField (OPTS, 0x09, FUN9) + If (LGreaterEqual (Arg1, 0x02)) + { + Store (0x01, FUN0) + If (LTRZ) + { + Store (0x01, FUN6) + } + + If (OBFZ) + { + Store (0x01, FUN4) + } + + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Store (0x01, FUN8) + Store (0x01, FUN9) + } + } + } + + Return (OPTS) + } + Case (0x04) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (OBFZ) + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 + }) + } + Else + { + Return (Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + } + } + Case (0x05) + { + If (LEqual (Arg1, 0x01)) + { + Return (0x01) + } + } + Case (0x06) + { + If (LGreaterEqual (Arg1, 0x02)) + { + If (LTRZ) + { + If (LOr (LEqual (LMSL, 0x00), LEqual (LNSL, 0x00))) + { + If (LEqual (PCHS, SPTH)) + { + Store (0x0846, LMSL) + Store (0x0846, LNSL) + } + ElseIf (LEqual (PCHS, SPTL)) + { + Store (0x1003, LMSL) + Store (0x1003, LNSL) + } + } + + Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV, 0x00)) + Store (And (LMSL, 0x03FF), Index (LTRV, 0x01)) + Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV, 0x02)) + Store (And (LNSL, 0x03FF), Index (LTRV, 0x03)) + Return (LTRV) + } + Else + { + Return (0x00) + } + } + } + Case (0x08) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (0x01) + } + } + } + Case (0x09) + { + If (LEqual (ECR1, 0x01)) + { + If (LGreaterEqual (Arg1, 0x03)) + { + Return (Package (0x05) + { + 0xC350, + Ones, + Ones, + 0xC350, + Ones + }) + } + } + } + + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PXSX) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (GPRW (0x69, 0x04)) + } + } + + Method (HPME, 0, Serialized) + { + If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, 0x01))) + { + Notify (PXSX, 0x02) + Store (0x01, PMSX) + Store (0x01, PSPX) + } + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If (PICM) + { + Return (AR07 ()) + } + + Return (PR07 ()) + } + } + + Device (SAT0) + { + Name (_ADR, 0x00170000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (CondRefOf (\_SB.PCI0.SAT0.SDSM)) + { + Return (\_SB.PCI0.SAT0.SDSM (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (PRT0) + { + Name (_ADR, 0xFFFF) // _ADR: Address + } + + Device (PRT1) + { + Name (_ADR, 0x0001FFFF) // _ADR: Address + } + + Device (PRT2) + { + Name (_ADR, 0x0002FFFF) // _ADR: Address + } + + Device (PRT3) + { + Name (_ADR, 0x0003FFFF) // _ADR: Address + } + + Device (PRT4) + { + Name (_ADR, 0x0004FFFF) // _ADR: Address + } + + Device (PRT5) + { + Name (_ADR, 0x0005FFFF) // _ADR: Address + } + + Device (VOL0) + { + Name (_ADR, 0x0080FFFF) // _ADR: Address + } + + Device (VOL1) + { + Name (_ADR, 0x0081FFFF) // _ADR: Address + } + + Device (VOL2) + { + Name (_ADR, 0x0082FFFF) // _ADR: Address + } + + Method (RDCA, 5, Serialized) + { + OperationRegion (RPAL, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (Add (0x000B8000, 0x0100), Arg1)), 0x04) + Field (RPAL, DWordAcc, Lock, Preserve) + { + RPCD, 32 + } + + OperationRegion (EPAC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x0308)), 0x08) + Field (EPAC, DWordAcc, Lock, Preserve) + { + CAIR, 32, + CADR, 32 + } + + OperationRegion (NCRG, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x0FC0)), 0x04) + Field (NCRG, DWordAcc, Lock, Preserve) + { + CRGC, 32 + } + + If (LGreater (Arg0, 0x02)) + { + Return (0x00) + } + Else + { + Store (Arg0, CRGC) + } + + Switch (ToInteger (Arg4)) + { + Case (0x00) + { + Return (RPCD) + } + Case (0x02) + { + Store (Arg1, CAIR) + Return (CADR) + } + Case (0x01) + { + And (Arg2, RPCD, Local0) + Or (Arg3, Local0, Local0) + Store (Local0, RPCD) + } + Case (0x03) + { + Store (Arg1, CAIR) + And (Arg2, CADR, Local0) + Or (Arg3, Local0, Local0) + Store (Local0, CADR) + } + Default + { + Return (0x00) + } + + } + + Return (0x00) + } + + Method (ARPC, 4, Serialized) + { + ADBG (Concatenate ("NRPN: ", ToHexString (Arg0))) + Switch (ToInteger (Arg0)) + { + Case (0x04) + { + If (CondRefOf (\_SB.PCI0.RP05.PWRG)) + { + CopyObject (\_SB.PCI0.RP05.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP05.RSTG)) + { + CopyObject (\_SB.PCI0.RP05.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP05.SCLK)) + { + CopyObject (\_SB.PCI0.RP05.SCLK, Arg3) + } + } + Case (0x08) + { + If (CondRefOf (\_SB.PCI0.RP09.PWRG)) + { + CopyObject (\_SB.PCI0.RP09.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP09.RSTG)) + { + CopyObject (\_SB.PCI0.RP09.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP09.SCLK)) + { + CopyObject (\_SB.PCI0.RP09.SCLK, Arg3) + } + } + Case (0x0C) + { + If (CondRefOf (\_SB.PCI0.RP13.PWRG)) + { + CopyObject (\_SB.PCI0.RP13.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP13.RSTG)) + { + CopyObject (\_SB.PCI0.RP13.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP13.SCLK)) + { + CopyObject (\_SB.PCI0.RP13.SCLK, Arg3) + } + } + Case (0x10) + { + If (CondRefOf (\_SB.PCI0.RP17.PWRG)) + { + CopyObject (\_SB.PCI0.RP17.PWRG, Arg1) + } + + If (CondRefOf (\_SB.PCI0.RP17.RSTG)) + { + CopyObject (\_SB.PCI0.RP17.RSTG, Arg2) + } + + If (CondRefOf (\_SB.PCI0.RP17.SCLK)) + { + CopyObject (\_SB.PCI0.RP17.SCLK, Arg3) + } + } + Default + { + ADBG (Concatenate ("ERR!NRPN: ", ToHexString (Arg0))) + } + + } + } + + Device (NVM1) + { + Name (_ADR, 0x00C1FFFF) // _ADR: Address + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (NIT1, NITV) + Store (NPM1, NPMV) + Store (NPC1, NPCV) + Store (NL11, NL1V) + Store (ND21, ND2V) + Store (ND11, ND1V) + Store (NLR1, NLRV) + Store (NLD1, NLDV) + Store (NEA1, NEAV) + Store (NEB1, NEBV) + Store (NEC1, NECV) + Store (NRA1, NRAV) + Store (NMB1, NMBV) + Store (NMV1, NMVV) + Store (NPB1, NPBV) + Store (NPV1, NPVV) + Store (NRP1, NRPN) + Store (0x00, NCRN) + ARPC (NRPN, RefOf (PWRG), RefOf (RSTG), RefOf (SCLK)) + } + + Name (PRBI, 0x00) + Name (PRBD, 0x00) + Name (PCMD, 0x00) + Name (RSTG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x00, + 0x00, + 0x00 + }) + Name (NCRN, 0x00) + Name (NITV, 0x00) + Name (NPMV, 0x00) + Name (NPCV, 0x00) + Name (NL1V, 0x00) + Name (ND2V, 0x00) + Name (ND1V, 0x00) + Name (NLRV, 0x00) + Name (NLDV, 0x00) + Name (NEAV, 0x00) + Name (NEBV, 0x00) + Name (NECV, 0x00) + Name (NRAV, 0x00) + Name (NMBV, 0x00) + Name (NMVV, 0x00) + Name (NPBV, 0x00) + Name (NPVV, 0x00) + Name (NRPN, 0x00) + Name (MXIE, 0x00) + Name (ISD3, 0x00) + Method (RPON, 0, Serialized) + { + If (LEqual (ISD3, 0x00)) + { + Return (Zero) + } + + Store (0x00, ISD3) + ADBG (Concatenate ("RPONs: ", ToHexString (NRPN))) + \_SB.PCI0.SAT0.PON (PWRG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.PON (RSTG) + RDCA (NCRN, 0x0420, 0xBFFFFFFF, 0x00, 0x01) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x08, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x08)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0420, 0xFFFFFFFF, 0x40000000, 0x01) + Store (0x00, Local0) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFF7, 0x00, 0x01) + Sleep (0x07D0) + NVD0 () + ADBG (Concatenate ("RPONe: ", ToHexString (NRPN))) + } + + Method (RPOF, 0, Serialized) + { + If (LEqual (NVD3 (), 0x00)) + { + Return (Zero) + } + + ADBG (Concatenate ("POFF NRPN: ", ToHexString (NRPN))) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x04, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x04)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFFF, 0x08, 0x01) + \_SB.PCI0.SAT0.POFF (RSTG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.POFF (PWRG) + RDCA (NCRN, 0x50, 0xFFFFFFFF, 0x10, 0x01) + RDCA (NCRN, 0x50, 0xFFFFFFEF, 0x00, 0x01) + Store (0x03, ISD3) + } + + Method (NVD3, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + Store (RDCA (NCRN, 0x04, 0x00, 0x00, 0x02), PCMD) + If (LEqual (NITV, 0x01)) + { + Store (0x24, PRBI) + Store (RDCA (NCRN, 0x24, 0x00, 0x00, 0x02), PRBD) + } + ElseIf (LEqual (NITV, 0x02)) + { + Store (0x10, PRBI) + Store (RDCA (NCRN, 0x10, 0x00, 0x00, 0x02), PRBD) + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + Store (RDCA (NCRN, TCSO, 0x00, 0x00, 0x02), MXIE) + } + + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03) + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x03, 0x01) + Return (0x01) + } + + Method (NVD0, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x00, 0x01) + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x00, 0x03) + CNRS () + If (LEqual (NITV, 0x02)) + { + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + RDCA (NCRN, TCSO, 0xFFFFFFFF, And (MXIE, 0x80000000), 0x03) + ADBG ("NVD0: MSIXe") + } + Else + { + } + + Return (0x01) + } + + Method (CNRS, 0, Serialized) + { + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |start", Debug) + ADBG (Concatenate ("CNRSs ", ToDecimalString (Timer))) + If (LEqual (NITV, 0x00)) + { + Return (Zero) + } + + RDCA (NCRN, 0x10, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x14, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x18, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x1C, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x20, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x24, 0x00, 0x00, 0x03) + RDCA (NCRN, PRBI, 0x00, PRBD, 0x03) + RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03) + If (LNotEqual (NL1V, 0x00)) + { + RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0), 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03) + } + + If (LNotEqual (NLRV, 0x00)) + { + RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03) + } + + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC), 0x03) + RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03) + RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03) + RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, 0x01) + If (LEqual (And (NEAV, 0x40), 0x40)) + { + RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, 0x01) + ADBG (Concatenate ("CNRSw ", ToDecimalString (Timer))) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + Stall (0x0A) + } + } + + ADBG (Concatenate ("CNRSx ", ToDecimalString (Timer))) + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03), 0x03) + If (LNotEqual (NMVV, 0x00)) + { + RDCA (NCRN, NMBV, 0x00, NMVV, 0x03) + } + + If (LNotEqual (NPVV, 0x00)) + { + RDCA (NCRN, NPBV, 0x00, NPVV, 0x03) + } + + ADBG (Concatenate ("CNRSe ", ToDecimalString (Timer))) + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |complete", Debug) + } + } + + Device (NVM2) + { + Name (_ADR, 0x00C2FFFF) // _ADR: Address + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (NIT2, NITV) + Store (NPM2, NPMV) + Store (NPC2, NPCV) + Store (NL12, NL1V) + Store (ND22, ND2V) + Store (ND12, ND1V) + Store (NLR2, NLRV) + Store (NLD2, NLDV) + Store (NEA2, NEAV) + Store (NEB2, NEBV) + Store (NEC2, NECV) + Store (NRA2, NRAV) + Store (NMB2, NMBV) + Store (NMV2, NMVV) + Store (NPB2, NPBV) + Store (NPV2, NPVV) + Store (NRP2, NRPN) + Store (0x01, NCRN) + ARPC (NRPN, RefOf (PWRG), RefOf (RSTG), RefOf (SCLK)) + } + + Name (PRBI, 0x00) + Name (PRBD, 0x00) + Name (PCMD, 0x00) + Name (RSTG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x00, + 0x00, + 0x00 + }) + Name (NCRN, 0x00) + Name (NITV, 0x00) + Name (NPMV, 0x00) + Name (NPCV, 0x00) + Name (NL1V, 0x00) + Name (ND2V, 0x00) + Name (ND1V, 0x00) + Name (NLRV, 0x00) + Name (NLDV, 0x00) + Name (NEAV, 0x00) + Name (NEBV, 0x00) + Name (NECV, 0x00) + Name (NRAV, 0x00) + Name (NMBV, 0x00) + Name (NMVV, 0x00) + Name (NPBV, 0x00) + Name (NPVV, 0x00) + Name (NRPN, 0x00) + Name (MXIE, 0x00) + Name (ISD3, 0x00) + Method (RPON, 0, Serialized) + { + If (LEqual (ISD3, 0x00)) + { + Return (Zero) + } + + Store (0x00, ISD3) + ADBG (Concatenate ("RPONs: ", ToHexString (NRPN))) + \_SB.PCI0.SAT0.PON (PWRG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.PON (RSTG) + RDCA (NCRN, 0x0420, 0xBFFFFFFF, 0x00, 0x01) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x08, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x08)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0420, 0xFFFFFFFF, 0x40000000, 0x01) + Store (0x00, Local0) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFF7, 0x00, 0x01) + Sleep (0x07D0) + NVD0 () + ADBG (Concatenate ("RPONe: ", ToHexString (NRPN))) + } + + Method (RPOF, 0, Serialized) + { + If (LEqual (NVD3 (), 0x00)) + { + Return (Zero) + } + + ADBG (Concatenate ("POFF NRPN: ", ToHexString (NRPN))) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x04, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x04)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFFF, 0x08, 0x01) + \_SB.PCI0.SAT0.POFF (RSTG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.POFF (PWRG) + RDCA (NCRN, 0x50, 0xFFFFFFFF, 0x10, 0x01) + RDCA (NCRN, 0x50, 0xFFFFFFEF, 0x00, 0x01) + Store (0x03, ISD3) + } + + Method (NVD3, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + Store (RDCA (NCRN, 0x04, 0x00, 0x00, 0x02), PCMD) + If (LEqual (NITV, 0x01)) + { + Store (0x24, PRBI) + Store (RDCA (NCRN, 0x24, 0x00, 0x00, 0x02), PRBD) + } + ElseIf (LEqual (NITV, 0x02)) + { + Store (0x10, PRBI) + Store (RDCA (NCRN, 0x10, 0x00, 0x00, 0x02), PRBD) + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + Store (RDCA (NCRN, TCSO, 0x00, 0x00, 0x02), MXIE) + } + + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03) + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x03, 0x01) + Return (0x01) + } + + Method (NVD0, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x00, 0x01) + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x00, 0x03) + CNRS () + If (LEqual (NITV, 0x02)) + { + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + RDCA (NCRN, TCSO, 0xFFFFFFFF, And (MXIE, 0x80000000), 0x03) + ADBG ("NVD0: MSIXe") + } + Else + { + } + + Return (0x01) + } + + Method (CNRS, 0, Serialized) + { + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |start", Debug) + ADBG (Concatenate ("CNRSs ", ToDecimalString (Timer))) + If (LEqual (NITV, 0x00)) + { + Return (Zero) + } + + RDCA (NCRN, 0x10, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x14, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x18, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x1C, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x20, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x24, 0x00, 0x00, 0x03) + RDCA (NCRN, PRBI, 0x00, PRBD, 0x03) + RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03) + If (LNotEqual (NL1V, 0x00)) + { + RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0), 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03) + } + + If (LNotEqual (NLRV, 0x00)) + { + RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03) + } + + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC), 0x03) + RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03) + RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03) + RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, 0x01) + If (LEqual (And (NEAV, 0x40), 0x40)) + { + RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, 0x01) + ADBG (Concatenate ("CNRSw ", ToDecimalString (Timer))) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + Stall (0x0A) + } + } + + ADBG (Concatenate ("CNRSx ", ToDecimalString (Timer))) + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03), 0x03) + If (LNotEqual (NMVV, 0x00)) + { + RDCA (NCRN, NMBV, 0x00, NMVV, 0x03) + } + + If (LNotEqual (NPVV, 0x00)) + { + RDCA (NCRN, NPBV, 0x00, NPVV, 0x03) + } + + ADBG (Concatenate ("CNRSe ", ToDecimalString (Timer))) + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |complete", Debug) + } + } + + Device (NVM3) + { + Name (_ADR, 0x00C3FFFF) // _ADR: Address + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + Store (NIT3, NITV) + Store (NPM3, NPMV) + Store (NPC3, NPCV) + Store (NL13, NL1V) + Store (ND23, ND2V) + Store (ND13, ND1V) + Store (NLR3, NLRV) + Store (NLD3, NLDV) + Store (NEA3, NEAV) + Store (NEB3, NEBV) + Store (NEC3, NECV) + Store (NRA3, NRAV) + Store (NMB3, NMBV) + Store (NMV3, NMVV) + Store (NPB3, NPBV) + Store (NPV3, NPVV) + Store (NRP3, NRPN) + Store (0x02, NCRN) + ARPC (NRPN, RefOf (PWRG), RefOf (RSTG), RefOf (SCLK)) + } + + Name (PRBI, 0x00) + Name (PRBD, 0x00) + Name (PCMD, 0x00) + Name (RSTG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x00, + 0x00, + 0x00 + }) + Name (NCRN, 0x00) + Name (NITV, 0x00) + Name (NPMV, 0x00) + Name (NPCV, 0x00) + Name (NL1V, 0x00) + Name (ND2V, 0x00) + Name (ND1V, 0x00) + Name (NLRV, 0x00) + Name (NLDV, 0x00) + Name (NEAV, 0x00) + Name (NEBV, 0x00) + Name (NECV, 0x00) + Name (NRAV, 0x00) + Name (NMBV, 0x00) + Name (NMVV, 0x00) + Name (NPBV, 0x00) + Name (NPVV, 0x00) + Name (NRPN, 0x00) + Name (MXIE, 0x00) + Name (ISD3, 0x00) + Method (RPON, 0, Serialized) + { + If (LEqual (ISD3, 0x00)) + { + Return (Zero) + } + + Store (0x00, ISD3) + ADBG (Concatenate ("RPONs: ", ToHexString (NRPN))) + \_SB.PCI0.SAT0.PON (PWRG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.PON (RSTG) + RDCA (NCRN, 0x0420, 0xBFFFFFFF, 0x00, 0x01) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x08, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x08)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0420, 0xFFFFFFFF, 0x40000000, 0x01) + Store (0x00, Local0) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFF7, 0x00, 0x01) + Sleep (0x07D0) + NVD0 () + ADBG (Concatenate ("RPONe: ", ToHexString (NRPN))) + } + + Method (RPOF, 0, Serialized) + { + If (LEqual (NVD3 (), 0x00)) + { + Return (Zero) + } + + ADBG (Concatenate ("POFF NRPN: ", ToHexString (NRPN))) + RDCA (NCRN, 0xE2, 0xFFFFFFFF, 0x04, 0x01) + Sleep (0x10) + Store (0x00, Local0) + While (And (RDCA (NCRN, 0xE2, 0x00, 0x00, 0x00), 0x04)) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + RDCA (NCRN, 0x0324, 0xFFFFFFFF, 0x08, 0x01) + \_SB.PCI0.SAT0.POFF (RSTG) + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + + \_SB.PCI0.SAT0.POFF (PWRG) + RDCA (NCRN, 0x50, 0xFFFFFFFF, 0x10, 0x01) + RDCA (NCRN, 0x50, 0xFFFFFFEF, 0x00, 0x01) + Store (0x03, ISD3) + } + + Method (NVD3, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + Store (RDCA (NCRN, 0x04, 0x00, 0x00, 0x02), PCMD) + If (LEqual (NITV, 0x01)) + { + Store (0x24, PRBI) + Store (RDCA (NCRN, 0x24, 0x00, 0x00, 0x02), PRBD) + } + ElseIf (LEqual (NITV, 0x02)) + { + Store (0x10, PRBI) + Store (RDCA (NCRN, 0x10, 0x00, 0x00, 0x02), PRBD) + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + Store (RDCA (NCRN, TCSO, 0x00, 0x00, 0x02), MXIE) + } + + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03) + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x03, 0x01) + Return (0x01) + } + + Method (NVD0, 0, Serialized) + { + If (LEqual (NITV, 0x00)) + { + Return (0x00) + } + + RDCA (NCRN, 0xA4, 0xFFFFFFFC, 0x00, 0x01) + RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x00, 0x03) + CNRS () + If (LEqual (NITV, 0x02)) + { + OperationRegion (MCRC, SystemMemory, Add (\_SB.PCI0.GPCB (), Add (0x000B8000, 0x033C)), 0x04) + Field (MCRC, AnyAcc, NoLock, Preserve) + { + SCSO, 8, + Offset (0x02), + TCSO, 8, + , 7, + RE, 1 + } + + RDCA (NCRN, TCSO, 0xFFFFFFFF, And (MXIE, 0x80000000), 0x03) + ADBG ("NVD0: MSIXe") + } + Else + { + } + + Return (0x01) + } + + Method (CNRS, 0, Serialized) + { + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |start", Debug) + ADBG (Concatenate ("CNRSs ", ToDecimalString (Timer))) + If (LEqual (NITV, 0x00)) + { + Return (Zero) + } + + RDCA (NCRN, 0x10, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x14, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x18, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x1C, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x20, 0x00, 0x00, 0x03) + RDCA (NCRN, 0x24, 0x00, 0x00, 0x03) + RDCA (NCRN, PRBI, 0x00, PRBD, 0x03) + RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03) + If (LNotEqual (NL1V, 0x00)) + { + RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0), 0x03) + RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03) + } + + If (LNotEqual (NLRV, 0x00)) + { + RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03) + } + + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC), 0x03) + RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03) + RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03) + RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, 0x01) + If (LEqual (And (NEAV, 0x40), 0x40)) + { + RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, 0x01) + ADBG (Concatenate ("CNRSw ", ToDecimalString (Timer))) + While (LEqual (And (RDCA (NCRN, 0x52, 0x00, 0x00, 0x00), 0x2000), 0x00)) + { + Stall (0x0A) + } + } + + ADBG (Concatenate ("CNRSx ", ToDecimalString (Timer))) + RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03), 0x03) + If (LNotEqual (NMVV, 0x00)) + { + RDCA (NCRN, NMBV, 0x00, NMVV, 0x03) + } + + If (LNotEqual (NPVV, 0x00)) + { + RDCA (NCRN, NPBV, 0x00, NPVV, 0x03) + } + + ADBG (Concatenate ("CNRSe ", ToDecimalString (Timer))) + Store ("[ACPI RST] Restore Remapped Device and Hidden RP context |complete", Debug) + } + } + + Method (PSTA, 1, Serialized) + { + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x00)) + { + Return (0x01) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x01)) + { + If (LEqual (\_SB.GGOV (DerefOf (Index (Arg0, 0x02))), DerefOf (Index (Arg0, 0x03)))) + { + Return (0x01) + } + + Return (0x00) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x02)) + { + If (LEqual (\_SB.PCI0.GEXP.GEPS (DerefOf (Index (Arg0, 0x01)), DerefOf (Index (Arg0, 0x02))), DerefOf (Index (Arg0, 0x03)))) + { + Return (0x01) + } + + Return (0x00) + } + + Return (0x00) + } + + Method (PON, 1, Serialized) + { + If (LNotEqual (DerefOf (Index (Arg0, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x01)) + { + ADBG (Concatenate ("PON GPIO=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.SGOV (DerefOf (Index (Arg0, 0x02)), DerefOf (Index (Arg0, 0x03))) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x02)) + { + ADBG (Concatenate ("PON IOEX=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (Arg0, 0x01)), DerefOf (Index (Arg0, 0x02)), DerefOf (Index (Arg0, 0x03))) + } + } + } + + Method (POFF, 1, Serialized) + { + If (LNotEqual (DerefOf (Index (Arg0, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x01)) + { + ADBG (Concatenate ("POFF GPIO=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.SGOV (DerefOf (Index (Arg0, 0x02)), XOr (DerefOf (Index (Arg0, 0x03)), 0x01)) + } + + If (LEqual (DerefOf (Index (Arg0, 0x00)), 0x02)) + { + ADBG (Concatenate ("POFF IOEX=", ToHexString (DerefOf (Index (Arg0, 0x02))))) + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (Arg0, 0x01)), DerefOf (Index (Arg0, 0x02)), XOr (DerefOf (Index (Arg0, 0x03)), 0x01)) + } + } + } + } + + Device (CIO2) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (CIOE, 0x01)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Name (_HID, "INT343E") // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (CBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y1D) + { + 0x00000010, + } + Memory32Fixed (ReadWrite, + 0xFE400000, // Address Base + 0x00010000, // Address Length + ) + }) + CreateDWordField (CBUF, \_SB.PCI0.CIO2._CRS._Y1D._INT, CIOV) // _INT: Interrupts + Store (CIOI, CIOV) + Return (CBUF) + } + } + + Device (TERM) + { + Name (_HID, "INT343D") // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0xFE03C000, // Address Base + 0x00001000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y1E) + { + 0x00000012, + } + }) + CreateDWordField (RBUF, \_SB.PCI0.TERM._CRS._Y1E._INT, IRQN) // _INT: Interrupts + Store (TIRQ, IRQN) + Return (RBUF) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (TAEN, 0x00)) + { + Return (0x00) + } + + If (LEqual (TIRQ, 0x00)) + { + Return (0x00) + } + + Return (0x0F) + } + } + } + + Scope (\_SB) + { + Name (HDAA, 0x00) + Name (DISA, 0x01) + Method (DION, 0, NotSerialized) + { + VMMH (0x01, 0x01) + } + + Method (DIOF, 0, NotSerialized) + { + VMMH (0x01, 0x00) + } + + Method (VMMH, 2, Serialized) + { + If (LOr (LNot (CondRefOf (\_SB.VMON)), LNot (CondRefOf (\_SB.VMOF)))) + { + Return (Zero) + } + + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + Store (Arg1, HDAA) + } + Case (0x01) + { + Store (Arg1, DISA) + } + Default + { + Return (Zero) + } + + } + + If (LAnd (LNot (DISA), LNot (HDAA))) + { + Store (0x00, XSQD) + Store (0x01, SLS0) + \_SB.VMON () + } + Else + { + Store (0x01, XSQD) + Store (0x00, SLS0) + \_SB.VMOF () + } + } + } + + Scope (\_SB.PCI0) + { + Method (LPD3, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + PMEC, 32 + } + + Store (0x03, PMEC) + Store (PMEC, TEMP) + } + + Method (LPD0, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + PMEC, 32 + } + + And (PMEC, 0xFFFF7FFC, PMEC) + Store (PMEC, TEMP) + } + + Method (LHRV, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x08), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + HRV, 8 + } + + Return (HRV) + } + + Method (GETD, 1, Serialized) + { + OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04) + Field (ICB1, DWordAcc, NoLock, Preserve) + { + PMEC, 32 + } + + Return (And (PMEC, 0x03)) + } + + Method (LCRS, 3, Serialized) + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y1F) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y20) + { + 0x00000014, + } + }) + CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y1F._BAS, BVAL) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y1F._LEN, BLEN) // _LEN: Length + CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y20._INT, IRQN) // _INT: Interrupts + Store (Arg1, BVAL) + Store (Arg2, IRQN) + If (LEqual (Arg0, 0x04)) + { + Store (0x08, BLEN) + } + + Return (RBUF) + } + + Method (LSTA, 1, Serialized) + { + If (LOr (LEqual (Arg0, 0x00), LEqual (Arg0, 0x03))) + { + Return (0x00) + } + + If (LLess (OSYS, 0x07DC)) + { + Return (0x00) + } + + Return (0x0F) + } + + Method (GIRQ, 1, Serialized) + { + Return (Add (0x18, Mod (Arg0, 0x60))) + } + } + + Scope (\_SB.PCI0) + { + Device (SIRC) + { + Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID + Name (_STA, 0x03) // _STA: Status + Name (_UID, 0x05) // _UID: Unique ID + Method (ADDB, 3, Serialized) + { + Name (BUFF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y21) + }) + CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y21._BAS, ADDR) // _BAS: Base Address + CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y21._LEN, LENG) // _LEN: Length + Store (Buffer (0x02) + { + 0x79, 0x00 + }, Local0) + If (LOr (LOr (LEqual (Arg0, 0x01), LEqual (Arg0, 0x03)), LEqual (Arg0, 0x04))) + { + Store (Arg2, ADDR) + ConcatenateResTemplate (Local0, BUFF, Local1) + Store (Local1, Local0) + } + + If (LEqual (Arg0, 0x03)) + { + Store (Arg1, ADDR) + ConcatenateResTemplate (Local0, BUFF, Local1) + Store (Local1, Local0) + } + + If (LEqual (Arg0, 0x04)) + { + Store (Add (0x08, Arg1), ADDR) + Store (0x0FF8, LENG) + ConcatenateResTemplate (Local0, BUFF, Local1) + Store (Local1, Local0) + } + + Return (Local0) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Store (Buffer (0x02) + { + 0x79, 0x00 + }, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD0, SB00, SB10), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD1, SB01, SB11), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD2, SB02, SB12), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD3, SB03, SB13), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD4, SB04, SB14), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD5, SB05, SB15), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD6, SB06, SB16), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD7, SB07, SB17), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD8, SB08, SB18), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMD9, SB09, SB19), Local1) + Store (Local1, Local0) + ConcatenateResTemplate (Local0, ADDB (SMDA, SB0A, SB1A), Local1) + Store (Local1, Local0) + If (LEqual (\_SB.PCI0.GPI0._STA (), 0x00)) + { + ConcatenateResTemplate (Local0, \_SB.PCI0.GPI0._CRS (), Local1) + Store (Local1, Local0) + } + + Return (Local0) + } + } + + Device (GPI0) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (PCHV (), SPTH)) + { + If (LEqual (PCHG, 0x02)) + { + Return ("INT3451") + } + + Return ("INT345D") + } + + Return ("INT344B") + } + + Name (LINK, "\\_SB.PCI0.GPI0") + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00010000, // Address Length + _Y22) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00010000, // Address Length + _Y23) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00010000, // Address Length + _Y25) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y24) + { + 0x0000000E, + } + }) + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y22._BAS, COM0) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y23._BAS, COM1) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y24._INT, IRQN) // _INT: Interrupts + Store (Add (SBRG, 0x00AF0000), COM0) + Store (Add (SBRG, 0x00AE0000), COM1) + CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y25._BAS, COM3) // _BAS: Base Address + Store (Add (SBRG, 0x00AC0000), COM3) + Store (SGIR, IRQN) + Return (RBUF) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (SBRG, 0x00)) + { + Return (0x00) + } + + If (LEqual (GPEN, 0x00)) + { + Return (0x00) + } + + Return (0x0F) + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C0) + { + Name (LINK, "\\_SB.PCI0.I2C0") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB10)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB10) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB10) + } + + If (LNotEqual (SMD0, 0x02)) + { + Name (_HID, "INT3442") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB10)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD0, SB00, SIR0)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD0)) + } + } + + If (LEqual (SMD0, 0x02)) + { + Name (_ADR, 0x00150000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C1) + { + Name (LINK, "\\_SB.PCI0.I2C1") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB11)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB11) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB11) + } + + If (LNotEqual (SMD1, 0x02)) + { + Name (_HID, "INT3443") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB11)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD1, SB01, SIR1)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD1)) + } + } + + If (LEqual (SMD1, 0x02)) + { + Name (_ADR, 0x00150001) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C2) + { + Name (LINK, "\\_SB.PCI0.I2C2") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB12)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB12) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB12) + } + + If (LNotEqual (SMD2, 0x02)) + { + Name (_HID, "INT3444") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB12)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD2, SB02, SIR2)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD2)) + } + } + + If (LEqual (SMD2, 0x02)) + { + Name (_ADR, 0x00150002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C3) + { + Name (LINK, "\\_SB.PCI0.I2C3") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB13)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB13) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB13) + } + + If (LNotEqual (SMD3, 0x02)) + { + Name (_HID, "INT3445") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB13)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD3, SB03, SIR3)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD3)) + } + } + + If (LEqual (SMD3, 0x02)) + { + Name (_ADR, 0x00150003) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C4) + { + Name (LINK, "\\_SB.PCI0.I2C4") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB14)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB14) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB14) + } + + If (LNotEqual (SMD4, 0x02)) + { + Name (_HID, "INT3446") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB14)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD4, SB04, SIR4)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD4)) + } + } + + If (LEqual (SMD4, 0x02)) + { + Name (_ADR, 0x00190002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (I2C5) + { + Name (LINK, "\\_SB.PCI0.I2C5") + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB15)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB15) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB15) + } + + If (LNotEqual (SMD5, 0x02)) + { + Name (_HID, "INT3447") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB15)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD5, SB05, SIR5)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD5)) + } + } + + If (LEqual (SMD5, 0x02)) + { + Name (_ADR, 0x00190001) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (SPI0) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB16)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB16) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB16) + } + + If (LNotEqual (SMD6, 0x02)) + { + Name (_HID, "INT3440") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB16)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD6, SB06, SIR6)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD6)) + } + } + + If (LEqual (SMD6, 0x02)) + { + Name (_ADR, 0x001E0002) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (SPI1) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB17)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB17) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB17) + } + + If (LNotEqual (SMD7, 0x02)) + { + Name (_HID, "INT3441") // _HID: Hardware ID + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB17)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD7, SB07, SIR7)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD7)) + } + } + + If (LEqual (SMD7, 0x02)) + { + Name (_ADR, 0x001E0003) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (UA00) + { + If (LNotEqual (SMD8, 0x02)) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SMD8, 0x04)) + { + Return (0x020CD041) + } + Else + { + Return ("INT3448") + } + } + + Name (_UID, "SerialIoUart0") // _UID: Unique ID + Name (_DDN, "SerialIoUart0") // _DDN: DOS Device Name + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB18)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD8, SB08, SIR8)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD8)) + } + } + + If (LEqual (SMD8, 0x02)) + { + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + + If (LNotEqual (SMD8, 0x04)) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB18)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB18) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB18) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (UA01) + { + If (LNotEqual (SMD9, 0x02)) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SMD9, 0x04)) + { + Return (0x020CD041) + } + Else + { + Return ("INT3449") + } + } + + Name (_UID, "SerialIoUart1") // _UID: Unique ID + Name (_DDN, "SerialIoUart1") // _DDN: DOS Device Name + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB19)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMD9, SB09, SIR9)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMD9)) + } + } + + If (LEqual (SMD9, 0x02)) + { + Name (_ADR, 0x001E0001) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + + If (LNotEqual (SMD9, 0x04)) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB19)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB19) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB19) + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (UA02) + { + If (LNotEqual (SMDA, 0x02)) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SMDA, 0x04)) + { + Return (0x020CD041) + } + Else + { + Return ("INT344A") + } + } + + Name (_UID, "SerialIoUart2") // _UID: Unique ID + Name (_DDN, "SerialIoUart2") // _DDN: DOS Device Name + Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision + { + Return (LHRV (SB1A)) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (LCRS (SMDA, SB0A, SIRA)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (LSTA (SMDA)) + } + } + + If (LEqual (SMDA, 0x02)) + { + Name (_ADR, 0x00190000) // _ADR: Address + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + + If (LNotEqual (SMDA, 0x04)) + { + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (GETD (SB1A)) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + LPD0 (SB1A) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + LPD3 (SB1A) + } + } + } + } + + Scope (\_SB.PCI0) + { + Name (HIDG, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */) + Name (TP7G, ToUUID ("ef87eb82-f951-46da-84ec-14871ac6f84b")) + Method (HIDD, 5, Serialized) + { + If (LEqual (Arg0, HIDG)) + { + If (LEqual (Arg2, Zero)) + { + If (LEqual (Arg1, One)) + { + Return (Buffer (One) + { + 0x03 + }) + } + } + + If (LEqual (Arg2, One)) + { + Return (Arg4) + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Method (TP7D, 6, Serialized) + { + If (LEqual (Arg0, TP7G)) + { + If (LEqual (Arg2, Zero)) + { + If (LEqual (Arg1, One)) + { + Return (Buffer (One) + { + 0x03 + }) + } + } + + If (LEqual (Arg2, One)) + { + Return (ConcatenateResTemplate (Arg4, Arg5)) + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + + Scope (\_SB.PCI0.I2C0) + { + Device (TPD0) + { + Name (HID2, 0x00) + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x0020, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, _Y26, Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y27) + { + 0x00000000, + } + }) + Name (SBFG, ResourceTemplate () + { + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y26._ADR, BADR) // _ADR: Address + CreateDWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y26._SPE, SPED) // _SPE: Speed + CreateWordField (SBFG, 0x17, INT1) + CreateDWordField (SBFI, \_SB.PCI0.I2C0.TPD0._Y27._INT, INT2) // _INT: Interrupts + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (LLess (OSYS, 0x07DC)) + { + SRXO (GPDI, 0x01) + } + + Store (GNUM (GPDI), INT1) + Store (INUM (GPDI), INT2) + If (LEqual (SDM0, 0x00)) + { + SHPO (GPDI, 0x01) + } + + If (LEqual (SDS0, 0x01)) + { + Store ("SYNA2393", _HID) + Store (0x20, HID2) + Return (Zero) + } + + If (LEqual (SDS0, 0x02)) + { + Store ("06CB2846", _HID) + Store (0x20, HID2) + Return (Zero) + } + + If (LEqual (SDS0, 0x06)) + { + Store ("ALPS0000", _HID) + Store (0x20, HID2) + Store (0x2C, BADR) + Return (Zero) + } + + If (LEqual (SDS0, 0x05)) + { + Store ("CUST0001", _HID) + Store (TPDH, HID2) + Store (TPDB, BADR) + If (LEqual (TPDS, 0x00)) + { + Store (0x000186A0, SPED) + } + + If (LEqual (TPDS, 0x01)) + { + Store (0x00061A80, SPED) + } + + If (LEqual (TPDS, 0x02)) + { + Store (0x000F4240, SPED) + } + + Return (Zero) + } + } + + Name (_HID, "XXXX0000") // _HID: Hardware ID + Name (_CID, "PNP0C50") // _CID: Compatible ID + Name (_S0W, 0x03) // _S0W: S0 Device Wake State + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, HIDG)) + { + Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2)) + } + + If (LEqual (Arg0, TP7G)) + { + Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LOr (LEqual (SDS0, 0x05), LOr (LEqual (SDS0, 0x01), LOr (LEqual (SDS0, 0x02), LEqual (SDS0, 0x06))))) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + If (LLess (OSYS, 0x07DC)) + { + Return (SBFI) + } + + If (LEqual (SDM0, 0x00)) + { + Return (ConcatenateResTemplate (SBFB, SBFG)) + } + + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + } + + Device (HDAC) + { + Name (_HID, "INT0000") // _HID: Hardware ID + Name (_CID, "INT0000") // _CID: Compatible ID + Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec") // _DDN: DOS Device Name + Name (_UID, 0x01) // _UID: Unique ID + Name (CADR, 0x00) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (LOr (LEqual (I2SC, 0x01), LEqual (I2SC, 0x02))) + { + Store ("INT343A", _HID) + Store ("INT343A", _CID) + Store (0x1C, CADR) + Return (Zero) + } + + If (LEqual (I2SC, 0x03)) + { + Store ("INT343B", _HID) + Store ("INT343B", _CID) + Store (0x34, CADR) + Return (Zero) + } + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x0000, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, _Y28, Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y29) + { + 0x00000000, + } + }) + CreateWordField (SBFB, \_SB.PCI0.I2C0.HDAC._CRS._Y28._ADR, ADR) // _ADR: Address + Store (CADR, ADR) + CreateDWordField (SBFI, \_SB.PCI0.I2C0.HDAC._CRS._Y29._INT, AINT) // _INT: Interrupts + Store (INUM (0x02040016), AINT) + If (LEqual (HAID, 0x01)) + { + Return (SBFB) + } + + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (I2SC, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + } + + Device (UCM1) + { + Name (_HID, "INT3515") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x0038, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2A) + { + 0x00000000, + } + }) + CreateDWordField (SBFI, \_SB.PCI0.I2C0.UCM1._CRS._Y2A._INT, GINT) // _INT: Interrupts + Store (INUM (UCG1), GINT) + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (UCSI, 0x01)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + } + + Device (UCM2) + { + Name (_HID, "INT3515") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x003F, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2B) + { + 0x00000000, + } + }) + CreateDWordField (SBFI, \_SB.PCI0.I2C0.UCM2._CRS._Y2B._INT, GINT) // _INT: Interrupts + Store (INUM (UCG2), GINT) + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (UCSI, 0x01)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + } + } + + Scope (\_SB.PCI0.I2C1) + { + Device (TPL1) + { + Name (HID2, 0x00) + Name (SBFB, ResourceTemplate () + { + I2cSerialBusV2 (0x004C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C1", + 0x00, ResourceConsumer, _Y2C, Exclusive, + ) + }) + Name (SBFG, ResourceTemplate () + { + GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + Name (SBFI, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2D) + { + 0x00000000, + } + }) + CreateWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y2C._ADR, BADR) // _ADR: Address + CreateDWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y2C._SPE, SPED) // _SPE: Speed + CreateDWordField (SBFI, \_SB.PCI0.I2C1.TPL1._Y2D._INT, INT2) // _INT: Interrupts + CreateWordField (SBFG, 0x17, INT1) + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + If (LLess (OSYS, 0x07DC)) + { + SRXO (GPLI, 0x01) + } + + Store (GNUM (GPLI), INT1) + Store (INUM (GPLI), INT2) + If (LEqual (SDM1, 0x00)) + { + SHPO (GPLI, 0x01) + } + + If (LEqual (SDS1, 0x01)) + { + Store ("ATML3432", _HID) + Store (0x00, HID2) + Store (0x4C, BADR) + Store (0x00061A80, SPED) + Return (Zero) + } + + If (LEqual (SDS1, 0x02)) + { + Store ("ATML2952", _HID) + Store (0x00, HID2) + Store (0x4A, BADR) + Store (0x00061A80, SPED) + Return (Zero) + } + + If (LEqual (SDS1, 0x03)) + { + Store ("ELAN2097", _HID) + Store (0x01, HID2) + Store (0x10, BADR) + Store (0x00061A80, SPED) + Return (Zero) + } + + If (LEqual (SDS1, 0x04)) + { + Store ("NTRG0001", _HID) + Store (0x01, HID2) + Store (0x07, BADR) + Store (0x00061A80, SPED) + Return (Zero) + } + + If (LEqual (SDS1, 0x05)) + { + Store ("NTRG0002", _HID) + Store (0x01, HID2) + Store (0x64, BADR) + Store (0x00061A80, SPED) + Return (Zero) + } + + If (LEqual (SDS1, 0x06)) + { + Store ("WCOM508E", _HID) + Store (0x01, HID2) + Store (0x0A, BADR) + If (LEqual (TPLS, 0x00)) + { + Store (0x00061A80, SPED) + } + + If (LEqual (TPLS, 0x01)) + { + Store (0x000F4240, SPED) + } + + Return (Zero) + } + + If (LEqual (SDS1, 0x07)) + { + Store ("CUST0000", _HID) + Store (TPLH, HID2) + Store (TPLB, BADR) + If (LEqual (TPLS, 0x00)) + { + Store (0x000186A0, SPED) + } + + If (LEqual (TPLS, 0x01)) + { + Store (0x00061A80, SPED) + } + + If (LEqual (TPLS, 0x02)) + { + Store (0x000F4240, SPED) + } + + Return (Zero) + } + } + + Name (_HID, "XXXX0000") // _HID: Hardware ID + Name (_CID, "PNP0C50") // _CID: Compatible ID + Name (_S0W, 0x04) // _S0W: S0 Device Wake State + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, HIDG)) + { + Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2)) + } + + If (LEqual (Arg0, TP7G)) + { + Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG)) + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (SDS1, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + If (LLess (OSYS, 0x07DC)) + { + Return (SBFI) + } + + If (LEqual (SDM1, 0x00)) + { + Return (ConcatenateResTemplate (SBFB, SBFG)) + } + + Return (ConcatenateResTemplate (SBFB, SBFI)) + } + } + + Device (IMP3) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "IMPJ0003") // _HID: Hardware ID + Name (_CID, "IMPJ0003") // _CID: Compatible ID + Name (_UID, One) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (HAID, 0x01)) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x006E, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C1", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Return (SBUF) + } + } + } + + Scope (\_SB.PCI0.SPI1) + { + Device (FPNT) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SDS7, 0x01)) + { + Return ("FPC1011") + } + + If (LEqual (SDS7, 0x02)) + { + Return ("FPC1020") + } + + If (LEqual (SDS7, 0x03)) + { + Return ("VFSI6101") + } + + If (LEqual (SDS7, 0x04)) + { + Return ("VFSI7500") + } + + If (LEqual (SDS7, 0x05)) + { + Return ("EGIS0300") + } + + If (LEqual (SDS7, 0x06)) + { + Return ("FPC1021") + } + + Return ("FPNT_DIS") + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + SHPO (GFPI, 0x01) + SHPO (GFPS, 0x01) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (SDS7, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (BBUF, ResourceTemplate () + { + SpiSerialBusV2 (0x0000, PolarityLow, FourWireMode, 0x08, + ControllerInitiated, 0x00989680, ClockPolarityLow, + ClockPhaseFirst, "\\_SB.PCI0.SPI1", + 0x00, ResourceConsumer, _Y2E, Exclusive, + ) + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0008 + } + }) + Name (IBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y2F) + { + 0x00000000, + } + }) + Name (GBUF, ResourceTemplate () + { + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, _Y30, + ) + { // Pin list + 0x0000 + } + }) + Name (UBUF, ResourceTemplate () + { + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateDWordField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2E._SPE, SPEX) // _SPE: Speed + CreateByteField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2E._PHA, PHAX) // _PHA: Clock Phase + CreateWordField (BBUF, 0x3B, SPIN) + CreateWordField (GBUF, 0x17, GPIN) + CreateDWordField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2F._INT, IPIN) // _INT: Interrupts + CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2F._LL, ILVL) // _LL_: Low Level + CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2F._HE, ITRG) // _HE_: High-Edge + CreateField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y30._POL, 0x02, GLVL) // _POL: Polarity + CreateBitField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y30._MOD, GTRG) // _MOD: Mode + CreateBitField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y2E._DPL, SCSP) // _DPL: Device Selection Polarity + CreateWordField (UBUF, 0x17, UPIN) + Store (GNUM (GFPS), SPIN) + Store (GNUM (GFPI), GPIN) + Store (INUM (GFPI), IPIN) + Store (GNUM (GFPI), UPIN) + If (LOr (LEqual (SDS7, 0x02), LEqual (SDS7, 0x06))) + { + Store (0x00, ILVL) + Store (0x01, ITRG) + Store (0x00, GLVL) + Store (0x01, GTRG) + } + + If (LEqual (SDS7, 0x04)) + { + Store (0x00, ILVL) + Store (0x01, ITRG) + } + + Switch (ToInteger (SDS7)) + { + Case (0x01) + { + Store (0x00989680, SPEX) + Store (0x00, PHAX) + } + Case (0x02) + { + Store (0x002DC6C0, SPEX) + Store (0x00, PHAX) + } + Case (0x03) + { + Store (0x007A1200, SPEX) + Store (0x01, PHAX) + } + Case (0x04) + { + Store (0x007A1200, SPEX) + Store (0x00, PHAX) + } + Case (0x05) + { + Store (0x00F42400, SPEX) + Store (0x00, PHAX) + } + Case (0x06) + { + Store (0x002DC6C0, SPEX) + Store (0x00, PHAX) + } + Default + { + } + + } + + If (LEqual (SDS7, 0x01)) + { + Return (BBUF) + } + + If (LAnd (LEqual (SDS7, 0x04), LEqual (SDM7, 0x00))) + { + Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, GBUF))) + } + + If (LAnd (LEqual (SDS7, 0x04), LNotEqual (SDM7, 0x00))) + { + Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, IBUF))) + } + + If (LEqual (SDM7, 0x00)) + { + Return (ConcatenateResTemplate (BBUF, GBUF)) + } + + Return (ConcatenateResTemplate (BBUF, IBUF)) + } + } + } + + Scope (\_SB.PCI0.UA00) + { + Device (BTH0) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (LEqual (SDS8, 0x01)) + { + Return ("INT33E1") + } + + If (LEqual (SDS8, 0x02)) + { + Return ("BCM2E40") + } + + Return ("INT33E1") + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + SHPO (GBTI, 0x01) + SHPO (GBTW, 0x01) + SHPO (GBTK, 0x01) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBFG, ResourceTemplate () + { + UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, + 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware, + 0x0020, 0x0020, "\\_SB.PCI0.UA00", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateWordField (SBFG, 0x8C, INT3) + CreateWordField (SBFG, 0x3C, WAK3) + CreateWordField (SBFG, 0x64, KIL3) + Store (GNUM (GBTI), INT3) + Store (GNUM (GBTW), WAK3) + Store (GNUM (GBTK), KIL3) + Name (SBFI, ResourceTemplate () + { + UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, + 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware, + 0x0020, 0x0020, "\\_SB.PCI0.UA00", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + Interrupt (ResourceConsumer, Edge, ActiveLow, ExclusiveAndWake, ,, _Y31) + { + 0x00000000, + } + }) + CreateDWordField (SBFI, \_SB.PCI0.UA00.BTH0._CRS._Y31._INT, INT4) // _INT: Interrupts + CreateWordField (SBFI, 0x3C, WAK4) + CreateWordField (SBFI, 0x64, KIL4) + Store (INUM (GBTI), INT4) + Store (GNUM (GBTW), WAK4) + Store (GNUM (GBTK), KIL4) + If (LEqual (SDM8, 0x00)) + { + Return (SBFG) + } + Else + { + Return (SBFI) + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (SDS8, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + + Name (_S0W, 0x02) // _S0W: S0 Device Wake State + } + } + + Scope (\_SB.PCI0) + { + Device (GNSS) + { + Name (_HID, "INT33A2") // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (BUF1, ResourceTemplate () + { + UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, + 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware, + 0x0040, 0x0040, "\\_SB.PCI0.UA01", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Name (BUF2, ResourceTemplate () + { + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + }) + CreateWordField (BUF2, 0x17, RPIN) + Store (GNUM (GGNR), RPIN) + If (LEqual (GNSC, 0x01)) + { + Return (ConcatenateResTemplate (BUF1, BUF2)) + } + Else + { + Return (BUF2) + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (GNSC, 0x00)) + { + Return (0x00) + } + + Return (0x0F) + } + } + } + + Scope (\_SB.PCI0) + { + Device (GEXP) + { + Name (_ADR, 0x01) // _ADR: Address + Name (_STA, 0x0B) // _STA: Status + OperationRegion (BAR0, SystemMemory, SB04, 0x0208) + Field (BAR0, DWordAcc, NoLock, Preserve) + { + ICON, 32, + TAR, 32, + Offset (0x10), + DATA, 32, + HCNT, 32, + LCNT, 32, + Offset (0x2C), + , 5, + ABRT, 1, + Offset (0x40), + RBCK, 32, + Offset (0x54), + CLR, 32, + Offset (0x6C), + ENB, 1, + Offset (0x70), + ACTV, 1, + TFNF, 1, + , 1, + RFNE, 1, + Offset (0x7C), + HOLD, 32, + Offset (0x9C), + ENSB, 1, + Offset (0x204), + RST, 32 + } + + Method (SGEP, 3, Serialized) + { + CSER (GEXN, Arg0, Arg1, Arg2, 0x00) + } + + Method (SGED, 3, Serialized) + { + CSER (GEXN, Arg0, Arg1, Arg2, 0x01) + } + + Method (GEPS, 2, Serialized) + { + Return (CSER (GEXN, Arg0, Arg1, 0x00, 0x02)) + } + + Method (SGEI, 3, Serialized) + { + CSER (GEXN, Arg0, Arg1, Arg2, 0x03) + } + + Method (INVC, 0, NotSerialized) + { + Store (0x00, Local0) + While (LLess (Local0, 0x10)) + { + If (LEqual (R3DC (0x00, Local0, 0x00), 0x02)) + { + W3DC (0x00, Local0, 0x00, 0x01) + } + + If (LEqual (R3DC (0x01, Local0, 0x00), 0x02)) + { + W3DC (0x01, Local0, 0x00, 0x01) + } + + Add (Local0, 0x01, Local0) + } + } + + Name (PPR, 0x08) + Name (INR, Package (0x03) + { + 0x00, + 0x01, + 0x02 + }) + Name (OUTR, Package (0x03) + { + 0x04, + 0x05, + 0x06 + }) + Name (CFGR, Package (0x03) + { + 0x0C, + 0x0D, + 0x0E + }) + Name (POLR, Package (0x03) + { + 0x08, + 0x09, + 0x0A + }) + Name (EXPA, 0x22) + Name (UCCH, 0x01) + Name (END, 0x0200) + Name (READ, 0x0100) + Name (TEMP, 0x00) + Name (CACH, Package (0x02) + { + Package (0x10) + { + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + } + }, + + Package (0x10) + { + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x00, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x01, + 0x00 + }, + + Package (0x02) + { + 0x03, + 0x00 + } + } + }) + Method (W3DC, 4, NotSerialized) + { + Store (Arg3, Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)), Arg1)), Arg2)) + } + + Method (R3DC, 3, NotSerialized) + { + Return (DerefOf (Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)), Arg1)), Arg2))) + } + + Method (WREG, 4, Serialized) + { + Store (Add (Timer, 0xC350), Local1) + Store (0x07, RST) + Store (0x00, ENB) + Store (RBCK, TEMP) + Store (CLR, TEMP) + Store (0x001C001C, HOLD) + Store (0x0210, HCNT) + Store (0x0280, LCNT) + Store (Add (EXPA, Arg1), TAR) + Store (0x65, ICON) + Store (0x01, ENB) + While (LNotEqual (ENSB, 0x01)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (Arg2, DATA) + Store (Add (END, Arg3), DATA) + While (LNotEqual (ACTV, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (0x00, ENB) + While (LNotEqual (ENSB, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + W3DC (Arg1, Arg2, 0x01, Arg3) + If (LEqual (R3DC (Arg1, Arg2, 0x00), 0x01)) + { + W3DC (Arg1, Arg2, 0x00, 0x02) + } + + Return (0x00) + } + + Method (RREG, 3, Serialized) + { + If (LEqual (UCCH, 0x01)) + { + If (LEqual (R3DC (Arg1, Arg2, 0x00), 0x02)) + { + Return (R3DC (Arg1, Arg2, 0x01)) + } + } + + Store (Add (Timer, 0xC350), Local1) + Store (0x07, RST) + Store (0x00, ENB) + Store (RBCK, TEMP) + Store (CLR, TEMP) + Store (0x001C001C, HOLD) + Store (0x0210, HCNT) + Store (0x0280, LCNT) + Store (Add (EXPA, Arg1), TAR) + Store (0x65, ICON) + Store (0x01, ENB) + While (LNotEqual (ENSB, 0x01)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (Arg2, DATA) + Store (Add (END, READ), DATA) + While (LNotEqual (ACTV, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Store (DATA, Local0) + Store (0x00, ENB) + While (LNotEqual (ENSB, 0x00)) + { + If (LGreater (Timer, Local1)) + { + Return (0x00) + } + } + + Return (Local0) + } + + Method (PS0, 1, Serialized) + { + OperationRegion (BAR1, SystemMemory, Arg0, 0x88) + Field (BAR1, DWordAcc, NoLock, Preserve) + { + Offset (0x84), + D0D3, 2 + } + + Store (0x00, D0D3) + Store (D0D3, TEMP) + } + + Method (PS3, 1, Serialized) + { + OperationRegion (BAR1, SystemMemory, Arg0, 0x88) + Field (BAR1, DWordAcc, NoLock, Preserve) + { + Offset (0x84), + D0D3, 2 + } + + Store (0x03, D0D3) + Store (D0D3, TEMP) + } + + Method (CSER, 5, Serialized) + { + Name (SB1X, 0x00) + Name (SB0X, 0x00) + Name (SMDX, 0x00) + Name (PINN, 0x00) + Name (REGN, 0x00) + Name (REGA, 0x00) + Name (OLDV, 0x00) + Name (NEWV, 0x00) + Name (RETV, 0x00) + If (LGreater (Arg0, 0x05)) + { + Return (0x00) + } + + If (LEqual (Arg0, 0x00)) + { + Store (SB10, SB1X) + Store (SB00, SB0X) + Store (SMD0, SMDX) + } + + If (LEqual (Arg0, 0x01)) + { + Store (SB11, SB1X) + Store (SB01, SB0X) + Store (SMD1, SMDX) + } + + If (LEqual (Arg0, 0x02)) + { + Store (SB12, SB1X) + Store (SB02, SB0X) + Store (SMD2, SMDX) + } + + If (LEqual (Arg0, 0x03)) + { + Store (SB13, SB1X) + Store (SB03, SB0X) + Store (SMD3, SMDX) + } + + If (LEqual (Arg0, 0x04)) + { + Store (SB14, SB1X) + Store (SB04, SB0X) + Store (SMD4, SMDX) + } + + If (LEqual (Arg0, 0x05)) + { + Store (SB15, SB1X) + Store (SB05, SB0X) + Store (SMD5, SMDX) + } + + If (LGreater (Arg0, 0x05)) + { + Return (0x00) + } + + If (LGreater (Arg1, 0x01)) + { + Return (0x00) + } + + If (LGreater (Arg2, 0x17)) + { + Return (0x00) + } + + If (LGreater (Arg3, 0x01)) + { + Return (0x00) + } + + If (LGreater (Arg4, 0x02)) + { + Return (0x00) + } + + If (LNotEqual (SMDX, 0x03)) + { + Return (0x00) + } + + If (LEqual (Arg4, 0x00)) + { + Store (OUTR, Local0) + } + + If (LEqual (Arg4, 0x01)) + { + Store (CFGR, Local0) + } + + If (LEqual (Arg4, 0x02)) + { + Store (INR, Local0) + } + + If (LEqual (Arg4, 0x03)) + { + Store (POLR, Local0) + } + + PS0 (SB1X) + Divide (Arg2, PPR, PINN, REGN) + Store (DerefOf (Index (Local0, REGN)), REGA) + Store (RREG (SB0X, Arg1, REGA), OLDV) + If (LEqual (Arg4, 0x02)) + { + Store (And (0x01, ShiftRight (OLDV, PINN)), RETV) + } + Else + { + And (OLDV, Not (ShiftLeft (0x01, PINN)), NEWV) + Or (ShiftLeft (Arg3, PINN), NEWV, NEWV) + If (LNotEqual (NEWV, OLDV)) + { + WREG (SB0X, Arg1, REGA, NEWV) + } + } + + PS3 (SB1X) + Return (RETV) + } + } + } + + If (LEqual (PCHV (), SPTL)) + { + Scope (\_SB.PCI0) + { + Device (PEMC) + { + Name (_ADR, 0x001E0004) // _ADR: Address + OperationRegion (SCSR, PCI_Config, 0x00, 0x0100) + Field (SCSR, WordAcc, NoLock, Preserve) + { + Offset (0x84), + PSTA, 32, + Offset (0xA2), + , 2, + PGEN, 1 + } + + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + Store (0x00, PGEN) + PCRA (0xC0, 0x0600, 0x7FFFFFBA) + Sleep (0x02) + PCRO (0xC0, 0x0600, 0x80000045) + And (PSTA, 0xFFFFFFFC, PSTA) + Store (PSTA, TEMP) + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + Store (0x01, PGEN) + Or (PSTA, 0x03, PSTA) + Store (PSTA, TEMP) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + ADBG (Concatenate ("EMH4=", ToDecimalString (EMH4))) + If (LEqual (Arg0, ToUUID ("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))) + { + If (LGreaterEqual (Arg1, Zero)) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + If (LEqual (EMH4, 0x01)) + { + Return (Buffer (0x02) + { + 0x61, 0x02 + }) + } + + Return (Buffer (0x02) + { + 0x21, 0x02 + }) + } + Case (0x05) + { + Return (Buffer (0x01) + { + 0x03 + }) + } + Case (0x06) + { + Return (Buffer (0x01) + { + 0x05 + }) + } + Case (0x09) + { + Switch (EMDS) + { + Case (0x00) + { + Return (Buffer (0x01) + { + 0x00 + }) + } + Case (0x01) + { + Return (Buffer (0x01) + { + 0x01 + }) + } + Case (0x04) + { + Return (Buffer (0x01) + { + 0x04 + }) + } + + } + } + + } + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + + Device (CARD) + { + Name (_ADR, 0x08) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (0x00) + } + } + } + } + } + + Scope (\_SB.PCI0) + { + Device (ISHD) + { + Name (_ADR, 0x00130000) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + + Scope (\_SB.PCI0) + { + Device (HECI) + { + Name (_ADR, 0x00160000) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + + Scope (\_SB.PCI0.LPCB) + { + Device (EC) + { + Name (_HID, EisaId ("PNP0C09")) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_GPE, 0x16) // _GPE: General Purpose Events + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If (LEqual (Arg0, 0x03)) + { + Store (Arg1, \H8DR) + } + } + + OperationRegion (ECOR, EmbeddedControl, 0x00, 0x0100) + Field (ECOR, ByteAcc, NoLock, Preserve) + { + HDBM, 1, + , 1, + , 1, + HFNE, 1, + , 1, + , 1, + HLDM, 1, + Offset (0x01), + BBLS, 1, + BTCM, 1, + , 1, + , 1, + , 1, + HBPR, 1, + BTPC, 1, + Offset (0x02), + HDUE, 1, + , 4, + SNLK, 1, + Offset (0x03), + , 5, + HAUM, 2, + Offset (0x05), + HSPA, 1, + Offset (0x06), + HSUN, 8, + HSRP, 8, + Offset (0x0C), + HLCL, 8, + , 4, + CALM, 1, + Offset (0x0E), + HFNS, 2, + Offset (0x0F), + , 6, + NULS, 1, + Offset (0x10), + HAM0, 8, + HAM1, 8, + HAM2, 8, + HAM3, 8, + HAM4, 8, + HAM5, 8, + HAM6, 8, + HAM7, 8, + HAM8, 8, + HAM9, 8, + HAMA, 8, + HAMB, 8, + HAMC, 8, + HAMD, 8, + HAME, 8, + HAMF, 8, + Offset (0x23), + HANT, 8, + Offset (0x26), + , 2, + HANA, 2, + Offset (0x27), + Offset (0x28), + , 1, + SKEM, 1, + Offset (0x29), + Offset (0x2A), + HATR, 8, + HT0H, 8, + HT0L, 8, + HT1H, 8, + HT1L, 8, + HFSP, 8, + , 6, + HMUT, 1, + Offset (0x31), + , 2, + HUWB, 1, + , 3, + VPON, 1, + VRST, 1, + HWPM, 1, + HWLB, 1, + HWLO, 1, + HWDK, 1, + HWFN, 1, + HWBT, 1, + HWRI, 1, + HWBU, 1, + HWLU, 1, + Offset (0x34), + , 3, + PIBS, 1, + , 3, + HPLO, 1, + Offset (0x36), + HWAC, 16, + HB0S, 7, + HB0A, 1, + HB1S, 7, + HB1A, 1, + HCMU, 1, + , 2, + OVRQ, 1, + DCBD, 1, + DCWL, 1, + DCWW, 1, + HB1I, 1, + , 1, + KBLT, 1, + BTPW, 1, + FNKC, 1, + HUBS, 1, + BDPW, 1, + BDDT, 1, + HUBB, 1, + Offset (0x46), + , 1, + BTWK, 1, + HPLD, 1, + , 1, + HPAC, 1, + BTST, 1, + PSST, 1, + Offset (0x47), + HPBU, 1, + , 1, + HBID, 1, + , 3, + HBCS, 1, + HPNF, 1, + , 1, + GSTS, 1, + , 2, + HLBU, 1, + DOCD, 1, + HCBL, 1, + Offset (0x49), + SLUL, 1, + , 1, + ACAT, 1, + , 4, + ELNK, 1, + Offset (0x4C), + HTMH, 8, + HTML, 8, + HWAK, 16, + HMPR, 8, + , 7, + HMDN, 1, + Offset (0x78), + TMP0, 8, + Offset (0x80), + Offset (0x81), + HIID, 8, + Offset (0x83), + HFNI, 8, + HSPD, 16, + Offset (0x88), + TSL0, 7, + TSR0, 1, + TSL1, 7, + TSR1, 1, + TSL2, 7, + TSR2, 1, + TSL3, 7, + TSR3, 1, + GPUT, 1, + Offset (0x8D), + HDAA, 3, + HDAB, 3, + HDAC, 2, + Offset (0xB0), + HDEN, 32, + HDEP, 32, + HDEM, 8, + HDES, 8, + Offset (0xC4), + SDKL, 1, + Offset (0xC5), + Offset (0xC8), + ATMX, 8, + HWAT, 8, + Offset (0xCC), + PWMH, 8, + PWML, 8, + Offset (0xCF), + , 6, + ESLP, 1, + Offset (0xD0), + Offset (0xED), + , 4, + HDDD, 1 + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + ADBG ("H8 _INI") + If (\H8DR) + { + Store (0x00, HSPA) + } + Else + { + \MBEC (0x05, 0xFE, 0x00) + } + + \_SB.PCI0.LPCB.EC.HKEY.WGIN () + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, DCWL) + } + Else + { + Store (0x01, DCWL) + } + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0062, // Range Minimum + 0x0062, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0066, // Range Minimum + 0x0066, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + }) + Method (LED, 2, NotSerialized) + { + Or (Arg0, Arg1, Local0) + If (\H8DR) + { + Store (Local0, HLCL) + } + Else + { + \WBEC (0x0C, Local0) + } + } + + Name (BAON, 0x00) + Name (WBON, 0x00) + Method (BEEP, 1, NotSerialized) + { + If (LEqual (Arg0, 0x05)) + { + Store (0x00, WBON) + } + + Store (WBON, Local2) + If (BAON) + { + If (LEqual (Arg0, 0x00)) + { + Store (0x00, BAON) + If (WBON) + { + Store (0x03, Local0) + Store (0x08, Local1) + } + Else + { + Store (0x00, Local0) + Store (0x00, Local1) + } + } + Else + { + Store (0xFF, Local0) + Store (0xFF, Local1) + If (LEqual (Arg0, 0x11)) + { + Store (0x00, WBON) + } + + If (LEqual (Arg0, 0x10)) + { + Store (0x01, WBON) + } + } + } + Else + { + Store (Arg0, Local0) + Store (0xFF, Local1) + If (LEqual (Arg0, 0x0F)) + { + Store (Arg0, Local0) + Store (0x08, Local1) + Store (0x01, BAON) + } + + If (LEqual (Arg0, 0x11)) + { + Store (0x00, Local0) + Store (0x00, Local1) + Store (0x00, WBON) + } + + If (LEqual (Arg0, 0x10)) + { + Store (0x03, Local0) + Store (0x08, Local1) + Store (0x01, WBON) + } + } + + If (LEqual (Arg0, 0x03)) + { + Store (0x00, WBON) + If (Local2) + { + Store (0x07, Local0) + If (LOr (LEqual (\SPS, 0x03), LEqual (\SPS, 0x04))) + { + Store (0x00, Local2) + Store (0xFF, Local0) + Store (0xFF, Local1) + } + } + } + + If (LEqual (Arg0, 0x07)) + { + If (Local2) + { + Store (0x00, Local2) + Store (0xFF, Local0) + Store (0xFF, Local1) + } + } + + If (\H8DR) + { + If (LAnd (Local2, LNot (WBON))) + { + Store (0x00, HSRP) + Store (0x00, HSUN) + Sleep (0x64) + } + + If (LNotEqual (Local1, 0xFF)) + { + Store (Local1, HSRP) + } + + If (LNotEqual (Local0, 0xFF)) + { + Store (Local0, HSUN) + } + } + Else + { + If (LAnd (Local2, LNot (WBON))) + { + \WBEC (0x07, 0x00) + \WBEC (0x06, 0x00) + Sleep (0x64) + } + + If (LNotEqual (Local1, 0xFF)) + { + \WBEC (0x07, Local1) + } + + If (LNotEqual (Local0, 0xFF)) + { + \WBEC (0x06, Local0) + } + } + + If (LEqual (Arg0, 0x03)){} + If (LEqual (Arg0, 0x07)) + { + Sleep (0x01F4) + } + } + + Method (EVNT, 1, NotSerialized) + { + If (\H8DR) + { + If (Arg0) + { + Or (HAM5, 0x04, HAM5) + } + Else + { + And (HAM5, 0xFB, HAM5) + } + } + ElseIf (Arg0) + { + \MBEC (0x15, 0xFF, 0x04) + } + Else + { + \MBEC (0x15, 0xFB, 0x00) + } + } + + Name (USPS, 0x00) + PowerResource (PUBS, 0x03, 0x0000) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\H8DR) + { + Store (HUBS, Local0) + } + Else + { + And (\RBEC (0x3B), 0x10, Local0) + } + + If (Local0) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + Store (0x64, Local0) + While (LAnd (USPS, Local0)) + { + Sleep (0x01) + Decrement (Local0) + } + + If (\H8DR) + { + Store (0x01, HUBS) + } + Else + { + \MBEC (0x3B, 0xFF, 0x10) + } + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + Store (0x01, USPS) + If (\H8DR) + { + Store (0x00, HUBS) + } + Else + { + \MBEC (0x3B, 0xEF, 0x00) + } + + Sleep (0x14) + Store (0x00, USPS) + } + } + + Method (CHKS, 0, NotSerialized) + { + Store (0x03E8, Local0) + While (HMPR) + { + Sleep (0x01) + Decrement (Local0) + If (LNot (Local0)) + { + Return (0x8080) + } + } + + If (HMDN) + { + Return (Zero) + } + + Return (0x8081) + } + + Method (LPMD, 0, NotSerialized) + { + Store (0x00, Local0) + Store (0x00, Local1) + Store (0x00, Local2) + If (\H8DR) + { + If (HPAC) + { + If (HPLO) + { + Store (\LPST, Local0) + } + ElseIf (LLess (HWAT, 0x5A)) + { + If (HB0A) + { + If (LOr (And (HB0S, 0x10), LLess (And (HB0S, 0x07), 0x02))) + { + Store (0x01, Local1) + } + } + Else + { + Store (0x01, Local1) + } + + If (HB1A) + { + If (LOr (And (HB1S, 0x10), LLess (And (HB1S, 0x07), 0x02))) + { + Store (0x01, Local2) + } + } + Else + { + Store (0x01, Local2) + } + + If (LAnd (Local1, Local2)) + { + Store (\LPST, Local0) + } + } + } + } + ElseIf (And (\RBEC (0x46), 0x10)) + { + If (And (\RBEC (0x34), 0x80)) + { + Store (\LPST, Local0) + } + ElseIf (LLess (\RBEC (0xC9), 0x5A)) + { + Store (\RBEC (0x38), Local3) + If (And (Local3, 0x80)) + { + If (LOr (And (Local3, 0x10), LLess (And (Local3, 0x07), 0x02))) + { + Store (0x01, Local1) + } + } + Else + { + Store (0x01, Local2) + } + + Store (\RBEC (0x39), Local3) + If (And (Local3, 0x80)) + { + If (LOr (And (Local3, 0x10), LLess (And (Local3, 0x07), 0x02))) + { + Store (0x01, Local1) + } + } + Else + { + Store (0x01, Local2) + } + + If (LAnd (Local1, Local2)) + { + Store (\LPST, Local0) + } + } + } + + Return (Local0) + } + + Method (CLPM, 0, NotSerialized) + { + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + Else + { + Store (LPMD (), Local0) + If (Local0) + { + \STEP (0x04) + } + Else + { + \STEP (0x05) + } + } + } + } + + Method (ECNT, 1, Serialized) + { + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + Store (0x00, SDKL) + ADBG ("EC Exit CS") + \_SB.PCI0.LPCB.EC.LED (0x07, 0x00) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + Return (0x00) + } + Case (0x01) + { + Store (0x01, SDKL) + P8XH (0x00, 0xC5) + ADBG ("EC Enter CS") + \_SB.PCI0.LPCB.EC.LED (0x07, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x00, 0xA0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xA0) + Return (0x00) + } + Case (0x02) + { + Store (0x00, ESLP) + ADBG ("Resiliency Exit") + \_SB.SGOV (0x0203000F, 0x01) + \_SB.SGOV (0x02010003, 0x00) + Sleep (0x0A) + Return (0x00) + } + Case (0x03) + { + Store (0x01, ESLP) + ADBG ("Resiliency Entry") + \_SB.SGOV (0x0203000F, 0x00) + \_SB.SGOV (0x02010003, 0x01) + ADBG ("Clr PSC") + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000FD001) + Return (0x00) + } + Default + { + Return (0xFF) + } + + } + } + + Device (HKEY) + { + Name (_HID, EisaId ("LEN0268")) // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_INI, 0, NotSerialized) // _INI: Initialize + { + ADBG ("HKEY _INI") + ADBG ("_INI0") + Store (0x00, \_SB.PCI0.LPCB.EC.HKEY.ANGN) + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F0001) + ADBG ("_INI1") + } + + Method (MHKV, 0, NotSerialized) + { + Return (0x0200) + } + + Name (DHKC, 0x00) + Name (DHKB, 0x01) + Name (DHKH, 0x00) + Name (DHKW, 0x00) + Name (DHKS, 0x00) + Name (DHKD, 0x00) + Name (DHKN, 0x0808) + Name (DHKE, 0x00) + Name (DHKF, 0x001F0000) + Name (DHKT, 0x00) + Name (DHWW, 0x00) + Mutex (XDHK, 0x00) + Method (MHKA, 1, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + Return (0x03) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Return (0xFFFFFFFB) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (0x00) + } + ElseIf (LEqual (Arg0, 0x03)) + { + Return (0x001F0000) + } + Else + { + Return (0x00) + } + } + + Method (MHKN, 1, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + Return (0x03) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Return (DHKN) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (DHKE) + } + ElseIf (LEqual (Arg0, 0x03)) + { + Return (DHKF) + } + Else + { + Return (0x00) + } + } + + Method (MHKK, 2, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + Return (0x03) + } + ElseIf (DHKC) + { + If (LEqual (Arg0, 0x01)) + { + Return (And (DHKN, Arg1)) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (And (DHKE, Arg1)) + } + ElseIf (LEqual (Arg0, 0x03)) + { + Return (And (DHKF, Arg1)) + } + Else + { + Return (0x00) + } + } + Else + { + Return (Zero) + } + } + + Method (MHKM, 2, NotSerialized) + { + Acquire (XDHK, 0xFFFF) + If (LGreater (Arg0, 0x60)) + { + Noop + } + ElseIf (LLessEqual (Arg0, 0x20)) + { + ShiftLeft (One, Decrement (Arg0), Local0) + If (And (Local0, 0xFFFFFFFB)) + { + If (Arg1) + { + Or (Local0, DHKN, DHKN) + } + Else + { + And (DHKN, XOr (Local0, 0xFFFFFFFF), DHKN) + } + } + Else + { + Noop + } + } + ElseIf (LLessEqual (Arg0, 0x40)) + { + Noop + } + ElseIf (LLessEqual (Arg0, 0x60)) + { + Subtract (Arg0, 0x40, Arg0) + ShiftLeft (One, Decrement (Arg0), Local0) + If (And (Local0, 0x001F0000)) + { + If (Arg1) + { + Or (Local0, DHKF, DHKF) + } + Else + { + And (DHKF, XOr (Local0, 0xFFFFFFFF), DHKF) + } + } + Else + { + Noop + } + } + + Release (XDHK) + } + + Method (MHKS, 0, NotSerialized) + { + Notify (\_SB.SLPB, 0x80) + } + + Method (MHKC, 1, NotSerialized) + { + Store (Arg0, DHKC) + } + + Method (MHKP, 0, NotSerialized) + { + Acquire (XDHK, 0xFFFF) + If (DHWW) + { + Store (DHWW, Local1) + Store (Zero, DHWW) + } + ElseIf (DHKW) + { + Store (DHKW, Local1) + Store (Zero, DHKW) + } + ElseIf (DHKD) + { + Store (DHKD, Local1) + Store (Zero, DHKD) + } + ElseIf (DHKS) + { + Store (DHKS, Local1) + Store (Zero, DHKS) + } + ElseIf (DHKT) + { + Store (DHKT, Local1) + Store (Zero, DHKT) + } + Else + { + Store (DHKH, Local1) + Store (Zero, DHKH) + } + + Release (XDHK) + Return (Local1) + } + + Method (MHKE, 1, Serialized) + { + Store (Arg0, DHKB) + Acquire (XDHK, 0xFFFF) + Store (Zero, DHKH) + Store (Zero, DHKW) + Store (Zero, DHKS) + Store (Zero, DHKD) + Store (Zero, DHKT) + Store (Zero, DHWW) + Release (XDHK) + } + + Method (MHKQ, 1, Serialized) + { + If (DHKB) + { + If (DHKC) + { + Acquire (XDHK, 0xFFFF) + If (LLess (Arg0, 0x1000)){} + ElseIf (LLess (Arg0, 0x2000)) + { + Store (Arg0, DHKH) + } + ElseIf (LLess (Arg0, 0x3000)) + { + Store (Arg0, DHKW) + } + ElseIf (LLess (Arg0, 0x4000)) + { + Store (Arg0, DHKS) + } + ElseIf (LLess (Arg0, 0x5000)) + { + Store (Arg0, DHKD) + } + ElseIf (LLess (Arg0, 0x6000)) + { + Store (Arg0, DHKH) + } + ElseIf (LLess (Arg0, 0x7000)) + { + Store (Arg0, DHKT) + } + ElseIf (LLess (Arg0, 0x8000)) + { + Store (Arg0, DHWW) + } + Else + { + } + + Release (XDHK) + Notify (HKEY, 0x80) + } + ElseIf (LEqual (Arg0, 0x1004)) + { + Notify (\_SB.SLPB, 0x80) + } + } + } + + Method (MHKB, 1, NotSerialized) + { + If (LEqual (Arg0, 0x00)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x11) + Store (0x00, \LIDB) + } + ElseIf (LEqual (Arg0, 0x01)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x10) + Store (0x01, \LIDB) + } + Else + { + } + } + + Method (MHKD, 0, NotSerialized) + { + If (LEqual (\PLUX, 0x00)) + { + If (VIGD) + { + \_SB.PCI0.GFX0.VLOC (0x00) + } + } + } + + Method (MHQC, 1, NotSerialized) + { + If (\WNTF) + { + If (LEqual (Arg0, 0x00)) + { + Return (\CWAC) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Return (\CWAP) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Return (\CWAT) + } + Else + { + Noop + } + } + Else + { + Noop + } + + Return (0x00) + } + + Method (MHGC, 0, NotSerialized) + { + If (\WNTF) + { + Acquire (XDHK, 0xFFFF) + If (CKC4 (0x00)) + { + Store (0x03, Local0) + } + Else + { + Store (0x04, Local0) + } + + Release (XDHK) + Return (Local0) + } + Else + { + Noop + } + + Return (0x00) + } + + Method (MHSC, 1, NotSerialized) + { + If (LAnd (\CWAC, \WNTF)) + { + Acquire (XDHK, 0xFFFF) + If (\OSC4) + { + If (LEqual (Arg0, 0x03)) + { + If (LNot (\CWAS)) + { + \PNTF (0x81) + Store (0x01, \CWAS) + } + } + ElseIf (LEqual (Arg0, 0x04)) + { + If (\CWAS) + { + \PNTF (0x81) + Store (0x00, \CWAS) + } + } + Else + { + Noop + } + } + + Release (XDHK) + } + Else + { + Noop + } + } + + Method (CKC4, 1, NotSerialized) + { + Store (0x00, Local0) + If (\C4WR) + { + If (LNot (\C4AC)) + { + Or (Local0, 0x01, Local0) + } + } + + If (\C4NA) + { + Or (Local0, 0x02, Local0) + } + + If (LAnd (\CWAC, \CWAS)) + { + Or (Local0, 0x04, Local0) + } + + And (Local0, Not (Arg0), Local0) + Return (Local0) + } + + Method (MHQE, 0, NotSerialized) + { + Return (\C4WR) + } + + Method (MHGE, 0, NotSerialized) + { + If (LAnd (\C4WR, \C4AC)) + { + Return (0x04) + } + + Return (0x03) + } + + Method (MHSE, 1, NotSerialized) + { + If (\C4WR) + { + Store (\C4AC, Local0) + If (LEqual (Arg0, 0x03)) + { + Store (0x00, \C4AC) + If (XOr (Local0, \C4AC)) + { + If (\OSC4) + { + \PNTF (0x81) + } + } + } + ElseIf (LEqual (Arg0, 0x04)) + { + Store (0x01, \C4AC) + If (XOr (Local0, \C4AC)) + { + If (\OSC4) + { + \PNTF (0x81) + } + } + } + } + } + + Method (UAWO, 1, NotSerialized) + { + Return (\UAWS (Arg0)) + } + + Method (MLCG, 1, NotSerialized) + { + Store (\KBLS (0x00, 0x00), Local0) + Return (Local0) + } + + Method (MLCS, 1, NotSerialized) + { + Store (\KBLS (0x01, Arg0), Local0) + If (LNot (And (Local0, 0x80000000))) + { + If (And (Arg0, 0x00010000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6001) + } + ElseIf (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00020000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1012) + } + } + + Return (Local0) + } + + Method (DSSG, 1, NotSerialized) + { + Or (0x0400, \PDCI, Local0) + Return (Local0) + } + + Method (DSSS, 1, NotSerialized) + { + Or (\PDCI, Arg0, \PDCI) + } + + Method (SBSG, 1, NotSerialized) + { + Return (\SYBC (0x00, 0x00)) + } + + Method (SBSS, 1, NotSerialized) + { + Return (\SYBC (0x01, Arg0)) + } + + Method (PBLG, 1, NotSerialized) + { + Store (\BRLV, Local0) + Or (Local0, 0x0F00, Local1) + Return (Local1) + } + + Method (PBLS, 1, NotSerialized) + { + Store (Arg0, \BRLV) + If (\VIGD) + { + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \VBRC (\BRLV) + } + + If (LNot (\NBCF)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6050) + } + + Return (0x00) + } + + Method (PMSG, 1, NotSerialized) + { + Store (\PRSM (0x00, 0x00), Local0) + Return (Local0) + } + + Method (PMSS, 1, NotSerialized) + { + \PRSM (0x01, Arg0) + Return (0x00) + } + + Method (ISSG, 1, NotSerialized) + { + Store (\ISSP, Local0) + If (\ISSP) + { + Or (Local0, 0x01000000, Local0) + Or (Local0, ShiftLeft (\ISFS, 0x19), Local0) + } + + Or (Local0, And (\ISCG, 0x30), Local0) + And (Local0, 0xFFFFFFFE, Local0) + Or (Local0, 0x02, Local0) + Or (Local0, ShiftLeft (And (\ISWK, 0x02), 0x02), Local0) + Return (Local0) + } + + Method (ISSS, 1, NotSerialized) + { + Store (Arg0, \ISCG) + Return (0x00) + } + + Method (FFSG, 1, NotSerialized) + { + Return (0x00) + } + + Method (FFSS, 1, NotSerialized) + { + Return (0x80000000) + } + + Method (GMKS, 0, NotSerialized) + { + Return (\FNSC (0x02, 0x00)) + } + + Method (SMKS, 1, NotSerialized) + { + Return (\FNSC (0x03, And (Arg0, 0x00010001))) + } + + Method (GSKL, 1, NotSerialized) + { + Return (\FNSC (0x04, And (Arg0, 0x0F000000))) + } + + Method (SSKL, 1, NotSerialized) + { + Return (\FNSC (0x05, And (Arg0, 0x0F00FFFF))) + } + + Method (INSG, 1, NotSerialized) + { + Store (\IOEN, Local0) + Or (Local0, ShiftLeft (\IOST, 0x07), Local0) + Or (Local0, ShiftLeft (\IOCP, 0x08), Local0) + Or (Local0, 0x10000000, Local0) + Return (Local0) + } + + Method (INSS, 1, NotSerialized) + { + If (And (Arg0, 0x10000000)) + { + If (\IOCP) + { + Store (ShiftRight (And (Arg0, 0x80), 0x07), Local0) + If (LNot (\EZRC (Local0))) + { + Store (Local0, \IOST) + } + } + + Return (0x00) + } + + If (LAnd (\IOCP, And (Arg0, 0x01))) + { + Store (0x01, \IOEN) + } + Else + { + Store (0x00, \IOEN) + If (\IOST) + { + If (LNot (\ISOC (0x00))) + { + Store (0x00, \IOST) + } + } + } + + Return (0x00) + } + } + + Device (AC) + { + Name (_HID, "ACPI0003") // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_PCL, Package (0x01) // _PCL: Power Consumer List + { + \_SB + }) + Method (_PSR, 0, NotSerialized) // _PSR: Power Source + { + If (\H8DR) + { + Return (HPAC) + } + ElseIf (And (\RBEC (0x46), 0x10)) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + + Scope (HKEY) + { + Method (SMPS, 1, Serialized) + { + If (LNotEqual (And (Arg0, Not (0xFFFF)), 0x00)) + { + Return (0x80000000) + } + + Switch (And (Arg0, 0xFFFF)) + { + Case (0x00) + { + Store (0x0100, Local1) + } + Case (0x0100) + { + Store (\_SB.PCI0.LPCB.EC.HWAT, Local1) + Or (Local1, ShiftLeft (0x2D, 0x10), Local1) + } + Default + { + Store (0x80000000, Local1) + } + + } + + Return (Local1) + } + } + + Method (_Q22, 0, NotSerialized) // _Qxx: EC Query + { + CLPM () + If (HB0A) + { + Notify (BAT0, 0x80) + } + } + + Method (_Q4A, 0, NotSerialized) // _Qxx: EC Query + { + CLPM () + Notify (BAT0, 0x81) + } + + Method (_Q4B, 0, NotSerialized) // _Qxx: EC Query + { + CLPM () + Notify (BAT0, 0x80) + } + + Method (_Q24, 0, NotSerialized) // _Qxx: EC Query + { + CLPM () + Notify (BAT0, 0x80) + } + + Method (BFCC, 0, NotSerialized) + { + If (\_SB.PCI0.LPCB.EC.BAT0.B0ST) + { + Notify (BAT0, 0x81) + } + } + + Method (BATW, 1, NotSerialized) + { + If (\BT2T){} + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBRC, 16, + SBFC, 16, + SBAE, 16, + SBRS, 16, + SBAC, 16, + SBVO, 16, + SBAF, 16, + SBBS, 16 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBBM, 16, + SBMD, 16, + SBCC, 16 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBDC, 16, + SBDV, 16, + SBOM, 16, + SBSI, 16, + SBDT, 16, + SBSN, 16 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBCH, 32 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBMN, 128 + } + + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + SBDN, 128 + } + + Mutex (BATM, 0x00) + Method (GBIF, 3, NotSerialized) + { + Acquire (BATM, 0xFFFF) + If (Arg2) + { + Or (Arg0, 0x01, HIID) + Store (SBBM, Local7) + ShiftRight (Local7, 0x0F, Local7) + XOr (Local7, 0x01, Index (Arg1, 0x00)) + Store (Arg0, HIID) + If (Local7) + { + Multiply (SBFC, 0x0A, Local1) + } + Else + { + Store (SBFC, Local1) + } + + Store (Local1, Index (Arg1, 0x02)) + Or (Arg0, 0x02, HIID) + If (Local7) + { + Multiply (SBDC, 0x0A, Local0) + } + Else + { + Store (SBDC, Local0) + } + + Store (Local0, Index (Arg1, 0x01)) + Divide (Local1, 0x14, Local2, Index (Arg1, 0x05)) + If (Local7) + { + Store (0xC8, Index (Arg1, 0x06)) + } + ElseIf (SBDV) + { + Divide (0x00030D40, SBDV, Local2, Index (Arg1, 0x06)) + } + Else + { + Store (0x00, Index (Arg1, 0x06)) + } + + Store (SBDV, Index (Arg1, 0x04)) + Store (SBSN, Local0) + Name (SERN, Buffer (0x06) + { + " " + }) + Store (0x04, Local2) + While (Local0) + { + Divide (Local0, 0x0A, Local1, Local0) + Add (Local1, 0x30, Index (SERN, Local2)) + Decrement (Local2) + } + + Store (SERN, Index (Arg1, 0x0A)) + Or (Arg0, 0x06, HIID) + Store (SBDN, Index (Arg1, 0x09)) + Or (Arg0, 0x04, HIID) + Name (BTYP, Buffer (0x05) + { + 0x00, 0x00, 0x00, 0x00, 0x00 + }) + Store (SBCH, BTYP) + Store (BTYP, Index (Arg1, 0x0B)) + Or (Arg0, 0x05, HIID) + Store (SBMN, Index (Arg1, 0x0C)) + } + Else + { + Store (0xFFFFFFFF, Index (Arg1, 0x01)) + Store (0x00, Index (Arg1, 0x05)) + Store (0x00, Index (Arg1, 0x06)) + Store (0xFFFFFFFF, Index (Arg1, 0x02)) + } + + Release (BATM) + Return (Arg1) + } + + Method (GBIX, 3, NotSerialized) + { + Acquire (BATM, 0xFFFF) + If (Arg2) + { + Or (Arg0, 0x01, HIID) + Store (SBCC, Local7) + Store (Local7, Index (Arg1, 0x08)) + Store (SBBM, Local7) + ShiftRight (Local7, 0x0F, Local7) + XOr (Local7, 0x01, Index (Arg1, 0x01)) + Store (Arg0, HIID) + If (Local7) + { + Multiply (SBFC, 0x0A, Local1) + } + Else + { + Store (SBFC, Local1) + } + + Store (Local1, Index (Arg1, 0x03)) + Or (Arg0, 0x02, HIID) + If (Local7) + { + Multiply (SBDC, 0x0A, Local0) + } + Else + { + Store (SBDC, Local0) + } + + Store (Local0, Index (Arg1, 0x02)) + Divide (Local1, 0x14, Local2, Index (Arg1, 0x06)) + If (Local7) + { + Store (0xC8, Index (Arg1, 0x07)) + } + ElseIf (SBDV) + { + Divide (0x00030D40, SBDV, Local2, Index (Arg1, 0x07)) + } + Else + { + Store (0x00, Index (Arg1, 0x07)) + } + + Store (SBDV, Index (Arg1, 0x05)) + Store (SBSN, Local0) + Name (SERN, Buffer (0x06) + { + " " + }) + Store (0x04, Local2) + While (Local0) + { + Divide (Local0, 0x0A, Local1, Local0) + Add (Local1, 0x30, Index (SERN, Local2)) + Decrement (Local2) + } + + Store (SERN, Index (Arg1, 0x11)) + Or (Arg0, 0x06, HIID) + Store (SBDN, Index (Arg1, 0x10)) + Or (Arg0, 0x04, HIID) + Name (BTYP, Buffer (0x05) + { + 0x00, 0x00, 0x00, 0x00, 0x00 + }) + Store (SBCH, BTYP) + Store (BTYP, Index (Arg1, 0x12)) + Or (Arg0, 0x05, HIID) + Store (SBMN, Index (Arg1, 0x13)) + } + Else + { + Store (0xFFFFFFFF, Index (Arg1, 0x02)) + Store (0x00, Index (Arg1, 0x06)) + Store (0x00, Index (Arg1, 0x07)) + Store (0xFFFFFFFF, Index (Arg1, 0x03)) + } + + Release (BATM) + Return (Arg1) + } + + Name (B0I0, 0x00) + Name (B0I1, 0x00) + Name (B0I2, 0x00) + Name (B0I3, 0x00) + Name (B1I0, 0x00) + Name (B1I1, 0x00) + Name (B1I2, 0x00) + Name (B1I3, 0x00) + Method (GBST, 4, NotSerialized) + { + Acquire (BATM, 0xFFFF) + If (And (Arg1, 0x20)) + { + Store (0x02, Local0) + } + ElseIf (And (Arg1, 0x40)) + { + Store (0x01, Local0) + } + Else + { + Store (0x00, Local0) + } + + If (And (Arg1, 0x07)){} + Else + { + Or (Local0, 0x04, Local0) + } + + If (LEqual (And (Arg1, 0x07), 0x07)) + { + Store (0x04, Local0) + Store (0x00, Local1) + Store (0x00, Local2) + Store (0x00, Local3) + } + Else + { + Store (Arg0, HIID) + Store (SBVO, Local3) + If (Arg2) + { + Multiply (SBRC, 0x0A, Local2) + } + Else + { + Store (SBRC, Local2) + } + + Store (SBAC, Local1) + If (LGreaterEqual (Local1, 0x8000)) + { + If (And (Local0, 0x01)) + { + Subtract (0x00010000, Local1, Local1) + } + Else + { + Store (0x00, Local1) + } + } + ElseIf (LNot (And (Local0, 0x02))) + { + Store (0x00, Local1) + } + + If (Arg2) + { + Multiply (Local3, Local1, Local1) + Divide (Local1, 0x03E8, Local7, Local1) + } + } + + Store (ShiftLeft (0x01, ShiftRight (Arg0, 0x04)), Local5) + Or (BSWA, BSWR, BSWA) + If (LEqual (And (BSWA, Local5), 0x00)) + { + Store (Local0, Index (Arg3, 0x00)) + Store (Local1, Index (Arg3, 0x01)) + Store (Local2, Index (Arg3, 0x02)) + Store (Local3, Index (Arg3, 0x03)) + If (LEqual (Arg0, 0x00)) + { + Store (Local0, B0I0) + Store (Local1, B0I1) + Store (Local2, B0I2) + Store (Local3, B0I3) + } + Else + { + Store (Local0, B1I0) + Store (Local1, B1I1) + Store (Local2, B1I2) + Store (Local3, B1I3) + } + } + Else + { + If (\_SB.PCI0.LPCB.EC.AC._PSR ()) + { + If (LEqual (Arg0, 0x00)) + { + Store (B0I0, Index (Arg3, 0x00)) + Store (B0I1, Index (Arg3, 0x01)) + Store (B0I2, Index (Arg3, 0x02)) + Store (B0I3, Index (Arg3, 0x03)) + } + Else + { + Store (B1I0, Index (Arg3, 0x00)) + Store (B1I1, Index (Arg3, 0x01)) + Store (B1I2, Index (Arg3, 0x02)) + Store (B1I3, Index (Arg3, 0x03)) + } + } + Else + { + Store (Local0, Index (Arg3, 0x00)) + Store (Local1, Index (Arg3, 0x01)) + Store (Local2, Index (Arg3, 0x02)) + Store (Local3, Index (Arg3, 0x03)) + } + + If (LAnd (LEqual (And (Local0, 0x04), 0x00), LAnd (LGreater (Local2, 0x00), LGreater (Local3, 0x00)))) + { + And (BSWA, Not (Local5), BSWA) + Store (Local0, Index (Arg3, 0x00)) + Store (Local1, Index (Arg3, 0x01)) + Store (Local2, Index (Arg3, 0x02)) + Store (Local3, Index (Arg3, 0x03)) + } + } + + Release (BATM) + Return (Arg3) + } + + Name (BSWR, 0x00) + Name (BSWA, 0x00) + Method (AJTP, 3, NotSerialized) + { + Store (Arg1, Local0) + Acquire (BATM, 0xFFFF) + Store (Arg0, HIID) + Store (SBRC, Local1) + Release (BATM) + If (LEqual (Arg0, 0x00)) + { + Store (HB0S, Local2) + } + Else + { + Store (HB1S, Local2) + } + + If (And (Local2, 0x20)) + { + If (LGreater (Arg2, 0x00)) + { + Add (Local0, 0x01, Local0) + } + + If (LLessEqual (Local0, Local1)) + { + Add (Local1, 0x01, Local0) + } + } + ElseIf (And (Local2, 0x40)) + { + If (LGreaterEqual (Local0, Local1)) + { + Subtract (Local1, 0x01, Local0) + } + } + + Return (Local0) + } + + Device (BAT0) + { + Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_PCL, Package (0x01) // _PCL: Power Consumer List + { + \_SB + }) + Name (B0ST, 0x00) + Name (BT0I, Package (0x0D) + { + 0x00, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0x01, + 0x2A30, + 0x00, + 0x00, + 0x01, + 0x01, + "", + "", + "", + "" + }) + Name (BX0I, Package (0x15) + { + 0x01, + 0x00, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0x01, + 0xFFFFFFFF, + 0x00, + 0x00, + 0xFFFFFFFF, + 0x00017318, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0x03E8, + 0x01F4, + 0xFFFFFFFF, + 0xFFFFFFFF, + "", + "", + "", + "", + 0x00 + }) + Name (BT0P, Package (0x04){}) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\H8DR) + { + Store (HB0A, B0ST) + } + ElseIf (And (\RBEC (0x38), 0x80)) + { + Store (0x01, B0ST) + } + Else + { + Store (0x00, B0ST) + } + + If (B0ST) + { + Return (0x1F) + } + Else + { + Return (0x0F) + } + } + + Method (_BIF, 0, NotSerialized) // _BIF: Battery Information + { + Store (0x00, Local7) + Store (0x0A, Local6) + While (LAnd (LNot (Local7), Local6)) + { + If (HB0A) + { + If (LEqual (And (HB0S, 0x07), 0x07)) + { + Sleep (0x03E8) + Decrement (Local6) + } + Else + { + Store (0x01, Local7) + } + } + Else + { + Store (0x00, Local6) + } + } + + GBIX (0x00, BX0I, Local7) + Store (DerefOf (Index (BX0I, 0x01)), Index (BT0I, 0x00)) + Store (DerefOf (Index (BX0I, 0x02)), Index (BT0I, 0x01)) + Store (DerefOf (Index (BX0I, 0x03)), Index (BT0I, 0x02)) + Store (DerefOf (Index (BX0I, 0x04)), Index (BT0I, 0x03)) + Store (DerefOf (Index (BX0I, 0x05)), Index (BT0I, 0x04)) + Store (DerefOf (Index (BX0I, 0x06)), Index (BT0I, 0x05)) + Store (DerefOf (Index (BX0I, 0x07)), Index (BT0I, 0x06)) + Store (DerefOf (Index (BX0I, 0x0E)), Index (BT0I, 0x07)) + Store (DerefOf (Index (BX0I, 0x0F)), Index (BT0I, 0x08)) + Store (DerefOf (Index (BX0I, 0x10)), Index (BT0I, 0x09)) + Store (DerefOf (Index (BX0I, 0x11)), Index (BT0I, 0x0A)) + Store (DerefOf (Index (BX0I, 0x12)), Index (BT0I, 0x0B)) + Store (DerefOf (Index (BX0I, 0x13)), Index (BT0I, 0x0C)) + Return (BT0I) + } + + Method (_BIX, 0, NotSerialized) // _BIX: Battery Information Extended + { + Store (0x00, Local7) + Store (0x0A, Local6) + While (LAnd (LNot (Local7), Local6)) + { + If (HB0A) + { + If (LEqual (And (HB0S, 0x07), 0x07)) + { + Sleep (0x03E8) + Decrement (Local6) + } + Else + { + Store (0x01, Local7) + } + } + Else + { + Store (0x00, Local6) + } + } + + Return (GBIX (0x00, BX0I, Local7)) + } + + Method (_BST, 0, NotSerialized) // _BST: Battery Status + { + XOr (DerefOf (Index (BX0I, 0x01)), 0x01, Local0) + Return (GBST (0x00, HB0S, Local0, BT0P)) + } + + Method (_BTP, 1, NotSerialized) // _BTP: Battery Trip Point + { + And (HAM4, 0xEF, HAM4) + If (Arg0) + { + Store (0x00, Local0) + Store (Arg0, Local1) + If (LNot (DerefOf (Index (BX0I, 0x01)))) + { + Divide (Local1, 0x0A, Local0, Local1) + } + + Store (AJTP (0x00, Local1, Local0), Local1) + And (Local1, 0xFF, HT0L) + And (ShiftRight (Local1, 0x08), 0xFF, HT0H) + Or (HAM4, 0x10, HAM4) + } + } + } + + Scope (HKEY) + { + Method (SCRQ, 1, Serialized) + { + Name (SCRS, 0x00) + Store (Arg0, Local0) + Store (0x00, Local1) + ADBG (Concatenate ("SCRQ =", ToHexString (Local0))) + If (LEqual (And (Local0, 0x80000000), 0x00)) + { + Switch (And (Local0, 0xFFFF)) + { + Case (0x00) + { + Store (0x01000000, Local2) + } + Case (0x0200) + { + Return (0x01) + } + Case (0x0210) + { + Return (0x01) + } + Case (0x0211) + { + Return (0x01) + } + Case (0x0212) + { + Return (0x01) + } + Case (0x0300) + { + Return (0x01) + } + Case (0x0301) + { + Return (0x01) + } + Case (0x0302) + { + Return (0x01) + } + Default + { + Return (0x00) + } + + } + + Return (Local2) + } + Else + { + Store (Add (0x00, 0x40000000), Local2) + Switch (And (Local0, 0xFFFF)) + { + Case (0x00) + { + Store (0x01000000, Local2) + } + Case (0x0200) + { + Store (0x01000000, Local2) + } + Case (0x0210) + { + \SREQ (0x02, 0x00, 0x00) + } + Case (0x0211) + { + \SREQ (0x02, 0x01, 0x00) + } + Case (0x0212) + { + \SREQ (0x02, 0x02, 0x00) + } + Case (0x0300) + { + Store (0x01000000, Local2) + } + Case (0x0301) + { + If (LEqual (\TBTS, 0x01)) + { + \_SB.TBFP (0x01) + } + Else + { + Store (Add (0x02, 0x80000000), Local2) + } + } + Case (0x0302) + { + If (LEqual (\TBTS, 0x01)) + { + \_SB.TBFP (0x00) + } + Else + { + Store (Add (0x02, 0x80000000), Local2) + } + } + Default + { + Store (Add (0x01, 0x80000000), Local2) + } + + } + + Return (Local2) + } + } + } + } + + Device (FWHD) + { + Name (_HID, EisaId ("INT0800")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFF000000, // Address Base + 0x01000000, // Address Length + ) + }) + } + + Device (HPET) + { + Name (_HID, EisaId ("PNP0103")) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0xFED00000, // Address Base + 0x00000400, // Address Length + _Y32) + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (HPTE) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + If (HPTE) + { + CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y32._BAS, HPT0) // _BAS: Base Address + Store (HPTB, HPT0) + } + + Return (BUF0) + } + } + + Device (IPIC) + { + Name (_HID, EisaId ("PNP0000")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0020, // Range Minimum + 0x0020, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0024, // Range Minimum + 0x0024, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0028, // Range Minimum + 0x0028, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x002C, // Range Minimum + 0x002C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0030, // Range Minimum + 0x0030, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0034, // Range Minimum + 0x0034, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0038, // Range Minimum + 0x0038, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x003C, // Range Minimum + 0x003C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A0, // Range Minimum + 0x00A0, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A4, // Range Minimum + 0x00A4, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A8, // Range Minimum + 0x00A8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00AC, // Range Minimum + 0x00AC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B0, // Range Minimum + 0x00B0, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B4, // Range Minimum + 0x00B4, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B8, // Range Minimum + 0x00B8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00BC, // Range Minimum + 0x00BC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x04D0, // Range Minimum + 0x04D0, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IRQNoFlags () + {2} + }) + } + + Device (MATH) + { + Name (_HID, EisaId ("PNP0C04")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x00F0, // Range Minimum + 0x00F0, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {13} + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x1F) + } + Else + { + Return (0x00) + } + } + } + + Device (LDRC) + { + Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x002E, // Range Minimum + 0x002E, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x004E, // Range Minimum + 0x004E, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0061, // Range Minimum + 0x0061, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0063, // Range Minimum + 0x0063, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0065, // Range Minimum + 0x0065, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0067, // Range Minimum + 0x0067, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0080, // Range Minimum + 0x0080, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0092, // Range Minimum + 0x0092, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x00B2, // Range Minimum + 0x00B2, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0680, // Range Minimum + 0x0680, // Range Maximum + 0x01, // Alignment + 0x20, // Length + ) + IO (Decode16, + 0xFFFF, // Range Minimum + 0xFFFF, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0xFFFF, // Range Minimum + 0xFFFF, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0xFFFF, // Range Minimum + 0xFFFF, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x1800, // Range Minimum + 0x1800, // Range Maximum + 0x01, // Alignment + 0xFF, // Length + ) + IO (Decode16, + 0x164E, // Range Minimum + 0x164E, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + }) + } + + Device (LDR2) + { + Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID + Name (_UID, "LPC_DEV") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0800, // Range Minimum + 0x0800, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (PCHV (), SPTH)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + + Device (TIMR) + { + Name (_HID, EisaId ("PNP0100")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0040, // Range Minimum + 0x0040, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x0050, // Range Minimum + 0x0050, // Range Maximum + 0x10, // Alignment + 0x04, // Length + ) + IRQNoFlags () + {0} + }) + } + + Device (CWDT) + { + Name (_HID, EisaId ("INT3F0D")) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID + Name (BUF0, ResourceTemplate () + { + IO (Decode16, + 0x1854, // Range Minimum + 0x1854, // Range Maximum + 0x04, // Alignment + 0x04, // Length + ) + }) + Method (_STA, 0, Serialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Return (BUF0) + } + } + + Device (SPKR) + { + Name (_HID, EisaId ("PNP0800")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0061, // Range Minimum + 0x0061, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + }) + } + + Device (KBD) + { + Method (_HID, 0, NotSerialized) // _HID: Hardware ID + { + If (\WIN8) + { + Return (0x7100AE30) + } + + Return (0x0303D041) + } + + Name (_CID, EisaId ("PNP0303")) // _CID: Compatible ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("LEN0091")) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0F13")) // _CID: Compatible ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + Method (MHID, 0, NotSerialized) + { + And (PNHM, 0x0FFF0FF0, Local0) + If (LEqual (Local0, 0x000406E0)) + { + Store (0x7B00AE30, _HID) + } + ElseIf (\_SB.PCI0.LPCB.NFCD) + { + Store (0x9100AE30, _HID) + } + Else + { + Store (0x9200AE30, _HID) + } + } + } + } + + Name (ECUP, 0x01) + Mutex (EHLD, 0x00) + Method (TBTD, 1, Serialized) + { + ADBG ("TBTD") + Switch (ToInteger (Arg0)) + { + Case (Package (0x08) + { + 0x01, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08 + } + +) + { + Store (0x1C, Local0) + } + Case (Package (0x08) + { + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10 + } + +) + { + Store (0x1D, Local0) + } + Case (Package (0x04) + { + 0x11, + 0x12, + 0x13, + 0x14 + } + +) + { + Store (0x1B, Local0) + } + Case (Package (0x03) + { + 0x15, + 0x16, + 0x17 + } + +) + { + Store (0x01, Local0) + } + + } + + ADBG ("Device no") + ADBG (Local0) + Return (Local0) + } + + Method (TBTF, 1, Serialized) + { + ADBG ("TBTF") + Switch (ToInteger (Arg0)) + { + Case (0x01) + { + Store (And (\RPA1, 0x0F), Local0) + } + Case (0x02) + { + Store (And (\RPA2, 0x0F), Local0) + } + Case (0x03) + { + Store (And (\RPA3, 0x0F), Local0) + } + Case (0x04) + { + Store (And (\RPA4, 0x0F), Local0) + } + Case (0x05) + { + Store (And (\RPA5, 0x0F), Local0) + } + Case (0x06) + { + Store (And (\RPA6, 0x0F), Local0) + } + Case (0x07) + { + Store (And (\RPA7, 0x0F), Local0) + } + Case (0x08) + { + Store (And (\RPA8, 0x0F), Local0) + } + Case (0x09) + { + Store (And (\RPA9, 0x0F), Local0) + } + Case (0x0A) + { + Store (And (\RPAA, 0x0F), Local0) + } + Case (0x0B) + { + Store (And (\RPAB, 0x0F), Local0) + } + Case (0x0C) + { + Store (And (\RPAC, 0x0F), Local0) + } + Case (0x0D) + { + Store (And (\RPAD, 0x0F), Local0) + } + Case (0x0E) + { + Store (And (\RPAE, 0x0F), Local0) + } + Case (0x0F) + { + Store (And (\RPAF, 0x0F), Local0) + } + Case (0x10) + { + Store (And (\RPAG, 0x0F), Local0) + } + Case (0x11) + { + Store (And (\RPAH, 0x0F), Local0) + } + Case (0x12) + { + Store (And (\RPAI, 0x0F), Local0) + } + Case (0x13) + { + Store (And (\RPAJ, 0x0F), Local0) + } + Case (0x14) + { + Store (And (\RPAK, 0x0F), Local0) + } + Case (0x15) + { + Store (0x00, Local0) + } + Case (0x16) + { + Store (0x01, Local0) + } + Case (0x17) + { + Store (0x02, Local0) + } + + } + + ADBG ("Function no") + ADBG (Local0) + Return (Local0) + } + + Method (MMRP, 1, Serialized) + { + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + Return (Local0) + } + + Method (MMTB, 1, Serialized) + { + ADBG ("MMTB") + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + OperationRegion (MMMM, SystemMemory, Local0, 0x1A) + Field (MMMM, AnyAcc, NoLock, Preserve) + { + Offset (0x19), + SBUS, 8 + } + + Store (SBUS, Local2) + Store (\_SB.PCI0.GPCB (), Local0) + Multiply (Local2, 0x00100000, Local2) + Add (Local2, Local0, Local0) + ADBG ("TBT-US-ADR") + ADBG (Local0) + Return (Local0) + } + + Method (FFTB, 1, Serialized) + { + ADBG ("FFTB") + Add (MMTB (Arg0), 0x0548, Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + TB2P, 32, + P2TB, 32 + } + + Store (TB2P, Local1) + If (LEqual (Local1, 0xFFFFFFFF)) + { + ADBG ("FFTb 1") + Return (0x01) + } + Else + { + ADBG ("FFTb 0") + Return (0x00) + } + } + + Method (RLTR, 0, NotSerialized) + { + ADBG ("RLTR") + Add (0x68, \MMRP (\TBSE), Local0) + ADBG (Concatenate ("LTR=", ToHexString (Local0))) + OperationRegion (RP_X, SystemMemory, Local0, 0x02) + Field (RP_X, WordAcc, NoLock, Preserve) + { + , 10, + TLTR, 1 + } + + Store (0x01, TLTR) + } + + Scope (\_SB) + { + OperationRegion (ITSS, SystemMemory, 0xFDC43100, 0x0208) + Field (ITSS, ByteAcc, NoLock, Preserve) + { + PARC, 8, + PBRC, 8, + PCRC, 8, + PDRC, 8, + PERC, 8, + PFRC, 8, + PGRC, 8, + PHRC, 8, + Offset (0x200), + , 1, + , 1, + SCGE, 1 + } + } + + Mutex (MUTX, 0x00) + Mutex (OSUM, 0x00) + Event (WFEV) + OperationRegion (PRT0, SystemIO, 0x1608, 0x02) + Field (PRT0, WordAcc, Lock, Preserve) + { + P80B, 16 + } + + Field (PRT0, ByteAcc, NoLock, Preserve) + { + P80P, 8 + } + + Name (P80T, 0x00) + Method (D8XH, 2, Serialized) + { + Store (And (Arg1, 0xFF), P80T) + P8XH (0x00, P80T) + } + + Method (P8XH, 2, Serialized) + { + If (CondRefOf (DX2H)) + { + DX2H (0x00, Arg1) + } + + Store (Arg1, P80P) + } + + Method (ADBG, 1, Serialized) + { + If (CondRefOf (MBGS)) + { + ToHexString (Arg0, Local0) + MBGS (Local0) + } + } + + OperationRegion (SPRT, SystemIO, 0xB2, 0x02) + Field (SPRT, ByteAcc, Lock, Preserve) + { + SSMP, 8 + } + + Method (\_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + Store (Arg0, GPIC) + Store (Arg0, PICM) + } + + Method (OPTS, 1, NotSerialized) + { + Store (0x00, P80D) + P8XH (0x00, Arg0) + ADBG (Concatenate ("OPTS=", ToHexString (Arg0))) + Store (0x01, Local0) + If (LEqual (Arg0, \SPS)) + { + Store (0x00, Local0) + } + + If (LOr (LEqual (Arg0, 0x00), LGreaterEqual (Arg0, 0x06))) + { + Store (0x00, Local0) + } + + If (Local0) + { + Store (Arg0, \SPS) + \_SB.PCI0.LPCB.EC.HKEY.MHKE (0x00) + If (\_SB.PCI0.LPCB.EC.KBLT) + { + \UCMS (0x0D) + } + + If (LEqual (Arg0, 0x01)) + { + Store (\_SB.PCI0.LPCB.EC.HFNI, \FNID) + Store (0x00, \_SB.PCI0.LPCB.EC.HFNI) + Store (0x00, \_SB.PCI0.LPCB.EC.HFSP) + } + + If (LEqual (Arg0, 0x03)) + { + \VVPD (0x03) + \SLTP () + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \ACST) + If (LEqual (\FNWK, 0x01)) + { + If (\H8DR) + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWFN) + } + Else + { + \MBEC (0x32, 0xEF, 0x00) + } + } + } + + If (LEqual (Arg0, 0x04)) + { + If (VDSP) + { + Store (Zero, SHA1) + } + + \_SB.SLPB._PSW (0x00) + \SLTP () + \AWON (0x04) + } + + If (LEqual (Arg0, 0x05)) + { + \SLTP () + \AWON (0x05) + } + + If (LGreaterEqual (Arg0, 0x04)) + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWLB) + } + Else + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWLB) + } + + If (LGreaterEqual (Arg0, 0x03)) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HCMU) + } + + If (LNotEqual (Arg0, 0x05)){} + \_SB.PCI0.LPCB.EC.HKEY.WGPS (Arg0) + } + + ADBG ("OPTS END") + } + + Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep + { + Store (0x00, P80T) + D8XH (0x00, Arg0) + ADBG (Concatenate ("_PTS=", ToHexString (Arg0))) + If (LEqual (\TBTS, 0x01)) + { + Reset (WFEV) + If (LEqual (\RTBT, 0x01)) + { + Store (0x00, TOFF) + } + + If (LEqual (\TSXW, 0x01)) + { + ADBG (Concatenate ("TSXW=", \TSXW)) + ADBG ("TBT Wake switch") + ADBG (Concatenate ("Before=", \_SB.CGRD (0x02, 0x00, 0x10, 0x00))) + \_SB.CGWR (0x02, 0x00, 0x10, 0x00) + ADBG ("TBT switch done") + ADBG (Concatenate ("After=", \_SB.CGRD (0x02, 0x00, 0x10, 0x00))) + } + Else + { + ADBG (Concatenate ("TSXW=", \TSXW)) + ADBG ("No Wake switch") + } + } + + If (LEqual (Arg0, 0x03)) + { + If (CondRefOf (\_PR.DTSE)) + { + If (LAnd (\_PR.DTSE, LGreater (TCNT, 0x01))) + { + TRAP (0x02, 0x1E) + } + } + } + + If (CondRefOf (\_SB.TPM.PTS)) + { + \_SB.TPM.PTS (Arg0) + } + + If (LOr (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)), LEqual (Arg0, 0x05))) + { + If (LEqual (PFLV, 0x02)) + { + \_SB.SGOV (0x02010003, 0x01) + } + } + + OPTS (Arg0) + } + + Method (PBCL, 0, NotSerialized) + { + Return (Package (0x67) + { + 0x50, + 0x32, + 0x00, + 0x01, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08, + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10, + 0x11, + 0x12, + 0x13, + 0x14, + 0x15, + 0x16, + 0x17, + 0x18, + 0x19, + 0x1A, + 0x1B, + 0x1C, + 0x1D, + 0x1E, + 0x1F, + 0x20, + 0x21, + 0x22, + 0x23, + 0x24, + 0x25, + 0x26, + 0x27, + 0x28, + 0x29, + 0x2A, + 0x2B, + 0x2C, + 0x2D, + 0x2E, + 0x2F, + 0x30, + 0x31, + 0x32, + 0x33, + 0x34, + 0x35, + 0x36, + 0x37, + 0x38, + 0x39, + 0x3A, + 0x3B, + 0x3C, + 0x3D, + 0x3E, + 0x3F, + 0x40, + 0x41, + 0x42, + 0x43, + 0x44, + 0x45, + 0x46, + 0x47, + 0x48, + 0x49, + 0x4A, + 0x4B, + 0x4C, + 0x4D, + 0x4E, + 0x4F, + 0x50, + 0x51, + 0x52, + 0x53, + 0x54, + 0x55, + 0x56, + 0x57, + 0x58, + 0x59, + 0x5A, + 0x5B, + 0x5C, + 0x5D, + 0x5E, + 0x5F, + 0x60, + 0x61, + 0x62, + 0x63, + 0x64 + }) + } + + Name (WAKI, Package (0x02) + { + 0x00, + 0x00 + }) + Method (OWAK, 1, NotSerialized) + { + ADBG ("OWAK") + If (LOr (LEqual (Arg0, 0x00), LGreaterEqual (Arg0, 0x05))) + { + Return (WAKI) + } + + Store (0x00, \SPS) + Store (0x00, \_SB.PCI0.LPCB.EC.HCMU) + \_SB.PCI0.LPCB.EC.EVNT (0x01) + \_SB.PCI0.LPCB.EC.HKEY.MHKE (0x01) + \_SB.PCI0.LPCB.EC.FNST () + \UCMS (0x0D) + Store (0x00, \LIDB) + If (LEqual (Arg0, 0x01)) + { + Store (\_SB.PCI0.LPCB.EC.HFNI, \FNID) + } + + If (LEqual (Arg0, 0x03)) + { + \NVSS (0x00) + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \PWRS) + If (\OSC4) + { + \PNTF (0x81) + } + + If (LNotEqual (\ACST, \_SB.PCI0.LPCB.EC.AC._PSR ())) + { + \_SB.PCI0.LPCB.EC.ATMC () + } + + If (\SCRM) + { + Store (0x07, \_SB.PCI0.LPCB.EC.HFSP) + } + + Store (0x00, \IOEN) + Store (0x00, \IOST) + If (LEqual (\ISWK, 0x01)) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6070) + } + } + + If (\VIGD) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) + If (\WVIS) + { + \VBTD () + } + } + ElseIf (\WVIS) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) + \VBTD () + } + + \VCMS (0x01, \_SB.LID._LID ()) + \AWON (0x00) + If (\CMPR) + { + Notify (\_SB.SLPB, 0x02) + Store (0x00, \CMPR) + } + + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (\_SB.PCI0.LPCB.EC.ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, \_SB.PCI0.LPCB.EC.DCWL) + } + Else + { + Store (0x01, \_SB.PCI0.LPCB.EC.DCWL) + } + } + + If (LEqual (Arg0, 0x04)) + { + \NVSS (0x00) + Store (0x00, \_SB.PCI0.LPCB.EC.HSPA) + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \PWRS) + If (\OSC4) + { + \PNTF (0x81) + } + + \_SB.PCI0.LPCB.EC.ATMC () + If (\SCRM) + { + Store (0x07, \_SB.PCI0.LPCB.EC.HFSP) + } + + If (LNot (\NBCF)) + { + If (\VIGD) + { + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \VBRC (\BRLV) + } + } + + Store (0x00, \IOEN) + Store (0x00, \IOST) + If (LEqual (\ISWK, 0x02)) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6080) + } + } + + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (\_SB.PCI0.LPCB.EC.ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, \_SB.PCI0.LPCB.EC.DCWL) + } + Else + { + Store (0x01, \_SB.PCI0.LPCB.EC.DCWL) + } + } + + \_SB.PCI0.LPCB.EC.BATW (Arg0) + \_SB.PCI0.LPCB.EC.HKEY.WGWK (Arg0) + Notify (\_TZ.THM0, 0x80) + \VSLD (\_SB.LID._LID ()) + If (\VIGD) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) + } + ElseIf (\WVIS) + { + Store (\_SB.LID._LID (), \_SB.PCI0.GFX0.CLID) + } + + If (LLess (Arg0, 0x04)) + { + If (LOr (And (\RRBF, 0x02), And (\_SB.PCI0.LPCB.EC.HWAC, 0x02))) + { + ShiftLeft (Arg0, 0x08, Local0) + Store (Or (0x2013, Local0), Local0) + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (Local0) + } + } + + If (LEqual (Arg0, 0x04)) + { + Store (0x00, Local0) + Store (\CSUM (0x00), Local1) + If (LNotEqual (Local1, \CHKC)) + { + Store (0x01, Local0) + Store (Local1, \CHKC) + } + + Store (\CSUM (0x01), Local1) + If (LNotEqual (Local1, \CHKE)) + { + Store (0x01, Local0) + Store (Local1, \CHKE) + } + + If (Local0) + { + Notify (\_SB, 0x00) + } + } + + If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04))) + { + ADBG ("_WAK0") + Store (0x00, \_SB.PCI0.LPCB.EC.HKEY.ANGN) + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F0001) + ADBG ("_WAK1") + } + + Store (Zero, \RRBF) + ADBG ("OWAK END") + Return (WAKI) + } + + Method (_WAK, 1, Serialized) // _WAK: Wake + { + D8XH (0x01, 0xAB) + Store (0x01, TBPE) + ADBG ("_WAK") + \_SB.PCI0.GEXP.INVC () + If (LOr (LEqual (And (PMOF, 0x01), 0x01), LEqual (S0ID, One))) + { + Store (0x01, \_SB.SCGE) + } + + If (NEXP) + { + If (And (OSCC, 0x01)) + { + \_SB.PCI0.NHPG () + } + + If (And (OSCC, 0x04)) + { + \_SB.PCI0.NPME () + } + } + + If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04))) + { + If (And (GBSX, 0x40)) + { + \_SB.PCI0.GFX0.IUEH (0x06) + XOr (PB1E, 0x08, PB1E) + } + + If (And (GBSX, 0x80)) + { + \_SB.PCI0.GFX0.IUEH (0x07) + XOr (PB1E, 0x10, PB1E) + } + + If (CondRefOf (\_PR.DTSE)) + { + If (LAnd (\_PR.DTSE, LGreater (TCNT, 0x01))) + { + TRAP (0x02, 0x14) + } + } + + If (LEqual (TBTS, 0x01)) + { + Acquire (OSUM, 0xFFFF) + \_GPE.TINI (TBSE) + If (LEqual (TBMP, 0x01)) + { + \_GPE.TINI (TBS1) + } + + Release (OSUM) + } + + If (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP01, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP02, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP03, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP04, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP05, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP06, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF)) + { + If (LEqual (\DSTS, 0x00)) + { + Notify (\_SB.PCI0.RP07, 0x00) + } + } + + If (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF)) + { + If (LEqual (\DSTS, 0x00)) + { + Notify (\_SB.PCI0.RP08, 0x00) + } + } + + If (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP09, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP10, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP11, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP12, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP13, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP14, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP15, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP16, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP17, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP18, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP19, 0x00) + } + + If (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF)) + { + Notify (\_SB.PCI0.RP20, 0x00) + } + + If (CondRefOf (\_SB.VMEN)) + { + Store (0xFF, \_SB.VMEN) + } + } + + OWAK (Arg0) + If (LEqual (TBTS, 0x01)) + { + Signal (WFEV) + } + + Return (Package (0x02) + { + 0x00, + 0x00 + }) + } + + Method (GETB, 3, Serialized) + { + Multiply (Arg0, 0x08, Local0) + Multiply (Arg1, 0x08, Local1) + CreateField (Arg2, Local0, Local1, TBF3) + Return (TBF3) + } + + Method (PNOT, 0, Serialized) + { + If (LGreater (TCNT, 0x01)) + { + If (And (\PC00, 0x08)) + { + Notify (\_PR.PR00, 0x80) + } + + If (And (\PC01, 0x08)) + { + Notify (\_PR.PR01, 0x80) + } + + If (And (\PC02, 0x08)) + { + Notify (\_PR.PR02, 0x80) + } + + If (And (\PC03, 0x08)) + { + Notify (\_PR.PR03, 0x80) + } + + If (And (\PC04, 0x08)) + { + Notify (\_PR.PR04, 0x80) + } + + If (And (\PC05, 0x08)) + { + Notify (\_PR.PR05, 0x80) + } + + If (And (\PC06, 0x08)) + { + Notify (\_PR.PR06, 0x80) + } + + If (And (\PC07, 0x08)) + { + Notify (\_PR.PR07, 0x80) + } + + If (And (\PC08, 0x08)) + { + Notify (\_PR.PR08, 0x80) + } + + If (And (\PC09, 0x08)) + { + Notify (\_PR.PR09, 0x80) + } + + If (And (\PC10, 0x08)) + { + Notify (\_PR.PR10, 0x80) + } + + If (And (\PC11, 0x08)) + { + Notify (\_PR.PR11, 0x80) + } + + If (And (\PC12, 0x08)) + { + Notify (\_PR.PR12, 0x80) + } + + If (And (\PC13, 0x08)) + { + Notify (\_PR.PR13, 0x80) + } + + If (And (\PC14, 0x08)) + { + Notify (\_PR.PR14, 0x80) + } + + If (And (\PC15, 0x08)) + { + Notify (\_PR.PR15, 0x80) + } + } + Else + { + Notify (\_PR.PR00, 0x80) + } + + If (LGreater (TCNT, 0x01)) + { + If (LAnd (And (\PC00, 0x08), And (\PC00, 0x10))) + { + Notify (\_PR.PR00, 0x81) + } + + If (LAnd (And (\PC01, 0x08), And (\PC01, 0x10))) + { + Notify (\_PR.PR01, 0x81) + } + + If (LAnd (And (\PC02, 0x08), And (\PC02, 0x10))) + { + Notify (\_PR.PR02, 0x81) + } + + If (LAnd (And (\PC03, 0x08), And (\PC03, 0x10))) + { + Notify (\_PR.PR03, 0x81) + } + + If (LAnd (And (\PC04, 0x08), And (\PC04, 0x10))) + { + Notify (\_PR.PR04, 0x81) + } + + If (LAnd (And (\PC05, 0x08), And (\PC05, 0x10))) + { + Notify (\_PR.PR05, 0x81) + } + + If (LAnd (And (\PC06, 0x08), And (\PC06, 0x10))) + { + Notify (\_PR.PR06, 0x81) + } + + If (LAnd (And (\PC07, 0x08), And (\PC07, 0x10))) + { + Notify (\_PR.PR07, 0x81) + } + + If (LAnd (And (\PC08, 0x08), And (\PC08, 0x10))) + { + Notify (\_PR.PR08, 0x81) + } + + If (LAnd (And (\PC09, 0x08), And (\PC09, 0x10))) + { + Notify (\_PR.PR09, 0x81) + } + + If (LAnd (And (\PC10, 0x08), And (\PC10, 0x10))) + { + Notify (\_PR.PR10, 0x81) + } + + If (LAnd (And (\PC11, 0x08), And (\PC11, 0x10))) + { + Notify (\_PR.PR11, 0x81) + } + + If (LAnd (And (\PC12, 0x08), And (\PC12, 0x10))) + { + Notify (\_PR.PR12, 0x81) + } + + If (LAnd (And (\PC13, 0x08), And (\PC13, 0x10))) + { + Notify (\_PR.PR13, 0x81) + } + + If (LAnd (And (\PC14, 0x08), And (\PC14, 0x10))) + { + Notify (\_PR.PR14, 0x81) + } + + If (LAnd (And (\PC15, 0x08), And (\PC15, 0x10))) + { + Notify (\_PR.PR15, 0x81) + } + } + Else + { + Notify (\_PR.PR00, 0x81) + } + + If (LEqual (DPTF, 0x01)) + { + Notify (\_SB.IETM, 0x86) + If (LEqual (CHGE, 0x01)){} + } + } + + OperationRegion (MBAR, SystemMemory, Add (\_SB.PCI0.GMHB (), 0x5000), 0x1000) + Field (MBAR, ByteAcc, NoLock, Preserve) + { + Offset (0x938), + PWRU, 4, + Offset (0x9A0), + PPL1, 15, + PL1E, 1, + CLP1, 1 + } + + Name (CLMP, 0x00) + Name (PLEN, 0x00) + Name (PLSV, 0x8000) + Name (CSEM, 0x00) + Method (SPL1, 0, Serialized) + { + Name (PPUU, 0x00) + If (LEqual (CSEM, 0x01)) + { + Return (Zero) + } + + Store (0x01, CSEM) + Store (PPL1, PLSV) + Store (PL1E, PLEN) + Store (CLP1, CLMP) + If (LEqual (PWRU, 0x00)) + { + Store (0x01, PPUU) + } + Else + { + ShiftLeft (Decrement (PWRU), 0x02, PPUU) + } + + Multiply (PLVL, PPUU, Local0) + Divide (Local0, 0x03E8, , Local1) + Store (Local1, PPL1) + Store (0x01, PL1E) + Store (0x01, CLP1) + } + + Method (RPL1, 0, Serialized) + { + Store (PLSV, PPL1) + Store (PLEN, PL1E) + Store (CLMP, CLP1) + Store (0x00, CSEM) + } + + Name (UAMS, 0x00) + Name (GLCK, 0x00) + Method (GUAM, 1, Serialized) + { + Switch (ToInteger (Arg0)) + { + Case (0x00) + { + If (LEqual (GLCK, 0x01)) + { + Store (0x00, GLCK) + P8XH (0x00, 0xE1) + P8XH (0x01, 0xAB) + ADBG ("Exit Resiliency") + \_SB.DION () + If (PSCP) + { + If (CondRefOf (\_PR.PR00._PPC)) + { + Store (Zero, \_PR.CPPC) + PNOT () + } + } + + If (PLCS) + { + RPL1 () + } + } + } + Case (0x01) + { + If (LEqual (GLCK, 0x00)) + { + Store (0x01, GLCK) + P8XH (0x00, 0xE0) + P8XH (0x01, 0x00) + ADBG ("Enter Resiliency") + \_SB.DIOF () + If (PSCP) + { + If (LAnd (CondRefOf (\_PR.PR00._PSS), CondRefOf (\_PR.PR00._PPC))) + { + If (And (\PC00, 0x0400)) + { + Subtract (SizeOf (\_PR.PR00.TPSS), One, \_PR.CPPC) + } + Else + { + Subtract (SizeOf (\_PR.PR00.LPSS), One, \_PR.CPPC) + } + + PNOT () + } + } + + If (PLCS) + { + SPL1 () + } + } + } + Default + { + Return (Zero) + } + + } + + Store (LAnd (Arg0, LNot (PWRS)), UAMS) + P_CS () + } + + Method (P_CS, 0, Serialized) + { + If (CondRefOf (\_SB.PCI0.PAUD.PUAM)) + { + \_SB.PCI0.PAUD.PUAM () + } + + If (LEqual (OSYS, 0x07DC)) + { + If (CondRefOf (\_SB.PCI0.XHC.DUAM)) + { + \_SB.PCI0.XHC.DUAM () + } + } + } + + Scope (\) + { + OperationRegion (IO_H, SystemIO, 0x1000, 0x04) + Field (IO_H, ByteAcc, NoLock, Preserve) + { + TRPH, 8 + } + } + + Method (TRAP, 2, Serialized) + { + Store (Arg1, SMIF) + If (LEqual (Arg0, 0x02)) + { + Store (Arg1, \_PR.DTSF) + Store (0x00, \_PR.TRPD) + Return (\_PR.DTSF) + } + + If (LEqual (Arg0, 0x03)) + { + Store (0x00, TRPH) + } + + If (LEqual (Arg0, 0x04)) + { + Store (0x00, \_PR.TRPF) + } + + Return (SMIF) + } + + Scope (\_SB.PCI0) + { + Method (PTMA, 0, NotSerialized) + { + Return (\_PR.BGMA) + } + + Method (PTMS, 0, NotSerialized) + { + Return (\_PR.BGMS) + } + + Method (PTIA, 0, NotSerialized) + { + Return (\_PR.BGIA) + } + + Method (OINI, 0, NotSerialized) + { + ADBG ("Init _INI") + If (LGreaterEqual (\_REV, 0x02)) + { + Store (0x01, \H8DR) + } + + Store (0x01, \OSIF) + Store (\_SB.PCI0.LPCB.EC.AC._PSR (), \PWRS) + \_SB.PCI0.LPCB.MOU.MHID () + If (\LNUX) + { + \_SB.PCI0.LPCB.EC.SAUM (0x02) + \UCMS (0x1C) + } + + Store (\SRAH, \_SB.PCI0.RID) + If (VIGD) + { + Store (\SRHE, \_SB.PCI0.GFX0.RID) + } + Else + { + Store (\SRHE, \_SB.PCI0.PEG0.RID) + } + + Store (\SRE1, \_SB.PCI0.RP01.RID) + Store (\SRE2, \_SB.PCI0.RP02.RID) + Store (\SRE3, \_SB.PCI0.RP03.RID) + Store (\SRE4, \_SB.PCI0.RP05.RID) + Store (\SRE4, \_SB.PCI0.RP09.RID) + Store (\SRLP, \_SB.PCI0.LPCB.RID) + Store (\SRSA, \_SB.PCI0.SAT0.RID) + Store (\SRSM, \_SB.PCI0.SBUS.RID) + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + Store (0x01, TBPE) + Store (0x07D0, OSYS) + If (CondRefOf (\_OSI)) + { + If (\_OSI ("Windows 2001")) + { + Store (0x01, \WNTF) + Store (0x01, \WXPF) + Store (0x00, \WSPV) + Store (0x07D1, OSYS) + } + + If (\_OSI ("Windows 2001 SP1")) + { + Store (0x01, \WSPV) + Store (0x07D1, OSYS) + } + + If (\_OSI ("Windows 2001 SP2")) + { + Store (0x02, \WSPV) + Store (0x07D2, OSYS) + } + + If (\_OSI ("Windows 2006")) + { + Store (0x01, \WVIS) + Store (0x07D6, OSYS) + } + + If (\_OSI ("Windows 2009")) + { + Store (0x01, \WIN7) + Store (0x07D9, OSYS) + } + + If (\_OSI ("Windows 2012")) + { + Store (0x01, \WIN8) + Store (0x07DC, OSYS) + } + + If (\_OSI ("Windows 2013")) + { + Store (0x01, \WIN8) + Store (0x07DD, OSYS) + } + + If (\_OSI ("Windows 2015")) + { + Store (0x01, \WIN8) + Store (0x07DF, OSYS) + } + + If (\_OSI ("Linux")) + { + Store (0x01, \LNUX) + Store (0x03E8, OSYS) + } + + If (\_OSI ("FreeBSD")) + { + Store (0x01, \LNUX) + Store (0x03E8, OSYS) + } + } + ElseIf (LEqual (\SCMP (\_OS, "Microsoft Windows NT"), Zero)) + { + Store (0x01, \WNTF) + } + + If (CondRefOf (\_PR.DTSE)) + { + If (LGreaterEqual (\_PR.DTSE, 0x01)) + { + Store (0x01, \_PR.DSAE) + } + } + + If (LEqual (TBTS, 0x01)) + { + Acquire (OSUM, 0xFFFF) + \_GPE.TINI (TBSE) + Release (OSUM) + If (LEqual (TBMP, 0x01)) + { + Acquire (OSUM, 0xFFFF) + \_GPE.TINI (TBS1) + Release (OSUM) + } + + Signal (WFEV) + } + + OINI () + } + + Method (NHPG, 0, Serialized) + { + Store (0x00, ^RP01.HPEX) + Store (0x00, ^RP02.HPEX) + Store (0x00, ^RP03.HPEX) + Store (0x00, ^RP04.HPEX) + Store (0x00, ^RP05.HPEX) + Store (0x00, ^RP06.HPEX) + Store (0x00, ^RP07.HPEX) + Store (0x00, ^RP08.HPEX) + Store (0x00, ^RP09.HPEX) + Store (0x00, ^RP10.HPEX) + Store (0x00, ^RP11.HPEX) + Store (0x00, ^RP12.HPEX) + Store (0x00, ^RP13.HPEX) + Store (0x00, ^RP14.HPEX) + Store (0x00, ^RP15.HPEX) + Store (0x00, ^RP16.HPEX) + Store (0x00, ^RP17.HPEX) + Store (0x00, ^RP18.HPEX) + Store (0x00, ^RP19.HPEX) + Store (0x00, ^RP20.HPEX) + Store (0x01, ^RP01.HPSX) + Store (0x01, ^RP02.HPSX) + Store (0x01, ^RP03.HPSX) + Store (0x01, ^RP04.HPSX) + Store (0x01, ^RP05.HPSX) + Store (0x01, ^RP06.HPSX) + Store (0x01, ^RP07.HPSX) + Store (0x01, ^RP08.HPSX) + Store (0x01, ^RP09.HPSX) + Store (0x01, ^RP10.HPSX) + Store (0x01, ^RP11.HPSX) + Store (0x01, ^RP12.HPSX) + Store (0x01, ^RP13.HPSX) + Store (0x01, ^RP14.HPSX) + Store (0x01, ^RP15.HPSX) + Store (0x01, ^RP16.HPSX) + Store (0x01, ^RP17.HPSX) + Store (0x01, ^RP18.HPSX) + Store (0x01, ^RP19.HPSX) + Store (0x01, ^RP20.HPSX) + Store (0x01, ^RP01.PDCX) + Store (0x01, ^RP02.PDCX) + Store (0x01, ^RP03.PDCX) + Store (0x01, ^RP04.PDCX) + Store (0x01, ^RP05.PDCX) + Store (0x01, ^RP06.PDCX) + Store (0x01, ^RP07.PDCX) + Store (0x01, ^RP08.PDCX) + Store (0x01, ^RP09.PDCX) + Store (0x01, ^RP10.PDCX) + Store (0x01, ^RP11.PDCX) + Store (0x01, ^RP12.PDCX) + Store (0x01, ^RP13.PDCX) + Store (0x01, ^RP14.PDCX) + Store (0x01, ^RP15.PDCX) + Store (0x01, ^RP16.PDCX) + Store (0x01, ^RP17.PDCX) + Store (0x01, ^RP18.PDCX) + Store (0x01, ^RP19.PDCX) + Store (0x01, ^RP20.PDCX) + } + + Method (NPME, 0, Serialized) + { + Store (0x00, ^RP01.PMEX) + Store (0x00, ^RP02.PMEX) + Store (0x00, ^RP03.PMEX) + Store (0x00, ^RP04.PMEX) + Store (0x00, ^RP05.PMEX) + Store (0x00, ^RP06.PMEX) + Store (0x00, ^RP07.PMEX) + Store (0x00, ^RP08.PMEX) + Store (0x00, ^RP09.PMEX) + Store (0x00, ^RP10.PMEX) + Store (0x00, ^RP11.PMEX) + Store (0x00, ^RP12.PMEX) + Store (0x00, ^RP13.PMEX) + Store (0x00, ^RP14.PMEX) + Store (0x00, ^RP15.PMEX) + Store (0x00, ^RP16.PMEX) + Store (0x00, ^RP17.PMEX) + Store (0x00, ^RP18.PMEX) + Store (0x00, ^RP19.PMEX) + Store (0x00, ^RP20.PMEX) + Store (0x01, ^RP01.PMSX) + Store (0x01, ^RP02.PMSX) + Store (0x01, ^RP03.PMSX) + Store (0x01, ^RP04.PMSX) + Store (0x01, ^RP05.PMSX) + Store (0x01, ^RP06.PMSX) + Store (0x01, ^RP07.PMSX) + Store (0x01, ^RP08.PMSX) + Store (0x01, ^RP09.PMSX) + Store (0x01, ^RP10.PMSX) + Store (0x01, ^RP11.PMSX) + Store (0x01, ^RP12.PMSX) + Store (0x01, ^RP13.PMSX) + Store (0x01, ^RP14.PMSX) + Store (0x01, ^RP15.PMSX) + Store (0x01, ^RP16.PMSX) + Store (0x01, ^RP17.PMSX) + Store (0x01, ^RP18.PMSX) + Store (0x01, ^RP19.PMSX) + Store (0x01, ^RP20.PMSX) + } + } + + Scope (\) + { + Name (PICM, 0x00) + Name (PRWP, Package (0x02) + { + Zero, + Zero + }) + Method (GPRW, 2, NotSerialized) + { + Store (Arg0, Index (PRWP, 0x00)) + Store (ShiftLeft (SS1, 0x01), Local0) + Or (Local0, ShiftLeft (SS2, 0x02), Local0) + Or (Local0, ShiftLeft (SS3, 0x03), Local0) + Or (Local0, ShiftLeft (SS4, 0x04), Local0) + If (And (ShiftLeft (0x01, Arg1), Local0)) + { + Store (Arg1, Index (PRWP, 0x01)) + } + Else + { + ShiftRight (Local0, 0x01, Local0) + FindSetLeftBit (Local0, Index (PRWP, 0x01)) + } + + Return (PRWP) + } + } + + Scope (\_SB) + { + Name (OSCI, 0x00) + Name (OSCO, 0x00) + Name (OSCP, 0x00) + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, 0x00, STS0) + CreateDWordField (Arg3, 0x04, CAP0) + If (LOr (LEqual (And (PMOF, 0x01), 0x01), LEqual (S0ID, One))) + { + Store (0x01, \_SB.SCGE) + } + + If (LEqual (Arg0, ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) + { + If (LEqual (Arg1, One)) + { + Store (CAP0, OSCP) + If (And (CAP0, 0x04)) + { + Store (0x04, OSCO) + If (LNotEqual (And (SGMD, 0x0F), 0x02)) + { + If (LEqual (RTD3, 0x00)) + { + And (CAP0, 0x3B, CAP0) + Or (STS0, 0x10, STS0) + } + } + } + + If (And (CAP0, 0x20)) + { + Store (0x01, \CPPX) + } + Else + { + And (CAP0, 0x9F, CAP0) + Or (STS0, 0x10, STS0) + } + } + ElseIf (LEqual (Arg0, ToUUID ("ed855e0c-6c90-47bf-a62a-26de0fc5ad5c"))) + { + Return (Arg3) + } + Else + { + And (STS0, 0xFFFFFF00, STS0) + Or (STS0, 0x0A, STS0) + } + } + Else + { + And (STS0, 0xFFFFFF00, STS0) + Or (STS0, 0x06, STS0) + } + + Return (Arg3) + } + + Device (EPC) + { + Name (_HID, EisaId ("INT0E0C")) // _HID: Hardware ID + Name (_STR, Unicode ("Enclave Page Cache 1.0")) // _STR: Description String + Name (_MLS, Package (0x01) // _MLS: Multiple Language String + { + Package (0x02) + { + "en", + Unicode ("Enclave Page Cache 1.0") + } + }) + Name (RBUF, ResourceTemplate () + { + QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0x0000000000000000, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000000000001, // Length + ,, _Y33, AddressRangeMemory, TypeStatic) + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + CreateQWordField (RBUF, \_SB.EPC._Y33._MIN, EMIN) // _MIN: Minimum Base Address + CreateQWordField (RBUF, \_SB.EPC._Y33._MAX, EMAX) // _MAX: Maximum Base Address + CreateQWordField (RBUF, \_SB.EPC._Y33._LEN, ELEN) // _LEN: Length + Store (\_PR.EMNA, EMIN) + Store (\_PR.ELNG, ELEN) + Subtract (Add (\_PR.EMNA, \_PR.ELNG), 0x01, EMAX) + Return (RBUF) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LNotEqual (\_PR.EPCS, 0x00)) + { + Return (0x0F) + } + + Return (0x00) + } + } + } + + Scope (\_SB) + { + Device (BTKL) + { + Name (_HID, "INT3420") // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x00) + } + + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + } + + Method (PSTS, 0, NotSerialized) + { + } + } + } + + Scope (\_SB) + { + Device (SLPB) + { + Name (_HID, EisaId ("PNP0C0E")) // _HID: Hardware ID + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + Return (Package (0x02) + { + 0x17, + 0x03 + }) + } + + Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake + { + If (\H8DR) + { + If (Arg0) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWFN) + } + Else + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWFN) + } + } + ElseIf (Arg0) + { + \MBEC (0x32, 0xFF, 0x10) + } + Else + { + \MBEC (0x32, 0xEF, 0x00) + } + } + } + } + + If (LNotEqual (RTVM, 0x00)) + { + ADBG (Concatenate ("RTVM=", ToHexString (RTVM))) + Scope (\_SB) + { + Name (VMEN, 0xFF) + Method (VMON, 0, Serialized) + { + ADBG (Concatenate ("VMON=", ToHexString (VMEN))) + If (LEqual (VMEN, 0x01)) + { + Return (Zero) + } + + If (LEqual (RTVM, 0x01)){} + ElseIf (LEqual (RTVM, 0x02)) + { + ADBG ("Assert pin") + SGOV (VRGP, 0x00) + } + + Store (0x01, VMEN) + } + + Method (VMOF, 0, Serialized) + { + ADBG (Concatenate ("VMOF=", ToHexString (VMEN))) + If (LEqual (VMEN, 0x00)) + { + Return (Zero) + } + + If (LEqual (RTVM, 0x01)){} + ElseIf (LEqual (RTVM, 0x02)) + { + ADBG ("Deassert pin") + SGOV (VRGP, 0x01) + } + + Store (0x00, VMEN) + } + } + } + + Name (TDMA, 0x5B4A4000) + Name (TDPG, 0x80000000) + Name (TDTI, 0x80000000) + Name (TRDO, 0x00) + Name (TRD3, 0x00) + Name (TBPE, 0x00) + Name (TOFF, 0x00) + Scope (\_GPE) + { + Method (OSUP, 1, Serialized) + { + ADBG (Concatenate ("OSUP=", ToHexString (Arg0))) + Add (Arg0, 0x0548, Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + TB2P, 32, + P2TB, 32 + } + + Store (0x64, Local1) + Store (0x0D, P2TB) + While (LGreater (Local1, 0x00)) + { + Store (Subtract (Local1, 0x01), Local1) + Store (TB2P, Local2) + If (LEqual (Local2, 0xFFFFFFFF)) + { + ADBG ("Dev gone") + Return (0x02) + } + + If (And (Local2, 0x01)) + { + ADBG ("Cmd acknowledged") + Break + } + + Sleep (0x32) + } + + If (LEqual (TRWA, 0x01)) + { + Store (0x0C, P2TB) + } + Else + { + Store (0x00, P2TB) + } + + ADBG ("End-of-OSUP") + Return (0x01) + } + + Method (PGWA, 1, Serialized) + { + ADBG ("PGWA") + If (LGreaterEqual (Arg0, 0x15)) + { + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + ADBG (Local0) + OperationRegion (ABCD, SystemMemory, Local0, 0x1000) + Field (ABCD, AnyAcc, NoLock, Preserve) + { + Offset (0x84), + PWRS, 2, + Offset (0xB0), + , 4, + LNKD, 1, + Offset (0x11A), + , 1, + VCNP, 1, + Offset (0x508), + TREN, 1 + } + + If (LNotEqual (PWRS, 0x00)) + { + ADBG ("Force D0") + Store (0x00, PWRS) + Store (0x00, \_PR.POWS) + Sleep (0x10) + } + + If (LNotEqual (LNKD, 0x00)) + { + ADBG ("Link Enable") + Store (0x00, LNKD) + Store (0x01, TREN) + Store (0x00, Local6) + Store (0x64, Local7) + While (LLess (Local6, Local7)) + { + If (LEqual (VCNP, 0x00)) + { + Break + } + + Sleep (0x10) + Add (Local6, 0x10, Local6) + } + } + } + } + + Method (TBFF, 1, Serialized) + { + ADBG ("TBFF") + Store (MMTB (Arg0), Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + VEDI, 32, + CMDR, 32 + } + + Store (VEDI, Local1) + If (LEqual (Local1, 0xFFFFFFFF)) + { + If (LNotEqual (\TWIN, 0x00)) + { + If (LEqual (CMDR, 0xFFFFFFFF)) + { + Return (0x02) + } + + Return (0x01) + } + Else + { + Return (OSUP (Local0)) + } + } + Else + { + ADBG ("Dev Present") + Return (0x00) + } + } + + Method (TSUB, 1, Serialized) + { + ADBG ("TSUB") + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftLeft (TBTD (Arg0), 0x0F), Local0) + Add (Local0, ShiftLeft (TBTF (Arg0), 0x0C), Local0) + ADBG ("ADR") + ADBG (Local0) + OperationRegion (MMMM, SystemMemory, Local0, 0x1A) + Field (MMMM, AnyAcc, NoLock, Preserve) + { + Offset (0x19), + SBUS, 8 + } + + ADBG ("Sec Bus") + ADBG (SBUS) + Return (SBUS) + } + + Method (WSUB, 1, Serialized) + { + ADBG ("WSUB") + Store (0x00, Local0) + Store (0x00, Local1) + While (0x01) + { + Store (TSUB (Arg0), Local1) + If (Local1) + { + ADBG ("WSUB-Finished") + Break + } + Else + { + Add (Local0, 0x01, Local0) + If (LGreater (Local0, 0x03E8)) + { + Sleep (0x03E8) + ADBG ("WSUB-Deadlock") + } + Else + { + Sleep (0x10) + } + } + } + } + + Method (WWAK, 0, NotSerialized) + { + ADBG ("WWAK") + Wait (WFEV, 0xFFFF) + Signal (WFEV) + } + + Method (NTFY, 1, Serialized) + { + ADBG ("NTFY") + If (LEqual (NOHP, 0x01)) + { + Switch (ToInteger (Arg0)) + { + Case (0x01) + { + ADBG ("Notify RP01") + Notify (\_SB.PCI0.RP01, 0x00) + } + Case (0x02) + { + ADBG ("Notify RP02") + Notify (\_SB.PCI0.RP02, 0x00) + } + Case (0x03) + { + ADBG ("Notify RP03") + Notify (\_SB.PCI0.RP03, 0x00) + } + Case (0x04) + { + ADBG ("Notify RP04") + Notify (\_SB.PCI0.RP04, 0x00) + } + Case (0x05) + { + ADBG ("Notify RP05") + Notify (\_SB.PCI0.RP05, 0x00) + } + Case (0x06) + { + ADBG ("Notify RP06") + Notify (\_SB.PCI0.RP06, 0x00) + } + Case (0x07) + { + ADBG ("Notify RP07") + Notify (\_SB.PCI0.RP07, 0x00) + } + Case (0x08) + { + ADBG ("Notify RP08") + Notify (\_SB.PCI0.RP08, 0x00) + } + Case (0x09) + { + ADBG ("Notify RP09") + Notify (\_SB.PCI0.RP09, 0x00) + } + Case (0x0A) + { + ADBG ("Notify RP10") + Notify (\_SB.PCI0.RP10, 0x00) + } + Case (0x0B) + { + ADBG ("Notify RP11") + Notify (\_SB.PCI0.RP11, 0x00) + } + Case (0x0C) + { + ADBG ("Notify RP12") + Notify (\_SB.PCI0.RP12, 0x00) + } + Case (0x0D) + { + ADBG ("Notify RP13") + Notify (\_SB.PCI0.RP13, 0x00) + } + Case (0x0E) + { + ADBG ("Notify RP14") + Notify (\_SB.PCI0.RP14, 0x00) + } + Case (0x0F) + { + ADBG ("Notify RP15") + Notify (\_SB.PCI0.RP15, 0x00) + } + Case (0x10) + { + ADBG ("Notify RP16") + Notify (\_SB.PCI0.RP16, 0x00) + } + Case (0x11) + { + ADBG ("Notify RP17") + Notify (\_SB.PCI0.RP17, 0x00) + } + Case (0x12) + { + ADBG ("Notify RP18") + Notify (\_SB.PCI0.RP18, 0x00) + } + Case (0x13) + { + ADBG ("Notify RP19") + Notify (\_SB.PCI0.RP19, 0x00) + } + Case (0x14) + { + ADBG ("Notify RP20") + Notify (\_SB.PCI0.RP20, 0x00) + } + Case (0x15) + { + ADBG ("Notify PEG0") + Notify (\_SB.PCI0.PEG0, 0x00) + } + Case (0x16) + { + ADBG ("Notify PEG1") + Notify (\_SB.PCI0.PEG1, 0x00) + } + Case (0x17) + { + ADBG ("Notify PEG2") + Notify (\_SB.PCI0.PEG2, 0x00) + } + + } + } + + P8XH (0x00, 0xC2) + P8XH (0x01, 0xC2) + } + + Method (NFYG, 0, NotSerialized) + { + ADBG ("NFYG") + If (LEqual (TDGS, 0x01)) + { + If (LEqual (DCKE, 0x01)) + { + ADBG ("NFYG.DCKE") + Notify (\_SB.PCI0.GFX0, 0x81) + } + ElseIf (LEqual (SUDK, 0x01)) + { + ADBG ("NFYG.SUDK") + Notify (\_SB.PCI0.GFX0, 0x81) + } + } + } + + Method (TFPS, 0, NotSerialized) + { + ADBG ("TFPS") + Store (\_SB.CGRD (FPAT, FPEN, FPGN, 0x00), Local0) + If (Local0) + { + ADBG ("ExtFrcPwr1") + } + Else + { + ADBG ("ExtFrcPwr0") + } + + Return (Local0) + } + + Method (CNCT, 0, NotSerialized) + { + ADBG ("CNCT") + ADBG ("Read") + ADBG ("ACPI_GPE_STS") + Store (CPAD, Local7) + Store (CPAB, Local6) + While (LGreater (Local6, 0x08)) + { + Add (Local7, 0x01, Local7) + Subtract (Local6, 0x08, Local6) + } + + OperationRegion (GPE0, SystemIO, Local7, 0x01) + Field (GPE0, ByteAcc, Lock, Preserve) + { + TEMP, 8 + } + + Store (TEMP, Local0) + ShiftRight (Local0, Local6, Local0) + And (Local0, 0x01, Local0) + Return (Local0) + } + + Method (CLNE, 0, NotSerialized) + { + ADBG ("CLNE") + ADBG ("Clear") + ADBG ("ACPI_GPE_STS") + Store (CPAD, Local7) + Store (CPAB, Local6) + While (LGreater (Local6, 0x08)) + { + Add (Local7, 0x01, Local7) + Subtract (Local6, 0x08, Local6) + } + + OperationRegion (GPE0, SystemIO, Local7, 0x01) + Field (GPE0, ByteAcc, Lock, Preserve) + { + TEMP, 8 + } + + ShiftLeft (0x01, Local6, Local6) + Or (TEMP, Local6, TEMP) + } + + Method (GNIS, 1, Serialized) + { + ADBG ("GNIS") + If (LEqual (GP5F, 0x00)) + { + ADBG ("GNIS_Dis=0") + Return (0x00) + } + + Add (MMTB (Arg0), 0x0544, Local0) + OperationRegion (PXVD, SystemMemory, Local0, 0x08) + Field (PXVD, DWordAcc, NoLock, Preserve) + { + HPFI, 1, + Offset (0x04), + TB2P, 32 + } + + Store (TB2P, Local1) + ADBG (Concatenate ("TB2P=", ToHexString (Local1))) + If (LEqual (Local1, 0xFFFFFFFF)) + { + ADBG ("GNIS=0") + Return (0x00) + } + + Store (HPFI, Local2) + ADBG (Concatenate ("HPFI=", ToHexString (Local2))) + If (LEqual (Local2, 0x01)) + { + Store (0x00, HPFI) + ADBG ("GNIS=0") + Return (0x00) + } + + ADBG ("GNIS=1") + Return (0x01) + } + + Method (XTBT, 2, Serialized) + { + ADBG ("XTBT") + If (LEqual (CF2T, 0x01)) + { + ADBG ("Clear") + ADBG ("GPI_GPE_STS") + \_SB.CAGS (Arg1) + } + + \RLTR () + If (TRDO) + { + ADBG ("Drng TBT_ON") + Return (Zero) + } + + If (TRD3) + { + ADBG ("During TBT_OFF") + Return (Zero) + } + + WWAK () + WSUB (Arg0) + If (GNIS (Arg0)) + { + Return (Zero) + } + + OperationRegion (SPRT, SystemIO, 0xB2, 0x02) + Field (SPRT, ByteAcc, Lock, Preserve) + { + SSMP, 8 + } + + ADBG ("TBT-HP-Handler") + ADBG ("PEG WorkAround") + PGWA (Arg0) + Acquire (OSUM, 0xFFFF) + Store (TBFF (Arg0), Local1) + If (LEqual (Local1, 0x01)) + { + Sleep (0x10) + Release (OSUM) + ADBG ("OS_Up_Received") + Return (Zero) + } + + If (LEqual (Local1, 0x02)) + { + ADBG ("Disconnect") + If (LEqual (OHPN, 0x01)) + { + NTFY (Arg0) + } + + If (LEqual (GHPN, 0x01)) + { + NFYG () + } + + Sleep (0x10) + Release (OSUM) + ADBG ("Disconnect") + Return (Zero) + } + + If (LEqual (SOHP, 0x01)) + { + If (LEqual (Arg1, CPG1)) + { + ADBG ("TBT SW SMI 2") + Store (0x18, TBSF) + Store (0xF7, SSMP) + Store (0x1B, TBSF) + Store (0xF7, SSMP) + } + Else + { + ADBG ("TBT SW SMI") + Store (0x15, TBSF) + Store (0xF7, SSMP) + Store (0x1A, TBSF) + Store (0xF7, SSMP) + } + } + + If (LEqual (OHPN, 0x01)) + { + NTFY (Arg0) + } + + If (LEqual (GHPN, 0x01)) + { + NFYG () + } + + Sleep (0x10) + Release (OSUM) + ADBG ("End-of-XTBT") + } + + Method (YTBT, 0, NotSerialized) + { + ADBG ("YTBT") + XTBT (TBSE, CPGN) + ADBG ("End-of-YTBT") + } + + Method (TINI, 1, Serialized) + { + ADBG ("TINI") + Store (MMRP (Arg0), Local0) + OperationRegion (RP_X, SystemMemory, Local0, 0x20) + Field (RP_X, DWordAcc, NoLock, Preserve) + { + REG0, 32, + REG1, 32, + REG2, 32, + REG3, 32, + REG4, 32, + REG5, 32, + REG6, 32, + REG7, 32 + } + + Store (REG6, Local1) + Store (MMTB (Arg0), Local2) + OSUP (Local2) + Store (Local1, REG6) + ADBG ("End-of-TINI") + } + } + + Scope (\_SB) + { + Method (THDR, 2, Serialized) + { + ADBG ("THDR") + \_GPE.XTBT (Arg0, Arg1) + } + } + + Scope (\_SB) + { + Method (CGWR, 4, Serialized) + { + If (LEqual (Arg0, 0x01)) + { + If (CondRefOf (\_SB.SGOV)) + { + \_SB.SGOV (Arg2, Arg3) + } + } + ElseIf (LEqual (Arg0, 0x02)) + { + If (CondRefOf (\_SB.PCI0.GEXP.SGEP)) + { + \_SB.PCI0.GEXP.SGEP (Arg1, Arg2, Arg3) + } + } + } + + Method (CGRD, 4, Serialized) + { + Store (0x01, Local0) + If (LEqual (Arg0, 0x01)) + { + If (LEqual (Arg3, 0x00)) + { + If (CondRefOf (\_SB.GGOV)) + { + Store (\_SB.GGOV (Arg2), Local0) + } + } + ElseIf (LEqual (Arg3, 0x01)) + { + If (CondRefOf (\_SB.GGIV)) + { + Store (\_SB.GGIV (Arg2), Local0) + } + } + } + ElseIf (LEqual (Arg0, 0x02)) + { + If (CondRefOf (\_SB.PCI0.GEXP.GEPS)) + { + Store (\_SB.PCI0.GEXP.GEPS (Arg1, Arg2), Local0) + } + } + + Return (Local0) + } + + Method (WRGP, 2, Serialized) + { + Store (Arg0, Local0) + Store (Arg0, Local1) + And (Local0, 0xFFFFFFFF, Local0) + ShiftRight (Local1, 0x20, Local1) + If (LEqual (And (Local0, 0xFF), 0x01)) + { + \_SB.CGWR (And (Local0, 0xFF), ShiftRight (Local1, 0x18), Local1, Arg1) + } + ElseIf (LEqual (And (Local0, 0xFF), 0x02)) + { + \_SB.CGWR (And (Local0, 0xFF), ShiftRight (Local1, 0x18), ShiftRight (ShiftLeft (Local1, 0x08), 0x18), Arg1) + } + } + + Method (RDGP, 2, Serialized) + { + Store (0x01, Local7) + Store (Arg0, Local0) + Store (Arg0, Local1) + And (Local0, 0xFFFFFFFF, Local0) + ShiftRight (Local1, 0x20, Local1) + If (LEqual (And (Local0, 0xFF), 0x01)) + { + Store (\_SB.CGRD (And (Local0, 0xFF), ShiftRight (Local1, 0x18), Local1, Arg1), Local7) + } + ElseIf (LEqual (And (Local0, 0xFF), 0x02)) + { + Store (\_SB.CGRD (And (Local0, 0xFF), ShiftRight (Local1, 0x18), ShiftRight (ShiftLeft (Local1, 0x08), 0x18), Arg1), Local7) + } + + Return (Local7) + } + } + + Scope (\_SB) + { + Method (TBFP, 1, NotSerialized) + { + If (Arg0) + { + CGWR (FPAT, FPEN, FPGN, FPLV) + } + Else + { + CGWR (FPAT, FPEN, FPGN, LNot (FPLV)) + } + } + + Device (WTBT) + { + Name (_HID, "PNP0C14") // _HID: Hardware ID + Name (_UID, "TBFP") // _UID: Unique ID + Name (_WDG, Buffer (0x14) + { + /* 0000 */ 0x48, 0xFD, 0xCC, 0x86, 0x5E, 0x20, 0x77, 0x4A, + /* 0008 */ 0x9C, 0x48, 0x20, 0x21, 0xCB, 0xED, 0xE3, 0x41, + /* 0010 */ 0x54, 0x46, 0x01, 0x02 + }) + Method (WMTF, 3, NotSerialized) + { + CreateByteField (Arg2, 0x00, FP) + If (FP) + { + TBFP (0x01) + } + Else + { + TBFP (0x00) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x01), LEqual (TBS1, 0x01)))) + { + Scope (\_SB.PCI0.RP01) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x02), LEqual (TBS1, 0x02)))) + { + Scope (\_SB.PCI0.RP02) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x03), LEqual (TBS1, 0x03)))) + { + Scope (\_SB.PCI0.RP03) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x04), LEqual (TBS1, 0x04)))) + { + Scope (\_SB.PCI0.RP04) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x05), LEqual (TBS1, 0x05)))) + { + Scope (\_SB.PCI0.RP05) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x06), LEqual (TBS1, 0x06)))) + { + Scope (\_SB.PCI0.RP06) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x07), LEqual (TBS1, 0x07)))) + { + Scope (\_SB.PCI0.RP07) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x08), LEqual (TBS1, 0x08)))) + { + Scope (\_SB.PCI0.RP08) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x09), LEqual (TBS1, 0x09)))){} + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0A), LEqual (TBS1, 0x0A)))) + { + Scope (\_SB.PCI0.RP10) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0B), LEqual (TBS1, 0x0B)))) + { + Scope (\_SB.PCI0.RP11) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0C), LEqual (TBS1, 0x0C)))) + { + Scope (\_SB.PCI0.RP12) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0D), LEqual (TBS1, 0x0D)))) + { + Scope (\_SB.PCI0.RP13) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0E), LEqual (TBS1, 0x0E)))) + { + Scope (\_SB.PCI0.RP14) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x0F), LEqual (TBS1, 0x0F)))) + { + Scope (\_SB.PCI0.RP15) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x10), LEqual (TBS1, 0x10)))) + { + Scope (\_SB.PCI0.RP16) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x11), LEqual (TBS1, 0x11)))) + { + Scope (\_SB.PCI0.RP17) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x12), LEqual (TBS1, 0x12)))) + { + Scope (\_SB.PCI0.RP18) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x13), LEqual (TBS1, 0x13)))) + { + Scope (\_SB.PCI0.RP19) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x14), LEqual (TBS1, 0x14)))) + { + Scope (\_SB.PCI0.RP20) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x15), LEqual (TBS1, 0x15)))) + { + Scope (\_SB.PCI0.PEG0) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x16), LEqual (TBS1, 0x16)))) + { + Scope (\_SB.PCI0.PEG1) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + If (LAnd (LEqual (TBTS, 0x01), LOr (LEqual (TBSE, 0x17), LEqual (TBS1, 0x17)))) + { + Scope (\_SB.PCI0.PEG2) + { + Device (HRUS) + { + Name (_ADR, 0x00) // _ADR: Address + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (TARS) + } + } + } + } + + Scope (\_SB) + { + Method (R008, 1, Serialized) + { + ADBG ("R008") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x01) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Return (TEMP) + } + + Method (W008, 2, Serialized) + { + ADBG ("W008") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x01) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Store (Arg1, TEMP) + } + + Method (R016, 1, Serialized) + { + ADBG ("R016") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x02) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Return (TEMP) + } + + Method (W016, 2, Serialized) + { + ADBG ("W016") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x02) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Store (Arg1, TEMP) + } + + Method (R032, 1, Serialized) + { + ADBG ("R032") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x04) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) + } + + Method (W032, 2, Serialized) + { + ADBG ("W032") + Store (Arg0, Local7) + OperationRegion (MEM0, SystemMemory, Local7, 0x04) + Field (MEM0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg1, TEMP) + } + + Method (PERB, 5, Serialized) + { + ADBG ("PERB") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x01) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Return (TEMP) + } + + Method (PEWB, 6, Serialized) + { + ADBG ("PEWB") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x01) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 8 + } + + Store (Arg5, TEMP) + } + + Method (PERW, 5, Serialized) + { + ADBG ("PERW") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x02) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Return (TEMP) + } + + Method (PEWW, 6, Serialized) + { + ADBG ("PEWW") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x02) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 16 + } + + Store (Arg5, TEMP) + } + + Method (PERD, 5, Serialized) + { + ADBG ("PERD") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x04) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Return (TEMP) + } + + Method (PEWD, 6, Serialized) + { + ADBG ("PEWD") + Store (Arg0, Local7) + Or (Local7, ShiftLeft (Arg1, 0x14), Local7) + Or (Local7, ShiftLeft (Arg2, 0x0F), Local7) + Or (Local7, ShiftLeft (Arg3, 0x0C), Local7) + Or (Local7, Arg4, Local7) + OperationRegion (PCI0, SystemMemory, Local7, 0x04) + Field (PCI0, ByteAcc, NoLock, Preserve) + { + TEMP, 32 + } + + Store (Arg5, TEMP) + } + + Method (STDC, 5, Serialized) + { + ADBG ("STDC") + Store (PERW (Arg0, Arg1, Arg2, Arg3, 0x00), Local7) + If (LEqual (Local7, 0xFFFF)) + { + ADBG ("Referenced device is not present") + Return (0x00) + } + + Store (PERW (Arg0, Arg1, Arg2, Arg3, 0x06), Local0) + If (LEqual (And (Local0, 0x10), 0x00)) + { + ADBG ("No Capabilities linked list is available") + Return (0x00) + } + + Store (PERB (Arg0, Arg1, Arg2, Arg3, 0x34), Local2) + While (0x01) + { + And (Local2, 0xFC, Local2) + If (LEqual (Local2, 0x00)) + { + ADBG ("Capability ID is not found") + Return (0x00) + } + + Store (PERB (Arg0, Arg1, Arg2, Arg3, Local2), Local1) + If (LEqual (Arg4, Local1)) + { + ADBG ("Capability ID is found") + ADBG ("Capability Offset : ") + ADBG (Local2) + Return (Local2) + } + + Store (PERB (Arg0, Arg1, Arg2, Arg3, Add (Local2, 0x01)), Local2) + Return (0x00) + } + } + } + + Method (RDCM, 1, Serialized) + { + ADBG ("RDCM") + ADBG ("CMOS Offset") + ADBG (Arg0) + OperationRegion (CMOS, SystemIO, 0x70, 0x04) + Field (CMOS, AnyAcc, NoLock, Preserve) + { + LIND, 8, + LDAT, 8, + HIND, 8, + HDAT, 8 + } + + If (LLessEqual (Arg0, 0x7F)) + { + Store (Arg0, LIND) + Store (LDAT, Local0) + } + ElseIf (LLessEqual (Arg0, 0xFF)) + { + Store (Arg0, HIND) + Store (HDAT, Local0) + } + + ADBG ("CMOS Data") + ADBG (Local0) + Return (Local0) + } + + Method (WRCM, 2, Serialized) + { + ADBG ("WRCM") + ADBG ("CMOS Offset") + ADBG (Arg0) + ADBG ("CMOS Data") + ADBG (Arg1) + OperationRegion (CMOS, SystemIO, 0x70, 0x04) + Field (CMOS, AnyAcc, NoLock, Preserve) + { + LIND, 8, + LDAT, 8, + HIND, 8, + HDAT, 8 + } + + If (LLessEqual (Arg0, 0x7F)) + { + Store (Arg0, LIND) + Store (Arg1, LDAT) + } + ElseIf (LLessEqual (Arg0, 0xFF)) + { + Store (Arg0, HIND) + Store (Arg1, HDAT) + } + } + + Method (TBON, 0, Serialized) + { + Store (0x01, TRDO) + Switch (ToInteger (\TBSE)) + { + Case (0x01) + { + If (CondRefOf (\_SB.PCI0.RP01.PON)) + { + \_SB.PCI0.RP01.PON () + } + } + Case (0x02) + { + If (CondRefOf (\_SB.PCI0.RP02.PON)) + { + \_SB.PCI0.RP02.PON () + } + } + Case (0x03) + { + If (CondRefOf (\_SB.PCI0.RP03.PON)) + { + \_SB.PCI0.RP03.PON () + } + } + Case (0x04) + { + If (CondRefOf (\_SB.PCI0.RP04.PON)) + { + \_SB.PCI0.RP04.PON () + } + } + Case (0x05) + { + If (CondRefOf (\_SB.PCI0.RP05.PON)) + { + \_SB.PCI0.RP05.PON () + } + } + Case (0x06) + { + If (CondRefOf (\_SB.PCI0.RP06.PON)) + { + \_SB.PCI0.RP06.PON () + } + } + Case (0x07) + { + If (CondRefOf (\_SB.PCI0.RP07.PON)) + { + \_SB.PCI0.RP07.PON () + } + } + Case (0x08) + { + If (CondRefOf (\_SB.PCI0.RP08.PON)) + { + \_SB.PCI0.RP08.PON () + } + } + Case (0x09) + { + If (CondRefOf (\_SB.PCI0.RP09.PON)) + { + \_SB.PCI0.RP09.PON () + } + } + Case (0x0A) + { + If (CondRefOf (\_SB.PCI0.RP10.PON)) + { + \_SB.PCI0.RP10.PON () + } + } + Case (0x0B) + { + If (CondRefOf (\_SB.PCI0.RP11.PON)) + { + \_SB.PCI0.RP11.PON () + } + } + Case (0x0C) + { + If (CondRefOf (\_SB.PCI0.RP12.PON)) + { + \_SB.PCI0.RP12.PON () + } + } + Case (0x0D) + { + If (CondRefOf (\_SB.PCI0.RP13.PON)) + { + \_SB.PCI0.RP13.PON () + } + } + Case (0x0E) + { + If (CondRefOf (\_SB.PCI0.RP14.PON)) + { + \_SB.PCI0.RP14.PON () + } + } + Case (0x0F) + { + If (CondRefOf (\_SB.PCI0.RP15.PON)) + { + \_SB.PCI0.RP15.PON () + } + } + Case (0x10) + { + If (CondRefOf (\_SB.PCI0.RP16.PON)) + { + \_SB.PCI0.RP16.PON () + } + } + Case (0x11) + { + If (CondRefOf (\_SB.PCI0.RP17.PON)) + { + \_SB.PCI0.RP17.PON () + } + } + Case (0x12) + { + If (CondRefOf (\_SB.PCI0.RP18.PON)) + { + \_SB.PCI0.RP18.PON () + } + } + Case (0x13) + { + If (CondRefOf (\_SB.PCI0.RP19.PON)) + { + \_SB.PCI0.RP19.PON () + } + } + Case (0x14) + { + If (CondRefOf (\_SB.PCI0.RP20.PON)) + { + \_SB.PCI0.RP20.PON () + } + } + Case (0x15) + { + } + Case (0x16) + { + } + Case (0x17) + { + } + + } + + Store (0x00, TRDO) + } + + Scope (\_PR) + { + Processor (PR00, 0x01, 0x00001810, 0x06){} + Processor (PR01, 0x02, 0x00001810, 0x06){} + Processor (PR02, 0x03, 0x00001810, 0x06){} + Processor (PR03, 0x04, 0x00001810, 0x06){} + Processor (PR04, 0x05, 0x00001810, 0x06){} + Processor (PR05, 0x06, 0x00001810, 0x06){} + Processor (PR06, 0x07, 0x00001810, 0x06){} + Processor (PR07, 0x08, 0x00001810, 0x06){} + Processor (PR08, 0x09, 0x00001810, 0x06){} + Processor (PR09, 0x0A, 0x00001810, 0x06){} + Processor (PR10, 0x0B, 0x00001810, 0x06){} + Processor (PR11, 0x0C, 0x00001810, 0x06){} + Processor (PR12, 0x0D, 0x00001810, 0x06){} + Processor (PR13, 0x0E, 0x00001810, 0x06){} + Processor (PR14, 0x0F, 0x00001810, 0x06){} + Processor (PR15, 0x10, 0x00001810, 0x06){} + } + + Scope (\_PR.PR00) + { + Name (CPC2, Package (0x15) + { + 0x15, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x00000000000000CE, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E7, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E8, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x02, // Bit Width + 0x01, // Bit Offset + 0x0000000000000777, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x01, // Bit Width + 0x00, // Bit Offset + 0x0000000000000770, // Address + 0x04, // Access Size + ) + }, + + 0x01, + ResourceTemplate () + { + Register (FFixedHW, + 0x0A, // Bit Width + 0x20, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + 0x00 + }) + Name (CPOC, Package (0x15) + { + 0x15, + 0x02, + 0xFF, + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x00000000000000CE, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000771, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x10, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x08, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E7, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x40, // Bit Width + 0x00, // Bit Offset + 0x00000000000000E8, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x02, // Bit Width + 0x01, // Bit Offset + 0x0000000000000777, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x01, // Bit Width + 0x00, // Bit Offset + 0x0000000000000770, // Address + 0x04, // Access Size + ) + }, + + 0x01, + ResourceTemplate () + { + Register (FFixedHW, + 0x0A, // Bit Width + 0x20, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x08, // Bit Width + 0x18, // Bit Offset + 0x0000000000000774, // Address + 0x04, // Access Size + ) + }, + + 0x00 + }) + } + + Scope (\_SB) + { + Device (PAGD) + { + Name (_HID, "ACPI000C") // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\_OSI ("Processor Aggregator Device")) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Name (_PUR, Package (0x02) // _PUR: Processor Utilization Request + { + 0x01, + 0x00 + }) + } + } + + Scope (\) + { + Method (PNTF, 1, NotSerialized) + { + If (And (\_PR.CFGD, 0x0200)) + { + If (LOr (LAnd (And (PC00, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC00, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR00, Arg0) + } + + If (LOr (LAnd (And (PC01, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC01, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR01, Arg0) + } + + If (LOr (LAnd (And (PC02, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC02, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR02, Arg0) + } + + If (LOr (LAnd (And (PC03, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC03, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR03, Arg0) + } + + If (LOr (LAnd (And (PC04, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC04, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR04, Arg0) + } + + If (LOr (LAnd (And (PC05, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC05, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR05, Arg0) + } + + If (LOr (LAnd (And (PC06, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC06, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR06, Arg0) + } + + If (LOr (LAnd (And (PC07, 0x08), LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))), LAnd (And (PC07, 0x10), LEqual (Arg0, 0x81)))) + { + Notify (\_PR.PR07, Arg0) + } + } + ElseIf (LOr (LEqual (Arg0, 0x80), LOr (LEqual (Arg0, 0x81), LEqual (Arg0, 0x82)))) + { + Notify (\_PR.PR00, Arg0) + } + } + } + + Scope (\_SB.PCI0) + { + Device (PDRC) + { + Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00008000, // Address Length + _Y34) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y35) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y36) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y37) + Memory32Fixed (ReadWrite, + 0xFED20000, // Address Base + 0x00020000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFED90000, // Address Base + 0x00004000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED45000, // Address Base + 0x0004B000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFF000000, // Address Base + 0x01000000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFEE00000, // Address Base + 0x00100000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y38) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y39) + }) + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y34._BAS, MBR0) // _BAS: Base Address + Store (\_SB.PCI0.GMHB (), MBR0) + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y35._BAS, DBR0) // _BAS: Base Address + Store (\_SB.PCI0.GDMB (), DBR0) + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y36._BAS, EBR0) // _BAS: Base Address + Store (\_SB.PCI0.GEPB (), EBR0) + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y37._BAS, XBR0) // _BAS: Base Address + Store (\_SB.PCI0.GPCB (), XBR0) + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y37._LEN, XSZ0) // _LEN: Length + Store (\_SB.PCI0.GPCL (), XSZ0) + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y38._BAS, SXRA) // _BAS: Base Address + Store (SXRB, SXRA) + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y38._LEN, SXRL) // _LEN: Length + Store (SXRS, SXRL) + If (LNot (HPTE)) + { + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y39._BAS, HBAS) // _BAS: Base Address + CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y39._LEN, HLEN) // _LEN: Length + Store (HPTB, HBAS) + Store (0x0400, HLEN) + } + + Return (BUF0) + } + } + } + + Method (BRTN, 1, Serialized) + { + If (LEqual (And (DIDX, 0x0F00), 0x0400)) + { + Notify (\_SB.PCI0.GFX0.DD1F, Arg0) + } + } + + Scope (\_GPE) + { + Method (_L17, 0, NotSerialized) // _Lxx: Level-Triggered GPE + { + Store (\_SB.PCI0.LPCB.EC.HWAC, Local0) + Store (Local0, \RRBF) + Sleep (0x0A) + If (And (Local0, 0x02)){} + If (And (Local0, 0x04)) + { + Notify (\_SB.LID, 0x02) + } + + If (And (Local0, 0x08)) + { + Notify (\_SB.SLPB, 0x02) + } + + If (And (Local0, 0x10)) + { + Notify (\_SB.SLPB, 0x02) + } + + If (And (Local0, 0x40)){} + If (And (Local0, 0x80)) + { + Notify (\_SB.SLPB, 0x02) + } + } + + Method (_L69, 0, NotSerialized) // _Lxx: Level-Triggered GPE + { + If (\_SB.PCI0.RP01.PSPX) + { + Store (0x01, \_SB.PCI0.RP01.PSPX) + Store (0x01, \_SB.PCI0.RP01.PMSX) + Notify (\_SB.PCI0.RP01, 0x02) + } + + If (\_SB.PCI0.RP02.PSPX) + { + Store (0x01, \_SB.PCI0.RP02.PSPX) + Store (0x01, \_SB.PCI0.RP02.PMSX) + Notify (\_SB.PCI0.RP02, 0x02) + } + + If (\_SB.PCI0.RP03.PSPX) + { + Store (0x01, \_SB.PCI0.RP03.PSPX) + Store (0x01, \_SB.PCI0.RP03.PMSX) + Notify (\_SB.PCI0.RP03, 0x02) + } + + If (\_SB.PCI0.RP05.PSPX) + { + Store (0x01, \_SB.PCI0.RP05.PSPX) + Store (0x01, \_SB.PCI0.RP05.PMSX) + Notify (\_SB.PCI0.RP05, 0x02) + } + + If (\_SB.PCI0.RP09.PSPX) + { + Store (0x01, \_SB.PCI0.RP09.PSPX) + Store (0x01, \_SB.PCI0.RP09.PMSX) + Notify (\_SB.PCI0.RP09, 0x02) + } + } + + Method (_L61, 0, NotSerialized) // _Lxx: Level-Triggered GPE + { + Add (L01C, 0x01, L01C) + P8XH (0x00, 0x01) + P8XH (0x01, L01C) + } + + Method (_L62, 0, NotSerialized) // _Lxx: Level-Triggered GPE + { + Store (0x00, \_SB.PCI0.LPCB.SWGE) + } + + Method (_L66, 0, NotSerialized) // _Lxx: Level-Triggered GPE + { + If (\_SB.PCI0.GFX0.GSSE) + { + \_SB.PCI0.GFX0.GSCI () + } + Else + { + Store (0x01, \_SB.PCI0.SBUS.CPSC) + } + } + + Method (TBNF, 0, NotSerialized) + { + ADBG ("TBNF") + Notify (\_SB.PCI0.RP09, 0x02) + } + + Method (_L27, 0, NotSerialized) // _Lxx: Level-Triggered GPE + { + ADBG ("-TBT_PCIE_WAKE") + Notify (\_SB.PCI0.RP09, 0x02) + } + + Method (_L6F, 0, NotSerialized) // _Lxx: Level-Triggered GPE + { + ADBG ("_L6F") + If (LEqual (TBTS, 0x01)) + { + If (\_SB.ISME (CPGN)) + { + ADBG (Concatenate ("CPGN->", ToHexString (CPGN))) + \_SB.THDR (TBSE, CPGN) + } + + If (\_SB.ISME (CPG1)) + { + ADBG (Concatenate ("CPG1->", ToHexString (CPG1))) + \_SB.THDR (TBS1, CPG1) + } + } + } + } + + Scope (\_SB.PCI0.RP01.PXSX) + { + ADBG ("WIFI SAR") + OperationRegion (RPXX, PCI_Config, 0x00, 0x50) + Field (RPXX, WordAcc, NoLock, Preserve) + { + VDID, 32, + Offset (0x44), + DCAP, 32, + DCTR, 16 + } + + Method (WIST, 0, Serialized) + { + ADBG (Concatenate ("WIST=", ToHexString (VDID))) + If (VDID) + { + Switch (ToInteger (VDID)) + { + Case (0x095A8086) + { + Return (0x01) + } + Case (0x095B8086) + { + Return (0x01) + } + Case (0x31658086) + { + Return (0x01) + } + Case (0x31668086) + { + Return (0x01) + } + Case (0x08B18086) + { + Return (0x01) + } + Case (0x08B28086) + { + Return (0x01) + } + Case (0x08B38086) + { + Return (0x01) + } + Case (0x08B48086) + { + Return (0x01) + } + Case (0x24F38086) + { + Return (0x01) + } + Case (0x24F48086) + { + Return (0x01) + } + Case (0x24F58086) + { + Return (0x01) + } + Case (0x24F68086) + { + Return (0x01) + } + Case (0x24FD8086) + { + Return (0x01) + } + Case (0x24FB8086) + { + Return (0x01) + } + Default + { + Return (0x00) + } + + } + } + Else + { + Return (0x00) + } + } + + Method (WGST, 0, Serialized) + { + ADBG (Concatenate ("WGST=", ToHexString (VDID))) + If (VDID) + { + Switch (ToInteger (VDID)) + { + Case (0x093C8086) + { + Return (0x01) + } + Case (0x097C8086) + { + Return (0x01) + } + Default + { + Return (0x00) + } + + } + } + Else + { + Return (0x00) + } + } + + If (LOr (WIST (), WGST ())) + { + ADBG ("Add WIFI SAR") + OperationRegion (RPXY, PCI_Config, 0x2C, 0x10) + Field (RPXY, AnyAcc, NoLock, Preserve) + { + SVID, 32 + } + + Name (SPLX, Package (0x04) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Method (SPLC, 0, Serialized) + { + Store (\DOM1, Index (DerefOf (Index (SPLX, 0x01)), 0x00)) + Store (\LIM1, Index (DerefOf (Index (SPLX, 0x01)), 0x01)) + Store (\TIM1, Index (DerefOf (Index (SPLX, 0x01)), 0x02)) + Store (\DOM2, Index (DerefOf (Index (SPLX, 0x02)), 0x00)) + Store (\LIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x01)) + Store (\TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02)) + Store (\DOM3, Index (DerefOf (Index (SPLX, 0x03)), 0x00)) + Store (\LIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x01)) + Store (\TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02)) + Return (SPLX) + } + + PowerResource (WRST, 0x05, 0x0000) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + ADBG ("PXSX _STA") + Return (0x01) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + ADBG ("PXSX _ON") + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + ADBG ("PXSX _OFF") + } + + Method (_RST, 0, NotSerialized) // _RST: Device Reset + { + ADBG ("PXSX _RST") + If (And (DCAP, 0x10000000)) + { + Store (DCTR, Local0) + Or (Local0, 0x8000, Local0) + Store (Local0, DCTR) + } + } + } + + Name (_PRR, Package (0x01) // _PRR: Power Resource for Reset + { + WRST + }) + Name (WANX, Package (0x03) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Method (WAND, 0, Serialized) + { + Store (0x00, Index (DerefOf (Index (WANX, 0x01)), 0x00)) + Store (\TRD0, Index (DerefOf (Index (WANX, 0x01)), 0x01)) + Store (\TRL0, Index (DerefOf (Index (WANX, 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (WANX, 0x02)), 0x00)) + Store (\TRD1, Index (DerefOf (Index (WANX, 0x02)), 0x01)) + Store (\TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02)) + Return (WANX) + } + + Name (WRDX, Package (0x03) + { + 0x00, + Package (0x02) + { + 0x80000000, + 0x8000 + }, + + Package (0x02) + { + 0x80000000, + 0x8000 + } + }) + Method (WRDD, 0, Serialized) + { + ADBG ("WRDD") + If (CondRefOf (SVID)) + { + If (LOr (LEqual (SVID, 0x00108086), LEqual (SVID, 0x10108086))) + { + ADBG ("Get it") + Name (WRDG, Package (0x02) + { + 0x00, + Package (0x02) + { + 0x07, + 0x4150 + } + }) + Return (WRDG) + } + } + } + + Name (WRDY, Package (0x03) + { + 0x00, + Package (0x0C) + { + 0x07, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80 + }, + + Package (0x06) + { + 0x10, + 0x80, + 0x80, + 0x80, + 0x80, + 0x80 + } + }) + Method (WRDS, 0, Serialized) + { + ADBG ("WRDS") + If (CondRefOf (SVID)) + { + If (LOr (LEqual (SVID, 0x00108086), LEqual (SVID, 0x10108086))) + { + ADBG ("Get it") + Name (WRDI, Package (0x02) + { + 0x00, + Package (0x0C) + { + 0x07, + 0x01, + 0x7C, + 0x6C, + 0x6C, + 0x68, + 0x60, + 0x7C, + 0x6C, + 0x6C, + 0x68, + 0x60 + } + }) + Return (WRDI) + } + } + } + + Method (AWVC, 0, Serialized) + { + Return (0x0101) + } + + Method (WOWG, 0, Serialized) + { + Return (WGWS) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (PCIC (Arg0)) + { + Return (PCID (Arg0, Arg1, Arg2, Arg3)) + } + + If (LEqual (Arg0, ToUUID ("1730e71d-e5dd-4a34-be57-4d76b6a2fe37"))) + { + If (LEqual (Arg2, Zero)) + { + If (LEqual (Arg1, Zero)) + { + Return (Buffer (0x01) + { + 0x03 + }) + } + Else + { + Return (Buffer (0x01) + { + 0x00 + }) + } + } + + If (LEqual (Arg2, One)) + { + Switch (ToInteger (DerefOf (Index (Arg3, 0x00)))) + { + Case (0x00) + { + } + Case (0x01) + { + If (CondRefOf (\_SB.SLPB)) + { + Notify (\_SB.SLPB, 0x80) + } + } + Case (0x02) + { + } + Case (0x03) + { + } + Case (0x04) + { + If (CondRefOf (\_SB.SLPB)) + { + Notify (\_SB.SLPB, 0x02) + } + } + + } + } + + Return (0x00) + } + ElseIf (LEqual (Arg0, ToUUID ("7574eb17-d1a2-4cc2-9929-4a08fcc29107"))) + { + Switch (ToInteger (Arg2)) + { + Case (0x00) + { + If (LEqual (Arg1, Zero)) + { + Return (Buffer (0x01) + { + 0x07 + }) + } + Else + { + Return (Buffer (0x01) + { + 0x00 + }) + } + } + Case (0x01) + { + Return (\_SB.PCI0.WHIT ()) + } + Case (0x02) + { + Return (\_SB.PCI0.SELF ()) + } + Default + { + Return (Buffer (0x01) + { + 0x00 + }) + } + + } + } + Else + { + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + } + + Scope (\_SB.PCI0) + { + Method (WHIT, 0, NotSerialized) + { + Return (Package (0x01) + { + Package (0x05) + { + "?*", + "?*", + 0x00, + 0x02, + 0x02 + } + }) + } + + Method (SELF, 0, NotSerialized) + { + Return (Package (0x02) + { + "LENOVO", + "TP-N23 " + }) + } + } + + Scope (\_SB.PCI0.GFX0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.ISP0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.SAT0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LNotEqual (And (PEPC, 0x03), 0x00))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.SAT0.VOL0) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LEqual (OSYS, 0x07DD)) + { + Return (Package (0x00){}) + } + + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Scope (\_SB.PCI0.I2C0) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C1) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C2) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C3) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C4) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.I2C5) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.SPI0) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.SPI1) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.UA00) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.UA01) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.UA02) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + + Scope (\_SB.PCI0.HECI) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEPD + }) + } + } + + Scope (\_SB.PCI0.XHC) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.HDAS) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LEqual (S0ID, 0x01)) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB.PCI0.RP01.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP02.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP03.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP04.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP05.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP06.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP07.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP08.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP09.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP10.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP11.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP12.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP13.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP14.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP15.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP16.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP17.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP18.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP19.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_SB.PCI0.RP20.PXSX) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (PAHC (), PNVM ())) + { + If (LAnd (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF)), LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800), 0x0800)))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + } + + Return (Package (0x00){}) + } + + OperationRegion (PCCX, PCI_Config, 0x09, 0x04) + Field (PCCX, ByteAcc, NoLock, Preserve) + { + PIXX, 8, + SCCX, 8, + BCCX, 8 + } + + Method (PAHC, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x06)) + { + If (LEqual (PIXX, 0x01)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + + Method (PNVM, 0, Serialized) + { + If (LEqual (BCCX, 0x01)) + { + If (LEqual (SCCX, 0x08)) + { + If (LEqual (PIXX, 0x02)) + { + Return (0x01) + } + } + } + + Return (0x00) + } + } + + Scope (\_PR.PR00) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR01) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR02) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR03) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + ADBG ("PR03 DEP Call") + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR04) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR05) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR06) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR07) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR08) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR09) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR10) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR11) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR12) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR13) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR14) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_PR.PR15) + { + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + If (LOr (LEqual (S0ID, 0x01), LGreaterEqual (OSYS, 0x07DF))) + { + Return (Package (0x01) + { + \_SB.PEPD + }) + } + Else + { + Return (Package (0x00){}) + } + } + } + + Scope (\_SB) + { + Device (PEPD) + { + Name (_HID, "INT33A1") // _HID: Hardware ID + Name (_CID, EisaId ("PNP0D80")) // _CID: Compatible ID + Name (_UID, 0x01) // _UID: Unique ID + Name (DEVY, Package (0x43) + { + Package (0x03) + { + "\\_PR.PR00", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR01", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR02", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR03", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR04", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR05", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR06", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR07", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.GFX0", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.UA00", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.UA01", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C0", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C1", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.XHC", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.HDAS", + 0x01, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.PEMC", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.PSDC", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C2", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C3", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C4", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.I2C5", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.UA02", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SPI0", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SPI1", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP01.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP02.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP03.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP04.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP05.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP06.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP07.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP08.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP09.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP10.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP11.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP12.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP13.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP14.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP15.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP16.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP17.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP18.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP19.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP20.PXSX", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.ISP0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT1", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT2", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT3", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT4", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.PRT5", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.NVM1", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.NVM2", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.NVM3", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.SAT0.VOL0", + 0x00, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_PR.PR08", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR09", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR10", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR11", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR12", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR13", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR14", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_PR.PR15", + 0x00, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x00 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.HECI", + 0x01, + Package (0x02) + { + 0x00, + Package (0x03) + { + 0xFF, + 0x00, + 0x81 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.RP09.PXSX.TBDU.XHC", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + }, + + Package (0x03) + { + "\\_SB.PCI0.GLAN", + 0x01, + Package (0x02) + { + 0x00, + Package (0x02) + { + 0xFF, + 0x03 + } + } + } + }) + Name (BCCD, Package (0x0B) + { + Package (0x02) + { + "\\_SB.PCI0.SAT0", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT0", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT1", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT2", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.PRT3", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.SAT0.VOL0", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x3E80 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP01.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP02.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP03.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP05.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + }, + + Package (0x02) + { + "\\_SB.PCI0.RP09.PXSX", + Package (0x01) + { + Package (0x03) + { + Package (0x05) + { + 0x01, + 0x08, + 0x00, + 0x01, + 0xB2 + }, + + Package (0x03) + { + 0x00, + 0xCD, + 0x01 + }, + + 0x000186A0 + } + } + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LOr (LGreaterEqual (OSYS, 0x07DF), LAnd (LGreaterEqual (OSYS, 0x07DC), LEqual (S0ID, 0x01)))) + { + Return (0x0F) + } + + Return (0x00) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("c4eb40a0-6cd2-11e2-bcfd-0800200c9a66"))) + { + ADBG (Concatenate ("PEP:_DSM=", ToHexString (Arg2))) + If (LEqual (Arg2, Zero)) + { + Return (Buffer (One) + { + 0x7F + }) + } + + If (LEqual (Arg2, One)) + { + If (LEqual (S0ID, 0x00)) + { + Return (Package (0x00){}) + } + + If (LOr (\_SB.PCI0.RP01.PXSX.PAHC (), \_SB.PCI0.RP01.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x19)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP02.PXSX.PAHC (), \_SB.PCI0.RP02.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1A)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP03.PXSX.PAHC (), \_SB.PCI0.RP03.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1B)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP04.PXSX.PAHC (), \_SB.PCI0.RP04.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1C)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP05.PXSX.PAHC (), \_SB.PCI0.RP05.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1D)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP06.PXSX.PAHC (), \_SB.PCI0.RP06.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1E)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP07.PXSX.PAHC (), \_SB.PCI0.RP07.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1F)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP08.PXSX.PAHC (), \_SB.PCI0.RP08.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x20)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP09.PXSX.PAHC (), \_SB.PCI0.RP09.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x21)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP10.PXSX.PAHC (), \_SB.PCI0.RP10.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x22)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP11.PXSX.PAHC (), \_SB.PCI0.RP11.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x23)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP12.PXSX.PAHC (), \_SB.PCI0.RP12.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x24)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP13.PXSX.PAHC (), \_SB.PCI0.RP13.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x25)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP14.PXSX.PAHC (), \_SB.PCI0.RP14.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x26)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP15.PXSX.PAHC (), \_SB.PCI0.RP15.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x27)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP16.PXSX.PAHC (), \_SB.PCI0.RP16.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x28)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP17.PXSX.PAHC (), \_SB.PCI0.RP17.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x29)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP18.PXSX.PAHC (), \_SB.PCI0.RP18.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2A)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP19.PXSX.PAHC (), \_SB.PCI0.RP19.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2B)), 0x01)) + } + + If (LOr (\_SB.PCI0.RP20.PXSX.PAHC (), \_SB.PCI0.RP20.PXSX.PNVM ())) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2C)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x00200000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x37)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x00400000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2E)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x00800000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2F)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x01000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x30)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x02000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x31)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x04000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x32)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x08000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x33)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x10000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x34)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x20000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x35)), 0x01)) + } + + If (LNotEqual (And (PEPC, 0x40000000), 0x00)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x36)), 0x01)) + } + + If (LEqual (And (PEPC, 0x80000000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x40)), 0x01)) + } + + If (LEqual (And (PEPC, 0x04), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0A)), 0x01)) + } + + If (LEqual (And (PEPC, 0x08), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0B)), 0x01)) + } + + If (LEqual (And (PEPC, 0x10), 0x00)){} + If (LEqual (And (PEPC, 0x20), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0C)), 0x01)) + } + + If (LEqual (And (PEPC, 0x40), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0D)), 0x01)) + } + + If (LEqual (And (PEPC, 0x80), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0E)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0100), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x0F)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0200), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x08)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x01)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x00)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x02)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x01)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x03)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x02)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x04)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x03)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x05)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x04)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x06)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x05)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x07)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x06)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x08)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x07)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x09)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x38)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0A)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x39)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0B)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3A)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0C)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3B)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0D)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3C)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0E)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3D)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x0F)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3E)), 0x01)) + } + + If (LGreaterEqual (TCNT, 0x10)) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x3F)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0400), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x00)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x02)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x03)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x04)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x05)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x06)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x07)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x38)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x39)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3A)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3B)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3C)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3D)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3E)), 0x01)) + Store (0x00, Index (DerefOf (Index (DEVY, 0x3F)), 0x01)) + } + + If (LEqual (And (PEPC, 0x01), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x41)), 0x01)) + } + + If (LEqual (And (PEPC, 0x0800), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x10)), 0x01)) + } + + If (LEqual (And (PEPC, 0x1000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x11)), 0x01)) + } + + If (LEqual (And (PEPC, 0x2000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x12)), 0x01)) + } + + If (LEqual (And (PEPC, 0x4000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x13)), 0x01)) + } + + If (LEqual (And (PEPC, 0x8000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x14)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00010000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x15)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00020000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x16)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00040000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x17)), 0x01)) + } + + If (LEqual (And (PEPC, 0x00080000), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x18)), 0x01)) + } + + If (LEqual (And (PEPC, 0x02), 0x00)) + { + Store (0x00, Index (DerefOf (Index (DEVY, 0x42)), 0x01)) + } + + If (LGreaterEqual (OSYS, 0x07DF)) + { + If (CondRefOf (\_SB.PCI0.RP01.PXSX.WIST)) + { + If (\_SB.PCI0.RP01.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x19)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x19)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x19)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP02.PXSX.WIST)) + { + If (\_SB.PCI0.RP02.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1A)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1A)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP03.PXSX.WIST)) + { + If (\_SB.PCI0.RP03.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1B)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1B)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP04.PXSX.WIST)) + { + If (\_SB.PCI0.RP04.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1C)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1C)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1C)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP05.PXSX.WIST)) + { + If (\_SB.PCI0.RP05.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1D)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1D)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1D)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP06.PXSX.WIST)) + { + If (\_SB.PCI0.RP06.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1E)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1E)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1E)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP07.PXSX.WIST)) + { + If (\_SB.PCI0.RP07.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1F)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x1F)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x1F)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP08.PXSX.WIST)) + { + If (\_SB.PCI0.RP08.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x20)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x20)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x20)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP09.PXSX.WIST)) + { + If (\_SB.PCI0.RP09.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x21)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x21)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x21)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP10.PXSX.WIST)) + { + If (\_SB.PCI0.RP10.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x22)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x22)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x22)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP11.PXSX.WIST)) + { + If (\_SB.PCI0.RP11.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x23)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x23)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x23)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP12.PXSX.WIST)) + { + If (\_SB.PCI0.RP12.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x24)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x24)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x24)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP13.PXSX.WIST)) + { + If (\_SB.PCI0.RP13.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x25)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x25)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x25)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP14.PXSX.WIST)) + { + If (\_SB.PCI0.RP14.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x26)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x26)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x26)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP15.PXSX.WIST)) + { + If (\_SB.PCI0.RP15.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x27)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x27)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x27)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP16.PXSX.WIST)) + { + If (\_SB.PCI0.RP16.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x28)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x28)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x28)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP17.PXSX.WIST)) + { + If (\_SB.PCI0.RP17.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x29)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x29)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x29)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP18.PXSX.WIST)) + { + If (\_SB.PCI0.RP18.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2A)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2A)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x2A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP19.PXSX.WIST)) + { + If (\_SB.PCI0.RP19.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2B)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2B)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x2B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP20.PXSX.WIST)) + { + If (\_SB.PCI0.RP20.PXSX.WIST ()) + { + Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2C)), 0x02)), 0x01)), 0x01)) + Store (0x00, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY, 0x2C)), 0x02)), 0x01)), 0x02)) + Store (0x01, Index (DerefOf (Index (DEVY, 0x2C)), 0x01)) + } + } + } + + If (LAnd (LGreaterEqual (OSYS, 0x07DF), LEqual (PWIG, 0x01))) + { + If (CondRefOf (\_SB.PCI0.RP01.PXSX.WGST)) + { + If (\_SB.PCI0.RP01.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x19)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP02.PXSX.WGST)) + { + If (\_SB.PCI0.RP02.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP03.PXSX.WGST)) + { + If (\_SB.PCI0.RP03.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP04.PXSX.WGST)) + { + If (\_SB.PCI0.RP04.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1C)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP05.PXSX.WGST)) + { + If (\_SB.PCI0.RP05.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1D)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP06.PXSX.WGST)) + { + If (\_SB.PCI0.RP06.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1E)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP07.PXSX.WGST)) + { + If (\_SB.PCI0.RP07.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x1F)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP08.PXSX.WGST)) + { + If (\_SB.PCI0.RP08.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x20)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP09.PXSX.WGST)) + { + If (\_SB.PCI0.RP09.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x21)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP10.PXSX.WGST)) + { + If (\_SB.PCI0.RP10.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x22)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP11.PXSX.WGST)) + { + If (\_SB.PCI0.RP11.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x23)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP12.PXSX.WGST)) + { + If (\_SB.PCI0.RP12.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x24)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP13.PXSX.WGST)) + { + If (\_SB.PCI0.RP13.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x25)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP14.PXSX.WGST)) + { + If (\_SB.PCI0.RP14.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x26)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP15.PXSX.WGST)) + { + If (\_SB.PCI0.RP15.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x27)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP16.PXSX.WGST)) + { + If (\_SB.PCI0.RP16.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x28)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP17.PXSX.WGST)) + { + If (\_SB.PCI0.RP17.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x29)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP18.PXSX.WGST)) + { + If (\_SB.PCI0.RP18.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2A)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP19.PXSX.WGST)) + { + If (\_SB.PCI0.RP19.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2B)), 0x01)) + } + } + + If (CondRefOf (\_SB.PCI0.RP20.PXSX.WGST)) + { + If (\_SB.PCI0.RP20.PXSX.WGST ()) + { + Store (0x01, Index (DerefOf (Index (DEVY, 0x2C)), 0x01)) + } + } + } + + Return (DEVY) + } + + If (LEqual (Arg2, 0x02)) + { + Return (BCCD) + } + + If (LEqual (Arg2, 0x03)) + { + If (LEqual (S0ID, 0x01)) + { + ADBG ("PEP:S_Fun3") + \_SB.PCI0.LPCB.EC.ECNT (0x01) + ADBG ("PEP:E_Fun3") + } + } + + If (LEqual (Arg2, 0x04)) + { + If (LEqual (S0ID, 0x01)) + { + ADBG ("PEP:S_Fun4") + If (LAnd (LEqual (\RTBT, 0x01), CondRefOf (\_GPE.TBNF))) + { + \_GPE.TBNF () + } + + \_SB.PCI0.LPCB.EC.ECNT (0x00) + ADBG ("PEP:E_Fun4") + } + } + + If (LEqual (Arg2, 0x05)) + { + ADBG ("PEP:S_Fun5") + If (LEqual (S0ID, 0x01)) + { + \GUAM (0x01) + } + + \_SB.PCI0.LPCB.EC.ECNT (0x03) + ADBG ("PEP:E_Fun5") + } + + If (LEqual (Arg2, 0x06)) + { + ADBG ("PEP:S_Fun6") + \_SB.PCI0.LPCB.EC.ECNT (0x02) + If (LEqual (S0ID, 0x01)) + { + \GUAM (0x00) + } + + ADBG ("PEP:E_Fun6") + } + } + + Return (Buffer (0x01) + { + 0x00 + }) + } + } + } + + Device (PSM) + { + Name (_HID, EisaId ("INT3420")) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_STR, Unicode ("Power Sharing Manager")) // _STR: Description String + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (PSME, 0x01)) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Name (SPLX, Package (0x03) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Method (SPLC, 0, Serialized) + { + Store (\PDT1, Index (DerefOf (Index (SPLX, 0x01)), 0x00)) + Store (\PLM1, Index (DerefOf (Index (SPLX, 0x01)), 0x01)) + Store (\PTW1, Index (DerefOf (Index (SPLX, 0x01)), 0x02)) + Store (\PDT2, Index (DerefOf (Index (SPLX, 0x02)), 0x00)) + Store (\PLM2, Index (DerefOf (Index (SPLX, 0x02)), 0x01)) + Store (\PTW2, Index (DerefOf (Index (SPLX, 0x02)), 0x02)) + Return (SPLX) + } + + Name (DPLX, Package (0x03) + { + 0x00, + Package (0x03) + { + 0x80000000, + 0x80000000, + Package (0x06) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }, + + Package (0x03) + { + 0x80000000, + 0x80000000, + Package (0x06) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + } + }) + Method (DPLC, 0, Serialized) + { + Store (\DDT1, Index (DerefOf (Index (DPLX, 0x01)), 0x00)) + Store (\DDP1, Index (DerefOf (Index (DPLX, 0x01)), 0x01)) + Store (\DLI1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), 0x00)) + Store (\DPL1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), 0x01)) + Store (\DTW1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), 0x02)) + Store (\DMI1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), 0x03)) + Store (\DMA1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), 0x04)) + Store (\DMT1, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x01)), 0x02)), 0x05)) + Store (\DDT2, Index (DerefOf (Index (DPLX, 0x02)), 0x00)) + Store (\DDP2, Index (DerefOf (Index (DPLX, 0x02)), 0x01)) + Store (\DLI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), 0x00)) + Store (\DPL2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), 0x01)) + Store (\DTW2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), 0x02)) + Store (\DMI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), 0x03)) + Store (\DMA2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), 0x04)) + Store (\DMT2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)), 0x02)), 0x05)) + Return (DPLX) + } + } + + Name (\_S0, Package (0x04) // _S0_: S0 System State + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + Name (\_S4, Package (0x04) // _S4_: S4 System State + { + 0x06, + 0x06, + 0x00, + 0x00 + }) + Name (\_S5, Package (0x04) // _S5_: S5 System State + { + 0x07, + 0x07, + 0x00, + 0x00 + }) + Method (PTS, 1, NotSerialized) + { + If (Arg0){} + } + + Method (WAK, 1, NotSerialized) + { + } + + Scope (\) + { + Field (GNVS, AnyAcc, Lock, Preserve) + { + Offset (0x1F), + B0SC, 8, + B1SC, 8, + B2SC, 8, + B0SS, 8, + B1SS, 8, + B2SS, 8 + } + } + + OperationRegion (MNVS, SystemMemory, 0x5B568018, 0x1000) + Field (MNVS, DWordAcc, NoLock, Preserve) + { + Offset (0xD00), + GAPA, 32, + GAPL, 32, + DCKI, 32, + DCKS, 32, + VCDL, 1, + VCDC, 1, + VCDT, 1, + VCDD, 1, + , 1, + VCSS, 1, + VCDB, 1, + VCIN, 1, + VVPO, 8, + BNTN, 8, + BRLV, 8, + CDFL, 8, + CDAH, 8, + PMOD, 2, + PDIR, 1, + PDMA, 1, + Offset (0xD17), + LFDC, 1, + Offset (0xD18), + C2NA, 1, + C3NA, 1, + C4NA, 1, + C6NA, 1, + C7NA, 1, + Offset (0xD19), + Offset (0xD1A), + , 2, + , 1, + NHPS, 1, + NPME, 1, + Offset (0xD1B), + UOPT, 8, + BTID, 32, + DPP0, 1, + DPP1, 1, + DPP2, 1, + DPP3, 1, + DPP4, 1, + DPP5, 1, + Offset (0xD21), + Offset (0xD22), + TCRT, 16, + TPSV, 16, + TTC1, 16, + TTC2, 16, + TTSP, 16, + SRAH, 8, + SRHE, 8, + SRE1, 8, + SRE2, 8, + SRE3, 8, + SRE4, 8, + SRE5, 8, + SRE6, 8, + SRU1, 8, + SRU2, 8, + SRU3, 8, + SRU7, 8, + SRU4, 8, + SRU5, 8, + SRU8, 8, + SRPB, 8, + SRLP, 8, + SRSA, 8, + SRSM, 8, + CWAC, 1, + CWAS, 1, + CWUE, 1, + CWUS, 1, + Offset (0xD40), + CWAP, 16, + CWAT, 16, + DBGC, 1, + Offset (0xD45), + FS1L, 16, + FS1M, 16, + FS1H, 16, + FS2L, 16, + FS2M, 16, + FS2H, 16, + FS3L, 16, + FS3M, 16, + FS3H, 16, + TATC, 1, + , 6, + TATL, 1, + TATW, 8, + TNFT, 4, + TNTT, 4, + TDFA, 4, + TDTA, 4, + TDFD, 4, + TDTD, 4, + TCFA, 4, + TCTA, 4, + TCFD, 4, + TCTD, 4, + TSFT, 4, + TSTT, 4, + TIT0, 8, + TCR0, 16, + TPS0, 16, + TIT1, 8, + TCR1, 16, + TPS1, 16, + TIT2, 8, + TCR2, 16, + TPS2, 16, + TIF0, 8, + TIF1, 8, + TIF2, 8, + Offset (0xD78), + BTHI, 1, + Offset (0xD79), + HDIR, 1, + HDEH, 1, + HDSP, 1, + HDPP, 1, + HDUB, 1, + HDMC, 1, + NFCF, 1, + Offset (0xD7A), + TPME, 8, + BIDE, 4, + IDET, 4, + , 1, + , 1, + Offset (0xD7D), + DTS0, 8, + Offset (0xD7F), + DT00, 1, + DT01, 1, + DT02, 1, + DT03, 1, + Offset (0xD80), + LIDB, 1, + C4WR, 1, + C4AC, 1, + ODDX, 1, + CMPR, 1, + ILNF, 1, + PLUX, 1, + Offset (0xD81), + Offset (0xD8A), + WLAC, 8, + WIWK, 1, + Offset (0xD8C), + , 4, + , 1, + IDMM, 1, + Offset (0xD8D), + , 3, + , 1, + , 1, + , 1, + Offset (0xD8E), + Offset (0xD8F), + , 4, + Offset (0xD90), + Offset (0xD91), + SWGP, 8, + IPMS, 8, + IPMB, 120, + IPMR, 24, + IPMO, 24, + IPMA, 8, + VIGD, 1, + VDSC, 1, + VMSH, 1, + , 1, + VDSP, 1, + Offset (0xDAA), + Offset (0xDAD), + ASFT, 8, + PL1L, 8, + PL1M, 8, + CHKC, 32, + CHKE, 32, + ATRB, 32, + Offset (0xDBD), + PPCR, 8, + TPCR, 5, + Offset (0xDBF), + Offset (0xDCE), + CTPR, 8, + PPCA, 8, + TPCA, 5, + Offset (0xDD1), + BFWB, 296, + OSPX, 1, + OSC4, 1, + CPPX, 1, + Offset (0xDF7), + SPEN, 1, + SCRM, 1, + , 1, + ETAU, 1, + IHBC, 1, + APMD, 1, + APMF, 1, + Offset (0xDF8), + FTPS, 8, + HIST, 8, + LPST, 8, + LWST, 8, + Offset (0xDFF), + Offset (0xE00), + Offset (0xE20), + HPET, 32, + PKLI, 16, + VLCX, 16, + VNIT, 8, + VBD0, 8, + VBDT, 128, + VBPL, 16, + VBPH, 16, + VBML, 8, + VBMH, 8, + VEDI, 1024, + PDCI, 16, + ISCG, 32, + ISSP, 1, + ISWK, 2, + ISFS, 3, + Offset (0xEC7), + SHA1, 160, + Offset (0xEDC), + LWCP, 1, + LWEN, 1, + IOCP, 1, + IOEN, 1, + IOST, 1, + Offset (0xEDD), + USBR, 1, + Offset (0xEDE), + Offset (0xEDF), + Offset (0xEE1), + BT2T, 1, + Offset (0xEE2), + TPPP, 8, + TPPC, 8, + CTPC, 8, + FNWK, 8, + Offset (0xEE7), + XHCC, 8, + FCAP, 16, + VSTD, 1, + VCQL, 1, + VTIO, 1, + VMYH, 1, + VSTP, 1, + VCQH, 1, + VDCC, 1, + VSFN, 1, + VDMC, 1, + VFHP, 1, + VIFC, 1, + VMMC, 1, + VMSC, 1, + VPSC, 1, + VCSC, 1, + Offset (0xEEC), + CICF, 4, + CICM, 4, + MYHC, 8, + MMCC, 8, + PT1D, 15, + Offset (0xEF1), + PT2D, 15, + Offset (0xEF3), + PT0D, 15, + Offset (0xEF5), + DVS0, 1, + DVS1, 1, + DVS2, 1, + DVS3, 1, + Offset (0xEF7), + DSTD, 15, + Offset (0xEF9), + DCQL, 15, + Offset (0xEFB), + DTIO, 15, + Offset (0xEFD), + DMYH, 15, + Offset (0xEFF), + DSTP, 15, + Offset (0xF01), + DCQH, 15, + Offset (0xF03), + DDCC, 15, + Offset (0xF05), + DSFN, 15, + Offset (0xF07), + DDMC, 15, + Offset (0xF09), + DFHP, 15, + Offset (0xF0B), + DIFC, 15, + Offset (0xF0D), + DMMC, 15, + Offset (0xF0F), + DMSC, 15, + Offset (0xF11), + DPSC, 15, + Offset (0xF13), + ECSC, 15, + Offset (0xF15), + SMYH, 4, + SMMC, 4, + SPSC, 4, + Offset (0xF17), + STDV, 8, + SCRB, 8, + PMOF, 8 + } + + Field (MNVS, ByteAcc, NoLock, Preserve) + { + Offset (0xB00), + WITM, 8, + WSEL, 8, + WLS0, 8, + WLS1, 8, + WLS2, 8, + WLS3, 8, + WLS4, 8, + WLS5, 8, + WLS6, 8, + WLS7, 8, + WLS8, 8, + WLS9, 8, + WLSA, 8, + WLSB, 8, + WLSC, 8, + WLSD, 8, + WENC, 8, + WKBD, 8, + WPTY, 8, + WPAS, 1032, + WPNW, 1032, + WSPM, 8, + WSPS, 8, + WSMN, 8, + WSMX, 8, + WSEN, 8, + WSKB, 8, + WASB, 8, + WASI, 16, + WASD, 8, + WASS, 32 + } + + Field (MNVS, ByteAcc, NoLock, Preserve) + { + Offset (0xA00), + DBGB, 1024 + } + + Name (SPS, 0x00) + Name (OSIF, 0x00) + Name (WNTF, 0x00) + Name (WXPF, 0x00) + Name (WVIS, 0x00) + Name (WIN7, 0x00) + Name (WIN8, 0x00) + Name (WSPV, 0x00) + Name (LNUX, 0x00) + Name (H8DR, 0x00) + Name (MEMX, 0x00) + Name (ACST, 0x00) + Name (FMBL, 0x01) + Name (FDTP, 0x02) + Name (FUPS, 0x03) + Name (FNID, 0x00) + Name (RRBF, 0x00) + Name (NBCF, 0x00) + OperationRegion (SMI0, SystemIO, 0xB2, 0x01) + Field (SMI0, ByteAcc, NoLock, Preserve) + { + APMC, 8 + } + + Field (MNVS, AnyAcc, NoLock, Preserve) + { + Offset (0xFC0), + CMD, 8, + ERR, 32, + PAR0, 32, + PAR1, 32, + PAR2, 32, + PAR3, 32 + } + + Mutex (MSMI, 0x00) + Method (SMI, 5, Serialized) + { + Acquire (MSMI, 0xFFFF) + Store (Arg0, CMD) + Store (0x01, ERR) + Store (Arg1, PAR0) + Store (Arg2, PAR1) + Store (Arg3, PAR2) + Store (Arg4, PAR3) + Store (0xF5, APMC) + While (LEqual (ERR, 0x01)) + { + Sleep (0x01) + Store (0xF5, APMC) + } + + Store (PAR0, Local0) + Release (MSMI) + Return (Local0) + } + + Method (RPCI, 1, NotSerialized) + { + Return (SMI (0x00, 0x00, Arg0, 0x00, 0x00)) + } + + Method (WPCI, 2, NotSerialized) + { + SMI (0x00, 0x01, Arg0, Arg1, 0x00) + } + + Method (MPCI, 3, NotSerialized) + { + SMI (0x00, 0x02, Arg0, Arg1, Arg2) + } + + Method (RBEC, 1, NotSerialized) + { + Return (SMI (0x00, 0x03, Arg0, 0x00, 0x00)) + } + + Method (WBEC, 2, NotSerialized) + { + SMI (0x00, 0x04, Arg0, Arg1, 0x00) + } + + Method (MBEC, 3, NotSerialized) + { + SMI (0x00, 0x05, Arg0, Arg1, Arg2) + } + + Method (RISA, 1, NotSerialized) + { + Return (SMI (0x00, 0x06, Arg0, 0x00, 0x00)) + } + + Method (WISA, 2, NotSerialized) + { + SMI (0x00, 0x07, Arg0, Arg1, 0x00) + } + + Method (MISA, 3, NotSerialized) + { + SMI (0x00, 0x08, Arg0, Arg1, Arg2) + } + + Method (VEXP, 0, NotSerialized) + { + SMI (0x01, 0x00, 0x00, 0x00, 0x00) + } + + Method (VUPS, 1, NotSerialized) + { + SMI (0x01, 0x01, Arg0, 0x00, 0x00) + } + + Method (VSDS, 2, NotSerialized) + { + SMI (0x01, 0x02, Arg0, Arg1, 0x00) + } + + Method (VDDC, 0, NotSerialized) + { + SMI (0x01, 0x03, 0x00, 0x00, 0x00) + } + + Method (VVPD, 1, NotSerialized) + { + SMI (0x01, 0x04, Arg0, 0x00, 0x00) + } + + Method (VNRS, 1, NotSerialized) + { + SMI (0x01, 0x05, Arg0, 0x00, 0x00) + } + + Method (GLPW, 0, NotSerialized) + { + Return (SMI (0x01, 0x06, 0x00, 0x00, 0x00)) + } + + Method (VSLD, 1, NotSerialized) + { + SMI (0x01, 0x07, Arg0, 0x00, 0x00) + } + + Method (VEVT, 1, NotSerialized) + { + Return (SMI (0x01, 0x08, Arg0, 0x00, 0x00)) + } + + Method (VTHR, 0, NotSerialized) + { + Return (SMI (0x01, 0x09, 0x00, 0x00, 0x00)) + } + + Method (VBRC, 1, NotSerialized) + { + SMI (0x01, 0x0A, Arg0, 0x00, 0x00) + } + + Method (VBRG, 0, NotSerialized) + { + Return (SMI (0x01, 0x0E, 0x00, 0x00, 0x00)) + } + + Method (VCMS, 2, NotSerialized) + { + Return (SMI (0x01, 0x0B, Arg0, Arg1, 0x00)) + } + + Method (VBTD, 0, NotSerialized) + { + Return (SMI (0x01, 0x0F, 0x00, 0x00, 0x00)) + } + + Method (VHYB, 2, NotSerialized) + { + Return (SMI (0x01, 0x10, Arg0, Arg1, 0x00)) + } + + Method (VDYN, 2, NotSerialized) + { + Return (SMI (0x01, 0x11, Arg0, Arg1, 0x00)) + } + + Method (SDPS, 2, NotSerialized) + { + Return (SMI (0x01, 0x12, Arg0, Arg1, 0x00)) + } + + Method (UCMS, 1, NotSerialized) + { + Return (SMI (0x02, Arg0, 0x00, 0x00, 0x00)) + } + + Method (BHDP, 2, NotSerialized) + { + Return (SMI (0x03, 0x00, Arg0, Arg1, 0x00)) + } + + Method (STEP, 1, NotSerialized) + { + SMI (0x04, Arg0, 0x00, 0x00, 0x00) + } + + Method (SLTP, 0, NotSerialized) + { + SMI (0x05, 0x00, 0x00, 0x00, 0x00) + } + + Method (CBRI, 0, NotSerialized) + { + SMI (0x05, 0x01, 0x00, 0x00, 0x00) + } + + Method (BCHK, 0, NotSerialized) + { + Return (SMI (0x05, 0x04, 0x00, 0x00, 0x00)) + } + + Method (BYRS, 0, NotSerialized) + { + SMI (0x05, 0x05, 0x00, 0x00, 0x00) + } + + Method (LCHK, 1, NotSerialized) + { + Return (SMI (0x05, 0x06, Arg0, 0x00, 0x00)) + } + + Method (BLTH, 1, NotSerialized) + { + Return (SMI (0x06, Arg0, 0x00, 0x00, 0x00)) + } + + Method (PRSM, 2, NotSerialized) + { + Return (SMI (0x07, 0x00, Arg0, Arg1, 0x00)) + } + + Method (ISOC, 1, NotSerialized) + { + Return (SMI (0x07, 0x03, Arg0, 0x00, 0x00)) + } + + Method (EZRC, 1, NotSerialized) + { + Return (SMI (0x07, 0x04, Arg0, 0x00, 0x00)) + } + + Method (WGSV, 1, NotSerialized) + { + Return (SMI (0x09, Arg0, 0x00, 0x00, 0x00)) + } + + Method (SWTT, 1, NotSerialized) + { + If (SMI (0x0A, 0x02, Arg0, 0x00, 0x00)) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6030) + } + } + } + + Method (TSDL, 0, NotSerialized) + { + Return (SMI (0x0A, 0x03, 0x00, 0x00, 0x00)) + } + + Method (FLPF, 1, NotSerialized) + { + Return (SMI (0x0A, 0x04, Arg0, 0x00, 0x00)) + } + + Method (GTST, 0, NotSerialized) + { + Return (SMI (0x0A, 0x05, 0x00, 0x00, 0x00)) + } + + Method (CSUM, 1, NotSerialized) + { + Return (SMI (0x0E, Arg0, 0x00, 0x00, 0x00)) + } + + Method (NVSS, 1, NotSerialized) + { + Return (SMI (0x0F, Arg0, 0x00, 0x00, 0x00)) + } + + Method (WMIS, 2, NotSerialized) + { + Return (SMI (0x10, Arg0, Arg1, 0x00, 0x00)) + } + + Method (AWON, 1, NotSerialized) + { + Return (SMI (0x12, Arg0, 0x00, 0x00, 0x00)) + } + + Method (PMON, 2, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + Name (TSTR, Buffer (Local0){}) + Store (Arg0, TSTR) + Store (TSTR, \DBGB) + SMI (0x11, Arg1, 0x00, 0x00, 0x00) + } + + Method (UAWS, 1, NotSerialized) + { + Return (SMI (0x13, Arg0, 0x00, 0x00, 0x00)) + } + + Method (BFWC, 1, NotSerialized) + { + Return (SMI (0x14, 0x00, Arg0, 0x00, 0x00)) + } + + Method (BFWP, 0, NotSerialized) + { + Return (SMI (0x14, 0x01, 0x00, 0x00, 0x00)) + } + + Method (BFWL, 0, NotSerialized) + { + SMI (0x14, 0x02, 0x00, 0x00, 0x00) + } + + Method (BFWG, 1, NotSerialized) + { + SMI (0x14, 0x03, Arg0, 0x00, 0x00) + } + + Method (BDMC, 1, NotSerialized) + { + SMI (0x14, 0x04, Arg0, 0x00, 0x00) + } + + Method (PSIF, 2, NotSerialized) + { + Return (SMI (0x14, 0x05, Arg0, Arg1, 0x00)) + } + + Method (FNSC, 2, NotSerialized) + { + Return (SMI (0x14, 0x06, Arg0, Arg1, 0x00)) + } + + Method (AUDC, 2, NotSerialized) + { + Return (SMI (0x14, 0x07, Arg0, Arg1, 0x00)) + } + + Method (SYBC, 2, NotSerialized) + { + Return (SMI (0x14, 0x08, Arg0, Arg1, 0x00)) + } + + Method (KBLS, 2, NotSerialized) + { + Return (SMI (0x14, 0x09, Arg0, Arg1, 0x00)) + } + + Method (UBIS, 1, NotSerialized) + { + Return (SMI (0x15, 0x00, Arg0, 0x00, 0x00)) + } + + Method (DIEH, 1, NotSerialized) + { + Return (SMI (0x16, 0x00, Arg0, 0x00, 0x00)) + } + + Method (OUTP, 2, NotSerialized) + { + SMI (0x17, Arg0, Arg1, 0x00, 0x00) + } + + Method (SREQ, 3, NotSerialized) + { + SMI (0x18, And (Arg0, 0xFF), And (Arg1, 0xFF), And (Arg2, 0xFF), 0x00) + } + + Method (SPMS, 1, NotSerialized) + { + SMI (0x19, And (Arg0, 0xFF), 0x00, 0x00, 0x00) + } + + Method (SCMP, 2, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + If (LNotEqual (Local0, SizeOf (Arg1))) + { + Return (One) + } + + Increment (Local0) + Name (STR1, Buffer (Local0){}) + Name (STR2, Buffer (Local0){}) + Store (Arg0, STR1) + Store (Arg1, STR2) + Store (Zero, Local1) + While (LLess (Local1, Local0)) + { + Store (DerefOf (Index (STR1, Local1)), Local2) + Store (DerefOf (Index (STR2, Local1)), Local3) + If (LNotEqual (Local2, Local3)) + { + Return (One) + } + + Increment (Local1) + } + + Return (Zero) + } + + Name (MACA, "_AUXMAX_#XXXXXXXXXXXX#") + Name (WOLD, "_S5WOL_#0017EF00000000#") + Scope (\_SB) + { + Name (RID, 0x00) + Device (MEM) + { + Name (_HID, EisaId ("PNP0C01")) // _HID: Hardware ID + Name (MEMS, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x000A0000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0x000C0000, // Address Base + 0x00000000, // Address Length + _Y3A) + Memory32Fixed (ReadOnly, + 0x000C4000, // Address Base + 0x00000000, // Address Length + _Y3B) + Memory32Fixed (ReadOnly, + 0x000C8000, // Address Base + 0x00000000, // Address Length + _Y3C) + Memory32Fixed (ReadOnly, + 0x000CC000, // Address Base + 0x00000000, // Address Length + _Y3D) + Memory32Fixed (ReadOnly, + 0x000D0000, // Address Base + 0x00000000, // Address Length + _Y3E) + Memory32Fixed (ReadOnly, + 0x000D4000, // Address Base + 0x00000000, // Address Length + _Y3F) + Memory32Fixed (ReadOnly, + 0x000D8000, // Address Base + 0x00000000, // Address Length + _Y40) + Memory32Fixed (ReadOnly, + 0x000DC000, // Address Base + 0x00000000, // Address Length + _Y41) + Memory32Fixed (ReadOnly, + 0x000E0000, // Address Base + 0x00000000, // Address Length + _Y42) + Memory32Fixed (ReadOnly, + 0x000E4000, // Address Base + 0x00000000, // Address Length + _Y43) + Memory32Fixed (ReadOnly, + 0x000E8000, // Address Base + 0x00000000, // Address Length + _Y44) + Memory32Fixed (ReadOnly, + 0x000EC000, // Address Base + 0x00000000, // Address Length + _Y45) + Memory32Fixed (ReadOnly, + 0x000F0000, // Address Base + 0x00010000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x00100000, // Address Base + 0x01EE0000, // Address Length + _Y46) + Memory32Fixed (ReadOnly, + 0xFEC00000, // Address Base + 0x00140000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFED4C000, // Address Base + 0x012B4000, // Address Length + ) + }) + CreateDWordField (MEMS, \_SB.MEM._Y3A._LEN, MC0L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3B._LEN, MC4L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3C._LEN, MC8L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3D._LEN, MCCL) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3E._LEN, MD0L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y3F._LEN, MD4L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y40._LEN, MD8L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y41._LEN, MDCL) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y42._LEN, ME0L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y43._LEN, ME4L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y44._LEN, ME8L) // _LEN: Length + CreateDWordField (MEMS, \_SB.MEM._Y45._LEN, MECL) // _LEN: Length + CreateBitField (MEMS, \_SB.MEM._Y3A._RW, MC0W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3B._RW, MC4W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3C._RW, MC8W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3D._RW, MCCW) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3E._RW, MD0W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y3F._RW, MD4W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y40._RW, MD8W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y41._RW, MDCW) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y42._RW, ME0W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y43._RW, ME4W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y44._RW, ME8W) // _RW_: Read-Write Status + CreateBitField (MEMS, \_SB.MEM._Y45._RW, MECW) // _RW_: Read-Write Status + CreateDWordField (MEMS, \_SB.MEM._Y46._BAS, MEB1) // _BAS: Base Address + CreateDWordField (MEMS, \_SB.MEM._Y46._LEN, MEL1) // _LEN: Length + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + And (\_SB.PCI0.PM1L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MC0L) + If (And (Local0, 0x02)) + { + Store (0x01, MC0W) + } + } + + And (\_SB.PCI0.PM1H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MC4L) + If (And (Local0, 0x20)) + { + Store (0x01, MC4W) + } + } + + And (\_SB.PCI0.PM2L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MC8L) + If (And (Local0, 0x02)) + { + Store (0x01, MC8W) + } + } + + And (\_SB.PCI0.PM2H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MCCL) + If (And (Local0, 0x20)) + { + Store (0x01, MCCW) + } + } + + And (\_SB.PCI0.PM3L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MD0L) + If (And (Local0, 0x02)) + { + Store (0x01, MD0W) + } + } + + And (\_SB.PCI0.PM3H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MD4L) + If (And (Local0, 0x20)) + { + Store (0x01, MD4W) + } + } + + And (\_SB.PCI0.PM4L, 0x03, Local0) + If (Local0) + { + Store (0x4000, MD8L) + If (And (Local0, 0x02)) + { + Store (0x01, MD8W) + } + } + + And (\_SB.PCI0.PM4H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MDCL) + If (And (Local0, 0x20)) + { + Store (0x01, MDCW) + } + } + + And (\_SB.PCI0.PM5L, 0x03, Local0) + If (Local0) + { + Store (0x4000, ME0L) + If (And (Local0, 0x02)) + { + Store (0x01, ME0W) + } + } + + And (\_SB.PCI0.PM5H, 0x30, Local0) + If (Local0) + { + Store (0x4000, ME4L) + If (And (Local0, 0x20)) + { + Store (0x01, ME4W) + } + } + + And (\_SB.PCI0.PM6L, 0x03, Local0) + If (Local0) + { + Store (0x4000, ME8L) + If (And (Local0, 0x02)) + { + Store (0x01, ME8W) + } + } + + And (\_SB.PCI0.PM6H, 0x30, Local0) + If (Local0) + { + Store (0x4000, MECL) + If (And (Local0, 0x20)) + { + Store (0x01, MECW) + } + } + + ShiftLeft (\_SB.PCI0.TLUD, 0x14, \MEMX) + Subtract (\MEMX, MEB1, MEL1) + Return (MEMS) + } + } + + Device (LID) + { + Name (_HID, EisaId ("PNP0C0D")) // _HID: Hardware ID + Method (_LID, 0, NotSerialized) // _LID: Lid Status + { + If (LAnd (LEqual (\ILNF, 0x00), LEqual (\PLUX, 0x00))) + { + If (\H8DR) + { + Return (\_SB.PCI0.LPCB.EC.HPLD) + } + ElseIf (And (\RBEC (0x46), 0x04)) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + Else + { + Return (0x01) + } + } + + Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake + { + If (\LWCP) + { + Return (Package (0x02) + { + 0x17, + 0x04 + }) + } + Else + { + Return (Package (0x02) + { + 0x17, + 0x03 + }) + } + } + + Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake + { + If (\H8DR) + { + If (Arg0) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWLO) + } + Else + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWLO) + } + } + ElseIf (Arg0) + { + \MBEC (0x32, 0xFF, 0x04) + } + Else + { + \MBEC (0x32, 0xFB, 0x00) + } + + If (\LWCP) + { + If (Arg0) + { + Store (0x01, \LWEN) + } + Else + { + Store (0x00, \LWEN) + } + } + } + } + + Device (WMI1) + { + Name (_HID, EisaId ("PNP0C14")) // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Name (_WDG, Buffer (0xB4) + { + /* 0000 */ 0x0E, 0x23, 0xF5, 0x51, 0x77, 0x96, 0xCD, 0x46, + /* 0008 */ 0xA1, 0xCF, 0xC0, 0xB2, 0x3E, 0xE3, 0x4D, 0xB7, + /* 0010 */ 0x41, 0x30, 0x50, 0x05, 0x64, 0x9A, 0x47, 0x98, + /* 0018 */ 0xF5, 0x33, 0x33, 0x4E, 0xA7, 0x07, 0x8E, 0x25, + /* 0020 */ 0x1E, 0xBB, 0xC3, 0xA1, 0x41, 0x31, 0x01, 0x06, + /* 0028 */ 0xEF, 0x54, 0x4B, 0x6A, 0xED, 0xA5, 0x33, 0x4D, + /* 0030 */ 0x94, 0x55, 0xB0, 0xD9, 0xB4, 0x8D, 0xF4, 0xB3, + /* 0038 */ 0x41, 0x32, 0x01, 0x06, 0xB6, 0xEB, 0xF1, 0x74, + /* 0040 */ 0x7A, 0x92, 0x7D, 0x4C, 0x95, 0xDF, 0x69, 0x8E, + /* 0048 */ 0x21, 0xE8, 0x0E, 0xB5, 0x41, 0x33, 0x01, 0x06, + /* 0050 */ 0xFF, 0x04, 0xEF, 0x7E, 0x28, 0x43, 0x7C, 0x44, + /* 0058 */ 0xB5, 0xBB, 0xD4, 0x49, 0x92, 0x5D, 0x53, 0x8D, + /* 0060 */ 0x41, 0x34, 0x01, 0x06, 0x9E, 0x15, 0xDB, 0x8A, + /* 0068 */ 0x32, 0x1E, 0x5C, 0x45, 0xBC, 0x93, 0x30, 0x8A, + /* 0070 */ 0x7E, 0xD9, 0x82, 0x46, 0x41, 0x35, 0x01, 0x01, + /* 0078 */ 0xFD, 0xD9, 0x51, 0x26, 0x1C, 0x91, 0x69, 0x4B, + /* 0080 */ 0xB9, 0x4E, 0xD0, 0xDE, 0xD5, 0x96, 0x3B, 0xD7, + /* 0088 */ 0x41, 0x36, 0x01, 0x06, 0x1A, 0x65, 0x64, 0x73, + /* 0090 */ 0x2F, 0x13, 0xE7, 0x4F, 0xAD, 0xAA, 0x40, 0xC6, + /* 0098 */ 0xC7, 0xEE, 0x2E, 0x3B, 0x41, 0x37, 0x01, 0x06, + /* 00A0 */ 0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11, + /* 00A8 */ 0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, + /* 00B0 */ 0x42, 0x41, 0x01, 0x00 + }) + Name (RETN, Package (0x05) + { + "Success", + "Not Supported", + "Invalid Parameter", + "Access Denied", + "System Busy" + }) + Name (ITEM, Package (0x6B) + { + Package (0x02) + { + 0x0E, + "WakeOnLAN" + }, + + Package (0x02) + { + 0x00, + "EthernetLANOptionROM" + }, + + Package (0x02) + { + 0x00, + "USBBIOSSupport" + }, + + Package (0x02) + { + 0x00, + "AlwaysOnUSB" + }, + + Package (0x02) + { + 0x01, + "TrackPoint" + }, + + Package (0x02) + { + 0x01, + "TouchPad" + }, + + Package (0x02) + { + 0x00, + "FnSticky" + }, + + Package (0x02) + { + 0x04, + "ThinkPadNumLock" + }, + + Package (0x02) + { + 0x0C, + "PowerOnNumLock" + }, + + Package (0x02) + { + 0x05, + "BootDisplayDevice" + }, + + Package (0x02) + { + 0x00, + "SpeedStep" + }, + + Package (0x02) + { + 0x09, + "AdaptiveThermalManagementAC" + }, + + Package (0x02) + { + 0x09, + "AdaptiveThermalManagementBattery" + }, + + Package (0x02) + { + 0x06, + "CDROMSpeed" + }, + + Package (0x02) + { + 0x01, + "CPUPowerManagement" + }, + + Package (0x02) + { + 0x00, + "PowerControlBeep" + }, + + Package (0x02) + { + 0x00, + "LowBatteryAlarm" + }, + + Package (0x02) + { + 0x00, + "PasswordBeep" + }, + + Package (0x02) + { + 0x00, + "KeyboardBeep" + }, + + Package (0x02) + { + 0x00, + "ExtendedMemoryTest" + }, + + Package (0x02) + { + 0x07, + "SATAControllerMode" + }, + + Package (0x02) + { + 0x00, + "CoreMultiProcessing" + }, + + Package (0x02) + { + 0x00, + "VirtualizationTechnology" + }, + + Package (0x02) + { + 0x00, + "LockBIOSSetting" + }, + + Package (0x02) + { + 0x0B, + "MinimumPasswordLength" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtUnattendedBoot" + }, + + Package (0x02) + { + 0x00, + "FingerprintPredesktopAuthentication" + }, + + Package (0x02) + { + 0x08, + "FingerprintReaderPriority" + }, + + Package (0x02) + { + 0x03, + "FingerprintSecurityMode" + }, + + Package (0x02) + { + 0x02, + "SecurityChip" + }, + + Package (0x02) + { + 0x00, + "BIOSUpdateByEndUsers" + }, + + Package (0x02) + { + 0x00, + "DataExecutionPrevention" + }, + + Package (0x02) + { + 0x00, + "EthernetLANAccess" + }, + + Package (0x02) + { + 0x00, + "WirelessLANAccess" + }, + + Package (0x02) + { + 0x00, + "WirelessWANAccess" + }, + + Package (0x02) + { + 0x00, + "BluetoothAccess" + }, + + Package (0x02) + { + 0x00, + "WirelessUSBAccess" + }, + + Package (0x02) + { + 0x00, + "ModemAccess" + }, + + Package (0x02) + { + 0x00, + "USBPortAccess" + }, + + Package (0x02) + { + 0x00, + "IEEE1394Access" + }, + + Package (0x02) + { + 0x00, + "ExpressCardAccess" + }, + + Package (0x02) + { + 0x00, + "PCIExpressSlotAccess" + }, + + Package (0x02) + { + 0x00, + "UltrabayAccess" + }, + + Package (0x02) + { + 0x00, + "MemoryCardSlotAccess" + }, + + Package (0x02) + { + 0x00, + "SmartCardSlotAccess" + }, + + Package (0x02) + { + 0x00, + "IntegratedCameraAccess" + }, + + Package (0x02) + { + 0x00, + "MicrophoneAccess" + }, + + Package (0x02) + { + 0x0A, + "BootMode" + }, + + Package (0x02) + { + 0x00, + "StartupOptionKeys" + }, + + Package (0x02) + { + 0x00, + "BootDeviceListF12Option" + }, + + Package (0x02) + { + 0x64, + "BootOrder" + }, + + Package (0x02) + { + 0x00, + "WiMAXAccess" + }, + + Package (0x02) + { + 0x0D, + "GraphicsDevice" + }, + + Package (0x02) + { + 0x00, + "TXTFeature" + }, + + Package (0x02) + { + 0x00, + "VTdFeature" + }, + + Package (0x02) + { + 0x0F, + "AMTControl" + }, + + Package (0x02) + { + 0x00, + "FingerprintPasswordAuthentication" + }, + + Package (0x02) + { + 0x00, + "FingerprintReaderAccess" + }, + + Package (0x02) + { + 0x00, + "OsDetectionForSwitchableGraphics" + }, + + Package (0x02) + { + 0x0F, + "ComputraceModuleActivation" + }, + + Package (0x02) + { + 0x01, + "PCIExpressPowerManagement" + }, + + Package (0x02) + { + 0x00, + "Reserved" + }, + + Package (0x02) + { + 0x00, + "eSATAPortAccess" + }, + + Package (0x02) + { + 0x00, + "HardwarePasswordManager" + }, + + Package (0x02) + { + 0x00, + "HyperThreadingTechnology" + }, + + Package (0x02) + { + 0x00, + "FnCtrlKeySwap" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtReboot" + }, + + Package (0x02) + { + 0x00, + "OnByAcAttach" + }, + + Package (0x02) + { + 0x64, + "NetworkBoot" + }, + + Package (0x02) + { + 0x00, + "BootOrderLock" + }, + + Package (0x02) + { + 0x10, + "SharedDisplayPriority" + }, + + Package (0x02) + { + 0x11, + "ExpressCardSpeed" + }, + + Package (0x02) + { + 0x00, + "RapidStartTechnology" + }, + + Package (0x02) + { + 0x12, + "KeyboardIllumination" + }, + + Package (0x02) + { + 0x00, + "IPv4NetworkStack" + }, + + Package (0x02) + { + 0x00, + "IPv6NetworkStack" + }, + + Package (0x02) + { + 0x13, + "UefiPxeBootPriority" + }, + + Package (0x02) + { + 0x00, + "PhysicalPresenceForTpmProvision" + }, + + Package (0x02) + { + 0x00, + "PhysicalPresenceForTpmClear" + }, + + Package (0x02) + { + 0x00, + "SecureRollBackPrevention" + }, + + Package (0x02) + { + 0x00, + "SecureBoot" + }, + + Package (0x02) + { + 0x00, + "NfcAccess" + }, + + Package (0x02) + { + 0x00, + "BottomCoverTamperDetected" + }, + + Package (0x02) + { + 0x00, + "PasswordCountExceededError" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtBootDeviceList" + }, + + Package (0x02) + { + 0x14, + "TotalGraphicsMemory" + }, + + Package (0x02) + { + 0x15, + "BootTimeExtension" + }, + + Package (0x02) + { + 0x00, + "FnKeyAsPrimary" + }, + + Package (0x02) + { + 0x00, + "WiGig" + }, + + Package (0x02) + { + 0x00, + "BIOSPasswordAtPowerOn" + }, + + Package (0x02) + { + 0x16, + "SGXControl" + }, + + Package (0x02) + { + 0x00, + "Reserved" + }, + + Package (0x02) + { + 0x00, + "InternalStorageTamper" + }, + + Package (0x02) + { + 0x00, + "WirelessAutoDisconnection" + }, + + Package (0x02) + { + 0x00, + "Reserved" + }, + + Package (0x02) + { + 0x00, + "USBKeyProvisioning" + }, + + Package (0x02) + { + 0x00, + "MACAddressPassThrough" + }, + + Package (0x02) + { + 0x00, + "ThunderboltAccess" + }, + + Package (0x02) + { + 0x00, + "WindowsUEFIFirmwareUpdate" + }, + + Package (0x02) + { + 0x00, + "WakeOnLANDock" + }, + + Package (0x02) + { + 0x00, + "WakeByThunderbolt" + }, + + Package (0x02) + { + 0x17, + "ThunderboltSecurityLevel" + }, + + Package (0x02) + { + 0x1A, + "PreBootForThunderboltDevice" + }, + + Package (0x02) + { + 0x00, + "PreBootForThunderboltUSBDevice" + }, + + Package (0x02) + { + 0x00, + "DeviceGuard" + }, + + Package (0x02) + { + 0x18, + "I8254ClockGating" + }, + + Package (0x02) + { + 0x19, + "ThunderboltBIOSAssistMode" + } + }) + Name (VSEL, Package (0x1B) + { + Package (0x02) + { + "Disable", + "Enable" + }, + + Package (0x02) + { + "Disable", + "Automatic" + }, + + Package (0x04) + { + "Active", + "Inactive", + "Disable", + "Enable" + }, + + Package (0x02) + { + "Normal", + "High" + }, + + Package (0x02) + { + "Independent", + "Synchronized" + }, + + Package (0x02) + { + "LCD", + "ExternalDisplay" + }, + + Package (0x03) + { + "High", + "Normal", + "Silent" + }, + + Package (0x02) + { + "Compatibility", + "AHCI" + }, + + Package (0x02) + { + "External", + "InternalOnly" + }, + + Package (0x02) + { + "MaximizePerformance", + "Balanced" + }, + + Package (0x02) + { + "Quick", + "Diagnostics" + }, + + Package (0x0A) + { + "Disable", + "4", + "5", + "6", + "7", + "8", + "9", + "10", + "11", + "12" + }, + + Package (0x03) + { + "Auto", + "On", + "Off" + }, + + Package (0x03) + { + "IntegratedGfx", + "DiscreteGfx", + "SwitchableGfx" + }, + + Package (0x04) + { + "Disable", + "ACOnly", + "ACandBattery", + "Enable" + }, + + Package (0x03) + { + "Disable", + "Enable", + "Disable" + }, + + Package (0x02) + { + "HDMI", + "USBTypeC" + }, + + Package (0x02) + { + "Generation1", + "Automatic" + }, + + Package (0x03) + { + "ThinkLightOnly", + "BacklightOnly", + "Both" + }, + + Package (0x02) + { + "IPv6First", + "IPv4First" + }, + + Package (0x02) + { + "256MB", + "512MB" + }, + + Package (0x0B) + { + "Disable", + "1", + "2", + "3", + "", + "5", + "", + "", + "", + "", + "10" + }, + + Package (0x03) + { + "Disable", + "Enable", + "SoftwareControl" + }, + + Package (0x04) + { + "NoSecurity", + "UserAuthorization", + "SecureConnect", + "DisplayPortandUSB" + }, + + Package (0x02) + { + "Disable", + "Auto" + }, + + Package (0x03) + { + "Enable", + "", + "Disable" + }, + + Package (0x03) + { + "Disable", + "Enable", + "Pre-BootACL" + } + }) + Name (VLST, Package (0x11) + { + "HDD0", + "HDD1", + "HDD2", + "HDD3", + "HDD4", + "PCILAN", + "ATAPICD0", + "ATAPICD1", + "ATAPICD2", + "USBFDD", + "USBCD", + "USBHDD", + "OtherHDD", + "OtherCD", + "NVMe0", + "NVMe1", + "NODEV" + }) + Name (PENC, Package (0x02) + { + "ascii", + "scancode" + }) + Name (PKBD, Package (0x03) + { + "us", + "fr", + "gr" + }) + Name (PTYP, Package (0x08) + { + "pap", + "pop", + "uhdp1", + "mhdp1", + "uhdp2", + "mhdp2", + "uhdp3", + "mhdp3" + }) + Mutex (MWMI, 0x00) + Name (PCFG, Buffer (0x18){}) + Name (IBUF, Buffer (0x0100){}) + Name (ILEN, 0x00) + Name (PSTR, Buffer (0x81){}) + Method (WQA0, 1, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + If (LNotEqual (\WMIS (0x00, Arg0), 0x00)) + { + Release (MWMI) + Return ("") + } + + Store (DerefOf (Index (ITEM, \WITM)), Local0) + Store (DerefOf (Index (Local0, 0x00)), Local1) + Store (DerefOf (Index (Local0, 0x01)), Local2) + If (LLess (Local1, 0x64)) + { + Concatenate (Local2, ",", Local6) + Store (DerefOf (Index (VSEL, Local1)), Local3) + Concatenate (Local6, DerefOf (Index (Local3, \WSEL)), Local7) + } + Else + { + Store (SizeOf (VLST), Local3) + If (LLessEqual (\WLS0, Local3)) + { + Concatenate (Local2, ",", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS0)), Local2) + } + + If (LLessEqual (\WLS1, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS1)), Local2) + } + + If (LLessEqual (\WLS2, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS2)), Local2) + } + + If (LLessEqual (\WLS3, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS3)), Local2) + } + + If (LLessEqual (\WLS4, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS4)), Local2) + } + + If (LLessEqual (\WLS5, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS5)), Local2) + } + + If (LLessEqual (\WLS6, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS6)), Local2) + } + + If (LLessEqual (\WLS7, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS7)), Local2) + } + + If (LLessEqual (\WLS8, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS8)), Local2) + } + + If (LLessEqual (\WLS9, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLS9)), Local2) + } + + If (LLessEqual (\WLSA, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSA)), Local2) + } + + If (LLessEqual (\WLSB, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSB)), Local2) + } + + If (LLessEqual (\WLSC, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSC)), Local2) + } + + If (LLessEqual (\WLSD, Local3)) + { + Concatenate (Local2, ":", Local7) + Concatenate (Local7, DerefOf (Index (VLST, \WLSD)), Local2) + } + + Store (Local2, Local7) + } + + Release (MWMI) + Return (Local7) + } + + Method (WMA1, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + If (LEqual (SizeOf (Arg2), 0x00)) + { + Store (0x02, Local0) + } + Else + { + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + Store (WSET (ITEM, VSEL), Local0) + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x01, 0x00), Local0) + } + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA2, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (CPAS (IBUF, 0x00), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x02, 0x00), Local0) + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA3, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (CPAS (IBUF, 0x00), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x03, 0x00), Local0) + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA4, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (CPAS (IBUF, 0x00), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x04, 0x00), Local0) + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WQA5, 1, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + Store (\WMIS (0x05, 0x00), Local0) + Store (\WSPM, Index (PCFG, 0x00)) + Store (\WSPS, Index (PCFG, 0x04)) + Store (\WSMN, Index (PCFG, 0x08)) + Store (\WSMX, Index (PCFG, 0x0C)) + Store (\WSEN, Index (PCFG, 0x10)) + Store (\WSKB, Index (PCFG, 0x14)) + Release (MWMI) + Return (PCFG) + } + + Method (WMA6, 3, NotSerialized) + { + Acquire (MWMI, 0xFFFF) + If (LEqual (SizeOf (Arg2), 0x00)) + { + Store (0x02, Local0) + } + Else + { + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + If (LNotEqual (ILEN, 0x00)) + { + Store (SPAS (IBUF), Local0) + } + + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x06, 0x00), Local0) + } + } + } + + Release (MWMI) + Return (DerefOf (Index (RETN, Local0))) + } + + Method (WMA7, 3, NotSerialized) + { + If (LEqual (SizeOf (Arg2), 0x00)) + { + Return ("") + } + + Store (CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + Store (GITM (IBUF, ITEM), Local1) + If (LEqual (Local1, Ones)) + { + Return ("") + } + + Store (DerefOf (Index (ITEM, Local1)), Local0) + Store (DerefOf (Index (Local0, 0x00)), Local1) + If (LLess (Local1, 0x64)) + { + Store (DerefOf (Index (VSEL, Local1)), Local3) + Store (DerefOf (Index (Local3, 0x00)), Local2) + Store (SizeOf (Local3), Local4) + Store (0x01, Local5) + While (LLess (Local5, Local4)) + { + Store (DerefOf (Index (Local3, Local5)), Local6) + If (LNotEqual (SizeOf (Local6), 0x00)) + { + Concatenate (Local2, ",", Local7) + Concatenate (Local7, Local6, Local2) + } + + Increment (Local5) + } + } + Else + { + Store (DerefOf (Index (VLST, 0x00)), Local2) + Store (SizeOf (VLST), Local4) + Store (0x01, Local5) + While (LLess (Local5, Local4)) + { + Store (DerefOf (Index (VLST, Local5)), Local6) + Concatenate (Local2, ",", Local7) + Concatenate (Local7, Local6, Local2) + Increment (Local5) + } + } + } + + Return (Local2) + } + + Method (CARG, 1, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + If (LEqual (Local0, 0x00)) + { + Store (0x00, IBUF) + Store (0x00, ILEN) + Return (0x00) + } + + If (LNotEqual (ObjectType (Arg0), 0x02)) + { + Return (0x02) + } + + If (LGreaterEqual (Local0, 0xFF)) + { + Return (0x02) + } + + Store (Arg0, IBUF) + Decrement (Local0) + Store (DerefOf (Index (IBUF, Local0)), Local1) + If (LOr (LEqual (Local1, 0x3B), LEqual (Local1, 0x2A))) + { + Store (0x00, Index (IBUF, Local0)) + Store (Local0, ILEN) + } + Else + { + Store (SizeOf (Arg0), ILEN) + } + + Return (0x00) + } + + Method (SCMP, 3, NotSerialized) + { + Store (SizeOf (Arg0), Local0) + If (LEqual (Local0, 0x00)) + { + Return (0x00) + } + + Increment (Local0) + Name (STR1, Buffer (Local0){}) + Store (Arg0, STR1) + Decrement (Local0) + Store (0x00, Local1) + Store (Arg2, Local2) + While (LLess (Local1, Local0)) + { + Store (DerefOf (Index (STR1, Local1)), Local3) + Store (DerefOf (Index (Arg1, Local2)), Local4) + If (LNotEqual (Local3, Local4)) + { + Return (0x00) + } + + Increment (Local1) + Increment (Local2) + } + + Store (DerefOf (Index (Arg1, Local2)), Local4) + If (LEqual (Local4, 0x00)) + { + Return (0x01) + } + + If (LOr (LEqual (Local4, 0x2C), LEqual (Local4, 0x3A))) + { + Return (0x01) + } + + Return (0x00) + } + + Method (GITM, 2, NotSerialized) + { + Store (0x00, Local0) + Store (SizeOf (Arg1), Local1) + While (LLess (Local0, Local1)) + { + Store (DerefOf (Index (DerefOf (Index (Arg1, Local0)), 0x01)), Local3) + If (SCMP (Local3, Arg0, 0x00)) + { + Return (Local0) + } + + Increment (Local0) + } + + Return (Ones) + } + + Method (GSEL, 3, NotSerialized) + { + Store (0x00, Local0) + Store (SizeOf (Arg0), Local1) + While (LLess (Local0, Local1)) + { + Store (DerefOf (Index (Arg0, Local0)), Local2) + If (SCMP (Local2, Arg1, Arg2)) + { + Return (Local0) + } + + Increment (Local0) + } + + Return (Ones) + } + + Method (SLEN, 2, NotSerialized) + { + Store (DerefOf (Index (Arg0, Arg1)), Local0) + Return (SizeOf (Local0)) + } + + Method (CLRP, 0, NotSerialized) + { + Store (0x00, \WPAS) + Store (0x00, \WPNW) + } + + Method (GPAS, 2, NotSerialized) + { + Store (Arg1, Local0) + Store (0x00, Local1) + While (LLessEqual (Local1, 0x80)) + { + Store (DerefOf (Index (Arg0, Local0)), Local2) + If (LOr (LEqual (Local2, 0x2C), LEqual (Local2, 0x00))) + { + Store (0x00, Index (PSTR, Local1)) + Return (Local1) + } + + Store (Local2, Index (PSTR, Local1)) + Increment (Local0) + Increment (Local1) + } + + Store (0x00, Index (PSTR, Local1)) + Return (Ones) + } + + Method (CPAS, 2, NotSerialized) + { + CLRP () + Store (Arg1, Local0) + Store (GPAS (Arg0, Local0), Local1) + If (LEqual (Local1, Ones)) + { + Return (0x02) + } + + If (LEqual (Local1, 0x00)) + { + Return (0x02) + } + + Store (PSTR, \WPAS) + Add (Local0, Local1, Local0) + Increment (Local0) + Store (GSEL (PENC, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WENC) + If (LEqual (Local6, 0x00)) + { + Add (Local0, SLEN (PENC, 0x00), Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GSEL (PKBD, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WKBD) + } + + Return (0x00) + } + + Method (SPAS, 1, NotSerialized) + { + CLRP () + Store (GSEL (PTYP, Arg0, 0x00), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WPTY) + Store (SLEN (PTYP, Local6), Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GPAS (Arg0, Local0), Local1) + If (LOr (LEqual (Local1, Ones), LEqual (Local1, 0x00))) + { + Return (0x02) + } + + Store (PSTR, \WPAS) + Add (Local0, Local1, Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GPAS (Arg0, Local0), Local1) + If (LEqual (Local1, Ones)) + { + Return (0x02) + } + + If (LEqual (Local1, 0x00)) + { + Store (0x00, PSTR) + } + + Store (PSTR, \WPNW) + Add (Local0, Local1, Local0) + Increment (Local0) + Store (GSEL (PENC, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WENC) + If (LEqual (Local6, 0x00)) + { + Add (Local0, SLEN (PENC, 0x00), Local0) + If (LNotEqual (DerefOf (Index (Arg0, Local0)), 0x2C)) + { + Return (0x02) + } + + Increment (Local0) + Store (GSEL (PKBD, Arg0, Local0), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WKBD) + } + + Return (0x00) + } + + Method (WSET, 2, NotSerialized) + { + Store (ILEN, Local0) + Increment (Local0) + Store (GITM (IBUF, Arg0), Local1) + If (LEqual (Local1, Ones)) + { + Return (0x02) + } + + Store (Local1, \WITM) + Store (DerefOf (Index (Arg0, Local1)), Local3) + Store (DerefOf (Index (Local3, 0x01)), Local4) + Store (SizeOf (Local4), Local2) + Increment (Local2) + Store (DerefOf (Index (Local3, 0x00)), Local4) + If (LLess (Local4, 0x64)) + { + Store (DerefOf (Index (Arg1, Local4)), Local5) + Store (GSEL (Local5, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WSEL) + Add (Local2, SLEN (Local5, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + Else + { + Store (0x3F, \WLS0) + Store (0x3F, \WLS1) + Store (0x3F, \WLS2) + Store (0x3F, \WLS3) + Store (0x3F, \WLS4) + Store (0x3F, \WLS5) + Store (0x3F, \WLS6) + Store (0x3F, \WLS7) + Store (0x3F, \WLS8) + Store (0x3F, \WLS9) + Store (0x3F, \WLSA) + Store (0x3F, \WLSB) + Store (0x3F, \WLSC) + Store (0x3F, \WLSD) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS0) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS1) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS2) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS3) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS4) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS5) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS6) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS7) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS8) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLS9) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSA) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSB) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSC) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + + If (LAnd (LLess (Local2, Local0), LEqual (Local4, 0x3A))) + { + Increment (Local2) + Store (GSEL (VLST, IBUF, Local2), Local6) + If (LEqual (Local6, Ones)) + { + Return (0x02) + } + + Store (Local6, \WLSD) + Add (Local2, SLEN (VLST, Local6), Local2) + Store (DerefOf (Index (IBUF, Local2)), Local4) + } + } + + If (LAnd (LEqual (Local4, 0x2C), LLess (Local2, Local0))) + { + Increment (Local2) + Store (CPAS (IBUF, Local2), Local0) + If (LNotEqual (Local0, 0x00)) + { + Return (Local0) + } + } + + Return (0x00) + } + + Name (WQBA, Buffer (0x089D) + { + /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00, + /* 0008 */ 0x8D, 0x08, 0x00, 0x00, 0xF2, 0x36, 0x00, 0x00, + /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54, + /* 0018 */ 0xA8, 0xC9, 0x9A, 0x00, 0x01, 0x06, 0x18, 0x42, + /* 0020 */ 0x10, 0x13, 0x10, 0x0A, 0x0D, 0x21, 0x02, 0x0B, + /* 0028 */ 0x83, 0x50, 0x4C, 0x18, 0x14, 0xA0, 0x45, 0x41, + /* 0030 */ 0xC8, 0x05, 0x14, 0x95, 0x02, 0x21, 0xC3, 0x02, + /* 0038 */ 0x14, 0x0B, 0x70, 0x2E, 0x40, 0xBA, 0x00, 0xE5, + /* 0040 */ 0x28, 0x72, 0x0C, 0x22, 0x02, 0xF7, 0xEF, 0x0F, + /* 0048 */ 0x31, 0x0E, 0x88, 0x14, 0x40, 0x48, 0x26, 0x84, + /* 0050 */ 0x44, 0x00, 0x53, 0x21, 0x70, 0x84, 0xA0, 0x5F, + /* 0058 */ 0x01, 0x08, 0x1D, 0xA2, 0xC9, 0xA0, 0x00, 0xA7, + /* 0060 */ 0x08, 0x82, 0xB4, 0x65, 0x01, 0xBA, 0x05, 0xF8, + /* 0068 */ 0x16, 0xA0, 0x1D, 0x42, 0x68, 0x15, 0x0A, 0x30, + /* 0070 */ 0x29, 0xC0, 0x27, 0x98, 0x2C, 0x0A, 0x90, 0x0D, + /* 0078 */ 0x26, 0xDB, 0x70, 0x64, 0x18, 0x4C, 0xE4, 0x18, + /* 0080 */ 0x50, 0x62, 0xC6, 0x80, 0xD2, 0x39, 0x05, 0xD9, + /* 0088 */ 0x04, 0x16, 0x74, 0xA1, 0x28, 0x9A, 0x46, 0x94, + /* 0090 */ 0x04, 0x07, 0x75, 0x0C, 0x11, 0x82, 0x97, 0x2B, + /* 0098 */ 0x40, 0xF2, 0x04, 0xA4, 0x79, 0x5E, 0xB2, 0x3E, + /* 00A0 */ 0x08, 0x0D, 0x81, 0x8D, 0x80, 0x47, 0x91, 0x00, + /* 00A8 */ 0xC2, 0x62, 0x2C, 0x53, 0xE2, 0x61, 0x50, 0x1E, + /* 00B0 */ 0x40, 0x24, 0x67, 0xA8, 0x28, 0x60, 0x7B, 0x9D, + /* 00B8 */ 0x88, 0x86, 0x75, 0x9C, 0x4C, 0x12, 0x1C, 0x6A, + /* 00C0 */ 0x94, 0x96, 0x28, 0xC0, 0xFC, 0xC8, 0x34, 0x91, + /* 00C8 */ 0x63, 0x6B, 0x7A, 0xC4, 0x82, 0x64, 0xD2, 0x86, + /* 00D0 */ 0x82, 0x1A, 0xBA, 0xA7, 0x75, 0x52, 0x9E, 0x68, + /* 00D8 */ 0xC4, 0x83, 0x32, 0x4C, 0x02, 0x8F, 0x82, 0xA1, + /* 00E0 */ 0x71, 0x82, 0xB2, 0x20, 0xE4, 0x60, 0xA0, 0x28, + /* 00E8 */ 0xC0, 0x93, 0xF0, 0x1C, 0x8B, 0x17, 0x20, 0x7C, + /* 00F0 */ 0xC6, 0xE4, 0x28, 0x10, 0x23, 0x81, 0x8F, 0x04, + /* 00F8 */ 0x1E, 0xCD, 0x31, 0x63, 0x81, 0xC2, 0x05, 0x3C, + /* 0100 */ 0x9F, 0x63, 0x88, 0x1C, 0xF7, 0x50, 0x63, 0x1C, + /* 0108 */ 0x45, 0xE4, 0x04, 0xEF, 0x00, 0x51, 0x8C, 0x56, + /* 0110 */ 0xD0, 0xBC, 0x85, 0x18, 0x2C, 0x9A, 0xC1, 0x7A, + /* 0118 */ 0x06, 0x27, 0x83, 0x4E, 0xF0, 0xFF, 0x3F, 0x02, + /* 0120 */ 0x2E, 0x03, 0x42, 0x1E, 0x05, 0x58, 0x1D, 0x94, + /* 0128 */ 0xA6, 0x61, 0x82, 0xEE, 0x05, 0xBC, 0x1A, 0x1A, + /* 0130 */ 0x13, 0xA0, 0x11, 0x43, 0xCA, 0x04, 0x38, 0xBB, + /* 0138 */ 0x2F, 0x68, 0x46, 0x6D, 0x09, 0x30, 0x27, 0x40, + /* 0140 */ 0x9B, 0x00, 0x6F, 0x08, 0x42, 0x39, 0xCF, 0x28, + /* 0148 */ 0xC7, 0x72, 0x8A, 0x51, 0x1E, 0x06, 0x62, 0xBE, + /* 0150 */ 0x0C, 0x04, 0x8D, 0x12, 0x23, 0xE6, 0xB9, 0xC4, + /* 0158 */ 0x35, 0x6C, 0x84, 0x18, 0x21, 0x4F, 0x21, 0x50, + /* 0160 */ 0xDC, 0xF6, 0x07, 0x41, 0x06, 0x8D, 0x1B, 0xBD, + /* 0168 */ 0x4F, 0x0B, 0x67, 0x75, 0x02, 0x47, 0xFF, 0xA4, + /* 0170 */ 0x60, 0x02, 0x4F, 0xF9, 0xC0, 0x9E, 0x0D, 0x4E, + /* 0178 */ 0xE0, 0x58, 0xA3, 0xC6, 0x38, 0x95, 0x04, 0x8E, + /* 0180 */ 0xFD, 0x80, 0x90, 0x06, 0x10, 0x45, 0x82, 0x47, + /* 0188 */ 0x9D, 0x16, 0x7C, 0x2E, 0xF0, 0xD0, 0x0E, 0xDA, + /* 0190 */ 0x73, 0x3C, 0x81, 0x20, 0x87, 0x70, 0x04, 0x4F, + /* 0198 */ 0x0C, 0x0F, 0x04, 0x1E, 0x03, 0xBB, 0x29, 0xF8, + /* 01A0 */ 0x08, 0xE0, 0x13, 0x02, 0xDE, 0x35, 0xA0, 0xAE, + /* 01A8 */ 0x06, 0x0F, 0x06, 0x6C, 0xD0, 0xE1, 0x30, 0xE3, + /* 01B0 */ 0xF5, 0xF0, 0xC3, 0x9D, 0xC0, 0x49, 0x3E, 0x60, + /* 01B8 */ 0xF0, 0xC3, 0x86, 0x07, 0x87, 0x9B, 0xE7, 0xC9, + /* 01C0 */ 0x1C, 0x59, 0xA9, 0x02, 0xCC, 0x1E, 0x0E, 0x74, + /* 01C8 */ 0x90, 0xF0, 0x69, 0x83, 0x9D, 0x01, 0x30, 0xF2, + /* 01D0 */ 0x07, 0x81, 0x1A, 0x99, 0xA1, 0x3D, 0xEE, 0x97, + /* 01D8 */ 0x0E, 0x43, 0x3E, 0x27, 0x1C, 0x16, 0x13, 0x7B, + /* 01E0 */ 0xEA, 0xA0, 0xE3, 0x01, 0xFF, 0x65, 0xE4, 0x39, + /* 01E8 */ 0xC3, 0xD3, 0xF7, 0x7C, 0x4D, 0x30, 0xEC, 0xC0, + /* 01F0 */ 0xD1, 0x03, 0x31, 0xF4, 0xC3, 0xC6, 0x61, 0x9C, + /* 01F8 */ 0x86, 0xEF, 0x1F, 0x3E, 0x2F, 0xC0, 0x38, 0x05, + /* 0200 */ 0x78, 0xE4, 0xFE, 0xFF, 0x1F, 0x52, 0x7C, 0x9A, + /* 0208 */ 0xE0, 0x47, 0x0B, 0x9F, 0x26, 0xD8, 0xF5, 0xE0, + /* 0210 */ 0x34, 0x9E, 0x03, 0x3C, 0x9C, 0xB3, 0xF2, 0x61, + /* 0218 */ 0x02, 0x6C, 0xF7, 0x13, 0x36, 0xA2, 0x77, 0x0B, + /* 0220 */ 0x8F, 0x06, 0x7B, 0x0A, 0x00, 0xDF, 0xF9, 0x05, + /* 0228 */ 0x9C, 0x77, 0x0D, 0x36, 0x58, 0x18, 0xE7, 0x17, + /* 0230 */ 0xE0, 0x71, 0x42, 0xF0, 0x10, 0xF8, 0x41, 0xC2, + /* 0238 */ 0x43, 0xE0, 0x03, 0x78, 0xFE, 0x38, 0x43, 0x2B, + /* 0240 */ 0x9D, 0x17, 0x72, 0x60, 0xF0, 0xCE, 0x39, 0x30, + /* 0248 */ 0x46, 0xC1, 0xF3, 0x3C, 0x36, 0x4C, 0xA0, 0x20, + /* 0250 */ 0xAF, 0x01, 0x85, 0x7A, 0x16, 0x50, 0x18, 0x9F, + /* 0258 */ 0x6A, 0x80, 0xD7, 0xFF, 0xFF, 0x54, 0x03, 0x5C, + /* 0260 */ 0x0E, 0x07, 0xB8, 0x93, 0x03, 0xDC, 0x7B, 0x01, + /* 0268 */ 0xBB, 0x38, 0x3C, 0xD7, 0xC0, 0x15, 0x7D, 0xAE, + /* 0270 */ 0x81, 0x7A, 0x6F, 0x29, 0x6E, 0x8C, 0xBA, 0xC6, + /* 0278 */ 0x04, 0x79, 0x14, 0x78, 0xA4, 0x89, 0xF2, 0x3C, + /* 0280 */ 0xF3, 0x2E, 0x13, 0xE1, 0xD9, 0xC6, 0xD7, 0x1A, + /* 0288 */ 0x4F, 0x21, 0x8E, 0xAF, 0x35, 0x46, 0x7C, 0x99, + /* 0290 */ 0x78, 0xB7, 0x31, 0xEE, 0xC1, 0x3D, 0xD6, 0x3C, + /* 0298 */ 0xE4, 0x18, 0xE4, 0x68, 0x22, 0xBC, 0x18, 0x04, + /* 02A0 */ 0x7C, 0xBC, 0xF1, 0xB1, 0x06, 0xBC, 0x62, 0x5E, + /* 02A8 */ 0x28, 0xB2, 0x70, 0xAC, 0x01, 0x34, 0xFE, 0xFF, + /* 02B0 */ 0x8F, 0x35, 0xC0, 0x0D, 0xEB, 0x01, 0x05, 0x7C, + /* 02B8 */ 0x47, 0x06, 0x76, 0x43, 0x81, 0x77, 0x42, 0x01, + /* 02C0 */ 0xFC, 0x24, 0x7E, 0x01, 0xE8, 0xC8, 0xE1, 0xB4, + /* 02C8 */ 0x20, 0xB2, 0xF1, 0x06, 0xF0, 0x29, 0x80, 0xAA, + /* 02D0 */ 0x01, 0xD2, 0x34, 0x61, 0x13, 0x4C, 0x4F, 0x2E, + /* 02D8 */ 0x78, 0x1F, 0x09, 0x9C, 0x9B, 0x44, 0xC9, 0x87, + /* 02E0 */ 0x45, 0xE1, 0x9C, 0xF5, 0x20, 0x42, 0x41, 0x0C, + /* 02E8 */ 0xE8, 0x20, 0xC7, 0x09, 0xF4, 0x19, 0xC5, 0x07, + /* 02F0 */ 0x91, 0x13, 0x7D, 0x22, 0xF4, 0xA0, 0x3C, 0x8C, + /* 02F8 */ 0x77, 0x14, 0x76, 0x02, 0xF1, 0x61, 0xC2, 0x63, + /* 0300 */ 0xF7, 0x31, 0x81, 0xFF, 0x63, 0x3C, 0x1B, 0xA3, + /* 0308 */ 0x5B, 0x0D, 0x86, 0xFE, 0xFF, 0xE7, 0x14, 0x0E, + /* 0310 */ 0xE6, 0x83, 0x08, 0x27, 0xA8, 0xEB, 0x26, 0x01, + /* 0318 */ 0x32, 0x7D, 0x47, 0x05, 0x50, 0x00, 0xF9, 0x5E, + /* 0320 */ 0xE0, 0x73, 0xC0, 0xB3, 0x01, 0x1B, 0xC3, 0xA3, + /* 0328 */ 0x80, 0xD1, 0x8C, 0xCE, 0xC3, 0x4F, 0x16, 0x15, + /* 0330 */ 0x77, 0xB2, 0x14, 0xC4, 0x93, 0x75, 0x94, 0xC9, + /* 0338 */ 0xA2, 0x67, 0xE2, 0x7B, 0x85, 0x67, 0xF4, 0xA6, + /* 0340 */ 0xE5, 0x39, 0x7A, 0xC2, 0xBE, 0x87, 0xC0, 0x3A, + /* 0348 */ 0x0C, 0x84, 0x7C, 0x30, 0xF0, 0x34, 0x0C, 0xE7, + /* 0350 */ 0xC9, 0x72, 0x38, 0x4F, 0x96, 0x8F, 0xC5, 0xD7, + /* 0358 */ 0x10, 0xF0, 0x09, 0x9C, 0x2D, 0xC8, 0xE1, 0x31, + /* 0360 */ 0xB1, 0x46, 0x45, 0xAF, 0x42, 0x1E, 0x1E, 0xBF, + /* 0368 */ 0x1C, 0x78, 0x3E, 0xCF, 0x08, 0x47, 0xF9, 0x24, + /* 0370 */ 0x81, 0xC3, 0x78, 0x26, 0xF1, 0x10, 0x7D, 0x2B, + /* 0378 */ 0x82, 0x35, 0x91, 0x93, 0xF6, 0x6D, 0xE1, 0x64, + /* 0380 */ 0x83, 0xBE, 0x9E, 0x61, 0x6E, 0x45, 0xB0, 0xFF, + /* 0388 */ 0xFF, 0xB7, 0x22, 0x38, 0x17, 0x34, 0x98, 0x99, + /* 0390 */ 0xEE, 0x55, 0xA8, 0x58, 0xF7, 0x2A, 0x40, 0xEC, + /* 0398 */ 0xB0, 0x5E, 0x7B, 0x7C, 0xB0, 0x82, 0x7B, 0xAF, + /* 03A0 */ 0x82, 0x7B, 0xA9, 0x7A, 0x56, 0x38, 0xC6, 0xF0, + /* 03A8 */ 0x0F, 0x53, 0x31, 0x4E, 0xE9, 0xB5, 0xD3, 0x40, + /* 03B0 */ 0x61, 0xA2, 0xC4, 0x7B, 0xAF, 0xF2, 0x18, 0xDF, + /* 03B8 */ 0xAB, 0xD8, 0x15, 0x2A, 0x4C, 0xAC, 0x97, 0x2B, + /* 03C0 */ 0xA3, 0xBE, 0x4E, 0x84, 0x0B, 0x14, 0x24, 0xD2, + /* 03C8 */ 0xAB, 0x55, 0x94, 0xC8, 0xF1, 0x0D, 0xF9, 0x5E, + /* 03D0 */ 0x05, 0x5E, 0x39, 0xF7, 0x2A, 0x90, 0xFD, 0xFF, + /* 03D8 */ 0xEF, 0x55, 0x80, 0x79, 0xB4, 0xF7, 0x2A, 0x30, + /* 03E0 */ 0x5E, 0x1B, 0xD8, 0x0D, 0x09, 0x16, 0xD0, 0x8B, + /* 03E8 */ 0x15, 0x60, 0x28, 0xF3, 0xC5, 0x8A, 0xE6, 0xBD, + /* 03F0 */ 0x58, 0x21, 0xFE, 0xFF, 0xE7, 0x12, 0xA6, 0xE7, + /* 03F8 */ 0x62, 0x45, 0xE6, 0x09, 0xFF, 0x66, 0x05, 0x70, + /* 0400 */ 0xFA, 0xFF, 0x7F, 0xB3, 0x02, 0x8C, 0xDD, 0x8B, + /* 0408 */ 0x30, 0x47, 0x2B, 0x78, 0x29, 0x6F, 0x56, 0x34, + /* 0410 */ 0xCE, 0x32, 0x14, 0x70, 0x41, 0x14, 0xC6, 0x37, + /* 0418 */ 0x2B, 0xC0, 0xD1, 0x75, 0x05, 0x37, 0x64, 0xB8, + /* 0420 */ 0x60, 0x51, 0x82, 0xF9, 0x10, 0xE2, 0xE9, 0x1C, + /* 0428 */ 0xF1, 0x43, 0xC2, 0x4B, 0xC0, 0x63, 0x8E, 0x07, + /* 0430 */ 0xFC, 0x40, 0xE0, 0xCB, 0x15, 0x98, 0xFE, 0xFF, + /* 0438 */ 0x04, 0x3E, 0xF9, 0x9E, 0xE5, 0xDB, 0xD4, 0x7B, + /* 0440 */ 0x2F, 0x3F, 0x60, 0xBD, 0x57, 0xF9, 0xF0, 0x1B, + /* 0448 */ 0xEB, 0x9D, 0xE1, 0xE5, 0xCA, 0x23, 0x89, 0x72, + /* 0450 */ 0x12, 0xA1, 0x7C, 0xB7, 0x7A, 0xAF, 0x32, 0x4A, + /* 0458 */ 0xC4, 0x17, 0x62, 0x9F, 0x82, 0x0D, 0x6D, 0x94, + /* 0460 */ 0xA7, 0x8A, 0xE8, 0xC6, 0x7B, 0xB9, 0x02, 0xAF, + /* 0468 */ 0xA4, 0xCB, 0x15, 0x40, 0x93, 0xE1, 0xBF, 0x5C, + /* 0470 */ 0x81, 0xEF, 0xE6, 0x80, 0xBD, 0x26, 0xC1, 0xF9, + /* 0478 */ 0xFF, 0x5F, 0x93, 0xF8, 0xF5, 0x0A, 0xF0, 0x93, + /* 0480 */ 0xFD, 0x7A, 0x45, 0x73, 0x5F, 0xAF, 0x50, 0xA2, + /* 0488 */ 0x20, 0xA4, 0x08, 0x48, 0x33, 0x05, 0xCF, 0xFD, + /* 0490 */ 0x0A, 0xE0, 0xC4, 0xFF, 0xFF, 0x7E, 0x05, 0x58, + /* 0498 */ 0x0E, 0x77, 0xBF, 0x02, 0x7A, 0xB7, 0x23, 0xF0, + /* 04A0 */ 0xA2, 0xBC, 0x1D, 0x61, 0xAF, 0x58, 0xF8, 0x8C, + /* 04A8 */ 0x57, 0x2C, 0x1A, 0x66, 0x25, 0x8A, 0xB7, 0x26, + /* 04B0 */ 0x0A, 0xE3, 0x2B, 0x16, 0x30, 0xF9, 0xFF, 0x5F, + /* 04B8 */ 0xB1, 0x80, 0xD9, 0x41, 0x14, 0x37, 0x6A, 0xB8, + /* 04C0 */ 0x17, 0x27, 0xDF, 0x7A, 0x3C, 0xDF, 0x88, 0xBE, + /* 04C8 */ 0xC3, 0x60, 0x4E, 0x58, 0x30, 0x6E, 0x58, 0xF0, + /* 04D0 */ 0x87, 0xF4, 0x30, 0xEC, 0x93, 0xC4, 0x3B, 0x96, + /* 04D8 */ 0x8F, 0x56, 0x06, 0x79, 0x03, 0x7E, 0xB2, 0x7A, + /* 04E0 */ 0xB0, 0x8A, 0x62, 0x84, 0x80, 0xC7, 0xF3, 0x2E, + /* 04E8 */ 0xEC, 0xA3, 0xD5, 0x9B, 0x96, 0x51, 0x62, 0xC7, + /* 04F0 */ 0xF2, 0x85, 0xEA, 0x59, 0xCB, 0xD7, 0x2C, 0x43, + /* 04F8 */ 0xC4, 0x7D, 0x20, 0xF6, 0x0D, 0x0B, 0xB0, 0xFD, + /* 0500 */ 0xFF, 0xBF, 0x61, 0x01, 0x8E, 0x2E, 0x0E, 0xFC, + /* 0508 */ 0xE0, 0x80, 0xBD, 0x61, 0x01, 0x3E, 0x67, 0x0A, + /* 0510 */ 0x9E, 0x1B, 0x16, 0xB0, 0xF9, 0xFF, 0xDF, 0xB0, + /* 0518 */ 0x00, 0xFE, 0xFF, 0xFF, 0x6F, 0x58, 0xC0, 0xE1, + /* 0520 */ 0x76, 0x85, 0xBD, 0x65, 0x61, 0x6F, 0x2F, 0x64, + /* 0528 */ 0x15, 0x34, 0xD4, 0x4A, 0x14, 0xFC, 0x7B, 0x65, + /* 0530 */ 0x18, 0x7A, 0xC3, 0x02, 0x1C, 0x8D, 0xDB, 0xA3, + /* 0538 */ 0x06, 0xC7, 0xD9, 0xE0, 0x49, 0x02, 0x73, 0xAE, + /* 0540 */ 0xC6, 0xCD, 0xE6, 0xE0, 0x02, 0x47, 0xE8, 0x1D, + /* 0548 */ 0x54, 0x73, 0x67, 0x97, 0x14, 0x18, 0xB7, 0x2C, + /* 0550 */ 0xB8, 0x97, 0xAA, 0x87, 0x86, 0x28, 0x07, 0xF1, + /* 0558 */ 0x2A, 0xFC, 0x60, 0xF5, 0x28, 0x75, 0x64, 0x8F, + /* 0560 */ 0x57, 0x4F, 0xC3, 0x3E, 0x66, 0xF9, 0x96, 0x65, + /* 0568 */ 0xA8, 0x08, 0x6F, 0x59, 0xEC, 0x0C, 0x11, 0x2F, + /* 0570 */ 0x56, 0x94, 0x10, 0xEF, 0x15, 0xA1, 0x7D, 0xE7, + /* 0578 */ 0x32, 0xF8, 0xA3, 0xB1, 0x51, 0x83, 0xBE, 0x1C, + /* 0580 */ 0xBF, 0x65, 0xC1, 0xFB, 0xFF, 0xDF, 0xB2, 0xE0, + /* 0588 */ 0x8B, 0xFC, 0xAB, 0xE8, 0x44, 0xE0, 0x5B, 0x16, + /* 0590 */ 0xC0, 0x8F, 0x60, 0x10, 0x72, 0x32, 0x70, 0xF4, + /* 0598 */ 0x79, 0x01, 0x3F, 0x80, 0x87, 0x11, 0x0F, 0x89, + /* 05A0 */ 0x05, 0x18, 0x38, 0xBD, 0x2F, 0xF9, 0x4C, 0xC1, + /* 05A8 */ 0x0F, 0x18, 0x3E, 0x53, 0xB0, 0xEB, 0x41, 0xF4, + /* 05B0 */ 0xC7, 0x00, 0x9F, 0x4B, 0x30, 0x83, 0x03, 0xFF, + /* 05B8 */ 0xB5, 0xE2, 0xD0, 0x3D, 0x8A, 0xD7, 0x07, 0x13, + /* 05C0 */ 0x78, 0x70, 0xFC, 0xFF, 0x3F, 0x38, 0xB8, 0x77, + /* 05C8 */ 0x86, 0x23, 0xF2, 0x1D, 0xC6, 0x83, 0x03, 0xDB, + /* 05D0 */ 0x41, 0x00, 0x38, 0x0C, 0x0E, 0x1F, 0x6A, 0x70, + /* 05D8 */ 0xE8, 0xF1, 0x18, 0x38, 0xA4, 0xCF, 0x63, 0xEC, + /* 05E0 */ 0xC2, 0xF0, 0x90, 0xE3, 0xA1, 0x81, 0x0D, 0xD0, + /* 05E8 */ 0x43, 0x03, 0x96, 0x93, 0x78, 0x0A, 0x39, 0x34, + /* 05F0 */ 0x30, 0x4B, 0x18, 0x1A, 0x50, 0x8A, 0x37, 0x34, + /* 05F8 */ 0xFA, 0xFF, 0x1F, 0x1A, 0x1F, 0x92, 0x0F, 0x0B, + /* 0600 */ 0x31, 0x9F, 0x72, 0x22, 0xBC, 0x2F, 0xF8, 0x04, + /* 0608 */ 0xC5, 0xD0, 0x5F, 0x53, 0x7C, 0xBB, 0xF0, 0x4D, + /* 0610 */ 0x10, 0x37, 0x3E, 0x70, 0x5D, 0x3A, 0x3D, 0x3E, + /* 0618 */ 0xE0, 0x73, 0xE4, 0xF2, 0xF8, 0x70, 0x47, 0x27, + /* 0620 */ 0x8F, 0x0F, 0x86, 0xCB, 0xAB, 0x0C, 0x39, 0x9A, + /* 0628 */ 0xF8, 0x68, 0xC5, 0x86, 0x07, 0xB6, 0x9B, 0x9E, + /* 0630 */ 0x87, 0x07, 0x7C, 0xAE, 0x9B, 0x60, 0xBC, 0x42, + /* 0638 */ 0xF2, 0x6B, 0x09, 0x8C, 0x13, 0x14, 0xFE, 0xBA, + /* 0640 */ 0x09, 0xDE, 0xFF, 0xFF, 0x75, 0x13, 0x78, 0x8E, + /* 0648 */ 0x82, 0x6B, 0xBD, 0x64, 0xD3, 0x20, 0xAF, 0x1C, + /* 0650 */ 0xC5, 0x7A, 0x11, 0x50, 0x18, 0x9F, 0xD9, 0x00, + /* 0658 */ 0x47, 0x63, 0x7D, 0x66, 0x03, 0xCB, 0xBD, 0x80, + /* 0660 */ 0xDD, 0xD8, 0xE0, 0x9E, 0xD6, 0x60, 0xDF, 0x1D, + /* 0668 */ 0x1E, 0xCE, 0x1E, 0xD3, 0x1E, 0xD5, 0x1E, 0xD0, + /* 0670 */ 0x7C, 0xC4, 0x8E, 0xF1, 0x96, 0x16, 0x24, 0x4E, + /* 0678 */ 0x84, 0xD7, 0x81, 0xA7, 0x35, 0x5F, 0x32, 0xE2, + /* 0680 */ 0x05, 0x7A, 0x5A, 0x33, 0x46, 0x9C, 0x97, 0x36, + /* 0688 */ 0x23, 0xBE, 0x52, 0x84, 0x78, 0x58, 0xF3, 0xC9, + /* 0690 */ 0xCD, 0x78, 0x0F, 0x13, 0xE1, 0xC2, 0xBC, 0xB0, + /* 0698 */ 0x3D, 0xAD, 0x81, 0xE3, 0xFF, 0x7F, 0x5A, 0x83, + /* 06A0 */ 0x23, 0xE7, 0x8A, 0x0D, 0xD0, 0xE4, 0xA2, 0x8F, + /* 06A8 */ 0x3B, 0xA4, 0x80, 0xE5, 0xDA, 0xC0, 0x6E, 0x29, + /* 06B0 */ 0xF0, 0x2E, 0xD8, 0xC0, 0xF9, 0xFF, 0x7F, 0x44, + /* 06B8 */ 0x01, 0x5F, 0x96, 0x0B, 0x36, 0xCD, 0x71, 0xC1, + /* 06C0 */ 0x46, 0x71, 0x58, 0x0D, 0x90, 0xE6, 0x09, 0xFF, + /* 06C8 */ 0x7A, 0x0D, 0xFE, 0x49, 0xF8, 0x7A, 0x0D, 0xD8, + /* 06D0 */ 0xBE, 0xC5, 0xE2, 0xAE, 0xD7, 0xC0, 0xEA, 0xFF, + /* 06D8 */ 0x7F, 0xBD, 0x06, 0x96, 0x82, 0x47, 0x4A, 0xEF, + /* 06E0 */ 0xD4, 0xE0, 0xBA, 0x69, 0xE3, 0x41, 0xDF, 0xB4, + /* 06E8 */ 0x61, 0x0A, 0xBE, 0x45, 0xD1, 0x28, 0xE4, 0x8A, + /* 06F0 */ 0xB6, 0x10, 0x0A, 0xE3, 0x5B, 0x14, 0xE0, 0x08, + /* 06F8 */ 0xFB, 0x2D, 0x0A, 0x2C, 0x17, 0xA7, 0xB7, 0x28, + /* 0700 */ 0xFC, 0x0C, 0x3C, 0x68, 0xDF, 0x75, 0x18, 0xA6, + /* 0708 */ 0xEF, 0xD0, 0xF0, 0x4F, 0x4D, 0xCF, 0x4D, 0x0F, + /* 0710 */ 0x4E, 0x0F, 0xCD, 0x3E, 0x48, 0xF9, 0x70, 0xF0, + /* 0718 */ 0xFC, 0xF4, 0xFF, 0x8F, 0xF1, 0x5E, 0xE7, 0x9B, + /* 0720 */ 0xD4, 0x6B, 0x94, 0x2F, 0x30, 0xC7, 0x10, 0x31, + /* 0728 */ 0xCA, 0xCB, 0xB4, 0x21, 0xE2, 0xF9, 0xD4, 0xE4, + /* 0730 */ 0xB3, 0x42, 0xDC, 0x10, 0x0F, 0xD1, 0x46, 0x88, + /* 0738 */ 0xFA, 0x3C, 0xED, 0x09, 0xBD, 0x46, 0x81, 0x57, + /* 0740 */ 0xD0, 0x35, 0x0A, 0xA0, 0xC9, 0xFD, 0x08, 0x77, + /* 0748 */ 0x8D, 0x02, 0xCB, 0xBD, 0x81, 0x9D, 0x87, 0xF8, + /* 0750 */ 0x95, 0xC8, 0xD7, 0x06, 0x18, 0xF7, 0x28, 0x38, + /* 0758 */ 0xFF, 0xFF, 0x7B, 0x14, 0x60, 0x23, 0xCC, 0x3D, + /* 0760 */ 0x8A, 0x06, 0xB9, 0x47, 0xA1, 0x4E, 0x26, 0xBE, + /* 0768 */ 0xD4, 0x79, 0xA2, 0xE0, 0x08, 0x7F, 0x91, 0x42, + /* 0770 */ 0xC5, 0x26, 0x51, 0xE8, 0xC3, 0x10, 0x2A, 0xE6, + /* 0778 */ 0x61, 0x84, 0x82, 0x18, 0xD0, 0x19, 0x4E, 0x14, + /* 0780 */ 0x68, 0x15, 0x27, 0x0A, 0x72, 0x8B, 0xF1, 0xA4, + /* 0788 */ 0x1E, 0xA3, 0x00, 0x5F, 0xCB, 0xF4, 0x50, 0x79, + /* 0790 */ 0xE4, 0xA1, 0x52, 0x10, 0x0F, 0xD5, 0x71, 0x86, + /* 0798 */ 0x8A, 0x9E, 0xA4, 0xE7, 0x8F, 0xF9, 0xFF, 0x1F, + /* 07A0 */ 0x1C, 0xB0, 0x07, 0x29, 0x80, 0x17, 0x0A, 0x6D, + /* 07A8 */ 0xFA, 0xD4, 0x68, 0xD4, 0xAA, 0x41, 0x99, 0x1A, + /* 07B0 */ 0x65, 0x1A, 0xD4, 0xEA, 0x53, 0xA9, 0x31, 0x63, + /* 07B8 */ 0xE7, 0x50, 0x4B, 0x3B, 0x4B, 0x50, 0x31, 0x8B, + /* 07C0 */ 0xD1, 0x68, 0x1C, 0x05, 0x84, 0xCA, 0xFE, 0x9B, + /* 07C8 */ 0x0B, 0xC4, 0x21, 0x9F, 0x3A, 0x02, 0x74, 0xB0, + /* 07D0 */ 0x17, 0x95, 0x80, 0x2C, 0x6B, 0x6D, 0x02, 0x71, + /* 07D8 */ 0x7C, 0x13, 0x10, 0x8D, 0x80, 0x48, 0xCB, 0x63, + /* 07E0 */ 0x42, 0x40, 0xCE, 0x0D, 0x22, 0x20, 0xAB, 0x58, + /* 07E8 */ 0x93, 0x80, 0xAC, 0xF9, 0x01, 0x23, 0x70, 0xEB, + /* 07F0 */ 0xD4, 0x01, 0xC4, 0x52, 0x82, 0xD0, 0x44, 0x0B, + /* 07F8 */ 0x17, 0xA8, 0xE3, 0x81, 0x68, 0x30, 0x84, 0x46, + /* 0800 */ 0x40, 0x0E, 0x46, 0x21, 0x20, 0xCB, 0xF8, 0x74, + /* 0808 */ 0x0B, 0xDC, 0x02, 0xAC, 0x00, 0x31, 0xF9, 0x20, + /* 0810 */ 0x54, 0xB0, 0x17, 0x50, 0xA6, 0x1E, 0x44, 0x40, + /* 0818 */ 0x56, 0xBA, 0x56, 0x01, 0x59, 0x37, 0x88, 0x80, + /* 0820 */ 0xFE, 0xFF, 0x2F, 0x83, 0x32, 0x03, 0xCE, 0x32, + /* 0828 */ 0xBA, 0x01, 0x62, 0x0A, 0x1F, 0x0A, 0x02, 0xB1, + /* 0830 */ 0x26, 0x3D, 0xA0, 0x4C, 0x20, 0x88, 0xAE, 0x1C, + /* 0838 */ 0xC4, 0x0F, 0x10, 0x93, 0x06, 0x22, 0x20, 0xC7, + /* 0840 */ 0x39, 0x98, 0x08, 0xDC, 0x71, 0x14, 0x01, 0x52, + /* 0848 */ 0x47, 0xC3, 0xA5, 0x20, 0x54, 0xFC, 0xF3, 0x44, + /* 0850 */ 0x20, 0x16, 0x64, 0x09, 0x8C, 0x82, 0xD0, 0x08, + /* 0858 */ 0x9A, 0x40, 0x98, 0x3C, 0x4F, 0x20, 0x2C, 0xD4, + /* 0860 */ 0x9F, 0x5C, 0xA7, 0x15, 0xA2, 0x6A, 0x88, 0xD4, + /* 0868 */ 0x15, 0x08, 0x0B, 0xFC, 0x30, 0xD0, 0x60, 0x9C, + /* 0870 */ 0x1E, 0x44, 0x40, 0x4E, 0xFA, 0xA7, 0x0A, 0x44, + /* 0878 */ 0x72, 0x83, 0x08, 0xC8, 0xF9, 0x9F, 0x22, 0x02, + /* 0880 */ 0x77, 0xEA, 0xD7, 0x84, 0x86, 0x4F, 0xBE, 0x58, + /* 0888 */ 0x41, 0x88, 0xB8, 0x87, 0x55, 0x50, 0xA2, 0x14, + /* 0890 */ 0x44, 0x40, 0x56, 0xF6, 0xB4, 0x12, 0x90, 0x75, + /* 0898 */ 0x82, 0x08, 0xC8, 0xFF, 0x7F + }) + } + + Device (WMI2) + { + Name (_HID, EisaId ("PNP0C14")) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_WDG, Buffer (0x64) + { + /* 0000 */ 0xF1, 0x24, 0xB4, 0xFC, 0x5A, 0x07, 0x0E, 0x4E, + /* 0008 */ 0xBF, 0xC4, 0x62, 0xF3, 0xE7, 0x17, 0x71, 0xFA, + /* 0010 */ 0x41, 0x37, 0x01, 0x01, 0xE3, 0x5E, 0xBE, 0xE2, + /* 0018 */ 0xDA, 0x42, 0xDB, 0x49, 0x83, 0x78, 0x1F, 0x52, + /* 0020 */ 0x47, 0x38, 0x82, 0x02, 0x41, 0x38, 0x01, 0x02, + /* 0028 */ 0x9A, 0x01, 0x30, 0x74, 0xE9, 0xDC, 0x48, 0x45, + /* 0030 */ 0xBA, 0xB0, 0x9F, 0xDE, 0x09, 0x35, 0xCA, 0xFF, + /* 0038 */ 0x41, 0x39, 0x0A, 0x05, 0x03, 0x70, 0xF4, 0x7F, + /* 0040 */ 0x6C, 0x3B, 0x5E, 0x4E, 0xA2, 0x27, 0xE9, 0x79, + /* 0048 */ 0x82, 0x4A, 0x85, 0xD1, 0x41, 0x41, 0x01, 0x06, + /* 0050 */ 0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11, + /* 0058 */ 0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, + /* 0060 */ 0x42, 0x42, 0x01, 0x00 + }) + Name (PREL, Buffer (0x08) + { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + Method (WQA7, 1, NotSerialized) + { + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + \WMIS (0x07, 0x00) + Store (\WLS0, Index (PREL, 0x00)) + Store (\WLS1, Index (PREL, 0x01)) + Store (\WLS2, Index (PREL, 0x02)) + Store (\WLS3, Index (PREL, 0x03)) + Store (\WLS4, Index (PREL, 0x04)) + Store (\WLS5, Index (PREL, 0x05)) + Store (\WLS6, Index (PREL, 0x06)) + Store (\WLS7, Index (PREL, 0x07)) + Release (\_SB.WMI1.MWMI) + Return (PREL) + } + + Method (WMA8, 3, NotSerialized) + { + CreateByteField (Arg2, 0x00, PRE0) + CreateByteField (Arg2, 0x01, PRE1) + CreateByteField (Arg2, 0x02, PRE2) + CreateByteField (Arg2, 0x03, PRE3) + CreateByteField (Arg2, 0x04, PRE4) + CreateByteField (Arg2, 0x05, PRE5) + CreateByteField (Arg2, 0x06, PRE6) + CreateByteField (Arg2, 0x07, PRE7) + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + Store (PRE0, \WLS0) + Store (PRE1, \WLS1) + Store (PRE2, \WLS2) + Store (PRE3, \WLS3) + Store (PRE4, \WLS4) + Store (PRE5, \WLS5) + Store (PRE6, \WLS6) + Store (PRE7, \WLS7) + \WMIS (0x08, 0x00) + Release (\_SB.WMI1.MWMI) + } + + Name (ITEM, Package (0x08) + { + Package (0x02) + { + 0x00, + "InhibitEnteringThinkPadSetup" + }, + + Package (0x02) + { + 0x03, + "MTMSerialConcatenation" + }, + + Package (0x02) + { + 0x00, + "SwapProductName" + }, + + Package (0x02) + { + 0x00, + "ComputraceMsgDisable" + }, + + Package (0x02) + { + 0x00, + "CpuDebugEnable" + }, + + Package (0x02) + { + 0x00, + "PasswordAfterBootDeviceList" + }, + + Package (0x02) + { + 0x02, + "SpecialCharForPassword" + }, + + Package (0x02) + { + 0x00, + "ConfirmTpmFwUpdate" + } + }) + Name (VSEL, Package (0x04) + { + Package (0x02) + { + "Disable", + "Enable" + }, + + Package (0x02) + { + "Off", + "On" + }, + + Package (0x02) + { + "Disable", + "412" + }, + + Package (0x06) + { + "Disable", + "Enable", + "Default", + "MTMSN", + "1SMTMSN", + "MTSN" + } + }) + Method (WQA9, 1, NotSerialized) + { + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + If (LNotEqual (\WMIS (0x09, Arg0), 0x00)) + { + Release (\_SB.WMI1.MWMI) + Return ("") + } + + Store (DerefOf (Index (ITEM, \WITM)), Local0) + Store (DerefOf (Index (Local0, 0x00)), Local1) + Store (DerefOf (Index (Local0, 0x01)), Local2) + Concatenate (Local2, ",", Local6) + Store (DerefOf (Index (VSEL, Local1)), Local3) + Concatenate (Local6, DerefOf (Index (Local3, \WSEL)), Local7) + Release (\_SB.WMI1.MWMI) + Return (Local7) + } + + Method (WMAA, 3, NotSerialized) + { + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + If (LEqual (SizeOf (Arg2), 0x00)) + { + Store (0x02, Local0) + } + Else + { + Store (\_SB.WMI1.CARG (Arg2), Local0) + If (LEqual (Local0, 0x00)) + { + Store (\_SB.WMI1.WSET (ITEM, VSEL), Local0) + If (LEqual (Local0, 0x00)) + { + Store (\WMIS (0x0A, 0x00), Local0) + } + } + } + + Release (\_SB.WMI1.MWMI) + Return (DerefOf (Index (\_SB.WMI1.RETN, Local0))) + } + + Name (WQBB, Buffer (0x0538) + { + /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00, + /* 0008 */ 0x28, 0x05, 0x00, 0x00, 0xAE, 0x18, 0x00, 0x00, + /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54, + /* 0018 */ 0x98, 0xDE, 0x8B, 0x00, 0x01, 0x06, 0x18, 0x42, + /* 0020 */ 0x10, 0x0D, 0x10, 0x8A, 0x0D, 0x21, 0x02, 0x0B, + /* 0028 */ 0x83, 0x50, 0x50, 0x18, 0x14, 0xA0, 0x45, 0x41, + /* 0030 */ 0xC8, 0x05, 0x14, 0x95, 0x02, 0x21, 0xC3, 0x02, + /* 0038 */ 0x14, 0x0B, 0x70, 0x2E, 0x40, 0xBA, 0x00, 0xE5, + /* 0040 */ 0x28, 0x72, 0x0C, 0x22, 0x02, 0xF7, 0xEF, 0x0F, + /* 0048 */ 0x31, 0x10, 0x88, 0x14, 0x40, 0x48, 0x28, 0x84, + /* 0050 */ 0x44, 0x00, 0x53, 0x21, 0x70, 0x84, 0xA0, 0x5F, + /* 0058 */ 0x01, 0x08, 0x1D, 0x0A, 0x90, 0x29, 0xC0, 0xA0, + /* 0060 */ 0x00, 0xA7, 0x08, 0x22, 0x88, 0xD2, 0xB2, 0x00, + /* 0068 */ 0xDD, 0x02, 0x7C, 0x0B, 0xD0, 0x0E, 0x21, 0xB4, + /* 0070 */ 0xC8, 0x95, 0x0A, 0xB0, 0x08, 0x25, 0x9F, 0x80, + /* 0078 */ 0x92, 0x88, 0x22, 0xD9, 0x78, 0xB2, 0x8D, 0x48, + /* 0080 */ 0xE6, 0x61, 0x91, 0x83, 0x40, 0x89, 0x19, 0x04, + /* 0088 */ 0x4A, 0x27, 0xAE, 0x6C, 0xE2, 0x6A, 0x10, 0x07, + /* 0090 */ 0x10, 0xE5, 0x3C, 0xA2, 0x24, 0x38, 0xAA, 0x83, + /* 0098 */ 0x88, 0x10, 0xBB, 0x5C, 0x01, 0x92, 0x07, 0x20, + /* 00A0 */ 0xCD, 0x13, 0x93, 0xF5, 0x39, 0x68, 0x64, 0x6C, + /* 00A8 */ 0x04, 0x3C, 0x98, 0x04, 0x10, 0x16, 0x65, 0x9D, + /* 00B0 */ 0x8A, 0x02, 0x83, 0xF2, 0x00, 0x22, 0x39, 0x63, + /* 00B8 */ 0x45, 0x01, 0xDB, 0xEB, 0x44, 0x64, 0x72, 0xA0, + /* 00C0 */ 0x54, 0x12, 0x1C, 0x6A, 0x98, 0x9E, 0x5A, 0xF3, + /* 00C8 */ 0x13, 0xD3, 0x44, 0x4E, 0xAD, 0xE9, 0x21, 0x0B, + /* 00D0 */ 0x92, 0x49, 0x1B, 0x0A, 0x6A, 0xEC, 0x9E, 0xD6, + /* 00D8 */ 0x49, 0x79, 0xA6, 0x11, 0x0F, 0xCA, 0x30, 0x09, + /* 00E0 */ 0x3C, 0x0A, 0x86, 0xC6, 0x09, 0xCA, 0x82, 0x90, + /* 00E8 */ 0x83, 0x81, 0xA2, 0x00, 0x4F, 0xC2, 0x73, 0x2C, + /* 00F0 */ 0x5E, 0x80, 0xF0, 0x11, 0x93, 0xB3, 0x40, 0x8C, + /* 00F8 */ 0x04, 0x3E, 0x13, 0x78, 0xE4, 0xC7, 0x8C, 0x1D, + /* 0100 */ 0x51, 0xB8, 0x80, 0xE7, 0x73, 0x0C, 0x91, 0xE3, + /* 0108 */ 0x1E, 0x6A, 0x8C, 0xA3, 0x88, 0x7C, 0x38, 0x0C, + /* 0110 */ 0xED, 0x74, 0xE3, 0x1C, 0xD8, 0xE9, 0x14, 0x04, + /* 0118 */ 0x2E, 0x90, 0x60, 0x3D, 0xCF, 0x59, 0x20, 0xFF, + /* 0120 */ 0xFF, 0x18, 0x07, 0xC1, 0xF0, 0x8E, 0x01, 0x23, + /* 0128 */ 0x03, 0x42, 0x1E, 0x05, 0x58, 0x1D, 0x96, 0x26, + /* 0130 */ 0x91, 0xC0, 0xEE, 0x05, 0x68, 0xBC, 0x04, 0x48, + /* 0138 */ 0xE1, 0x20, 0xA5, 0x0C, 0x42, 0x30, 0x8D, 0x09, + /* 0140 */ 0xB0, 0x75, 0x68, 0x90, 0x37, 0x01, 0xD6, 0xAE, + /* 0148 */ 0x02, 0x42, 0x89, 0x74, 0x02, 0x71, 0x42, 0x44, + /* 0150 */ 0x89, 0x18, 0xD4, 0x40, 0x51, 0x6A, 0x43, 0x15, + /* 0158 */ 0x4C, 0x67, 0xC3, 0x13, 0x66, 0xDC, 0x10, 0x31, + /* 0160 */ 0x0C, 0x14, 0xB7, 0xFD, 0x41, 0x90, 0x61, 0xE3, + /* 0168 */ 0xC6, 0xEF, 0x41, 0x9D, 0xD6, 0xD9, 0x1D, 0xD3, + /* 0170 */ 0xAB, 0x82, 0x09, 0x3C, 0xE9, 0x37, 0x84, 0xA7, + /* 0178 */ 0x83, 0xA3, 0x38, 0xDA, 0xA8, 0x31, 0x9A, 0x23, + /* 0180 */ 0x65, 0xAB, 0xD6, 0xB9, 0xC2, 0x91, 0xE0, 0x51, + /* 0188 */ 0xE7, 0x05, 0x9F, 0x0C, 0x3C, 0xB4, 0xC3, 0xF6, + /* 0190 */ 0x60, 0xCF, 0xD2, 0x43, 0x38, 0x82, 0x67, 0x86, + /* 0198 */ 0x47, 0x02, 0x8F, 0x81, 0xDD, 0x15, 0x7C, 0x08, + /* 01A0 */ 0xF0, 0x19, 0x01, 0xEF, 0x1A, 0x50, 0x97, 0x83, + /* 01A8 */ 0x47, 0x03, 0x36, 0xE9, 0x70, 0x98, 0xF1, 0x7A, + /* 01B0 */ 0xEE, 0x9E, 0xBA, 0xCF, 0x18, 0xFC, 0xBC, 0xE1, + /* 01B8 */ 0xC1, 0xE1, 0x46, 0x7A, 0x32, 0x47, 0x56, 0xAA, + /* 01C0 */ 0x00, 0xB3, 0xD7, 0x00, 0x1D, 0x25, 0x7C, 0xE0, + /* 01C8 */ 0x60, 0x77, 0x81, 0xA7, 0x00, 0x13, 0x58, 0xFE, + /* 01D0 */ 0x20, 0x50, 0x23, 0x33, 0xB4, 0xC7, 0xFB, 0xDE, + /* 01D8 */ 0x61, 0xC8, 0x27, 0x85, 0xC3, 0x62, 0x62, 0x0F, + /* 01E0 */ 0x1E, 0x74, 0x3C, 0xE0, 0xBF, 0x8F, 0x3C, 0x69, + /* 01E8 */ 0x78, 0xFA, 0x9E, 0xAF, 0x09, 0x06, 0x86, 0x90, + /* 01F0 */ 0x95, 0xF1, 0xA0, 0x06, 0x62, 0xE8, 0x57, 0x85, + /* 01F8 */ 0xC3, 0x38, 0x0D, 0x9F, 0x40, 0x7C, 0x0E, 0x08, + /* 0200 */ 0x12, 0xE3, 0x98, 0x3C, 0x38, 0xFF, 0xFF, 0x09, + /* 0208 */ 0x1C, 0x6B, 0xE4, 0xF4, 0x9C, 0xE2, 0xF3, 0x04, + /* 0210 */ 0x3F, 0x5C, 0xF8, 0x3C, 0xC1, 0x4E, 0x0C, 0xA7, + /* 0218 */ 0xF1, 0x1C, 0xE0, 0xE1, 0x9C, 0x95, 0x8F, 0x13, + /* 0220 */ 0xC0, 0x02, 0xE2, 0x75, 0x82, 0x0F, 0x14, 0x3E, + /* 0228 */ 0xEC, 0xA1, 0x79, 0x14, 0x2F, 0x11, 0x6F, 0x0F, + /* 0230 */ 0x26, 0x88, 0xF6, 0x10, 0x03, 0xC6, 0x19, 0xE1, + /* 0238 */ 0xCE, 0x1B, 0x70, 0x4E, 0x31, 0xC0, 0x03, 0xEA, + /* 0240 */ 0x10, 0x30, 0x87, 0x09, 0x0F, 0x81, 0x0F, 0xE0, + /* 0248 */ 0x19, 0xE4, 0x1C, 0x7D, 0xCC, 0x39, 0x33, 0xDC, + /* 0250 */ 0x71, 0x07, 0x6C, 0xC3, 0xE0, 0x91, 0x2D, 0x80, + /* 0258 */ 0xB0, 0x38, 0x4F, 0x02, 0x05, 0x7C, 0x1B, 0x50, + /* 0260 */ 0x18, 0x1F, 0x6E, 0xC0, 0xFB, 0xFF, 0x3F, 0xDC, + /* 0268 */ 0x00, 0xD7, 0xF3, 0x01, 0xEE, 0xF8, 0x00, 0xF7, + /* 0270 */ 0x62, 0xC1, 0x0E, 0x0F, 0x8F, 0x37, 0xC0, 0x60, + /* 0278 */ 0x48, 0x8F, 0x34, 0x6F, 0x35, 0x31, 0x5E, 0x6D, + /* 0280 */ 0x42, 0x44, 0x78, 0xA8, 0x79, 0xB7, 0x31, 0x52, + /* 0288 */ 0xBC, 0xC7, 0x1B, 0x76, 0x8D, 0x39, 0x8B, 0x07, + /* 0290 */ 0x90, 0x28, 0xC5, 0xA1, 0xE9, 0x62, 0x13, 0x23, + /* 0298 */ 0xCA, 0x9B, 0x8D, 0x61, 0xDF, 0x74, 0x0C, 0x14, + /* 02A0 */ 0x2A, 0x52, 0x84, 0x30, 0x2F, 0x16, 0x21, 0x1E, + /* 02A8 */ 0x6F, 0xC0, 0x2C, 0xE9, 0xA5, 0xA2, 0xCF, 0x81, + /* 02B0 */ 0x8F, 0x37, 0x80, 0x97, 0xFF, 0xFF, 0xF1, 0x06, + /* 02B8 */ 0xF0, 0x30, 0x0C, 0x1F, 0x53, 0xC0, 0x76, 0x73, + /* 02C0 */ 0x60, 0xF7, 0x14, 0xF8, 0xE7, 0x14, 0xC0, 0x91, + /* 02C8 */ 0x90, 0x47, 0x80, 0x0E, 0x1E, 0x16, 0x01, 0x22, + /* 02D0 */ 0x1B, 0xCF, 0x00, 0x9F, 0x89, 0xA8, 0x40, 0x2A, + /* 02D8 */ 0xCD, 0x14, 0x2C, 0xE3, 0x14, 0xAC, 0x4E, 0x88, + /* 02E0 */ 0x5C, 0x06, 0x85, 0x44, 0x40, 0x68, 0x64, 0x86, + /* 02E8 */ 0xF3, 0x21, 0xD1, 0x60, 0x06, 0xF1, 0xF9, 0xC0, + /* 02F0 */ 0x67, 0x0A, 0x9F, 0x9C, 0xF8, 0xFF, 0xFF, 0xE4, + /* 02F8 */ 0x04, 0x9E, 0x83, 0xC9, 0x43, 0x05, 0x2C, 0x44, + /* 0300 */ 0x9F, 0x16, 0x38, 0x9C, 0xCF, 0x2C, 0x1C, 0xCE, + /* 0308 */ 0x47, 0x12, 0x7E, 0x80, 0xE4, 0x47, 0x25, 0x70, + /* 0310 */ 0x09, 0x3C, 0x34, 0x80, 0x02, 0xC8, 0xF7, 0x03, + /* 0318 */ 0x9F, 0x03, 0x9E, 0x11, 0xD8, 0x1C, 0x1E, 0x09, + /* 0320 */ 0x7C, 0x20, 0x60, 0xF0, 0x3C, 0xDA, 0xA8, 0xE8, + /* 0328 */ 0xD1, 0xC6, 0xC3, 0xE3, 0x47, 0x06, 0xCF, 0xE7, + /* 0330 */ 0x81, 0xE0, 0x28, 0x1F, 0x09, 0x70, 0x18, 0xEF, + /* 0338 */ 0x17, 0x1E, 0xA2, 0x4F, 0x39, 0xB0, 0x26, 0x72, + /* 0340 */ 0xD4, 0x16, 0x7D, 0x22, 0x10, 0xE8, 0x33, 0x17, + /* 0348 */ 0xE6, 0x94, 0x03, 0x9C, 0x82, 0x8F, 0x1E, 0x15, + /* 0350 */ 0xF5, 0x40, 0x0A, 0xDA, 0x93, 0x82, 0xCF, 0x0A, + /* 0358 */ 0x3E, 0x7C, 0xC1, 0xFF, 0xFF, 0x1F, 0xBE, 0xE0, + /* 0360 */ 0xCC, 0xEB, 0x65, 0xCD, 0x07, 0x8E, 0x38, 0x67, + /* 0368 */ 0x71, 0xBA, 0xEF, 0x16, 0xF8, 0x13, 0x29, 0x30, + /* 0370 */ 0x0B, 0x72, 0x22, 0x45, 0xC1, 0xF8, 0x44, 0x0A, + /* 0378 */ 0xD8, 0xBC, 0x05, 0x60, 0xAF, 0x0B, 0x4F, 0x22, + /* 0380 */ 0x30, 0xCE, 0x11, 0xCF, 0x58, 0x30, 0x0F, 0x55, + /* 0388 */ 0xA7, 0xF8, 0x52, 0xF5, 0xC6, 0x10, 0xE1, 0xC9, + /* 0390 */ 0xEA, 0x35, 0xEA, 0x01, 0xCB, 0x60, 0x2F, 0x02, + /* 0398 */ 0x86, 0x79, 0xC5, 0xF2, 0xE9, 0x2A, 0xC4, 0x03, + /* 03A0 */ 0x96, 0xCF, 0x5A, 0xD1, 0x42, 0x84, 0x8C, 0x12, + /* 03A8 */ 0xEC, 0x15, 0xEB, 0x55, 0xC6, 0x47, 0x2A, 0x83, + /* 03B0 */ 0x07, 0x0C, 0x1B, 0x2D, 0x52, 0x84, 0x47, 0x2C, + /* 03B8 */ 0xFC, 0xFF, 0xFF, 0x88, 0x05, 0x1E, 0x09, 0x07, + /* 03C0 */ 0x52, 0x80, 0x2A, 0x03, 0xC7, 0x1D, 0x48, 0x81, + /* 03C8 */ 0xFD, 0x69, 0x02, 0x7F, 0xBD, 0xF0, 0x78, 0xB0, + /* 03D0 */ 0xFF, 0xFF, 0x73, 0x00, 0xF8, 0x0E, 0x31, 0xC0, + /* 03D8 */ 0x60, 0xC0, 0x30, 0x0E, 0x31, 0xC0, 0x43, 0xF0, + /* 03E0 */ 0xC9, 0x0C, 0xF4, 0xC7, 0x1D, 0xF8, 0xE3, 0xE0, + /* 03E8 */ 0x19, 0x9F, 0x1C, 0x26, 0x50, 0x98, 0x13, 0x29, + /* 03F0 */ 0x0A, 0xC6, 0x27, 0x52, 0xC0, 0xD9, 0xFF, 0xFF, + /* 03F8 */ 0x70, 0x05, 0x86, 0xE3, 0x0D, 0xF8, 0x6F, 0x33, + /* 0400 */ 0x3E, 0x84, 0xFA, 0x7C, 0xE3, 0x0B, 0xA9, 0x21, + /* 0408 */ 0x5E, 0x6C, 0xDE, 0xD4, 0x5E, 0x09, 0x5E, 0xDF, + /* 0410 */ 0xD9, 0xB5, 0xE6, 0xF5, 0xDD, 0xA7, 0x82, 0x27, + /* 0418 */ 0xD1, 0x08, 0x21, 0xA3, 0xBC, 0xE4, 0x18, 0x24, + /* 0420 */ 0xC4, 0xEB, 0xA8, 0x01, 0x83, 0x05, 0x89, 0x78, + /* 0428 */ 0x0A, 0x4F, 0x3B, 0x8F, 0x37, 0xE0, 0x15, 0x75, + /* 0430 */ 0x20, 0x05, 0xE8, 0xF1, 0xFF, 0x3F, 0x90, 0x02, + /* 0438 */ 0x83, 0x7B, 0x0A, 0xEC, 0x73, 0x0A, 0xE0, 0x29, + /* 0440 */ 0xF9, 0x89, 0x94, 0xA6, 0x3E, 0x91, 0xA2, 0x15, + /* 0448 */ 0x01, 0x69, 0xAA, 0x60, 0x21, 0x98, 0xFE, 0x44, + /* 0450 */ 0x4A, 0x0F, 0x06, 0xCE, 0x4D, 0xA2, 0xE4, 0x43, + /* 0458 */ 0xA3, 0x70, 0xCE, 0x7A, 0x20, 0xA1, 0x20, 0x06, + /* 0460 */ 0x74, 0x90, 0x43, 0x05, 0xFA, 0xAC, 0xE2, 0x03, + /* 0468 */ 0xC9, 0x81, 0x3C, 0x22, 0x7A, 0x58, 0x3E, 0x54, + /* 0470 */ 0xFA, 0xAE, 0xE2, 0x73, 0x88, 0x8F, 0x14, 0x1E, + /* 0478 */ 0xBF, 0x0F, 0x0B, 0xFC, 0x3F, 0xE3, 0xE3, 0x28, + /* 0480 */ 0x03, 0xAF, 0xE6, 0xBC, 0x82, 0x02, 0xF3, 0x69, + /* 0488 */ 0x14, 0xA3, 0xEB, 0x3E, 0x01, 0x92, 0xFF, 0xFF, + /* 0490 */ 0xFC, 0xB8, 0xBE, 0xC3, 0x28, 0xC8, 0xD1, 0x79, + /* 0498 */ 0xF8, 0xC9, 0xA2, 0xE2, 0x4E, 0x96, 0x82, 0x78, + /* 04A0 */ 0xB2, 0x8E, 0x32, 0x59, 0xF4, 0x4C, 0x7C, 0xBB, + /* 04A8 */ 0xF0, 0x8C, 0xDE, 0xBB, 0x7C, 0x83, 0x65, 0x37, + /* 04B0 */ 0x59, 0x78, 0x97, 0x81, 0x90, 0x8F, 0x06, 0xBE, + /* 04B8 */ 0xC9, 0xC2, 0x1D, 0x8B, 0x2F, 0x23, 0xE0, 0xBB, + /* 04C0 */ 0xC9, 0x02, 0x5E, 0x47, 0xE3, 0xB3, 0x05, 0x3B, + /* 04C8 */ 0x85, 0xF8, 0xBA, 0x06, 0x4B, 0xA1, 0x4D, 0x9F, + /* 04D0 */ 0x1A, 0x8D, 0x5A, 0xFD, 0xFF, 0x1B, 0x94, 0xA9, + /* 04D8 */ 0x51, 0xA6, 0x41, 0xAD, 0x3E, 0x95, 0x1A, 0x33, + /* 04E0 */ 0x76, 0xA1, 0xB0, 0xB8, 0x0B, 0x06, 0x95, 0xB4, + /* 04E8 */ 0x2C, 0x8D, 0xCB, 0x81, 0x40, 0x68, 0x80, 0x5B, + /* 04F0 */ 0xA9, 0x40, 0x1C, 0xFA, 0x0B, 0xA4, 0x53, 0x02, + /* 04F8 */ 0xF9, 0x6A, 0x09, 0xC8, 0x62, 0x57, 0x25, 0x10, + /* 0500 */ 0xCB, 0x54, 0x01, 0xD1, 0xC8, 0xDD, 0xC2, 0x20, + /* 0508 */ 0x02, 0x72, 0xBC, 0x4F, 0x8D, 0x40, 0x1D, 0x49, + /* 0510 */ 0x07, 0x10, 0x13, 0xE4, 0x63, 0xAC, 0xF4, 0x25, + /* 0518 */ 0x20, 0x10, 0xCB, 0xA6, 0x15, 0xA0, 0xE5, 0x3A, + /* 0520 */ 0x01, 0x62, 0x61, 0x41, 0x68, 0xC0, 0x5F, 0xB5, + /* 0528 */ 0x86, 0xE0, 0xB4, 0x20, 0x02, 0x72, 0x32, 0x2D, + /* 0530 */ 0x40, 0x2C, 0x27, 0x88, 0x80, 0xFC, 0xFF, 0x07 + }) + } + + Device (WMI3) + { + Name (_HID, EisaId ("PNP0C14")) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_WDG, /**** Is ResourceTemplate, but EndTag not at buffer end ****/ Buffer (0x3C) + { + /* 0000 */ 0x79, 0x36, 0x4D, 0x8F, 0x9E, 0x74, 0x79, 0x44, + /* 0008 */ 0x9B, 0x16, 0xC6, 0x26, 0x01, 0xFD, 0x25, 0xF0, + /* 0010 */ 0x41, 0x42, 0x01, 0x02, 0x69, 0xE8, 0xD2, 0x85, + /* 0018 */ 0x5A, 0x36, 0xCE, 0x4A, 0xA4, 0xD3, 0xCD, 0x69, + /* 0020 */ 0x2B, 0x16, 0x98, 0xA0, 0x41, 0x43, 0x01, 0x02, + /* 0028 */ 0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11, + /* 0030 */ 0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, + /* 0038 */ 0x42, 0x43, 0x01, 0x00 + }) + Method (WMAB, 3, NotSerialized) + { + CreateByteField (Arg2, 0x00, ASS0) + CreateWordField (Arg2, 0x01, ASS1) + CreateByteField (Arg2, 0x03, ASS2) + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + Store (ASS0, \WASB) + Store (ASS1, \WASI) + Store (ASS2, \WASD) + \WMIS (0x0B, 0x00) + Store (\WASS, Local0) + Release (\_SB.WMI1.MWMI) + Return (Local0) + } + + Method (WMAC, 3, NotSerialized) + { + CreateByteField (Arg2, 0x00, ASS0) + CreateWordField (Arg2, 0x01, ASS1) + Acquire (\_SB.WMI1.MWMI, 0xFFFF) + Store (ASS0, \WASB) + Store (ASS1, \WASI) + \WMIS (0x0C, Arg1) + Store (\WASS, Local0) + Release (\_SB.WMI1.MWMI) + Return (Local0) + } + + Name (WQBC, Buffer (0x040A) + { + /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00, + /* 0008 */ 0xFA, 0x03, 0x00, 0x00, 0x32, 0x12, 0x00, 0x00, + /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54, + /* 0018 */ 0x98, 0xC3, 0x88, 0x00, 0x01, 0x06, 0x18, 0x42, + /* 0020 */ 0x10, 0x07, 0x10, 0x8A, 0x0D, 0x21, 0x02, 0x0B, + /* 0028 */ 0x83, 0x50, 0x50, 0x18, 0x14, 0xA0, 0x45, 0x41, + /* 0030 */ 0xC8, 0x05, 0x14, 0x95, 0x02, 0x21, 0xC3, 0x02, + /* 0038 */ 0x14, 0x0B, 0x70, 0x2E, 0x40, 0xBA, 0x00, 0xE5, + /* 0040 */ 0x28, 0x72, 0x0C, 0x22, 0x02, 0xF7, 0xEF, 0x0F, + /* 0048 */ 0x31, 0x10, 0x88, 0x14, 0x40, 0x48, 0x28, 0x84, + /* 0050 */ 0x44, 0x00, 0x53, 0x21, 0x70, 0x84, 0xA0, 0x5F, + /* 0058 */ 0x01, 0x08, 0x1D, 0x0A, 0x90, 0x29, 0xC0, 0xA0, + /* 0060 */ 0x00, 0xA7, 0x08, 0x22, 0x88, 0xD2, 0xB2, 0x00, + /* 0068 */ 0xDD, 0x02, 0x7C, 0x0B, 0xD0, 0x0E, 0x21, 0xB4, + /* 0070 */ 0x58, 0x07, 0x11, 0x21, 0xD2, 0x31, 0x34, 0x29, + /* 0078 */ 0x40, 0xA2, 0x00, 0x8B, 0x02, 0x64, 0xC3, 0xC8, + /* 0080 */ 0x36, 0x22, 0x99, 0x87, 0x45, 0x0E, 0x02, 0x25, + /* 0088 */ 0x66, 0x10, 0x28, 0x9D, 0xE0, 0xB2, 0x89, 0xAB, + /* 0090 */ 0x41, 0x9C, 0x4C, 0x94, 0xF3, 0x88, 0x92, 0xE0, + /* 0098 */ 0xA8, 0x0E, 0x22, 0x42, 0xEC, 0x72, 0x05, 0x48, + /* 00A0 */ 0x1E, 0x80, 0x34, 0x4F, 0x4C, 0xD6, 0xE7, 0xA0, + /* 00A8 */ 0x91, 0xB1, 0x11, 0xF0, 0x94, 0x1A, 0x40, 0x58, + /* 00B0 */ 0xA0, 0x75, 0x2A, 0xE0, 0x7A, 0x0D, 0x43, 0x3D, + /* 00B8 */ 0x80, 0x48, 0xCE, 0x58, 0x51, 0xC0, 0xF6, 0x3A, + /* 00C0 */ 0x11, 0x8D, 0xEA, 0x40, 0x99, 0x24, 0x38, 0xD4, + /* 00C8 */ 0x30, 0x3D, 0xB5, 0xE6, 0x27, 0xA6, 0x89, 0x9C, + /* 00D0 */ 0x5A, 0xD3, 0x43, 0x16, 0x24, 0x93, 0x36, 0x14, + /* 00D8 */ 0xD4, 0xD8, 0x3D, 0xAD, 0x93, 0xF2, 0x4C, 0x23, + /* 00E0 */ 0x1E, 0x94, 0x61, 0x12, 0x78, 0x14, 0x0C, 0x8D, + /* 00E8 */ 0x13, 0x94, 0x75, 0x22, 0xA0, 0x03, 0xE5, 0x80, + /* 00F0 */ 0x27, 0xE1, 0x39, 0x16, 0x2F, 0x40, 0xF8, 0x88, + /* 00F8 */ 0xC9, 0xB4, 0x4D, 0xE0, 0x33, 0x81, 0x87, 0x79, + /* 0100 */ 0xCC, 0xD8, 0x11, 0x85, 0x0B, 0x78, 0x3E, 0xC7, + /* 0108 */ 0x10, 0x39, 0xEE, 0xA1, 0xC6, 0x38, 0x8A, 0xC8, + /* 0110 */ 0x47, 0x60, 0x24, 0x03, 0xC5, 0x2B, 0x08, 0x89, + /* 0118 */ 0x80, 0xF8, 0x76, 0x70, 0x70, 0x91, 0xFC, 0xFF, + /* 0120 */ 0x47, 0x89, 0x11, 0x2A, 0xC6, 0xDB, 0x00, 0x6E, + /* 0128 */ 0x5E, 0x09, 0x8A, 0x1E, 0x07, 0x4A, 0x06, 0x84, + /* 0130 */ 0x3C, 0x0A, 0xB0, 0x7A, 0x28, 0x20, 0x04, 0x16, + /* 0138 */ 0x27, 0x40, 0xE3, 0x38, 0x05, 0xD3, 0x99, 0x00, + /* 0140 */ 0x6D, 0x02, 0xBC, 0x09, 0x30, 0x27, 0xC0, 0x16, + /* 0148 */ 0x86, 0x80, 0x82, 0x9C, 0x59, 0x94, 0x20, 0x11, + /* 0150 */ 0x42, 0x31, 0x88, 0x0A, 0x05, 0x18, 0x43, 0x14, + /* 0158 */ 0xCA, 0x3B, 0x41, 0x8C, 0xCA, 0x20, 0x74, 0x82, + /* 0160 */ 0x08, 0x14, 0x3D, 0x78, 0x98, 0xD6, 0x40, 0x74, + /* 0168 */ 0x89, 0xF0, 0xC8, 0xB1, 0x47, 0x00, 0x9F, 0x19, + /* 0170 */ 0xCE, 0xE9, 0x04, 0x1F, 0x01, 0xDE, 0x16, 0x4C, + /* 0178 */ 0xE0, 0x79, 0xBF, 0x24, 0x1C, 0x6A, 0xD8, 0x03, + /* 0180 */ 0x8E, 0x1A, 0xE3, 0x28, 0x12, 0x58, 0xD0, 0x33, + /* 0188 */ 0x42, 0x16, 0x40, 0x14, 0x09, 0x1E, 0x75, 0x64, + /* 0190 */ 0xF0, 0xE1, 0xC0, 0x23, 0x3B, 0x72, 0xCF, 0xF0, + /* 0198 */ 0x04, 0x82, 0x1C, 0xC2, 0x11, 0x3C, 0x36, 0x3C, + /* 01A0 */ 0x15, 0x78, 0x0C, 0xEC, 0xBA, 0xE0, 0x73, 0x80, + /* 01A8 */ 0x8F, 0x09, 0x78, 0xD7, 0x80, 0x9A, 0xF3, 0xD3, + /* 01B0 */ 0x01, 0x9B, 0x72, 0x38, 0xCC, 0x70, 0x3D, 0xFD, + /* 01B8 */ 0x70, 0x27, 0x70, 0xD2, 0x06, 0x64, 0xB3, 0xF3, + /* 01C0 */ 0xE0, 0x70, 0xE3, 0x3C, 0x99, 0x23, 0x2B, 0x55, + /* 01C8 */ 0x80, 0xD9, 0x13, 0x82, 0x4E, 0x13, 0x3E, 0x73, + /* 01D0 */ 0xB0, 0xBB, 0xC0, 0xF9, 0xF4, 0x0C, 0x49, 0xE4, + /* 01D8 */ 0x0F, 0x02, 0x35, 0x32, 0x43, 0xFB, 0x2C, 0xF0, + /* 01E0 */ 0xEA, 0x61, 0xC8, 0x87, 0x85, 0xC3, 0x62, 0x62, + /* 01E8 */ 0xCF, 0x1E, 0x74, 0x3C, 0xE0, 0x3F, 0x25, 0x3C, + /* 01F0 */ 0x6C, 0x78, 0xFA, 0x9E, 0xAF, 0x09, 0xA2, 0x3D, + /* 01F8 */ 0x8F, 0x80, 0xE1, 0xFF, 0x7F, 0x1E, 0x81, 0x39, + /* 0200 */ 0x9C, 0x07, 0x84, 0x27, 0x07, 0x76, 0x80, 0xC0, + /* 0208 */ 0x1C, 0x48, 0x80, 0xC9, 0xF9, 0x02, 0x77, 0x28, + /* 0210 */ 0xF0, 0x10, 0xF8, 0x00, 0x1E, 0x25, 0xCE, 0xD1, + /* 0218 */ 0x4A, 0x67, 0x86, 0x3C, 0xB9, 0x80, 0x2D, 0xFB, + /* 0220 */ 0x1B, 0x40, 0x07, 0x0F, 0xE7, 0x06, 0x91, 0x8D, + /* 0228 */ 0x57, 0x80, 0x09, 0x74, 0x38, 0xB1, 0x1E, 0x20, + /* 0230 */ 0x4D, 0x14, 0x0C, 0x04, 0xD3, 0xD3, 0x6B, 0x00, + /* 0238 */ 0x3E, 0x15, 0x38, 0x37, 0x89, 0x92, 0x0F, 0x8C, + /* 0240 */ 0xC2, 0x39, 0xEB, 0x79, 0x84, 0x82, 0x18, 0xD0, + /* 0248 */ 0x41, 0x20, 0xE4, 0xE4, 0xA0, 0x80, 0x3A, 0xAA, + /* 0250 */ 0xF8, 0x3C, 0x72, 0xAA, 0x0F, 0x3D, 0x9E, 0x94, + /* 0258 */ 0x47, 0xE1, 0xAB, 0x8A, 0x0F, 0x21, 0x3E, 0x4F, + /* 0260 */ 0x78, 0xF4, 0x3E, 0x29, 0xF0, 0xEF, 0x8C, 0xAF, + /* 0268 */ 0x0E, 0x46, 0xB7, 0x9A, 0xE3, 0x0A, 0x0A, 0xCC, + /* 0270 */ 0x67, 0x11, 0x4E, 0x50, 0xD7, 0x6D, 0x01, 0xFA, + /* 0278 */ 0x29, 0xE0, 0x08, 0x3C, 0x94, 0x77, 0x92, 0xC7, + /* 0280 */ 0x90, 0x04, 0xF5, 0x9D, 0x16, 0x40, 0x01, 0xE4, + /* 0288 */ 0x9B, 0x81, 0x4F, 0x02, 0x21, 0xFE, 0xFF, 0x4F, + /* 0290 */ 0x07, 0x1E, 0xC3, 0xC3, 0x80, 0xD1, 0x8C, 0xCE, + /* 0298 */ 0xC3, 0x4F, 0x16, 0x15, 0x77, 0xB2, 0x14, 0xC4, + /* 02A0 */ 0x93, 0x75, 0x94, 0xC9, 0xA2, 0x67, 0xE2, 0xAB, + /* 02A8 */ 0x85, 0x27, 0x74, 0x4A, 0x41, 0xCE, 0xD1, 0x13, + /* 02B0 */ 0xF6, 0x55, 0x04, 0xD6, 0xF9, 0x20, 0xE4, 0x8B, + /* 02B8 */ 0x81, 0xA7, 0x61, 0x38, 0x4F, 0x96, 0xC3, 0x79, + /* 02C0 */ 0xB2, 0x7C, 0x2C, 0xBE, 0x6A, 0xC0, 0x1F, 0x2D, + /* 02C8 */ 0x96, 0xA0, 0xC0, 0xD9, 0x82, 0x1C, 0x1E, 0x13, + /* 02D0 */ 0x6F, 0x54, 0xF4, 0x46, 0xE4, 0xE1, 0xF1, 0xCB, + /* 02D8 */ 0x81, 0xE7, 0xF3, 0x8C, 0x70, 0x94, 0x6F, 0x12, + /* 02E0 */ 0x38, 0x8C, 0xC7, 0x12, 0x0F, 0xD1, 0x97, 0x23, + /* 02E8 */ 0x58, 0x13, 0x39, 0x69, 0xDF, 0x16, 0x4E, 0x36, + /* 02F0 */ 0xE8, 0x4B, 0x10, 0xBB, 0x1C, 0x01, 0xBF, 0x88, + /* 02F8 */ 0x26, 0x86, 0xC1, 0x22, 0x2D, 0x45, 0x11, 0x17, + /* 0300 */ 0x45, 0x61, 0x7C, 0xC5, 0x82, 0xFD, 0xFF, 0xBF, + /* 0308 */ 0x62, 0x01, 0x16, 0x04, 0x0F, 0x1B, 0x34, 0x87, + /* 0310 */ 0x83, 0x97, 0x1E, 0x36, 0x6B, 0x38, 0x07, 0x99, + /* 0318 */ 0xD3, 0xF1, 0x48, 0x4E, 0x1B, 0xC6, 0x1D, 0x0B, + /* 0320 */ 0xFE, 0x9D, 0xEA, 0xA9, 0xCA, 0xD3, 0x8A, 0xF2, + /* 0328 */ 0x64, 0xF5, 0x7A, 0xE5, 0x63, 0x96, 0xA1, 0xCE, + /* 0330 */ 0xE0, 0x1D, 0xCB, 0xB7, 0x3C, 0x4F, 0x21, 0x4A, + /* 0338 */ 0x9C, 0x97, 0x2D, 0x76, 0xC7, 0x32, 0x48, 0x50, + /* 0340 */ 0x23, 0x3F, 0x68, 0x31, 0x94, 0xE0, 0xF1, 0xDE, + /* 0348 */ 0xB1, 0x00, 0x6F, 0xFF, 0xFF, 0x3B, 0x16, 0x60, + /* 0350 */ 0xFC, 0x04, 0xC1, 0x09, 0x7C, 0xC7, 0x02, 0x1C, + /* 0358 */ 0xC5, 0x7E, 0x37, 0xE8, 0x4A, 0x45, 0xEE, 0x58, + /* 0360 */ 0x28, 0x0E, 0xAB, 0xB9, 0x63, 0x41, 0x9C, 0x28, + /* 0368 */ 0xE6, 0x8A, 0x05, 0x86, 0xFF, 0xFF, 0x15, 0x0B, + /* 0370 */ 0xE0, 0x75, 0xC0, 0x2B, 0x16, 0x68, 0xFE, 0xFF, + /* 0378 */ 0x57, 0x2C, 0xF0, 0x5E, 0x8E, 0x80, 0xDF, 0x09, + /* 0380 */ 0xD1, 0x77, 0x0D, 0x7E, 0x9A, 0xB6, 0xA2, 0xBB, + /* 0388 */ 0x06, 0x94, 0x19, 0xBE, 0x07, 0xF9, 0xB0, 0x13, + /* 0390 */ 0x2C, 0xD2, 0xA3, 0x8D, 0x6F, 0x49, 0xE1, 0x7C, + /* 0398 */ 0xDB, 0x00, 0xD8, 0xF2, 0xFF, 0xBF, 0x6D, 0x00, + /* 03A0 */ 0x4C, 0x19, 0xBF, 0x6F, 0x1B, 0xC0, 0x4F, 0xA1, + /* 03A8 */ 0x4D, 0x9F, 0x1A, 0x8D, 0x5A, 0x35, 0x28, 0x53, + /* 03B0 */ 0xA3, 0x4C, 0x83, 0x5A, 0x7D, 0x2A, 0x35, 0x66, + /* 03B8 */ 0x4C, 0xC9, 0xC1, 0xCE, 0x77, 0x0C, 0x2A, 0x6C, + /* 03C0 */ 0x65, 0x1A, 0x9A, 0x63, 0x81, 0xD0, 0x10, 0xC7, + /* 03C8 */ 0x26, 0x19, 0x01, 0x51, 0x22, 0x10, 0x01, 0x59, + /* 03D0 */ 0xFD, 0x6F, 0x42, 0x40, 0xCE, 0x02, 0x22, 0x20, + /* 03D8 */ 0x2B, 0x58, 0x9A, 0xC0, 0x9D, 0xFF, 0xD8, 0x28, + /* 03E0 */ 0x40, 0xA2, 0x02, 0x84, 0x29, 0x7D, 0x93, 0x09, + /* 03E8 */ 0xD4, 0xB2, 0x41, 0x04, 0xF4, 0xFF, 0x3F, 0x42, + /* 03F0 */ 0xD9, 0x00, 0x62, 0x82, 0x41, 0x04, 0x64, 0x91, + /* 03F8 */ 0x3E, 0x80, 0x98, 0x62, 0x10, 0x01, 0x59, 0xDD, + /* 0400 */ 0xA3, 0x40, 0x40, 0xD6, 0x0A, 0x22, 0x20, 0xFF, + /* 0408 */ 0xFF, 0x01 + }) + } + } + + Scope (\_SB.PCI0) + { + Name (RID, 0x00) + Scope (I2C0) + { + Device (NFC1) + { + Name (_ADR, 0x00) // _ADR: Address + Name (_HID, "NXP1001") // _HID: Hardware ID + Name (_DDN, "NXP NFC For Win10") // _DDN: DOS Device Name + Name (_UID, 0x01) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0029, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C0", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0x0000, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x006C + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0027 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0064 + } + }) + Return (RBUF) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LGreaterEqual (\OSYS, 0x07DF)) + { + If (LAnd (LEqual (\_SB.GGIV (0x02030016), 0x00), LEqual (\NFCF, 0x00))) + { + Return (0x0F) + } + } + + Return (0x00) + } + } + } + } + + Scope (\_SB.PCI0.SBUS) + { + Name (RID, 0x00) + Name (_S3D, 0x03) // _S3D: S3 Device State + OperationRegion (SMBP, PCI_Config, 0x50, 0x04) + Field (SMBP, DWordAcc, NoLock, Preserve) + { + , 5, + TCOB, 11, + Offset (0x04) + } + + Name (TCBV, 0x00) + Method (TCBS, 0, NotSerialized) + { + If (LEqual (TCBV, 0x00)) + { + Store (ShiftLeft (\_SB.PCI0.SBUS.TCOB, 0x05), TCBV) + } + + Return (TCBV) + } + + OperationRegion (TCBA, SystemIO, TCBS (), 0x10) + Field (TCBA, ByteAcc, NoLock, Preserve) + { + Offset (0x04), + , 9, + CPSC, 1 + } + } + + Scope (\_SB.PCI0.PEG0) + { + Name (RID, 0x00) + } + + Scope (\_SB.PCI0.GFX0) + { + Name (RID, 0x00) + } + + Scope (\_SB.PCI0.SAT0) + { + Name (RID, 0x00) + } + + Scope (\_SB.PCI0.LPCB) + { + Name (RID, 0x00) + Device (SIO) + { + Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (BUF, ResourceTemplate () + { + IO (Decode16, + 0x0010, // Range Minimum + 0x0010, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + IO (Decode16, + 0x0090, // Range Minimum + 0x0090, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + IO (Decode16, + 0x0024, // Range Minimum + 0x0024, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0028, // Range Minimum + 0x0028, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x002C, // Range Minimum + 0x002C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0030, // Range Minimum + 0x0030, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0034, // Range Minimum + 0x0034, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0038, // Range Minimum + 0x0038, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x003C, // Range Minimum + 0x003C, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A4, // Range Minimum + 0x00A4, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00A8, // Range Minimum + 0x00A8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00AC, // Range Minimum + 0x00AC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00B0, // Range Minimum + 0x00B0, // Range Maximum + 0x01, // Alignment + 0x06, // Length + ) + IO (Decode16, + 0x00B8, // Range Minimum + 0x00B8, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x00BC, // Range Minimum + 0x00BC, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + IO (Decode16, + 0x0050, // Range Minimum + 0x0050, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x0072, // Range Minimum + 0x0072, // Range Maximum + 0x01, // Alignment + 0x06, // Length + ) + IO (Decode16, + 0x1800, // Range Minimum + 0x1800, // Range Maximum + 0x01, // Alignment + 0xA0, // Length + ) + IO (Decode16, + 0x0800, // Range Minimum + 0x0800, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0880, // Range Minimum + 0x0880, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0900, // Range Minimum + 0x0900, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0980, // Range Minimum + 0x0980, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0A80, // Range Minimum + 0x0A80, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0B00, // Range Minimum + 0x0B00, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x0B80, // Range Minimum + 0x0B80, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x15E0, // Range Minimum + 0x15E0, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + IO (Decode16, + 0x1600, // Range Minimum + 0x1600, // Range Maximum + 0x01, // Alignment + 0x80, // Length + ) + IO (Decode16, + 0x1640, // Range Minimum + 0x1640, // Range Maximum + 0x01, // Alignment + 0x20, // Length + ) + Memory32Fixed (ReadWrite, + 0xF0000000, // Address Base + 0x08000000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED10000, // Address Base + 0x00004000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED18000, // Address Base + 0x00001000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED19000, // Address Base + 0x00001000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFEB00000, // Address Base + 0x00100000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0xFED20000, // Address Base + 0x00020000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0xFED90000, // Address Base + 0x00004000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00000000, // Address Length + _Y47) + }) + CreateDWordField (BUF, \_SB.PCI0.LPCB.SIO._CRS._Y47._BAS, SXB) // _BAS: Base Address + Store (\SXRB, SXB) + CreateDWordField (BUF, \_SB.PCI0.LPCB.SIO._CRS._Y47._LEN, SXL) // _LEN: Length + Store (\SXRS, SXL) + Return (BUF) + } + } + + OperationRegion (LPCS, PCI_Config, 0x00, 0x0100) + Field (LPCS, AnyAcc, NoLock, Preserve) + { + Offset (0x60), + PIRA, 8, + PIRB, 8, + PIRC, 8, + PIRD, 8, + SERQ, 8, + Offset (0x68), + PIRE, 8, + PIRF, 8, + PIRG, 8, + PIRH, 8, + Offset (0x80), + XU1A, 3, + , 1, + XU2A, 3, + Offset (0x81), + XPA, 2, + , 2, + XFA, 1, + Offset (0x82), + XU1E, 1, + XU2E, 1, + XPE, 1, + XFE, 1, + Offset (0x84), + XG1E, 1, + , 1, + XG1A, 14, + Offset (0x88), + XG2E, 1, + , 1, + XG2A, 14, + Offset (0xA0), + , 2, + CLKR, 1, + , 7, + EXPE, 1, + Offset (0xA2), + Offset (0xAC), + Offset (0xAD), + Offset (0xAE), + XUSB, 1, + Offset (0xB8), + GR00, 2, + , 10, + GR06, 2 + } + + OperationRegion (GDIO, SystemMemory, 0xFDAF04C0, 0x10) + Field (GDIO, DWordAcc, NoLock, Preserve) + { + , 30, + DOI0, 1, + Offset (0x04), + , 30, + DOI1, 1, + Offset (0x08), + , 30, + DOI2, 1, + Offset (0x0C), + , 30, + DOI3, 1 + } + + OperationRegion (LPIO, SystemIO, 0x0800, 0x0400) + Field (LPIO, DWordAcc, NoLock, Preserve) + { + Offset (0x180), + , 3, + XHPD, 1, + Offset (0x1B0), + , 31, + GLIS, 1, + Offset (0x308), + Offset (0x30C) + } + + OperationRegion (GNIO, SystemMemory, 0xFDAE0570, 0x04) + Field (GNIO, DWordAcc, NoLock, Preserve) + { + , 1, + NFCD, 1, + Offset (0x04) + } + + OperationRegion (PMIO, SystemIO, 0x1800, 0x0100) + Field (PMIO, AnyAcc, NoLock, Preserve) + { + Offset (0x2A), + , 6, + XHPE, 1, + Offset (0x42), + , 1, + SWGE, 1, + Offset (0x64), + , 9, + Offset (0x8C), + SCIS, 1, + , 6 + } + + OperationRegion (IMGA, SystemIO, 0x15E0, 0x10) + Field (IMGA, ByteAcc, NoLock, Preserve) + { + Offset (0x01), + Offset (0x02), + Offset (0x03), + WAKR, 16, + Offset (0x0C), + GAIX, 8, + Offset (0x0E), + GADT, 8, + Offset (0x10) + } + + IndexField (GAIX, GADT, ByteAcc, NoLock, Preserve) + { + Offset (0x60), + EPWG, 1, + , 1, + CSON, 1, + DSCI, 1, + DSCS, 1, + DLAN, 1, + Offset (0xC2), + GAID, 8 + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Mutex (MCPU, 0x00) + Method (_Q1F, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00020000)) + { + If (And (PKLI, 0x0C00)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1012) + } + } + + \UCMS (0x0E) + } + + Method (_Q16, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x40)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1007) + } + } + + Method (_Q1C, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x01000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1019) + } + } + + Method (_Q1D, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x02000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x101A) + } + } + + Method (_Q13, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1004) + } + Else + { + Notify (\_SB.SLPB, 0x80) + } + } + + Method (_Q66, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x10000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x101D) + } + } + + Method (_Q64, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x10)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1005) + } + } + + Method (_Q60, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00080000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1314) + } + } + + Method (_Q61, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00100000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1315) + } + } + + Method (_Q62, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00010000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1311) + } + } + + Method (_Q65, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x03, 0x00020000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1312) + } + } + + Method (_Q26, 0, NotSerialized) // _Qxx: EC Query + { + If (VIGD) + { + If (\WVIS) + { + \VBTD () + } + + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \UCMS (0x12) + } + + Sleep (0x01F4) + Notify (AC, 0x80) + Notify (\_TZ.THM0, 0x80) + If (\WXPF) + { + Acquire (MCPU, 0xFFFF) + } + + Store (0x01, PWRS) + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + } + + If (\WXPF) + { + Sleep (0x64) + } + + If (\OSC4) + { + \PNTF (0x81) + } + + If (\WXPF) + { + Release (MCPU) + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6040) + ATMC () + } + + Method (_Q27, 0, NotSerialized) // _Qxx: EC Query + { + If (VIGD) + { + If (\WVIS) + { + \VBTD () + } + + \_SB.PCI0.LPCB.EC.BRNS () + } + Else + { + \UCMS (0x12) + } + + Sleep (0x01F4) + Notify (AC, 0x80) + Notify (\_TZ.THM0, 0x80) + If (\WXPF) + { + Acquire (MCPU, 0xFFFF) + } + + Store (0x00, PWRS) + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + } + + If (\WXPF) + { + Sleep (0x64) + } + + If (\OSC4) + { + \PNTF (0x81) + } + + If (\WXPF) + { + Release (MCPU) + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6040) + ATMC () + } + + Method (_Q2A, 0, NotSerialized) // _Qxx: EC Query + { + ADBG ("LIDO") + \VCMS (0x01, \_SB.LID._LID ()) + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + If (LEqual (\ILNF, 0x00)) + { + If (\IOST) + { + If (LNot (\ISOC (0x00))) + { + Store (0x00, \IOST) + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60D0) + } + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x5002) + If (LEqual (\PLUX, 0x00)) + { + If (VIGD) + { + \_SB.PCI0.GFX0.VLOC (0x01) + } + + Notify (\_SB.LID, 0x80) + } + } + } + + Method (_Q2B, 0, NotSerialized) // _Qxx: EC Query + { + ADBG ("LIDC") + \UCMS (0x0D) + \_SB.PCI0.LPCB.EC.LED (0x00, 0x00) + \VCMS (0x01, \_SB.LID._LID ()) + If (LEqual (\ILNF, 0x00)) + { + If (LAnd (\IOEN, LNot (\IOST))) + { + If (LNot (\ISOC (0x01))) + { + Store (0x01, \IOST) + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60D0) + } + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x5001) + If (LEqual (\PLUX, 0x00)) + { + If (VIGD) + { + \_SB.PCI0.GFX0.VLOC (0x00) + } + + Notify (\_SB.LID, 0x80) + } + } + } + + Method (_Q3D, 0, NotSerialized) // _Qxx: EC Query + { + } + + Method (_Q48, 0, NotSerialized) // _Qxx: EC Query + { + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + Else + { + \STEP (0x04) + } + + Store (0x01, \_SB.PCI0.LPCB.EC.CALM) + } + } + + Method (_Q49, 0, NotSerialized) // _Qxx: EC Query + { + If (And (\_PR.CFGD, 0x01)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + Else + { + \STEP (0x05) + } + } + } + + Method (_Q7F, 0, NotSerialized) // _Qxx: EC Query + { + Fatal (0x01, 0x80010000, 0x00011DFB) + } + + Method (_Q46, 0, NotSerialized) // _Qxx: EC Query + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6012) + } + + Method (_Q3B, 0, NotSerialized) // _Qxx: EC Query + { + If (LEqual (\WLAC, 0x02)){} + ElseIf (LAnd (ELNK, LEqual (\WLAC, 0x01))) + { + Store (0x00, DCWL) + } + Else + { + Store (0x01, DCWL) + } + } + + Method (_Q4F, 0, NotSerialized) // _Qxx: EC Query + { + ADBG ("QUERY_METHOD_UCSI") + If (CondRefOf (\_SB.UBTC.NTFY)) + { + \_SB.UBTC.NTFY () + } + } + + Method (_Q2F, 0, NotSerialized) // _Qxx: EC Query + { + \_SB.PCI0.LPCB.EC.BFCC () + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q6A, 0, NotSerialized) // _Qxx: EC Query + { + If (HDMC) + { + Noop + } + ElseIf (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x04000000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x101B) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (MMTG, 0, NotSerialized) + { + Store (0x0101, Local0) + If (HDMC) + { + Or (Local0, 0x00010000, Local0) + } + + Return (Local0) + } + + Method (MMTS, 1, NotSerialized) + { + If (HDMC) + { + Noop + } + ElseIf (LEqual (Arg0, 0x02)) + { + \_SB.PCI0.LPCB.EC.LED (0x0E, 0x80) + } + ElseIf (LEqual (Arg0, 0x03)) + { + \_SB.PCI0.LPCB.EC.LED (0x0E, 0xC0) + } + Else + { + \_SB.PCI0.LPCB.EC.LED (0x0E, 0x00) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Field (ECOR, ByteAcc, NoLock, Preserve) + { + Offset (0xA0), + VIDA, 16, + PIDA, 16, + VIDB, 16, + PIDB, 16 + } + + Method (_Q45, 0, NotSerialized) // _Qxx: EC Query + { + Store (\_SB.PCI0.LPCB.EC.DKID (), Local0) + If (LNotEqual (Local0, 0x00)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x4010) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x4011) + } + } + + Method (DKID, 0, NotSerialized) + { + Acquire (BATM, 0xFFFF) + Store (0x00, Local0) + Store (0x59, HIID) + Store (VIDB, Local1) + Store (PIDB, Local2) + ADBG ("Dock ID Rear") + ADBG (Local1) + ADBG (Local2) + Store (VIDA, Local3) + Store (PIDA, Local4) + ADBG ("Dock ID Front") + ADBG (Local3) + ADBG (Local4) + If (LEqual (Local1, 0x17EF)) + { + If (LEqual (Local2, 0x306E)) + { + Store (0x01, Local0) + } + + If (LEqual (Local2, 0x306D)) + { + Store (0x02, Local0) + } + + If (LEqual (Local2, 0x306C)) + { + Store (0x03, Local0) + } + } + + If (LEqual (Local0, 0x00)) + { + If (LEqual (Local3, 0x17EF)) + { + If (LEqual (Local4, 0x306E)) + { + Store (0x01, Local0) + } + + If (LEqual (Local4, 0x306D)) + { + Store (0x02, Local0) + } + + If (LEqual (Local4, 0x306C)) + { + Store (0x03, Local0) + } + } + } + + Release (BATM) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GDKS, 0, NotSerialized) + { + Store (0x00, Local0) + Store (\_SB.PCI0.LPCB.EC.DKID (), Local1) + If (Local1) + { + Or (Local0, 0x01, Local0) + ShiftLeft (Local1, 0x08, Local1) + Or (Local0, Local1, Local0) + } + + Or (Local0, 0x000A0000, Local0) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q3F, 0, NotSerialized) // _Qxx: EC Query + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6000) + } + + Method (_Q74, 0, NotSerialized) // _Qxx: EC Query + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6060) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Name (BRTW, Package (0x12) + { + 0x64, + 0x64, + 0x05, + 0x0A, + 0x14, + 0x19, + 0x1E, + 0x23, + 0x28, + 0x2D, + 0x32, + 0x37, + 0x3C, + 0x41, + 0x46, + 0x50, + 0x5A, + 0x64 + }) + Name (BRTB, Package (0x08) + { + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x32, + 0x03, + 0x03, + 0x05, + 0x08, + 0x0A, + 0x0D, + 0x0F, + 0x12, + 0x19, + 0x22, + 0x2E, + 0x3E, + 0x54, + 0x6E, + 0x93, + 0xC1, + 0xFF, + 0x0587, + 0x0587, + 0x03, + 0x03 + }, + + Package (0x16) + { + 0x32, + 0x03, + 0x03, + 0x05, + 0x08, + 0x0A, + 0x0D, + 0x0F, + 0x12, + 0x19, + 0x22, + 0x2E, + 0x3E, + 0x54, + 0x6E, + 0x93, + 0xC1, + 0xFF, + 0x0587, + 0x0587, + 0x03, + 0x03 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + }, + + Package (0x16) + { + 0x1E, + 0x04, + 0x04, + 0x07, + 0x0B, + 0x11, + 0x17, + 0x1E, + 0x25, + 0x2C, + 0x37, + 0x42, + 0x4E, + 0x5C, + 0x6E, + 0x8A, + 0xB9, + 0xFF, + 0x0587, + 0x0587, + 0x04, + 0x04 + } + }) + Method (_Q14, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x8000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1010) + } + + If (\VIGD) + { + Notify (\_SB.PCI0.GFX0.DD1F, 0x86) + } + } + + Method (_Q15, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00010000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1011) + } + + If (\VIGD) + { + Notify (\_SB.PCI0.GFX0.DD1F, 0x87) + } + + Return (Zero) + } + + Method (BRNS, 0, NotSerialized) + { + Add (\BRLV, 0x02, Local0) + Store (\BNTN, Local3) + If (\_SB.PCI0.GFX0.DRDY) + { + Store (DerefOf (Index (DerefOf (Index (BRTB, Local3)), Local0)), Local2) + \_SB.PCI0.GFX0.AINT (0x01, Local2) + } + } + + Method (BFRQ, 0, NotSerialized) + { + Store (0x80000100, Local0) + Store (DerefOf (Index (DerefOf (Index (BRTB, \BNTN)), 0x13)), Local1) + Or (ShiftLeft (Local1, 0x09), Local0, Local0) + Store (DerefOf (Index (DerefOf (Index (BRTB, \BNTN)), 0x15)), Local1) + Or (Local1, Local0, Local0) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Name (BDEV, 0xFF) + Name (BSTS, 0x00) + Name (BHKE, 0x00) + Method (_Q2C, 0, NotSerialized) // _Qxx: EC Query + { + If (LEqual (BSTS, 0x00)) + { + Store (BGID (0x00), BDEV) + NBRE (BDEV) + } + } + + Method (_Q2D, 0, NotSerialized) // _Qxx: EC Query + { + Store (BGID (0x00), BDEV) + NBIN (BDEV) + } + + Method (_Q38, 0, NotSerialized) // _Qxx: EC Query + { + Store (BGID (0x00), Local0) + If (LEqual (Local0, 0x0F)) + { + BDIS () + \BHDP (0x01, 0x00) + NBEJ (BDEV) + Store (Local0, BDEV) + If (LEqual (\BIDE, 0x03)) + { + Store (0x00, \_SB.PCI0.SAT0.PRIM.GTME) + Store (0x00, \_SB.PCI0.SAT0.SCND.GTME) + } + } + ElseIf (HPBU){} + Else + { + Store (Local0, BDEV) + NBIN (Local0) + } + } + + Method (NBRE, 1, NotSerialized) + { + If (LLess (Arg0, 0x0C)) + { + If (LEqual (\BIDE, 0x03)) + { + Notify (\_SB.PCI0.SAT0.SCND.MSTR, 0x03) + } + Else + { + Notify (\_SB.PCI0.SAT0.PRT1, 0x03) + } + } + } + + Method (NBEJ, 1, NotSerialized) + { + If (LEqual (BSTS, 0x00)) + { + If (LLess (Arg0, 0x0C)) + { + If (LEqual (\BIDE, 0x03)) + { + Notify (\_SB.PCI0.SAT0.SCND.MSTR, 0x01) + } + Else + { + Notify (\_SB.PCI0.SAT0.PRT1, 0x01) + } + } + } + + BEEP (0x00) + Store (0x00, BSTS) + } + + Method (NBIN, 1, NotSerialized) + { + If (LLess (Arg0, 0x0C)) + { + BEN (0x01) + If (LEqual (\BIDE, 0x03)) + { + Notify (\_SB.PCI0.SAT0.SCND.MSTR, 0x01) + } + Else + { + Notify (\_SB.PCI0.SAT0.PRT1, 0x01) + } + } + + BEEP (0x00) + Store (0x00, BSTS) + } + + Method (BEJ0, 1, NotSerialized) + { + If (Arg0) + { + BDIS () + \BHDP (0x01, 0x00) + Store (0x01, BSTS) + If (BHKE) + { + Store (0x00, BHKE) + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x3003) + } + } + Else + { + Store (0x00, BSTS) + } + } + + Method (BEJ3, 1, NotSerialized) + { + If (Arg0) + { + BDIS () + Store (0x01, BSTS) + } + Else + { + Store (0x00, BSTS) + } + } + + Method (BPTS, 1, NotSerialized) + { + Store (0x01, HDBM) + If (LNotEqual (BSTS, 0x00)) + { + Store (0x0F, BDEV) + Store (0x00, BSTS) + } + + Store (0x00, BHKE) + BUWK (0x00) + } + + Method (BWAK, 1, NotSerialized) + { + BUWK (0x00) + Store (BGID (0x00), Local0) + If (LEqual (BSTS, 0x00)) + { + If (LNotEqual (Local0, BDEV)) + { + NBEJ (BDEV) + Store (Local0, BDEV) + NBIN (Local0) + } + ElseIf (LOr (\LFDC, LNotEqual (BDEV, 0x0D))) + { + If (LNotEqual (Local0, 0x0F)) + { + If (HPBU) + { + If (LLessEqual (Arg0, 0x02)){} + Else + { + NBRE (Local0) + } + } + } + } + } + + If (LLess (BDEV, 0x0C)) + { + \UBIS (0x00) + } + Else + { + \UBIS (0x01) + } + } + + Method (BDIS, 0, NotSerialized) + { + If (LNot (\_SB.PCI0.LPCB.CSON)) + { + If (LNot (\_SB.PCI0.LPCB.GLIS)) + { + \UBIS (0x01) + } + + Store (0x01, \_SB.PCI0.LPCB.CSON) + Store (0x0F, \IDET) + } + } + + Method (BPON, 1, NotSerialized) + { + If (\_SB.PCI0.LPCB.CSON) + { + Store (0x00, \_SB.PCI0.LPCB.CSON) + If (\_SB.PCI0.LPCB.GLIS) + { + \UBIS (0x00) + } + } + } + + Method (BEN, 1, NotSerialized) + { + If (\_SB.PCI0.LPCB.CSON) + { + BPON (Arg0) + If (Arg0) + { + IRDY () + } + } + } + + Method (BSTA, 1, NotSerialized) + { + If (\_SB.PCI0.LPCB.CSON) + { + Return (0x00) + } + + BINI () + If (LEqual (Arg0, 0x01)) + { + Return (LLess (BDEV, 0x0C)) + } + + Return (0x00) + } + + Method (BUWK, 1, NotSerialized) + { + If (\H8DR) + { + If (Arg0) + { + Store (0x01, \_SB.PCI0.LPCB.EC.HWBU) + } + Else + { + Store (0x00, \_SB.PCI0.LPCB.EC.HWBU) + } + } + ElseIf (Arg0) + { + \MBEC (0x32, 0xFF, 0x80) + } + Else + { + \MBEC (0x32, 0x7F, 0x00) + } + } + + Method (BINI, 0, NotSerialized) + { + If (LEqual (BDEV, 0xFF)) + { + Store (BGID (0x00), BDEV) + } + } + + Method (BGID, 1, NotSerialized) + { + If (Arg0) + { + Store (0xFF, Local0) + } + Else + { + If (\H8DR) + { + Store (HPBU, Local1) + Store (HBID, Local2) + } + Else + { + Store (RBEC (0x47), Local2) + And (Local2, 0x01, Local1) + And (Local2, 0x04, Local2) + ShiftRight (Local2, 0x02, Local2) + } + + If (Local2) + { + Store (0x0F, Local0) + } + ElseIf (HDUB) + { + Store (0x0F, Local0) + } + ElseIf (LOr (LEqual (\IDET, 0x03), LEqual (\IDET, 0x06))) + { + Store (\IDET, Local0) + } + Else + { + Store (0x07, Local0) + } + + If (LEqual (Local0, 0x0F)){} + } + + If (LAnd (\HDUB, LLess (Local0, 0x0C))) + { + Store (0x0F, Local0) + } + + Return (Local0) + } + + Method (IRDY, 0, NotSerialized) + { + Store (0x01F4, Local0) + Store (0x3C, Local1) + Store (Zero, Local2) + While (Local1) + { + Sleep (Local0) + Store (\BCHK (), Local3) + If (LNot (Local3)) + { + Break + } + + If (LEqual (Local3, 0x02)) + { + Store (One, Local2) + Break + } + + Decrement (Local1) + } + + Return (Local2) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q43, 0, NotSerialized) // _Qxx: EC Query + { + \UCMS (0x18) + } + + Method (SAUM, 1, NotSerialized) + { + If (LGreater (Arg0, 0x03)) + { + Noop + } + ElseIf (\H8DR) + { + Store (Arg0, HAUM) + } + Else + { + \MBEC (0x03, 0x9F, ShiftLeft (Arg0, 0x05)) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GSMS, 1, NotSerialized) + { + Return (\AUDC (0x00, 0x00)) + } + + Method (SSMS, 1, NotSerialized) + { + Return (\AUDC (0x01, And (Arg0, 0x01))) + } + + Method (SHDA, 1, NotSerialized) + { + Store (Arg0, Local0) + If (LAnd (LGreaterEqual (OSYS, 0x07DF), LEqual (Local0, 0x01))) + { + Store (0x02, Local0) + } + + Return (\AUDC (0x02, And (Local0, 0x03))) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q19, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00800000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1018) + } + + \UCMS (0x03) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q63, 0, NotSerialized) // _Qxx: EC Query + { + If (\_SB.PCI0.LPCB.EC.HKEY.MHKK (0x01, 0x00080000)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x1014) + } + + \UCMS (0x0B) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q70, 0, NotSerialized) // _Qxx: EC Query + { + FNST () + } + + Method (_Q72, 0, NotSerialized) // _Qxx: EC Query + { + FNST () + } + + Method (_Q73, 0, NotSerialized) // _Qxx: EC Query + { + FNST () + } + + Method (FNST, 0, NotSerialized) + { + If (\H8DR) + { + Store (HFNS, Local0) + Store (HFNE, Local1) + } + Else + { + And (\RBEC (0x0E), 0x03, Local0) + And (\RBEC (0x00), 0x08, Local1) + } + + If (Local1) + { + If (LEqual (Local0, 0x00)) + { + \UCMS (0x11) + } + + If (LEqual (Local0, 0x01)) + { + \UCMS (0x0F) + } + + If (LEqual (Local0, 0x02)) + { + \UCMS (0x10) + } + + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6005) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GHSL, 1, NotSerialized) + { + Return (\FNSC (0x00, 0x00)) + } + + Method (SHSL, 1, NotSerialized) + { + Return (\FNSC (0x01, And (Arg0, 0x00010001))) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Name (INDV, 0x00) + Method (MHQI, 0, NotSerialized) + { + If (And (\IPMS, 0x01)) + { + Or (INDV, 0x01, INDV) + } + + If (And (\IPMS, 0x02)) + { + Or (INDV, 0x02, INDV) + } + + If (And (\IPMS, 0x04)) + { + Or (INDV, 0x0100, INDV) + } + + If (And (\IPMS, 0x08)) + { + Or (INDV, 0x0200, INDV) + } + + If (And (\IPMS, 0x10)) + { + Or (INDV, 0x04, INDV) + } + + Return (INDV) + } + + Method (MHGI, 1, NotSerialized) + { + Name (RETB, Buffer (0x10){}) + CreateByteField (RETB, 0x00, MHGS) + ShiftLeft (0x01, Arg0, Local0) + If (And (INDV, Local0)) + { + If (LEqual (Arg0, 0x00)) + { + CreateField (RETB, 0x08, 0x78, BRBU) + Store (\IPMB, BRBU) + Store (0x10, MHGS) + } + ElseIf (LEqual (Arg0, 0x01)) + { + CreateField (RETB, 0x08, 0x18, RRBU) + Store (\IPMR, RRBU) + Store (0x04, MHGS) + } + ElseIf (LEqual (Arg0, 0x08)) + { + CreateField (RETB, 0x10, 0x18, ODBU) + CreateByteField (RETB, 0x01, MHGZ) + Store (\IPMO, ODBU) + If (LAnd (LEqual (^^BSTS, 0x00), LEqual (^^BDEV, 0x03))) + { + Or (0x01, MHGZ, MHGZ) + Or (0x02, MHGZ, MHGZ) + } + + Store (0x05, MHGS) + } + ElseIf (LEqual (Arg0, 0x09)) + { + CreateField (RETB, 0x10, 0x08, AUBU) + Store (\IPMA, AUBU) + Store (0x01, Index (RETB, 0x01)) + Store (0x03, MHGS) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Store (\VDYN (0x00, 0x00), Local1) + And (Local1, 0x0F, Index (RETB, 0x02)) + ShiftRight (Local1, 0x04, Local1) + And (Local1, 0x0F, Index (RETB, 0x01)) + Store (0x03, MHGS) + } + } + + Return (RETB) + } + + Method (MHSI, 2, NotSerialized) + { + ShiftLeft (0x01, Arg0, Local0) + If (And (INDV, Local0)) + { + If (LEqual (Arg0, 0x08)) + { + If (Arg1) + { + If (\H8DR) + { + Store (^^HPBU, Local1) + } + Else + { + And (\RBEC (0x47), 0x01, Local1) + } + + If (LNot (Local1)) + { + Store (^^BGID (0x00), ^^BDEV) + ^^NBIN (Local1) + } + } + } + ElseIf (LEqual (Arg0, 0x02)) + { + \VDYN (0x01, Arg1) + } + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (PWMC, 0, NotSerialized) + { + Return (0x00) + } + + Method (PWMG, 0, NotSerialized) + { + Store (\_SB.PCI0.LPCB.EC.PWMH, Local0) + ShiftLeft (Local0, 0x08, Local0) + Or (Local0, \_SB.PCI0.LPCB.EC.PWML, Local0) + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Name (WGFL, 0x00) + Method (WSIF, 0, NotSerialized) + { + Return (0x00) + } + + Method (WLSW, 0, NotSerialized) + { + Return (0x10010001) + } + + Method (GWAN, 0, NotSerialized) + { + Store (0x00, Local0) + If (And (WGFL, 0x01)) + { + Or (Local0, 0x01, Local0) + } + + If (And (WGFL, 0x08)) + { + Return (Local0) + } + + If (WPWS ()) + { + Or (Local0, 0x02, Local0) + } + + Or (Local0, 0x04, Local0) + Return (Local0) + } + + Method (SWAN, 1, NotSerialized) + { + If (And (Arg0, 0x02)) + { + WPWC (0x01) + } + Else + { + WPWC (0x00) + } + } + + Method (GBDC, 0, NotSerialized) + { + Store (0x00, Local0) + If (And (WGFL, 0x10)) + { + Or (Local0, 0x01, Local0) + } + + If (And (WGFL, 0x80)) + { + Return (Local0) + } + + If (BPWS ()) + { + Or (Local0, 0x02, Local0) + } + + Or (Local0, 0x04, Local0) + Return (Local0) + } + + Method (SBDC, 1, NotSerialized) + { + If (And (Arg0, 0x02)) + { + BPWC (0x01) + } + Else + { + BPWC (0x00) + } + } + + Method (WPWS, 0, NotSerialized) + { + If (LEqual (\_SB.GGOV (0x02040007), 0x00)) + { + Store (0x00, Local0) + } + Else + { + Store (0x01, Local0) + } + + Return (Local0) + } + + Method (WPWC, 1, NotSerialized) + { + If (LAnd (Arg0, LAnd (And (WGFL, 0x01), LNot (And (WGFL, 0x08))))) + { + \_SB.SGOV (0x02040007, 0x01) + Or (WGFL, 0x02, WGFL) + } + Else + { + \_SB.SGOV (0x02040007, 0x00) + And (WGFL, Not (0x02), WGFL) + } + } + + Method (BPWS, 0, NotSerialized) + { + If (LEqual (\_SB.GGOV (0x02040000), 0x01)) + { + Store (0x01, Local0) + } + Else + { + Store (0x00, Local0) + } + + Return (Local0) + } + + Method (BPWC, 1, NotSerialized) + { + If (LAnd (Arg0, LAnd (And (WGFL, 0x10), LNot (And (WGFL, 0x80))))) + { + \_SB.SGOV (0x02040000, 0x01) + Or (WGFL, 0x20, WGFL) + } + Else + { + \_SB.SGOV (0x02040000, 0x00) + And (WGFL, Not (0x20), WGFL) + } + } + + Method (WGIN, 0, NotSerialized) + { + Store (0x00, WGFL) + Store (\WGSV (0x01), WGFL) + If (\WIN8) + { + If (LAnd (WGFL, 0x10)) + { + BPWC (0x01) + } + } + + If (WPWS ()) + { + Or (WGFL, 0x02, WGFL) + } + + If (BPWS ()) + { + Or (WGFL, 0x20, WGFL) + } + } + + Method (WGPS, 1, NotSerialized) + { + If (LGreaterEqual (Arg0, 0x04)) + { + \BLTH (0x05) + } + } + + Method (WGWK, 1, NotSerialized) + { + Noop + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q41, 0, NotSerialized) // _Qxx: EC Query + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x7000) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Mutex (BFWM, 0x00) + Method (MHCF, 1, NotSerialized) + { + Store (\BFWC (Arg0), Local0) + Store (ShiftRight (Arg0, 0x05), \_SB.PCI0.LPCB.EC.BSWR) + Return (Local0) + } + + Method (MHPF, 1, NotSerialized) + { + Name (RETB, Buffer (0x25){}) + Acquire (BFWM, 0xFFFF) + If (LLessEqual (SizeOf (Arg0), 0x25)) + { + Store (Arg0, \BFWB) + If (\BFWP ()) + { + \_SB.PCI0.LPCB.EC.CHKS () + \BFWL () + } + + Store (\BFWB, RETB) + } + + Release (BFWM) + Return (RETB) + } + + Method (MHIF, 1, NotSerialized) + { + Name (RETB, Buffer (0x0A){}) + Acquire (BFWM, 0xFFFF) + \BFWG (Arg0) + Store (\BFWB, RETB) + Release (BFWM) + Return (RETB) + } + + Method (MHDM, 1, NotSerialized) + { + \BDMC (Arg0) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (PSSG, 1, NotSerialized) + { + Return (\PSIF (0x00, 0x00)) + } + + Method (PSSS, 1, NotSerialized) + { + Return (\PSIF (0x01, Arg0)) + } + + Method (PSBS, 1, NotSerialized) + { + Return (\PSIF (0x02, Arg0)) + } + + Method (BICG, 1, NotSerialized) + { + Return (\PSIF (0x03, Arg0)) + } + + Method (BICS, 1, NotSerialized) + { + Return (\PSIF (0x04, Arg0)) + } + + Method (BCTG, 1, NotSerialized) + { + Return (\PSIF (0x05, Arg0)) + } + + Method (BCCS, 1, NotSerialized) + { + Return (\PSIF (0x06, Arg0)) + } + + Method (BCSG, 1, NotSerialized) + { + Return (\PSIF (0x07, Arg0)) + } + + Method (BCSS, 1, NotSerialized) + { + Return (\PSIF (0x08, Arg0)) + } + + Method (BDSG, 1, NotSerialized) + { + Return (\PSIF (0x09, Arg0)) + } + + Method (BDSS, 1, NotSerialized) + { + Return (\PSIF (0x0A, Arg0)) + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GILN, 0, NotSerialized) + { + Return (Or (0x02, \ILNF)) + } + + Method (SILN, 1, NotSerialized) + { + If (LEqual (0x01, Arg0)) + { + Store (0x01, \ILNF) + Store (0x00, BBLS) + Return (0x00) + } + ElseIf (LEqual (0x02, Arg0)) + { + Store (0x00, \ILNF) + Store (0x01, BBLS) + Return (0x00) + } + Else + { + Return (0x01) + } + } + + Method (GLSI, 0, NotSerialized) + { + If (\H8DR) + { + Return (Add (0x02, \_SB.PCI0.LPCB.EC.HPLD)) + } + ElseIf (And (\RBEC (0x46), 0x04)) + { + Return (0x03) + } + Else + { + Return (0x02) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GDLN, 0, NotSerialized) + { + Return (Or (0x02, \PLUX)) + } + + Method (SDLN, 1, NotSerialized) + { + If (LEqual (0x01, Arg0)) + { + Store (0x01, \PLUX) + Return (0x00) + } + ElseIf (LEqual (0x02, Arg0)) + { + Store (0x00, \PLUX) + Return (0x00) + } + Else + { + Return (0x01) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q4E, 0, NotSerialized) // _Qxx: EC Query + { + If (\H8DR) + { + Store (PSST, Local0) + If (PSST) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B0) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B1) + } + } + ElseIf (And (\RBEC (0x46), 0x40)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B0) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x60B1) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (GPSS, 0, NotSerialized) + { + If (\H8DR) + { + Store (PSST, Local1) + } + ElseIf (And (\RBEC (0x46), 0x40)) + { + Store (0x01, Local1) + } + Else + { + Store (0x00, Local1) + } + + If (LEqual (\_SB.GGIV (0x02050015), 0x00)) + { + Store (0x01, Local0) + } + Else + { + Store (0x00, Local0) + } + + Or (ShiftLeft (Local1, 0x01), Local0, Local0) + And (Local0, 0x03, Local0) + Return (Local0) + } + } + } + + Name (WOTF, 0x00) + Scope (\_SB.PCI0.LPCB.EC.HKEY) + { + Method (MHQT, 1, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + If (LEqual (Arg0, 0x00)) + { + Store (\TATC, Local0) + Return (Local0) + } + ElseIf (LEqual (Arg0, 0x01)) + { + Store (\TDFA, Local0) + Add (Local0, ShiftLeft (\TDTA, 0x04), Local0) + Add (Local0, ShiftLeft (\TDFD, 0x08), Local0) + Add (Local0, ShiftLeft (\TDTD, 0x0C), Local0) + Add (Local0, ShiftLeft (\TNFT, 0x10), Local0) + Add (Local0, ShiftLeft (\TNTT, 0x14), Local0) + Return (Local0) + } + ElseIf (LEqual (Arg0, 0x02)) + { + Store (\TCFA, Local0) + Add (Local0, ShiftLeft (\TCTA, 0x04), Local0) + Add (Local0, ShiftLeft (\TCFD, 0x08), Local0) + Add (Local0, ShiftLeft (\TCTD, 0x0C), Local0) + Return (Local0) + } + ElseIf (LEqual (Arg0, 0x03)){} + ElseIf (LEqual (Arg0, 0x04)) + { + Store (\TATW, Local0) + Return (Local0) + } + Else + { + Noop + } + } + + Return (0x00) + } + + Method (MHAT, 1, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + Store (And (Arg0, 0xFF), Local0) + If (LNot (ATMV (Local0))) + { + Return (0x00) + } + + Store (And (ShiftRight (Arg0, 0x08), 0xFF), Local0) + If (LNot (ATMV (Local0))) + { + Return (0x00) + } + + Store (And (Arg0, 0x0F), \TCFA) + Store (And (ShiftRight (Arg0, 0x04), 0x0F), \TCTA) + Store (And (ShiftRight (Arg0, 0x08), 0x0F), \TCFD) + Store (And (ShiftRight (Arg0, 0x0C), 0x0F), \TCTD) + ATMC () + If (And (\_PR.CFGD, 0x0100)) + { + Store (\FTPS, Local1) + If (And (Arg0, 0x00010000)) + { + If (\_PR.CLVL) + { + Store (\CTPR, \FTPS) + Increment (\FTPS) + } + Else + { + Store (0x01, \FTPS) + } + } + ElseIf (\_PR.CLVL) + { + Store (\CTPR, \FTPS) + } + Else + { + Store (0x00, \FTPS) + } + + If (XOr (\FTPS, Local1)) + { + If (LOr (\OSPX, \CPPX)) + { + \PNTF (0x80) + } + } + } + + Store (\SCRM, Local2) + If (And (Arg0, 0x00040000)) + { + Store (0x01, \SCRM) + Store (0x07, \_SB.PCI0.LPCB.EC.HFSP) + } + Else + { + Store (0x00, \SCRM) + Store (0x80, \_SB.PCI0.LPCB.EC.HFSP) + } + + Store (\ETAU, Local3) + If (And (Arg0, 0x00020000)) + { + Store (0x01, \ETAU) + } + Else + { + Store (0x00, \ETAU) + } + + Return (0x01) + } + + Return (0x00) + } + + Method (MHGT, 1, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + Store (0x01000000, Local0) + If (And (\_PR.CFGD, 0x0100)) + { + Or (Local0, 0x08000000, Local0) + } + + If (\SCRM) + { + Or (Local0, 0x10000000, Local0) + } + + If (\ETAU) + { + Or (Local0, 0x04000000, Local0) + } + + If (LLess (\CTPR, \FTPS)) + { + Or (Local0, 0x02000000, Local0) + } + + Add (Local0, ShiftLeft (\TSFT, 0x10), Local0) + Add (Local0, ShiftLeft (\TSTT, 0x14), Local0) + Store (And (Arg0, 0xFF), Local1) + If (LNot (ATMV (Local1))) + { + Or (Local0, 0xFFFF, Local0) + Return (Local0) + } + + Store (And (Arg0, 0x0F), Local1) + If (LEqual (Local1, 0x00)) + { + Add (Local0, \TIF0, Local0) + } + ElseIf (LEqual (Local1, 0x01)) + { + Add (Local0, \TIF1, Local0) + } + ElseIf (LEqual (Local1, 0x02)) + { + Add (Local0, \TIF2, Local0) + } + Else + { + Add (Local0, 0xFF, Local0) + } + + Store (And (ShiftRight (Arg0, 0x04), 0x0F), Local1) + If (LEqual (Local1, 0x00)) + { + Add (Local0, ShiftLeft (\TIT0, 0x08), Local0) + } + ElseIf (LEqual (Local1, 0x01)) + { + Add (Local0, ShiftLeft (\TIT1, 0x08), Local0) + } + ElseIf (LEqual (Local1, 0x02)) + { + Add (Local0, ShiftLeft (\TIT2, 0x08), Local0) + } + Else + { + Add (Local0, ShiftLeft (0xFF, 0x08), Local0) + } + + Return (Local0) + } + + Return (0x00) + } + + Method (ATMV, 1, NotSerialized) + { + Store (And (Arg0, 0x0F), Local1) + Store (\TNFT, Local0) + If (LGreaterEqual (Local1, Local0)) + { + Return (0x00) + } + + Store (And (ShiftRight (Arg0, 0x04), 0x0F), Local2) + Store (\TNTT, Local0) + If (LGreaterEqual (Local2, Local0)) + { + Return (0x00) + } + + If (\TATL) + { + If (XOr (Local1, Local2)) + { + Return (0x00) + } + } + + Return (0x01) + } + + Method (MHCT, 1, NotSerialized) + { + Store (0x00, Local0) + If (\SPEN) + { + Store (\LWST, Local0) + Increment (Local0) + ShiftLeft (Local0, 0x08, Local0) + } + + Store (0x08, Local1) + ShiftLeft (Local1, 0x08, Local1) + If (LEqual (Arg0, 0xFFFFFFFF)) + { + Or (Local1, \TPCR, Local1) + If (\SPEN) + { + Or (Local0, \PPCR, Local0) + If (LNot (LAnd (\_PR.CFGD, 0x02000000))) + { + Or (Local1, 0x80, Local1) + } + + If (LNot (LAnd (\_PR.CFGD, 0x08000000))) + { + Or (Local1, 0x40, Local1) + } + } + Else + { + Or (Local1, 0xC0, Local1) + } + } + Else + { + If (LAnd (LOr (\OSPX, \CPPX), \SPEN)) + { + And (Arg0, 0x00FF0000, Local2) + ShiftRight (Local2, 0x10, Local2) + Or (Local0, Local2, Local0) + If (XOr (Local2, \PPCR)) + { + Store (Local2, \PPCA) + \PNTF (0x80) + } + } + + If (\WVIS) + { + And (Arg0, 0x1F, Local2) + Or (Local1, Local2, Local1) + If (XOr (Local2, \TPCR)) + { + Store (Local2, \TPCA) + \PNTF (0x82) + } + } + } + + ShiftLeft (Local0, 0x10, Local0) + Or (Local0, Local1, Local0) + Return (Local0) + } + + Method (DYTC, 1, Serialized) + { + Store (Arg0, Local0) + Store (0x00, Local1) + ADBG (Concatenate ("DYTC STT=", ToHexString (Local0))) + If (LAnd (\WNTF, \TATC)) + { + Switch (ToInteger (And (Local0, 0x01FF))) + { + Case (0x00) + { + Store (ShiftLeft (0x01, 0x08), Local1) + Or (Local1, ShiftLeft (0x04, 0x1C), Local1) + Or (Local1, ShiftLeft (0x02, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x01) + { + And (ShiftRight (Local0, 0x0C), 0x0F, Local2) + And (ShiftRight (Local0, 0x10), 0x0F, Local3) + And (ShiftRight (Local0, 0x14), 0x01, Local4) + ADBG ("DYTC_CMD_SET") + ADBG (Concatenate ("ICFunc=", ToHexString (Local2))) + ADBG (Concatenate ("ICMode=", ToHexString (Local3))) + ADBG (Concatenate ("ValidF=", ToHexString (Local4))) + If (LNot (CondRefOf (\_SB.IETM.DPTE))) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + Store (0x01, WOTF) + } + } + ElseIf (LEqual (\_SB.IETM.DPTE, 0x00)) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + Store (0x01, WOTF) + } + } + + If (WOTF) + { + ADBG ("WOTF") + } + + Switch (Local2) + { + Case (0x01) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VCQL) + } + Else + { + Store (0x01, \VCQL) + } + } + Case (0x04) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VSTP) + } + Else + { + Store (0x01, \VSTP) + } + } + Case (0x08) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VDMC) + } + Else + { + Store (0x01, \VDMC) + } + } + Case (0x0A) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VIFC) + } + Else + { + Store (0x01, \VIFC) + } + } + Case (0x0B) + { + Switch (Local3) + { + Case (0x01) + { + If (LNotEqual (Local4, 0x01)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Case (0x02) + { + If (LNotEqual (Local4, 0x01)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Case (0x0F) + { + If (LNotEqual (Local4, 0x00)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Default + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VMMC) + Store (0x00, \SMMC) + } + Else + { + Store (0x01, \VMMC) + Store (Local3, \SMMC) + } + } + Case (0x0C) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VMSC) + } + Else + { + Store (0x01, \VMSC) + } + } + Case (0x0D) + { + If (LAnd (LLessEqual (Local3, 0x08), LGreaterEqual (Local3, 0x01))) + { + If (LNotEqual (Local4, 0x01)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LAnd (LNotEqual (Local3, 0x02), LAnd (LNotEqual (Local3, 0x07), LNotEqual (Local3, 0x08)))) + { + ADBG ("PSC InValid Mode, Clear the PSC State.") + Store (0x00, Local4) + } + } + ElseIf (LEqual (Local3, 0x0F)) + { + If (LNotEqual (Local4, 0x00)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Else + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + If (LEqual (Local4, 0x00)) + { + Store (0x00, \VPSC) + Store (0x00, \SPSC) + } + Else + { + Store (0x01, \VPSC) + Store (Local3, \SPSC) + } + } + Case (0x00) + { + If (LNotEqual (Local3, 0x0F)) + { + ShiftLeft (0x05, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + } + Default + { + ADBG ("UND IC Func") + ShiftLeft (0x01, 0x01, Local1) + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + } + + ADBG (" Set ODM Variable") + If (CondRefOf (\_SB.IETM.DPTE)) + { + If (And (\_SB.IETM.DPTE, 0x01)) + { + Store (\STDV, \ODV0) + Store (\VCQL, \ODV1) + Store (\VTIO, \ODV2) + If (LAnd (LEqual (\VMYH, 0x01), LEqual (\SMYH, 0x00))) + { + Store (0x01, \ODV3) + } + Else + { + Store (0x00, \ODV3) + } + + If (LAnd (LEqual (\VMYH, 0x01), LEqual (\SMYH, 0x01))) + { + Store (0x01, \ODV4) + } + Else + { + Store (0x00, \ODV4) + } + + If (LAnd (LEqual (\VMYH, 0x01), LEqual (\SMYH, 0x02))) + { + Store (0x01, \ODV5) + } + Else + { + Store (0x00, \ODV5) + } + + Store (\VSTP, \ODV6) + Store (\VCQH, \ODV7) + Store (\VDCC, \ODV8) + Store (\VSFN, \ODV9) + Store (\VDMC, \ODVA) + Store (\VFHP, \ODVB) + Store (\VIFC, \ODVC) + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x00))) + { + Store (0x01, \ODVD) + } + Else + { + Store (0x00, \ODVD) + } + + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x01))) + { + Store (0x01, \ODVE) + } + Else + { + Store (0x00, \ODVE) + } + + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x02))) + { + Store (0x01, \ODVF) + } + Else + { + Store (0x00, \ODVF) + } + + If (LAnd (LEqual (\VMMC, 0x01), LEqual (\SMMC, 0x03))) + { + Store (0x01, \ODVH) + } + Else + { + Store (0x00, \ODVH) + } + + Store (\VMSC, \ODVG) + If (LEqual (\VPSC, 0x01)) + { + Store (\SPSC, \ODVI) + } + Else + { + Store (0x00, \ODVI) + } + + Store (\VCSC, \ODVJ) + Notify (\_SB.IETM, 0x88) + } + } + + If (LEqual (\VSTP, 0x01)) + { + Store (0x04, \CICF) + If (LNot (CondRefOf (\_SB.IETM.DPTE))) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTP) + } + } + ElseIf (LEqual (\_SB.IETM.DPTE, 0x00)) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTP) + } + } + + \FLPF (0x0D) + } + ElseIf (LEqual (\VCSC, 0x01)) + { + Store (0x0E, \CICF) + \FLPF (0x01) + } + ElseIf (LEqual (\VFHP, 0x01)) + { + Store (0x09, \CICF) + \FLPF (0x04) + } + ElseIf (LEqual (\VPSC, 0x01)) + { + Store (0x0D, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("PSC") + ADBG (SPSC) + If (LOr (LEqual (\SPSC, 0x08), LEqual (\SPSC, 0x07))) + { + ADBG ("7_8") + \_SB.PCI0.PL1S (0x78) + } + ElseIf (LEqual (\SPSC, 0x02)) + { + ADBG ("2") + \_SB.PCI0.PL1S (0x60) + } + + \FLPF (0x00) + } + } + ElseIf (LEqual (\VMMC, 0x01)) + { + Store (0x0B, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("MMC") + If (LEqual (\SMMC, 0x01)) + { + ADBG ("COL") + \_SB.PCI0.PL1S (0x60) + } + ElseIf (LEqual (\SMMC, 0x02)) + { + ADBG ("PFM") + \_SB.PCI0.PL1S (0x78) + } + + \FLPF (0x00) + } + } + ElseIf (LEqual (\VMSC, 0x01)) + { + Store (0x0C, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("MSC") + \_SB.PCI0.PL1S (\DMSC) + \FLPF (0x00) + } + } + ElseIf (LEqual (\VIFC, 0x01)) + { + Store (0x0A, \CICF) + \FLPF (0x0C) + If (WOTF) + { + ADBG ("IFC") + \_SB.PCI0.PL1S (\DIFC) + \FLPF (0x0C) + } + } + ElseIf (LEqual (\VDMC, 0x01)) + { + Store (0x08, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("DMC") + \_SB.PCI0.PL1S (\DDMC) + \FLPF (0x00) + } + } + ElseIf (LEqual (\VCQL, 0x01)) + { + Store (0x01, \CICF) + \FLPF (0x01) + If (WOTF) + { + ADBG ("CQL") + \_SB.PCI0.PL1S (\DCQL) + \FLPF (0x00) + } + } + Else + { + ADBG ("Lowest IC Func") + Store (0x00, \CICF) + If (LNot (CondRefOf (\_SB.IETM.DPTE))) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTD) + ADBG ("W/O DYTC") + \FLPF (0x00) + } + } + ElseIf (LEqual (\_SB.IETM.DPTE, 0x00)) + { + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTD) + ADBG ("W/O DYTC") + \FLPF (0x00) + } + } + Else + { + ADBG ("DEF IC CONF") + \FLPF (0x01) + } + } + + If (WOTF) + { + Store (0x00, WOTF) + } + + Store (\VSTD, Local5) + Or (ShiftLeft (\VCQL, 0x01), Local5, Local5) + Or (ShiftLeft (\VTIO, 0x02), Local5, Local5) + Or (ShiftLeft (\VMYH, 0x03), Local5, Local5) + Or (ShiftLeft (\VSTP, 0x04), Local5, Local5) + Or (ShiftLeft (\VCQH, 0x05), Local5, Local5) + Or (ShiftLeft (\VDCC, 0x06), Local5, Local5) + Or (ShiftLeft (\VSFN, 0x07), Local5, Local5) + Or (ShiftLeft (\VDMC, 0x08), Local5, Local5) + Or (ShiftLeft (\VFHP, 0x09), Local5, Local5) + Or (ShiftLeft (\VIFC, 0x0A), Local5, Local5) + Or (ShiftLeft (\VMMC, 0x0B), Local5, Local5) + Or (ShiftLeft (\VMSC, 0x0C), Local5, Local5) + Or (ShiftLeft (\VPSC, 0x0D), Local5, Local5) + Or (ShiftLeft (\VCSC, 0x0E), Local5, Local5) + Store (ShiftLeft (\CICF, 0x08), Local1) + If (LEqual (\CICF, 0x03)) + { + Store (\SMYH, \CICM) + } + ElseIf (LEqual (\CICF, 0x0B)) + { + Store (\SMMC, \CICM) + } + ElseIf (LEqual (\CICF, 0x0D)) + { + Store (\SPSC, \CICM) + } + Else + { + Store (0x0F, \CICM) + } + + Or (ShiftLeft (\CICM, 0x0C), Local1, Local1) + Or (ShiftLeft (Local5, 0x10), Local1, Local1) + Or (Local1, 0x01, Local1) + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6032) + } + } + Case (0x02) + { + Store (\VSTD, Local5) + Or (ShiftLeft (\VCQL, 0x01), Local5, Local5) + Or (ShiftLeft (\VTIO, 0x02), Local5, Local5) + Or (ShiftLeft (\VMYH, 0x03), Local5, Local5) + Or (ShiftLeft (\VSTP, 0x04), Local5, Local5) + Or (ShiftLeft (\VCQH, 0x05), Local5, Local5) + Or (ShiftLeft (\VDCC, 0x06), Local5, Local5) + Or (ShiftLeft (\VSFN, 0x07), Local5, Local5) + Or (ShiftLeft (\VDMC, 0x08), Local5, Local5) + Or (ShiftLeft (\VFHP, 0x09), Local5, Local5) + Or (ShiftLeft (\VIFC, 0x0A), Local5, Local5) + Or (ShiftLeft (\VMMC, 0x0B), Local5, Local5) + Or (ShiftLeft (\VMSC, 0x0C), Local5, Local5) + Or (ShiftLeft (\VPSC, 0x0D), Local5, Local5) + Or (ShiftLeft (\VCSC, 0x0E), Local5, Local5) + Store (ShiftLeft (\CICF, 0x08), Local1) + If (LEqual (\CICF, 0x03)) + { + Store (\SMYH, \CICM) + } + ElseIf (LEqual (\CICF, 0x0B)) + { + Store (\SMMC, \CICM) + } + ElseIf (LEqual (\CICF, 0x0D)) + { + Store (\SPSC, \CICM) + } + Else + { + Store (0x0F, \CICM) + } + + Or (ShiftLeft (\CICM, 0x0C), Local1, Local1) + Or (ShiftLeft (Local5, 0x10), Local1, Local1) + Or (Local1, 0x01, Local1) + } + Case (0x03) + { + Store (ShiftLeft (FCAP, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x04) + { + Store (ShiftLeft (MYHC, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x06) + { + And (ShiftRight (Local0, 0x09), 0x0F, Local2) + If (LNotEqual (Local2, 0x01)) + { + Store (ShiftLeft (MMCC, 0x10), Local1) + } + Else + { + Store (ShiftLeft (0x02, 0x08), Local1) + } + + Or (Local1, 0x01, Local1) + } + Case (0x05) + { + If (LNotEqual (0x00, 0x01)) + { + Store (ShiftLeft (0x05, 0x08), Local1) + Or (Local1, ShiftLeft (0x010E, 0x14), Local1) + } + + Or (Local1, 0x01, Local1) + } + Case (0x0100) + { + Store (ShiftLeft (0x1001, 0x10), Local1) + Or (Local1, 0x01, Local1) + } + Case (0x01FF) + { + ADBG (" DYTC_CMD_RESET") + Store (0x00, \VCQL) + Store (0x00, \VTIO) + Store (0x00, \VMYH) + Store (0x00, \VSTP) + Store (0x00, \VCQH) + Store (0x00, \VDCC) + Store (0x00, \VSFN) + Store (0x00, \VDMC) + Store (0x00, \VFHP) + Store (0x00, \VIFC) + Store (0x00, \VMMC) + Store (0x00, \VMSC) + Store (0x00, \VPSC) + Store (0x00, \VCSC) + Store (0x00, \SMYH) + Store (0x00, \SMMC) + Store (0x00, \SPSC) + Store (0x00, \CICF) + If (LGreater (\_PR.CLVL, 0x01)) + { + \_SB.PCI0.PL1S (\DSTD) + } + + \FLPF (0x01) + NVST (0x3C) + Store (0x0F, \CICM) + Store (\VSTD, Local5) + Or (ShiftLeft (\VCQL, 0x01), Local5, Local5) + Or (ShiftLeft (\VTIO, 0x02), Local5, Local5) + Or (ShiftLeft (\VMYH, 0x03), Local5, Local5) + Or (ShiftLeft (\VSTP, 0x04), Local5, Local5) + Or (ShiftLeft (\VCQH, 0x05), Local5, Local5) + Or (ShiftLeft (\VDCC, 0x06), Local5, Local5) + Or (ShiftLeft (\VSFN, 0x07), Local5, Local5) + Or (ShiftLeft (\VDMC, 0x08), Local5, Local5) + Or (ShiftLeft (\VFHP, 0x09), Local5, Local5) + Or (ShiftLeft (\VIFC, 0x0A), Local5, Local5) + Or (ShiftLeft (\VMMC, 0x0B), Local5, Local5) + Or (ShiftLeft (\VMSC, 0x0C), Local5, Local5) + Or (ShiftLeft (\VPSC, 0x0D), Local5, Local5) + Or (ShiftLeft (\VCSC, 0x0E), Local5, Local5) + Store (ShiftLeft (\CICF, 0x08), Local1) + Or (ShiftLeft (\CICM, 0x0C), Local1, Local1) + Or (ShiftLeft (Local5, 0x10), Local1, Local1) + Or (Local1, 0x01, Local1) + } + Default + { + ShiftLeft (0x02, 0x01, Local1) + } + + } + } + Else + { + ShiftLeft (0x04, 0x01, Local1) + } + + ADBG (Concatenate ("DYTC END=", ToHexString (Local1))) + Return (Local1) + } + + Name (GPTL, 0x3C) + Name (ANGN, 0x00) + Method (NVST, 1, NotSerialized) + { + Store (Arg0, \_SB.PCI0.LPCB.EC.HKEY.GPTL) + If (LAnd (ANGN, LNotEqual (\_SB.PCI0.LPCB.EC.VPON, 0x00))) + { + If (CondRefOf (\_SB.PCI0.RP09.PEGP.CPPC)) + { + \_SB.PCI0.RP09.PEGP.NVST () + } + } + } + } + + Scope (\_SB.PCI0) + { + Method (PL1S, 1, NotSerialized) + { + ADBG (Concatenate ("PL1S Value1=", ToHexString (Arg0))) + ADBG (Concatenate ("PL1S PTDP1 =", ToHexString (\_SB.PCI0.PTDP))) + If (LEqual (\_SB.PCI0.PTDP, Arg0)) + { + Store (Arg0, \PT0D) + \_SB.PCI0.CTCN () + ADBG (" MMIO 1") + } + ElseIf (LGreater (\_SB.PCI0.PTDP, Arg0)) + { + If (LGreaterEqual (\_PR.CLVL, 0x01)) + { + Store (Arg0, \PT1D) + \_SB.PCI0.CTCD () + ADBG (" MMIO 2") + } + Else + { + Store (Arg0, \PT0D) + \_SB.PCI0.CTCN () + ADBG (" MMIO 3") + } + } + ElseIf (LLess (\_SB.PCI0.PTDP, Arg0)) + { + If (LGreater (\_PR.CLVL, 0x02)) + { + Store (Arg0, \PT0D) + \_SB.PCI0.CTCN () + ADBG (" MMIO 4") + } + } + } + } + + Scope (\_SB.PCI0) + { + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (ATMC, 0, NotSerialized) + { + If (LAnd (\WNTF, \TATC)) + { + If (HPAC) + { + Store (\TCFA, Local0) + Store (\TCTA, Local1) + Store (Or (ShiftLeft (Local1, 0x04), Local0), Local2) + XOr (Local2, ATMX, Local3) + Store (Local2, ATMX) + If (LEqual (\TCTA, 0x00)) + { + Store (\TCR0, \TCRT) + Store (\TPS0, \TPSV) + } + ElseIf (LEqual (\TCTA, 0x01)) + { + Store (\TCR1, \TCRT) + Store (\TPS1, \TPSV) + } + Else + { + } + } + Else + { + Store (\TCFD, Local0) + Store (\TCTD, Local1) + Store (Or (ShiftLeft (Local1, 0x04), Local0), Local2) + XOr (Local2, ATMX, Local3) + Store (Local2, ATMX) + If (LEqual (\TCTD, 0x00)) + { + Store (\TCR0, \TCRT) + Store (\TPS0, \TPSV) + } + ElseIf (LEqual (\TCTD, 0x01)) + { + Store (\TCR1, \TCRT) + Store (\TPS1, \TPSV) + } + Else + { + } + } + + If (Local3) + { + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6030) + } + } + + Notify (\_TZ.THM0, 0x81) + } + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Device (ITSD) + { + Name (_HID, EisaId ("LEN0100")) // _HID: Hardware ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + } + + Scope (\_TZ) + { + ThermalZone (THM0) + { + Method (_CRT, 0, Serialized) // _CRT: Critical Temperature + { + Return (\TCRT) + } + + Method (_TMP, 0, Serialized) // _TMP: Temperature + { + If (\H8DR) + { + Store (\_SB.PCI0.LPCB.EC.TMP0, Local0) + Store (\_SB.PCI0.LPCB.EC.TSL2, Local1) + Store (\_SB.PCI0.LPCB.EC.TSL3, Local2) + } + Else + { + Store (\RBEC (0x78), Local0) + Store (And (\RBEC (0x8A), 0x7F), Local1) + Store (And (\RBEC (0x8B), 0x7F), Local2) + } + + If (LEqual (Local0, 0x80)) + { + Store (0x30, Local0) + } + + If (Local2) + { + \TSDL () + Return (\TCRT) + } + + If (LNot (\_SB.PCI0.LPCB.EC.HKEY.DHKC)) + { + If (Local1) + { + \TSDL () + Return (\TCRT) + } + } + + Return (_C2K (Local0)) + } + } + + Method (_C2K, 1, Serialized) + { + Add (Multiply (Arg0, 0x0A), 0x0AAC, Local0) + If (LLessEqual (Local0, 0x0AAC)) + { + Store (0x0C8C, Local0) + } + ElseIf (LGreater (Local0, 0x0FAC)) + { + Store (0x0C8C, Local0) + } + + Return (Local0) + } + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Method (_Q40, 0, NotSerialized) // _Qxx: EC Query + { + Notify (\_TZ.THM0, 0x80) + If (\H8DR) + { + Store (\_SB.PCI0.LPCB.EC.TSL2, Local1) + Store (\_SB.PCI0.LPCB.EC.TSL1, Local2) + } + Else + { + Store (And (\RBEC (0x8A), 0x7F), Local1) + Store (And (\RBEC (0x89), 0x7F), Local2) + } + + If (And (Local2, 0x76)) + { + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x001F4001) + } + Else + { + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F4001) + } + + If (LAnd (\_SB.PCI0.LPCB.EC.HKEY.DHKC, Local1)) + { + \_SB.PCI0.LPCB.EC.HKEY.MHKQ (0x6022) + } + + If (LNot (\VIGD)) + { + \VTHR () + } + } + } + + Scope (\_SI) + { + Method (_SST, 1, NotSerialized) // _SST: System Status + { + If (LEqual (Arg0, 0x00)) + { + \_SB.PCI0.LPCB.EC.LED (0x00, 0x00) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x00) + \_SB.PCI0.LPCB.EC.LED (0x07, 0x00) + } + + If (LEqual (Arg0, 0x01)) + { + If (LOr (\SPS, \WNTF)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x05) + } + + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x07, 0x00) + } + + If (LEqual (Arg0, 0x02)) + { + \_SB.PCI0.LPCB.EC.LED (0x00, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x07, 0xC0) + } + + If (LEqual (Arg0, 0x03)) + { + If (LGreater (\SPS, 0x03)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x07) + } + ElseIf (LEqual (\SPS, 0x03)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x03) + } + Else + { + \_SB.PCI0.LPCB.EC.BEEP (0x04) + } + + If (LEqual (\SPS, 0x03)){} + Else + { + \_SB.PCI0.LPCB.EC.LED (0x00, 0x80) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0x80) + } + + \_SB.PCI0.LPCB.EC.LED (0x07, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x00, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xC0) + } + + If (LEqual (Arg0, 0x04)) + { + \_SB.PCI0.LPCB.EC.BEEP (0x03) + \_SB.PCI0.LPCB.EC.LED (0x07, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x00, 0xC0) + \_SB.PCI0.LPCB.EC.LED (0x0A, 0xC0) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-0-DptfTabl.dsl b/ACPI/Disassembled ACPI files/SSDT-0-DptfTabl.dsl new file mode 100755 index 0000000..1729688 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-0-DptfTabl.dsl @@ -0,0 +1,5642 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-0-DptfTabl.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000099C0 (39360) + * Revision 0x02 + * Checksum 0x54 + * OEM ID "LENOVO" + * OEM Table ID "DptfTabl" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "DptfTabl", 0x00001000) +{ + External (_PR_.AAC0, FieldUnitObj) // (from opcode) + External (_PR_.ACRT, FieldUnitObj) // (from opcode) + External (_PR_.APSV, FieldUnitObj) // (from opcode) + External (_PR_.CBMI, FieldUnitObj) // (from opcode) + External (_PR_.CFGD, FieldUnitObj) // (from opcode) + External (_PR_.CLVL, FieldUnitObj) // (from opcode) + External (_PR_.CPPC, FieldUnitObj) // (from opcode) + External (_PR_.CTC0, FieldUnitObj) // (from opcode) + External (_PR_.CTC1, FieldUnitObj) // (from opcode) + External (_PR_.CTC2, FieldUnitObj) // (from opcode) + External (_PR_.HDCE, FieldUnitObj) // (from opcode) + External (_PR_.PL10, FieldUnitObj) // (from opcode) + External (_PR_.PL11, FieldUnitObj) // (from opcode) + External (_PR_.PL12, FieldUnitObj) // (from opcode) + External (_PR_.PL20, FieldUnitObj) // (from opcode) + External (_PR_.PL21, FieldUnitObj) // (from opcode) + External (_PR_.PL22, FieldUnitObj) // (from opcode) + External (_PR_.PLW0, FieldUnitObj) // (from opcode) + External (_PR_.PLW1, FieldUnitObj) // (from opcode) + External (_PR_.PLW2, FieldUnitObj) // (from opcode) + External (_PR_.PR00, ProcessorObj) // (from opcode) + External (_PR_.PR00._PSS, MethodObj) // 0 Arguments (from opcode) + External (_PR_.PR00._TPC, IntObj) // (from opcode) + External (_PR_.PR00._TSD, MethodObj) // 0 Arguments (from opcode) + External (_PR_.PR00._TSS, MethodObj) // 0 Arguments (from opcode) + External (_PR_.PR00.LPSS, PkgObj) // (from opcode) + External (_PR_.PR00.TPSS, PkgObj) // (from opcode) + External (_PR_.PR00.TSMC, PkgObj) // (from opcode) + External (_PR_.PR00.TSMF, PkgObj) // (from opcode) + External (_PR_.PR01, ProcessorObj) // (from opcode) + External (_PR_.PR02, ProcessorObj) // (from opcode) + External (_PR_.PR03, ProcessorObj) // (from opcode) + External (_PR_.PR04, ProcessorObj) // (from opcode) + External (_PR_.PR05, ProcessorObj) // (from opcode) + External (_PR_.PR06, ProcessorObj) // (from opcode) + External (_PR_.PR07, ProcessorObj) // (from opcode) + External (_PR_.PR08, ProcessorObj) // (from opcode) + External (_PR_.PR09, ProcessorObj) // (from opcode) + External (_PR_.PR10, ProcessorObj) // (from opcode) + External (_PR_.PR11, ProcessorObj) // (from opcode) + External (_PR_.PR12, ProcessorObj) // (from opcode) + External (_PR_.PR13, ProcessorObj) // (from opcode) + External (_PR_.PR14, ProcessorObj) // (from opcode) + External (_PR_.PR15, ProcessorObj) // (from opcode) + External (_PR_.TAR0, FieldUnitObj) // (from opcode) + External (_PR_.TAR1, FieldUnitObj) // (from opcode) + External (_PR_.TAR2, FieldUnitObj) // (from opcode) + External (_SB_.OSCP, IntObj) // (from opcode) + External (_SB_.PAGD, DeviceObj) // (from opcode) + External (_SB_.PAGD._PUR, PkgObj) // (from opcode) + External (_SB_.PAGD._STA, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0, DeviceObj) // (from opcode) + External (_SB_.PCI0.B0D4, DeviceObj) // (from opcode) + External (_SB_.PCI0.LPCB.EC__, DeviceObj) // (from opcode) + External (_SB_.PCI0.LPCB.EC__.HKEY.DHKC, IntObj) // (from opcode) + External (_SB_.PCI0.LPCB.EC__.HKEY.DYTC, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.MHBR, FieldUnitObj) // (from opcode) + External (_SB_.SLPB, DeviceObj) // (from opcode) + External (_TZ_._C2K, MethodObj) // 1 Arguments (from opcode) + External (_TZ_.THM0, ThermalZoneObj) // (from opcode) + External (_TZ_.THM0._TMP, MethodObj) // 0 Arguments (from opcode) + External (ACTT, IntObj) // (from opcode) + External (ADBG, MethodObj) // 1 Arguments (from opcode) + External (APPE, IntObj) // (from opcode) + External (ATMC, IntObj) // (from opcode) + External (ATPC, IntObj) // (from opcode) + External (CHGE, IntObj) // (from opcode) + External (CPUS, IntObj) // (from opcode) + External (CRTT, IntObj) // (from opcode) + External (CTDP, IntObj) // (from opcode) + External (DCFE, IntObj) // (from opcode) + External (DCMP, IntObj) // (from opcode) + External (DISE, IntObj) // (from opcode) + External (DPAP, IntObj) // (from opcode) + External (DPCP, IntObj) // (from opcode) + External (DPHL, IntObj) // (from opcode) + External (DPLL, IntObj) // (from opcode) + External (DPPP, IntObj) // (from opcode) + External (DPTF, IntObj) // (from opcode) + External (ECEU, IntObj) // (from opcode) + External (FND1, IntObj) // (from opcode) + External (FND2, IntObj) // (from opcode) + External (G1AT, IntObj) // (from opcode) + External (G1C3, IntObj) // (from opcode) + External (G1CT, IntObj) // (from opcode) + External (G1HT, IntObj) // (from opcode) + External (G1PT, IntObj) // (from opcode) + External (G2AT, IntObj) // (from opcode) + External (G2C3, IntObj) // (from opcode) + External (G2CT, IntObj) // (from opcode) + External (G2HT, IntObj) // (from opcode) + External (G2PT, IntObj) // (from opcode) + External (G3AT, IntObj) // (from opcode) + External (G3C3, IntObj) // (from opcode) + External (G3CT, IntObj) // (from opcode) + External (G3HT, IntObj) // (from opcode) + External (G3PT, IntObj) // (from opcode) + External (G4AT, IntObj) // (from opcode) + External (G4C3, IntObj) // (from opcode) + External (G4CT, IntObj) // (from opcode) + External (G4HT, IntObj) // (from opcode) + External (G4PT, IntObj) // (from opcode) + External (G5AT, IntObj) // (from opcode) + External (G5C3, IntObj) // (from opcode) + External (G5CT, IntObj) // (from opcode) + External (G5HT, IntObj) // (from opcode) + External (G5PT, IntObj) // (from opcode) + External (G6AT, IntObj) // (from opcode) + External (G6C3, IntObj) // (from opcode) + External (G6CT, IntObj) // (from opcode) + External (G6HT, IntObj) // (from opcode) + External (G6PT, IntObj) // (from opcode) + External (G7AT, IntObj) // (from opcode) + External (G7C3, IntObj) // (from opcode) + External (G7CT, IntObj) // (from opcode) + External (G7HT, IntObj) // (from opcode) + External (G7PT, IntObj) // (from opcode) + External (G8AT, IntObj) // (from opcode) + External (G8C3, IntObj) // (from opcode) + External (G8CT, IntObj) // (from opcode) + External (G8HT, IntObj) // (from opcode) + External (G8PT, IntObj) // (from opcode) + External (GN1E, IntObj) // (from opcode) + External (GN2E, IntObj) // (from opcode) + External (GN3E, IntObj) // (from opcode) + External (GN4E, IntObj) // (from opcode) + External (GN5E, IntObj) // (from opcode) + External (GN6E, IntObj) // (from opcode) + External (GN7E, IntObj) // (from opcode) + External (GN8E, IntObj) // (from opcode) + External (GTST, MethodObj) // 0 Arguments (from opcode) + External (HIDW, MethodObj) // 4 Arguments (from opcode) + External (HIWC, MethodObj) // 1 Arguments (from opcode) + External (ICAE, IntObj) // (from opcode) + External (ICAT, IntObj) // (from opcode) + External (ICC3, IntObj) // (from opcode) + External (ICCR, IntObj) // (from opcode) + External (ICHT, IntObj) // (from opcode) + External (ICPV, IntObj) // (from opcode) + External (LPER, IntObj) // (from opcode) + External (LPMP, IntObj) // (from opcode) + External (LPMV, IntObj) // (from opcode) + External (LPOE, IntObj) // (from opcode) + External (LPOP, IntObj) // (from opcode) + External (LPOS, IntObj) // (from opcode) + External (LPOW, IntObj) // (from opcode) + External (MPL0, IntObj) // (from opcode) + External (MPL1, IntObj) // (from opcode) + External (MPL2, IntObj) // (from opcode) + External (ODV0, IntObj) // (from opcode) + External (ODV1, IntObj) // (from opcode) + External (ODV2, IntObj) // (from opcode) + External (ODV3, IntObj) // (from opcode) + External (ODV4, IntObj) // (from opcode) + External (ODV5, IntObj) // (from opcode) + External (ODV6, IntObj) // (from opcode) + External (ODV7, IntObj) // (from opcode) + External (ODV8, IntObj) // (from opcode) + External (ODV9, IntObj) // (from opcode) + External (ODVA, IntObj) // (from opcode) + External (ODVB, IntObj) // (from opcode) + External (ODVC, IntObj) // (from opcode) + External (ODVD, IntObj) // (from opcode) + External (ODVE, IntObj) // (from opcode) + External (ODVF, IntObj) // (from opcode) + External (ODVG, IntObj) // (from opcode) + External (ODVH, IntObj) // (from opcode) + External (ODVI, IntObj) // (from opcode) + External (ODVJ, IntObj) // (from opcode) + External (PBPE, IntObj) // (from opcode) + External (PC00, IntObj) // (from opcode) + External (PEAT, IntObj) // (from opcode) + External (PEC3, IntObj) // (from opcode) + External (PECR, IntObj) // (from opcode) + External (PEHT, IntObj) // (from opcode) + External (PEPV, IntObj) // (from opcode) + External (PERE, IntObj) // (from opcode) + External (PIDE, IntObj) // (from opcode) + External (PNHM, IntObj) // (from opcode) + External (PPPR, IntObj) // (from opcode) + External (PPSZ, IntObj) // (from opcode) + External (PSVT, IntObj) // (from opcode) + External (PTMC, IntObj) // (from opcode) + External (PTPC, IntObj) // (from opcode) + External (PVSC, IntObj) // (from opcode) + External (PWRE, IntObj) // (from opcode) + External (PWRS, IntObj) // (from opcode) + External (S1AT, IntObj) // (from opcode) + External (S1CT, IntObj) // (from opcode) + External (S1DE, IntObj) // (from opcode) + External (S1HT, IntObj) // (from opcode) + External (S1PT, IntObj) // (from opcode) + External (S1S3, IntObj) // (from opcode) + External (S2AT, IntObj) // (from opcode) + External (S2CT, IntObj) // (from opcode) + External (S2DE, IntObj) // (from opcode) + External (S2HT, IntObj) // (from opcode) + External (S2PT, IntObj) // (from opcode) + External (S2S3, IntObj) // (from opcode) + External (S3AT, IntObj) // (from opcode) + External (S3CT, IntObj) // (from opcode) + External (S3DE, IntObj) // (from opcode) + External (S3HT, IntObj) // (from opcode) + External (S3PT, IntObj) // (from opcode) + External (S3S3, IntObj) // (from opcode) + External (S4AT, IntObj) // (from opcode) + External (S4CT, IntObj) // (from opcode) + External (S4DE, IntObj) // (from opcode) + External (S4HT, IntObj) // (from opcode) + External (S4PT, IntObj) // (from opcode) + External (S4S3, IntObj) // (from opcode) + External (S5AT, IntObj) // (from opcode) + External (S5CT, IntObj) // (from opcode) + External (S5DE, IntObj) // (from opcode) + External (S5HT, IntObj) // (from opcode) + External (S5PT, IntObj) // (from opcode) + External (S5S3, IntObj) // (from opcode) + External (S6AT, IntObj) // (from opcode) + External (S6CT, IntObj) // (from opcode) + External (S6DE, IntObj) // (from opcode) + External (S6HT, IntObj) // (from opcode) + External (S6PT, IntObj) // (from opcode) + External (S6S3, IntObj) // (from opcode) + External (S7AT, IntObj) // (from opcode) + External (S7CT, IntObj) // (from opcode) + External (S7DE, IntObj) // (from opcode) + External (S7HT, IntObj) // (from opcode) + External (S7PT, IntObj) // (from opcode) + External (S7S3, IntObj) // (from opcode) + External (S8AT, IntObj) // (from opcode) + External (S8CT, IntObj) // (from opcode) + External (S8DE, IntObj) // (from opcode) + External (S8HT, IntObj) // (from opcode) + External (S8PT, IntObj) // (from opcode) + External (S8S3, IntObj) // (from opcode) + External (SAC3, IntObj) // (from opcode) + External (SACR, IntObj) // (from opcode) + External (SADE, IntObj) // (from opcode) + External (SAHT, IntObj) // (from opcode) + External (SSP1, IntObj) // (from opcode) + External (SSP2, IntObj) // (from opcode) + External (SSP3, IntObj) // (from opcode) + External (SSP4, IntObj) // (from opcode) + External (SSP5, IntObj) // (from opcode) + External (SSP6, IntObj) // (from opcode) + External (SSP7, IntObj) // (from opcode) + External (SSP8, IntObj) // (from opcode) + External (STAT, IntObj) // (from opcode) + External (STC3, IntObj) // (from opcode) + External (STCT, IntObj) // (from opcode) + External (STDV, IntObj) // (from opcode) + External (STGE, IntObj) // (from opcode) + External (STHT, IntObj) // (from opcode) + External (STPT, IntObj) // (from opcode) + External (TCNT, IntObj) // (from opcode) + External (TGFG, IntObj) // (from opcode) + External (TRTV, IntObj) // (from opcode) + External (TSOD, IntObj) // (from opcode) + External (TSP1, IntObj) // (from opcode) + External (TSP2, IntObj) // (from opcode) + External (TSP3, IntObj) // (from opcode) + External (TSP4, IntObj) // (from opcode) + External (TSP5, IntObj) // (from opcode) + External (TSP6, IntObj) // (from opcode) + External (TSP7, IntObj) // (from opcode) + External (TSP8, IntObj) // (from opcode) + External (V1AT, IntObj) // (from opcode) + External (V1C3, IntObj) // (from opcode) + External (V1CR, IntObj) // (from opcode) + External (V1HT, IntObj) // (from opcode) + External (V1PV, IntObj) // (from opcode) + External (V2AT, IntObj) // (from opcode) + External (V2C3, IntObj) // (from opcode) + External (V2CR, IntObj) // (from opcode) + External (V2HT, IntObj) // (from opcode) + External (V2PV, IntObj) // (from opcode) + External (VSP1, IntObj) // (from opcode) + External (VSP2, IntObj) // (from opcode) + External (VSPE, IntObj) // (from opcode) + External (WAND, IntObj) // (from opcode) + External (WFAT, IntObj) // (from opcode) + External (WFC3, IntObj) // (from opcode) + External (WFCT, IntObj) // (from opcode) + External (WFHT, IntObj) // (from opcode) + External (WFPT, IntObj) // (from opcode) + External (WIFD, IntObj) // (from opcode) + External (WTSP, IntObj) // (from opcode) + External (WWAT, IntObj) // (from opcode) + External (WWC3, IntObj) // (from opcode) + External (WWCT, IntObj) // (from opcode) + External (WWHT, IntObj) // (from opcode) + External (WWPT, IntObj) // (from opcode) + + Scope (\_SB) + { + Device (IETM) + { + Name (_HID, EisaId ("INT3400")) // _HID: Hardware ID + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (CondRefOf (HIWC)) + { + If (HIWC (Arg0)) + { + If (CondRefOf (HIDW)) + { + Return (HIDW (Arg0, Arg1, Arg2, Arg3)) + } + } + } + + Return (Buffer (One) + { + 0x00 + }) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (DPTF, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + + Name (TMPP, Package (0x0E) + { + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, + + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + } + }) + Name (PTRP, Zero) + Name (PSEM, Zero) + Name (ATRP, Zero) + Name (ASEM, Zero) + Name (YTRP, Zero) + Name (YSEM, Zero) + Name (DPTE, Zero) + Method (IDSP, 0, Serialized) + { + Name (TMPI, Zero) + If (LAnd (LEqual (\DPPP, 0x02), CondRefOf (DP2P))) + { + Store (DerefOf (Index (DP2P, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPPP, One), CondRefOf (DPSP))) + { + Store (DerefOf (Index (DPSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPAP, One), CondRefOf (DASP))) + { + Store (DerefOf (Index (DASP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPAP, 0x02), CondRefOf (DA2P))) + { + Store (DerefOf (Index (DA2P, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DPCP, One), CondRefOf (DCSP))) + { + Store (DerefOf (Index (DCSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\DCMP, One), CondRefOf (DMSP))) + { + Store (DerefOf (Index (DMSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (CondRefOf (LPSP)) + { + If (LAnd (LEqual (\SADE, One), LEqual (\LPMP, One))) + { + Store (DerefOf (Index (LPSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + } + + If (CondRefOf (CTSP)) + { + If (LAnd (LEqual (\SADE, One), LEqual (\CTDP, One))) + { + Store (DerefOf (Index (CTSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + } + + If (LAnd (LEqual (\PBPE, One), CondRefOf (POBP))) + { + Store (DerefOf (Index (POBP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\_PR.HDCE, One), CondRefOf (HDCP))) + { + Store (DerefOf (Index (HDCP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\APPE, One), CondRefOf (DAPP))) + { + Store (DerefOf (Index (DAPP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\VSPE, One), CondRefOf (DVSP))) + { + Store (DerefOf (Index (DVSP, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + If (LAnd (LEqual (\PIDE, One), CondRefOf (DPID))) + { + Store (DerefOf (Index (DPID, Zero)), Index (TMPP, TMPI)) + Increment (TMPI) + } + + Return (TMPP) + } + + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Name (NUMP, Zero) + Name (UID2, Buffer (0x10) + { + /* 0000 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + /* 0008 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF + }) + CreateDWordField (Arg3, Zero, STS1) + CreateDWordField (Arg3, 0x04, CAP1) + If (And (CAP1, One)) + { + If (LEqual (DPTE, Zero)) + { + Store (One, DPTE) + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x000F0001) + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC){} + } + } + ElseIf (LEqual (DPTE, One)) + { + Store (Zero, DPTE) + \_SB.PCI0.LPCB.EC.HKEY.DYTC (0x01FF) + If (\_SB.PCI0.LPCB.EC.HKEY.DHKC){} + } + + ADBG (Concatenate ("OSC->DPTE=", ToHexString (DPTE))) + IDSP () + Store (SizeOf (TMPP), NUMP) + CreateDWordField (Arg0, Zero, IID0) + CreateDWordField (Arg0, 0x04, IID1) + CreateDWordField (Arg0, 0x08, IID2) + CreateDWordField (Arg0, 0x0C, IID3) + CreateDWordField (UID2, Zero, EID0) + CreateDWordField (UID2, 0x04, EID1) + CreateDWordField (UID2, 0x08, EID2) + CreateDWordField (UID2, 0x0C, EID3) + While (NUMP) + { + Store (DerefOf (Index (TMPP, Subtract (NUMP, One))), UID2) + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))) + { + Break + } + + Decrement (NUMP) + } + + If (LEqual (NUMP, Zero)) + { + And (STS1, 0xFFFFFF00, STS1) + Or (STS1, 0x06, STS1) + Return (Arg3) + } + + If (LNotEqual (Arg1, One)) + { + And (STS1, 0xFFFFFF00, STS1) + Or (STS1, 0x0A, STS1) + Return (Arg3) + } + + If (LNotEqual (Arg2, 0x02)) + { + And (STS1, 0xFFFFFF00, STS1) + Or (STS1, 0x02, STS1) + Return (Arg3) + } + + If (LAnd (LEqual (\DPPP, 0x02), CondRefOf (\_PR.APSV))) + { + If (LEqual (PSEM, Zero)) + { + Store (One, PSEM) + Store (\_PR.APSV, PTRP) + } + + If (CondRefOf (DP2P)) + { + Store (DerefOf (Index (DP2P, Zero)), UID2) + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.APSV) + } + Else + { + Store (PTRP, \_PR.APSV) + } + + Notify (\_TZ.THM0, 0x81) + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPPP, One), CondRefOf (\_PR.APSV))) + { + If (LEqual (PSEM, Zero)) + { + Store (One, PSEM) + Store (\_PR.APSV, PTRP) + } + + If (CondRefOf (DPSP)) + { + Store (DerefOf (Index (DPSP, Zero)), UID2) + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.APSV) + } + Else + { + Store (PTRP, \_PR.APSV) + } + + Notify (\_TZ.THM0, 0x81) + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\PIDE, One), CondRefOf (\_PR.APSV))) + { + If (LEqual (PSEM, Zero)) + { + Store (One, PSEM) + Store (\_PR.APSV, PTRP) + } + + If (CondRefOf (DPID)) + { + Store (DerefOf (Index (DPID, Zero)), UID2) + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.APSV) + } + Else + { + Store (PTRP, \_PR.APSV) + } + + Notify (\_TZ.THM0, 0x81) + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPAP, One), CondRefOf (\_PR.AAC0))) + { + If (LEqual (ASEM, Zero)) + { + Store (One, ASEM) + Store (\_PR.AAC0, ATRP) + } + + If (CondRefOf (DASP)) + { + Store (DerefOf (Index (DASP, Zero)), UID2) + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.AAC0) + } + Else + { + Store (ATRP, \_PR.AAC0) + } + + Notify (\_TZ.THM0, 0x81) + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPAP, 0x02), CondRefOf (\_PR.AAC0))) + { + If (LEqual (ASEM, Zero)) + { + Store (One, ASEM) + Store (\_PR.AAC0, ATRP) + } + + If (CondRefOf (DA2P)) + { + Store (DerefOf (Index (DA2P, Zero)), UID2) + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0x6E, \_PR.AAC0) + } + Else + { + Store (ATRP, \_PR.AAC0) + } + + Notify (\_TZ.THM0, 0x81) + } + + Return (Arg3) + } + } + + If (LAnd (LEqual (\DPCP, One), CondRefOf (\_PR.ACRT))) + { + If (LEqual (YSEM, Zero)) + { + Store (One, YSEM) + Store (\_PR.ACRT, YTRP) + } + + If (CondRefOf (DCSP)) + { + Store (DerefOf (Index (DCSP, Zero)), UID2) + } + + If (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))) + { + If (Not (And (STS1, One))) + { + If (And (CAP1, One)) + { + Store (0xD2, \_PR.ACRT) + } + Else + { + Store (YTRP, \_PR.ACRT) + } + + Notify (\_TZ.THM0, 0x81) + } + + Return (Arg3) + } + } + + Return (Arg3) + } + + Method (KTOC, 1, Serialized) + { + If (LGreater (Arg0, 0x0AAC)) + { + Return (Divide (Subtract (Arg0, 0x0AAC), 0x0A, )) + } + Else + { + Return (Zero) + } + } + + Method (CTOK, 1, Serialized) + { + Return (Add (Multiply (Arg0, 0x0A), 0x0AAC)) + } + + Name (VERS, Zero) + Name (CTYP, Zero) + Name (ALMT, Zero) + Name (PLMT, Zero) + Name (WKLD, Zero) + Name (DSTA, Zero) + Name (RES1, Zero) + Method (DSCP, 7, Serialized) + { + Name (CHNG, Zero) + If (LNotEqual (Arg0, Zero)) + { + Return (Zero) + } + + If (LOr (LEqual (Arg1, Zero), LEqual (Arg1, One))) + { + If (LNotEqual (Arg1, CTYP)) + { + Store (One, CHNG) + Store (Arg1, CTYP) + } + } + + If (LOr (LGreaterEqual (Arg1, Zero), LLessEqual (Arg1, 0x05))) + { + If (LNotEqual (Arg2, ALMT)) + { + Store (One, CHNG) + Store (Arg2, ALMT) + } + } + + If (LOr (LGreaterEqual (Arg1, Zero), LLessEqual (Arg1, 0x05))) + { + If (LNotEqual (Arg3, PLMT)) + { + Store (One, CHNG) + Store (Arg3, PLMT) + } + } + + If (LNotEqual (Arg4, WKLD)) + { + Store (One, CHNG) + Store (Arg4, WKLD) + } + + If (LNotEqual (Arg5, DSTA)) + { + Store (One, CHNG) + Store (Arg5, DSTA) + } + + If (LNotEqual (Arg6, RES1)) + { + Store (One, CHNG) + Store (Arg6, RES1) + } + + If (CHNG) + { + If (LEqual (\DPPP, One)) + { + Notify (\_SB.IETM, 0x83) + } + + If (LEqual (\DPPP, 0x02)) + { + Notify (\_SB.IETM, 0x87) + } + + If (LEqual (\DPAP, One)) + { + Notify (\_SB.IETM, 0x84) + } + } + } + + Method (DCFG, 0, NotSerialized) + { + Return (\DCFE) + } + + Name (ODVX, Package (0x14) + { + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero + }) + Method (ODVP, 0, Serialized) + { + Store (\ODV0, Index (ODVX, Zero)) + Store (\ODV1, Index (ODVX, One)) + Store (\ODV2, Index (ODVX, 0x02)) + Store (\ODV3, Index (ODVX, 0x03)) + Store (\ODV4, Index (ODVX, 0x04)) + Store (\ODV5, Index (ODVX, 0x05)) + Store (\ODV6, Index (ODVX, 0x06)) + Store (\ODV7, Index (ODVX, 0x07)) + Store (\ODV8, Index (ODVX, 0x08)) + Store (\ODV9, Index (ODVX, 0x09)) + Store (\ODVA, Index (ODVX, 0x0A)) + Store (\ODVB, Index (ODVX, 0x0B)) + Store (\ODVC, Index (ODVX, 0x0C)) + Store (\ODVD, Index (ODVX, 0x0D)) + Store (\ODVE, Index (ODVX, 0x0E)) + Store (\ODVF, Index (ODVX, 0x0F)) + Store (\ODVG, Index (ODVX, 0x10)) + Store (\ODVH, Index (ODVX, 0x11)) + Store (\ODVI, Index (ODVX, 0x12)) + Store (\ODVJ, Index (ODVX, 0x13)) + Return (ODVX) + } + } + } + + Scope (\_SB.PCI0.B0D4) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (\SADE, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + + OperationRegion (MBAR, SystemMemory, Add (ShiftLeft (MHBR, 0x0F), 0x5000), 0x1000) + Field (MBAR, ByteAcc, NoLock, Preserve) + { + Offset (0x930), + PTDP, 15, + Offset (0x932), + PMIN, 15, + Offset (0x934), + PMAX, 15, + Offset (0x936), + TMAX, 7, + Offset (0x938), + PWRU, 4, + Offset (0x939), + EGYU, 5, + Offset (0x93A), + TIMU, 4, + Offset (0x958), + Offset (0x95C), + LPMS, 1, + CTNL, 2, + Offset (0x978), + PCTP, 8, + Offset (0x998), + RP0C, 8, + RP1C, 8, + RPNC, 8, + Offset (0xF3C), + TRAT, 8, + Offset (0xF40), + PTD1, 15, + Offset (0xF42), + TRA1, 8, + Offset (0xF44), + PMX1, 15, + Offset (0xF46), + PMN1, 15, + Offset (0xF48), + PTD2, 15, + Offset (0xF4A), + TRA2, 8, + Offset (0xF4C), + PMX2, 15, + Offset (0xF4E), + PMN2, 15, + Offset (0xF50), + CTCL, 2, + , 29, + CLCK, 1, + MNTR, 8 + } + + Name (XPCC, Zero) + Method (PPCC, 0, Serialized) + { + If (LAnd (LEqual (XPCC, Zero), CondRefOf (\_PR.CBMI))) + { + Switch (ToInteger (\_PR.CBMI)) + { + Case (Zero) + { + If (LAnd (LGreaterEqual (\_PR.CLVL, One), LLessEqual (\_PR.CLVL, 0x03))) + { + CPL0 () + Store (One, XPCC) + } + } + Case (One) + { + If (LOr (LEqual (\_PR.CLVL, 0x02), LEqual (\_PR.CLVL, 0x03))) + { + CPL1 () + Store (One, XPCC) + } + } + Case (0x02) + { + If (LEqual (\_PR.CLVL, 0x03)) + { + CPL2 () + Store (One, XPCC) + } + } + + } + } + + Return (NPCC) + } + + Name (NPCC, Package (0x03) + { + 0x02, + Package (0x06) + { + Zero, + 0x88B8, + 0xAFC8, + 0x6D60, + 0x7D00, + 0x03E8 + }, + + Package (0x06) + { + One, + 0xDBBA, + 0xDBBA, + Zero, + Zero, + 0x03E8 + } + }) + Method (CPNU, 2, Serialized) + { + Name (CNVT, Zero) + Name (PPUU, Zero) + Name (RMDR, Zero) + If (LEqual (PWRU, Zero)) + { + Store (One, PPUU) + } + Else + { + ShiftLeft (Decrement (PWRU), 0x02, PPUU) + } + + Divide (Arg0, PPUU, RMDR, CNVT) + If (LEqual (Arg1, Zero)) + { + Return (CNVT) + } + Else + { + Multiply (CNVT, 0x03E8, CNVT) + Multiply (RMDR, 0x03E8, RMDR) + Divide (RMDR, PPUU, , RMDR) + Add (CNVT, RMDR, CNVT) + Return (CNVT) + } + } + + Method (CPL0, 0, NotSerialized) + { + Store (0x02, Index (\_SB.PCI0.B0D4.NPCC, Zero)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), Zero)) + Store (\MPL0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), One)) + Store (CPNU (\_PR.PL10, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x02)) + Multiply (\_PR.PLW0, 0x03E8, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x03)) + Add (Multiply (\_PR.PLW0, 0x03E8), 0x0FA0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x05)) + Store (One, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), Zero)) + Store (CPNU (\_PR.PL20, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), One)) + Store (CPNU (\_PR.PL20, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x02)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x03)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x05)) + } + + Method (CPL1, 0, NotSerialized) + { + Store (0x02, Index (\_SB.PCI0.B0D4.NPCC, Zero)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), Zero)) + Store (\MPL1, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), One)) + Store (CPNU (\_PR.PL11, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x02)) + Multiply (\_PR.PLW1, 0x03E8, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x03)) + Add (Multiply (\_PR.PLW1, 0x03E8), 0x0FA0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x05)) + Store (One, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), Zero)) + Store (CPNU (\_PR.PL21, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), One)) + Store (CPNU (\_PR.PL21, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x02)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x03)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x05)) + } + + Method (CPL2, 0, NotSerialized) + { + Store (0x02, Index (\_SB.PCI0.B0D4.NPCC, Zero)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), Zero)) + Store (\MPL2, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), One)) + Store (CPNU (\_PR.PL12, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x02)) + Multiply (\_PR.PLW2, 0x03E8, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x03)) + Add (Multiply (\_PR.PLW2, 0x03E8), 0x0FA0, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, One)), 0x05)) + Store (One, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), Zero)) + Store (CPNU (\_PR.PL22, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), One)) + Store (CPNU (\_PR.PL22, One), Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x02)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x03)) + Store (Zero, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x04)) + Store (PPSZ, Index (DerefOf (Index (\_SB.PCI0.B0D4.NPCC, 0x02)), 0x05)) + } + + Name (LSTM, Zero) + Name (_PPC, Zero) // _PPC: Performance Present Capabilities + Method (SPPC, 1, Serialized) + { + If (CondRefOf (\_PR.CPPC)) + { + Store (Arg0, \_PR.CPPC) + } + + Switch (ToInteger (\TCNT)) + { + Case (0x10) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + Notify (\_PR.PR05, 0x80) + Notify (\_PR.PR06, 0x80) + Notify (\_PR.PR07, 0x80) + Notify (\_PR.PR08, 0x80) + Notify (\_PR.PR09, 0x80) + Notify (\_PR.PR10, 0x80) + Notify (\_PR.PR11, 0x80) + Notify (\_PR.PR12, 0x80) + Notify (\_PR.PR13, 0x80) + Notify (\_PR.PR14, 0x80) + Notify (\_PR.PR15, 0x80) + } + Case (0x0E) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + Notify (\_PR.PR05, 0x80) + Notify (\_PR.PR06, 0x80) + Notify (\_PR.PR07, 0x80) + Notify (\_PR.PR08, 0x80) + Notify (\_PR.PR09, 0x80) + Notify (\_PR.PR10, 0x80) + Notify (\_PR.PR11, 0x80) + Notify (\_PR.PR12, 0x80) + Notify (\_PR.PR13, 0x80) + } + Case (0x0C) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + Notify (\_PR.PR05, 0x80) + Notify (\_PR.PR06, 0x80) + Notify (\_PR.PR07, 0x80) + Notify (\_PR.PR08, 0x80) + Notify (\_PR.PR09, 0x80) + Notify (\_PR.PR10, 0x80) + Notify (\_PR.PR11, 0x80) + } + Case (0x0A) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + Notify (\_PR.PR05, 0x80) + Notify (\_PR.PR06, 0x80) + Notify (\_PR.PR07, 0x80) + Notify (\_PR.PR08, 0x80) + Notify (\_PR.PR09, 0x80) + } + Case (0x08) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + Notify (\_PR.PR05, 0x80) + Notify (\_PR.PR06, 0x80) + Notify (\_PR.PR07, 0x80) + } + Case (0x07) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + Notify (\_PR.PR05, 0x80) + Notify (\_PR.PR06, 0x80) + } + Case (0x06) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + Notify (\_PR.PR05, 0x80) + } + Case (0x05) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + Notify (\_PR.PR04, 0x80) + } + Case (0x04) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + Notify (\_PR.PR03, 0x80) + } + Case (0x03) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + Notify (\_PR.PR02, 0x80) + } + Case (0x02) + { + Notify (\_PR.PR00, 0x80) + Notify (\_PR.PR01, 0x80) + } + Default + { + Notify (\_PR.PR00, 0x80) + } + + } + } + + Name (TLPO, Package (0x06) + { + One, + One, + Zero, + One, + One, + 0x02 + }) + Method (CLPO, 0, NotSerialized) + { + Store (LPOE, Index (TLPO, One)) + If (CondRefOf (\_PR.PR00._PSS)) + { + If (And (\_SB.OSCP, 0x0400)) + { + Store (SizeOf (\_PR.PR00.TPSS), Local1) + } + Else + { + Store (SizeOf (\_PR.PR00.LPSS), Local1) + } + } + Else + { + Store (Zero, Local1) + } + + If (LLess (LPOP, Local1)) + { + Store (LPOP, Index (TLPO, 0x02)) + } + Else + { + Decrement (Local1) + Store (Local1, Index (TLPO, 0x02)) + } + + Store (LPOS, Index (TLPO, 0x03)) + Store (LPOW, Index (TLPO, 0x04)) + Store (LPER, Index (TLPO, 0x05)) + Return (TLPO) + } + + Method (SPUR, 1, NotSerialized) + { + If (LLessEqual (Arg0, \TCNT)) + { + If (LEqual (\_SB.PAGD._STA (), 0x0F)) + { + Store (Arg0, Index (\_SB.PAGD._PUR, One)) + Notify (\_SB.PAGD, 0x80) + } + } + } + + Name (AEXL, Package (0x04) + { + "svchost.exe", + "dllhost.exe", + "smss.exe", + "WinSAT.exe" + }) + Method (PCCC, 0, Serialized) + { + Store (One, Index (PCCX, Zero)) + Switch (ToInteger (CPNU (PTDP, Zero))) + { + Case (0x39) + { + Store (0xA7F8, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x00017318, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x2F) + { + Store (0x9858, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x00014C08, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x25) + { + Store (0x7148, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0xD6D8, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x19) + { + Store (0x3E80, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x7D00, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x0F) + { + Store (0x36B0, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x7D00, Index (DerefOf (Index (PCCX, One)), One)) + } + Case (0x0B) + { + Store (0x36B0, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0x61A8, Index (DerefOf (Index (PCCX, One)), One)) + } + Default + { + Store (0xFF, Index (DerefOf (Index (PCCX, One)), Zero)) + Store (0xFF, Index (DerefOf (Index (PCCX, One)), One)) + } + + } + + Return (PCCX) + } + + Name (PCCX, Package (0x02) + { + 0x80000000, + Package (0x02) + { + 0x80000000, + 0x80000000 + } + }) + Name (KEFF, Package (0x1E) + { + Package (0x02) + { + 0x01BC, + Zero + }, + + Package (0x02) + { + 0x01CF, + 0x27 + }, + + Package (0x02) + { + 0x01E1, + 0x4B + }, + + Package (0x02) + { + 0x01F3, + 0x6C + }, + + Package (0x02) + { + 0x0206, + 0x8B + }, + + Package (0x02) + { + 0x0218, + 0xA8 + }, + + Package (0x02) + { + 0x022A, + 0xC3 + }, + + Package (0x02) + { + 0x023D, + 0xDD + }, + + Package (0x02) + { + 0x024F, + 0xF4 + }, + + Package (0x02) + { + 0x0261, + 0x010B + }, + + Package (0x02) + { + 0x0274, + 0x011F + }, + + Package (0x02) + { + 0x032C, + 0x01BD + }, + + Package (0x02) + { + 0x03D7, + 0x0227 + }, + + Package (0x02) + { + 0x048B, + 0x026D + }, + + Package (0x02) + { + 0x053E, + 0x02A1 + }, + + Package (0x02) + { + 0x05F7, + 0x02C6 + }, + + Package (0x02) + { + 0x06A8, + 0x02E6 + }, + + Package (0x02) + { + 0x075D, + 0x02FF + }, + + Package (0x02) + { + 0x0818, + 0x0311 + }, + + Package (0x02) + { + 0x08CF, + 0x0322 + }, + + Package (0x02) + { + 0x179C, + 0x0381 + }, + + Package (0x02) + { + 0x2DDC, + 0x039C + }, + + Package (0x02) + { + 0x44A8, + 0x039E + }, + + Package (0x02) + { + 0x5C35, + 0x0397 + }, + + Package (0x02) + { + 0x747D, + 0x038D + }, + + Package (0x02) + { + 0x8D7F, + 0x0382 + }, + + Package (0x02) + { + 0xA768, + 0x0376 + }, + + Package (0x02) + { + 0xC23B, + 0x0369 + }, + + Package (0x02) + { + 0xDE26, + 0x035A + }, + + Package (0x02) + { + 0xFB7C, + 0x034A + } + }) + Name (CEUP, Package (0x06) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }) + Method (CEUC, 0, NotSerialized) + { + Store (One, Index (CEUP, Zero)) + Store (ECEU, Index (CEUP, One)) + Store (TGFG, Index (CEUP, 0x02)) + Store (0x28, Index (CEUP, 0x03)) + Store (0x14, Index (CEUP, 0x04)) + Store (0x14, Index (CEUP, 0x05)) + Return (CEUP) + } + + Method (_TMP, 0, Serialized) // _TMP: Temperature + { + Return (\_TZ.THM0._TMP ()) + } + + Method (_DTI, 1, NotSerialized) // _DTI: Device Temperature Indication + { + Store (Arg0, LSTM) + Notify (\_SB.PCI0.B0D4, 0x91) + } + + Method (_NTT, 0, NotSerialized) // _NTT: Notification Temperature Threshold + { + Return (0x0ADE) + } + + Name (PTYP, Zero) + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + If (CondRefOf (\_PR.PR00._PSS)) + { + Return (\_PR.PR00._PSS ()) + } + Else + { + Return (Package (0x02) + { + Package (0x06) + { + Zero, + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x06) + { + Zero, + Zero, + Zero, + Zero, + Zero, + Zero + } + }) + } + } + + Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States + { + If (CondRefOf (\_PR.PR00._TSS)) + { + Return (\_PR.PR00._TSS ()) + } + Else + { + Return (Package (0x02) + { + Package (0x05) + { + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x05) + { + Zero, + Zero, + Zero, + Zero, + Zero + } + }) + } + } + + Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities + { + If (CondRefOf (\_PR.PR00._TPC)) + { + Return (\_PR.PR00._TPC) + } + Else + { + Return (Zero) + } + } + + Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control + { + If (LAnd (CondRefOf (\PC00), LNotEqual (\PC00, 0x80000000))) + { + If (And (\PC00, 0x04)) + { + Return (Package (0x02) + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + } + }) + } + Else + { + Return (Package (0x02) + { + ResourceTemplate () + { + Register (SystemIO, + 0x05, // Bit Width + 0x00, // Bit Offset + 0x0000000000001810, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemIO, + 0x05, // Bit Width + 0x00, // Bit Offset + 0x0000000000001810, // Address + ,) + } + }) + } + } + Else + { + Return (Package (0x02) + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + } + }) + } + } + + Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies + { + If (CondRefOf (\_PR.PR00._TSD)) + { + Return (\_PR.PR00._TSD ()) + } + Else + { + Return (Package (0x02) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x05) + { + 0x05, + Zero, + Zero, + Zero, + Zero + } + }) + } + } + + Method (_TDL, 0, NotSerialized) // _TDL: T-State Depth Limit + { + If (LAnd (CondRefOf (\_PR.PR00._TSS), CondRefOf (\_PR.CFGD))) + { + If (And (\_PR.CFGD, 0x2000)) + { + Return (Subtract (SizeOf (\_PR.PR00.TSMF), One)) + } + Else + { + Return (Subtract (SizeOf (\_PR.PR00.TSMC), One)) + } + } + Else + { + Return (Zero) + } + } + + Method (_PDL, 0, NotSerialized) // _PDL: P-state Depth Limit + { + If (CondRefOf (\_PR.PR00._PSS)) + { + If (And (\_SB.OSCP, 0x0400)) + { + Return (Subtract (SizeOf (\_PR.PR00.TPSS), One)) + } + Else + { + Return (Subtract (SizeOf (\_PR.PR00.LPSS), One)) + } + } + Else + { + Return (Zero) + } + } + + Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period + { + Return (\CPUS) + } + + Method (_PSV, 0, Serialized) // _PSV: Passive Temperature + { + Return (\_SB.IETM.CTOK (\PTMC)) + } + + Method (_CRT, 0, Serialized) // _CRT: Critical Temperature + { + If (LEqual (\SACR, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (\SACR)) + } + + Method (_CR3, 0, Serialized) // _CR3: Warm/Standby Temperature + { + If (LEqual (\SAC3, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (\SAC3)) + } + + Method (_HOT, 0, Serialized) // _HOT: Hot Temperature + { + If (LEqual (\SAHT, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (\SAHT)) + } + + Method (_SCP, 3, Serialized) // _SCP: Set Cooling Policy + { + If (LOr (LEqual (Arg0, Zero), LEqual (Arg0, One))) + { + Store (Arg0, CTYP) + Notify (\_SB.PCI0.B0D4, 0x91) + } + } + + Name (VERS, Zero) + Name (CTYP, Zero) + Name (ALMT, Zero) + Name (PLMT, Zero) + Name (WKLD, Zero) + Name (DSTA, Zero) + Name (RES1, Zero) + Method (DSCP, 7, Serialized) + { + If (LOr (LEqual (Arg1, Zero), LEqual (Arg1, One))) + { + Store (Arg0, VERS) + Store (Arg1, CTYP) + Store (Arg2, ALMT) + Store (Arg3, PLMT) + Store (Arg4, WKLD) + Store (Arg5, DSTA) + Store (Arg6, RES1) + Notify (\_SB.PCI0.B0D4, 0x91) + } + } + } + + Scope (\_SB.IETM) + { + Name (CTSP, Package (0x01) + { + ToUUID ("e145970a-e4c1-4d73-900e-c9c5a69dd067") + }) + } + + Scope (\_SB.PCI0.B0D4) + { + Method (TDPL, 0, Serialized) + { + Name (AAAA, Zero) + Name (BBBB, Zero) + Name (CCCC, Zero) + Store (CTNL, Local0) + If (LOr (LEqual (Local0, One), LEqual (Local0, 0x02))) + { + Store (\_PR.CLVL, Local0) + } + Else + { + Return (Package (0x01) + { + Zero + }) + } + + If (LEqual (CLCK, One)) + { + Store (One, Local0) + } + + Store (CPNU (\_PR.PL10, One), AAAA) + Store (CPNU (\_PR.PL11, One), BBBB) + Store (CPNU (\_PR.PL12, One), CCCC) + Name (TMP1, Package (0x01) + { + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Name (TMP2, Package (0x02) + { + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + Name (TMP3, Package (0x03) + { + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + }, + + Package (0x05) + { + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x80000000 + } + }) + If (LEqual (Local0, 0x03)) + { + If (LGreater (AAAA, BBBB)) + { + If (LGreater (AAAA, CCCC)) + { + If (LGreater (BBBB, CCCC)) + { + Store (Zero, Local3) + Store (Zero, LEV0) + Store (One, Local4) + Store (One, LEV1) + Store (0x02, Local5) + Store (0x02, LEV2) + } + Else + { + Store (Zero, Local3) + Store (Zero, LEV0) + Store (One, Local5) + Store (0x02, LEV1) + Store (0x02, Local4) + Store (One, LEV2) + } + } + Else + { + Store (Zero, Local5) + Store (0x02, LEV0) + Store (One, Local3) + Store (Zero, LEV1) + Store (0x02, Local4) + Store (One, LEV2) + } + } + ElseIf (LGreater (BBBB, CCCC)) + { + If (LGreater (AAAA, CCCC)) + { + Store (Zero, Local4) + Store (One, LEV0) + Store (One, Local3) + Store (Zero, LEV1) + Store (0x02, Local5) + Store (0x02, LEV2) + } + Else + { + Store (Zero, Local4) + Store (One, LEV0) + Store (One, Local5) + Store (0x02, LEV1) + Store (0x02, Local3) + Store (Zero, LEV2) + } + } + Else + { + Store (Zero, Local5) + Store (0x02, LEV0) + Store (One, Local4) + Store (One, LEV1) + Store (0x02, Local3) + Store (Zero, LEV2) + } + + Store (Add (\_PR.TAR0, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (AAAA, Index (DerefOf (Index (TMP3, Local3)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP3, Local3)), One)) + Store (\_PR.CTC0, Index (DerefOf (Index (TMP3, Local3)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP3, Local3)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP3, Local3)), 0x04)) + Store (Add (\_PR.TAR1, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (BBBB, Index (DerefOf (Index (TMP3, Local4)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP3, Local4)), One)) + Store (\_PR.CTC1, Index (DerefOf (Index (TMP3, Local4)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP3, Local4)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP3, Local4)), 0x04)) + Store (Add (\_PR.TAR2, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (CCCC, Index (DerefOf (Index (TMP3, Local5)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP3, Local5)), One)) + Store (\_PR.CTC2, Index (DerefOf (Index (TMP3, Local5)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP3, Local5)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP3, Local5)), 0x04)) + Return (TMP3) + } + + If (LEqual (Local0, 0x02)) + { + If (LGreater (AAAA, BBBB)) + { + Store (Zero, Local3) + Store (One, Local4) + Store (Zero, LEV0) + Store (One, LEV1) + Store (Zero, LEV2) + } + Else + { + Store (Zero, Local4) + Store (One, Local3) + Store (One, LEV0) + Store (Zero, LEV1) + Store (Zero, LEV2) + } + + Store (Add (\_PR.TAR0, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (AAAA, Index (DerefOf (Index (TMP2, Local3)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP2, Local3)), One)) + Store (\_PR.CTC0, Index (DerefOf (Index (TMP2, Local3)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP2, Local3)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP2, Local3)), 0x04)) + Store (Add (\_PR.TAR1, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (BBBB, Index (DerefOf (Index (TMP2, Local4)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP2, Local4)), One)) + Store (\_PR.CTC1, Index (DerefOf (Index (TMP2, Local4)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP2, Local4)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP2, Local4)), 0x04)) + Return (TMP2) + } + + If (LEqual (Local0, One)) + { + Switch (ToInteger (\_PR.CBMI)) + { + Case (Zero) + { + Store (Add (\_PR.TAR0, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (AAAA, Index (DerefOf (Index (TMP1, Zero)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP1, Zero)), One)) + Store (\_PR.CTC0, Index (DerefOf (Index (TMP1, Zero)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP1, Zero)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP1, Zero)), 0x04)) + Store (Zero, LEV0) + Store (Zero, LEV1) + Store (Zero, LEV2) + } + Case (One) + { + Store (Add (\_PR.TAR1, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (BBBB, Index (DerefOf (Index (TMP1, Zero)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP1, Zero)), One)) + Store (\_PR.CTC1, Index (DerefOf (Index (TMP1, Zero)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP1, Zero)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP1, Zero)), 0x04)) + Store (One, LEV0) + Store (One, LEV1) + Store (One, LEV2) + } + Case (0x02) + { + Store (Add (\_PR.TAR2, One), Local1) + Multiply (Local1, 0x64, Local2) + Store (CCCC, Index (DerefOf (Index (TMP1, Zero)), Zero)) + Store (Local2, Index (DerefOf (Index (TMP1, Zero)), One)) + Store (\_PR.CTC2, Index (DerefOf (Index (TMP1, Zero)), 0x02)) + Store (Local1, Index (DerefOf (Index (TMP1, Zero)), 0x03)) + Store (Zero, Index (DerefOf (Index (TMP1, Zero)), 0x04)) + Store (0x02, LEV0) + Store (0x02, LEV1) + Store (0x02, LEV2) + } + + } + + Return (TMP1) + } + + Return (Zero) + } + + Name (MAXT, Zero) + Method (TDPC, 0, NotSerialized) + { + Return (MAXT) + } + + Name (LEV0, Zero) + Name (LEV1, Zero) + Name (LEV2, Zero) + Method (STDP, 1, Serialized) + { + If (LGreaterEqual (Arg0, \_PR.CLVL)) + { + Return (Zero) + } + + Switch (ToInteger (Arg0)) + { + Case (Zero) + { + Store (LEV0, Local0) + } + Case (One) + { + Store (LEV1, Local0) + } + Case (0x02) + { + Store (LEV2, Local0) + } + + } + + Switch (ToInteger (Local0)) + { + Case (Zero) + { + CPL0 () + } + Case (One) + { + CPL1 () + } + Case (0x02) + { + CPL2 () + } + + } + + Notify (\_SB.PCI0.B0D4, 0x83) + } + } + + Scope (\_SB.IETM) + { + Name (LPSP, Package (0x01) + { + ToUUID ("b9455b06-7949-40c6-abf2-363a70c8706c") + }) + Method (CLPM, 0, NotSerialized) + { + If (LEqual (\_SB.PCI0.B0D4.LPMS, Zero)) + { + Return (Zero) + } + + Return (LPMV) + } + + Name (LPMT, Package (0x05) + { + One, + Package (0x06) + { + \_SB.PCI0.B0D4, + Zero, + 0x00020000, + 0x32, + 0x80000000, + 0x80000000 + }, + + Package (0x06) + { + \_SB.PCI0.B0D4, + Zero, + 0x00040000, + 0x02, + 0x80000000, + 0x80000000 + }, + + Package (0x06) + { + \_SB.PCI0.B0D4, + One, + 0x00020000, + 0x32, + 0x80000000, + 0x80000000 + }, + + Package (0x06) + { + \_SB.PCI0.B0D4, + 0x09, + 0x00010000, + 0x3A98, + 0x80000000, + 0x80000000 + } + }) + } + + Scope (\_SB.PCI0.LPCB.EC) + { + Device (SEN1) + { + Name (_HID, EisaId ("INT3403")) // _HID: Hardware ID + Name (_UID, "SEN1") // _UID: Unique ID + Name (FAUX, Zero) + Name (SAUX, Zero) + Name (_STR, Unicode ("Sensor 1 CPU FIN Remote4 Sd")) // _STR: Description String + Name (PTYP, 0x03) + Name (CTYP, Zero) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (S1DE, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + + Method (_TMP, 0, Serialized) // _TMP: Temperature + { + Store (\GTST (), Local0) + Store (\_TZ._C2K (Local0), Local1) + Return (Local1) + } + + Name (PATC, Zero) + Name (GTSH, 0x14) + Name (LSTM, Zero) + Method (_DTI, 1, NotSerialized) // _DTI: Device Temperature Indication + { + Store (Arg0, LSTM) + Notify (\_SB.PCI0.LPCB.EC.SEN1, 0x91) + } + + Method (_NTT, 0, NotSerialized) // _NTT: Notification Temperature Threshold + { + Return (0x0ADE) + } + + Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period + { + Return (\SSP1) + } + + Method (_PSV, 0, Serialized) // _PSV: Passive Temperature + { + Return (\_SB.IETM.CTOK (S1PT)) + } + + Method (_CRT, 0, Serialized) // _CRT: Critical Temperature + { + If (LEqual (S1CT, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (S1CT)) + } + + Method (_CR3, 0, Serialized) // _CR3: Warm/Standby Temperature + { + If (LEqual (S1S3, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (S1S3)) + } + + Method (_HOT, 0, Serialized) // _HOT: Hot Temperature + { + If (LEqual (S1HT, Zero)) + { + Return (0xFFFFFFFF) + } + + Return (\_SB.IETM.CTOK (S1HT)) + } + + Method (_SCP, 3, Serialized) // _SCP: Set Cooling Policy + { + If (LOr (LEqual (Arg0, Zero), LEqual (Arg0, One))) + { + Store (Arg0, CTYP) + Notify (\_SB.PCI0.LPCB.EC.SEN1, 0x91) + } + } + + Name (VERS, Zero) + Name (ALMT, Zero) + Name (PLMT, Zero) + Name (WKLD, Zero) + Name (DSTA, Zero) + Name (RES1, Zero) + Method (DSCP, 7, Serialized) + { + If (LOr (LEqual (Arg1, Zero), LEqual (Arg1, One))) + { + Store (Arg0, VERS) + Store (Arg1, CTYP) + Store (Arg2, ALMT) + Store (Arg3, PLMT) + Store (Arg4, WKLD) + Store (Arg5, DSTA) + Store (Arg6, RES1) + Notify (\_SB.PCI0.LPCB.EC.SEN1, 0x91) + } + } + } + } + + Scope (\_SB.IETM) + { + Name (ETRM, Package (0x02) + { + Package (0x04) + { + \_SB.PCI0.LPCB.EC.SEN1, + "INT3403", + 0x06, + "SEN1" + }, + + Package (0x04) + { + \_SB.PCI0.B0D4, + "8086_1903", + Zero, + "0x00040000" + } + }) + } + + Scope (\_SB.IETM) + { + Name (TRT0, Package (0x01) + { + Package (0x08) + { + \_SB.PCI0.B0D4, + \_SB.PCI0.B0D4, + 0x12, + 0x32, + Zero, + Zero, + Zero, + Zero + } + }) + Method (TRTR, 0, NotSerialized) + { + Return (TRTV) + } + + Method (_TRT, 0, NotSerialized) // _TRT: Thermal Relationship Table + { + Return (TRT0) + } + } + + Scope (\_SB.IETM) + { + Name (PTTL, 0x14) + Name (PSVT, Package (0x03) + { + 0x02, + Package (0x0C) + { + \_SB.PCI0.B0D4, + \_SB.PCI0.B0D4, + 0x02, + 0x05, + 0x0E94, + Zero, + 0x00010000, + "MIN", + 0x7D, + 0x0A, + 0x0190, + Zero + }, + + Package (0x0C) + { + \_SB.PCI0.B0D4, + \_SB.PCI0.LPCB.EC.SEN1, + One, + 0x0A, + 0x0E8A, + 0x0E, + 0x00010000, + "MIN", + 0x01F4, + 0x0A, + 0x14, + Zero + } + }) + } + + Scope (\_SB.IETM) + { + Name (DP2P, Package (0x01) + { + ToUUID ("9e04115a-ae87-4d1c-9500-0f3e340bfe75") + }) + Name (DPSP, Package (0x01) + { + ToUUID ("42a441d6-ae6a-462b-a84b-4a8ce79027d3") + }) + Name (DASP, Package (0x01) + { + ToUUID ("3a95c389-e4b8-4629-a526-c52c88626bae") + }) + Name (DA2P, Package (0x01) + { + ToUUID ("0e56fab6-bdfc-4e8c-8246-40ecfd4d74ea") + }) + Name (DCSP, Package (0x01) + { + ToUUID ("97c68ae7-15fa-499c-b8c9-5da81d606e0a") + }) + Name (DMSP, Package (0x01) + { + ToUUID ("16caf1b7-dd38-40ed-b1c1-1b8a1913d531") + }) + Name (POBP, Package (0x01) + { + ToUUID ("f5a35014-c209-46a4-993a-eb56de7530a1") + }) + Name (HDCP, Package (0x01) + { + ToUUID ("be84babf-c4d4-403d-b495-3128fd44dac1") + }) + Name (DAPP, Package (0x01) + { + ToUUID ("63be270f-1c11-48fd-a6f7-3af253ff3e2d") + }) + Name (DVSP, Package (0x01) + { + ToUUID ("6ed722a7-9240-48a5-b479-31eef723d7cf") + }) + Name (DPID, Package (0x01) + { + ToUUID ("42496e14-bc1b-46e8-a798-ca915464426f") + }) + } + + Scope (\_SB.IETM) + { + Name (BDV1, Package (0x01) + { + Buffer (0x5F69) + { + /* 0000 */ 0xE5, 0x1F, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x01, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + /* 0010 */ 0x1B, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, + /* 0018 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, + /* 0020 */ 0x73, 0x2F, 0x49, 0x45, 0x54, 0x4D, 0x2E, 0x44, + /* 0028 */ 0x30, 0x2F, 0x70, 0x73, 0x76, 0x74, 0x00, 0x07, + /* 0030 */ 0x00, 0x00, 0x00, 0xCA, 0x00, 0x00, 0x00, 0x04, + /* 0038 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, + /* 0040 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 0050 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 0058 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x08, + /* 0060 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, + /* 0068 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 0070 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x4C, 0x50, + /* 0078 */ 0x43, 0x42, 0x2E, 0x45, 0x43, 0x5F, 0x5F, 0x2E, + /* 0080 */ 0x53, 0x45, 0x4E, 0x31, 0x00, 0x04, 0x00, 0x00, + /* 0088 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0090 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, + /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 00A0 */ 0x00, 0xB4, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 00A8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 00B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 00C0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 00C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x41, 0x58, + /* 00D0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x7D, 0x00, 0x00, + /* 00D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 00E0 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 00E8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, + /* 00F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 00F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0100 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x00, + /* 0108 */ 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, + /* 0110 */ 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, + /* 0118 */ 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x67, + /* 0120 */ 0x74, 0x73, 0x68, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 0128 */ 0x04, 0x00, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, + /* 0130 */ 0x01, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, + /* 0138 */ 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, + /* 0140 */ 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, + /* 0148 */ 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x6C, 0x61, + /* 0150 */ 0x73, 0x74, 0x5F, 0x65, 0x77, 0x6D, 0x61, 0x5F, + /* 0158 */ 0x70, 0x6F, 0x77, 0x65, 0x72, 0x00, 0x1A, 0x00, + /* 0160 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x8C, 0x58, + /* 0168 */ 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x26, 0x00, + /* 0170 */ 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, + /* 0178 */ 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, + /* 0180 */ 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, + /* 0188 */ 0x6C, 0x61, 0x73, 0x74, 0x5F, 0x70, 0x6F, 0x77, + /* 0190 */ 0x65, 0x72, 0x5F, 0x75, 0x73, 0x65, 0x64, 0x00, + /* 0198 */ 0x1A, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 01A0 */ 0x36, 0x53, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + /* 01A8 */ 0x1B, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, + /* 01B0 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, + /* 01B8 */ 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, + /* 01C0 */ 0x30, 0x2F, 0x70, 0x70, 0x63, 0x63, 0x00, 0x07, + /* 01C8 */ 0x00, 0x00, 0x00, 0x9C, 0x00, 0x00, 0x00, 0x04, + /* 01D0 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, + /* 01D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 01E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 01E8 */ 0x00, 0x00, 0x00, 0x98, 0x3A, 0x00, 0x00, 0x00, + /* 01F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x98, + /* 01F8 */ 0x3A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 0200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0208 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 0210 */ 0xFA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 0218 */ 0x00, 0x00, 0x00, 0x7D, 0x00, 0x00, 0x00, 0x00, + /* 0220 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 0228 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 0230 */ 0x00, 0x00, 0x00, 0x94, 0x11, 0x00, 0x00, 0x00, + /* 0238 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xE0, + /* 0240 */ 0xAB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 0248 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0250 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 0258 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 0260 */ 0x00, 0x00, 0x00, 0xF4, 0x01, 0x00, 0x00, 0x00, + /* 0268 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x25, + /* 0270 */ 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, + /* 0278 */ 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, + /* 0280 */ 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, + /* 0288 */ 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, + /* 0290 */ 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x30, 0x00, + /* 0298 */ 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 02A0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, + /* 02A8 */ 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, + /* 02B0 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, + /* 02B8 */ 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, + /* 02C0 */ 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, + /* 02C8 */ 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x31, + /* 02D0 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 02D8 */ 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, + /* 02E0 */ 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, + /* 02E8 */ 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, + /* 02F0 */ 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, + /* 02F8 */ 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, + /* 0300 */ 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, + /* 0308 */ 0x32, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 0310 */ 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, + /* 0318 */ 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, + /* 0320 */ 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, + /* 0328 */ 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, + /* 0330 */ 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, + /* 0338 */ 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x61, + /* 0340 */ 0x63, 0x33, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, + /* 0348 */ 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, + /* 0350 */ 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, + /* 0358 */ 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, + /* 0360 */ 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, + /* 0368 */ 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, + /* 0370 */ 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, + /* 0378 */ 0x61, 0x63, 0x34, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 0380 */ 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + /* 0388 */ 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, + /* 0390 */ 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, + /* 0398 */ 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, + /* 03A0 */ 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, + /* 03A8 */ 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, + /* 03B0 */ 0x5F, 0x61, 0x63, 0x35, 0x00, 0x06, 0x00, 0x00, + /* 03B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, + /* 03C0 */ 0xFF, 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, + /* 03C8 */ 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, + /* 03D0 */ 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, + /* 03D8 */ 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, + /* 03E0 */ 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, + /* 03E8 */ 0x2F, 0x5F, 0x61, 0x63, 0x36, 0x00, 0x06, 0x00, + /* 03F0 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, + /* 03F8 */ 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, + /* 0400 */ 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, + /* 0408 */ 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, + /* 0410 */ 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, + /* 0418 */ 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, + /* 0420 */ 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x37, 0x00, 0x06, + /* 0428 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, + /* 0430 */ 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x25, + /* 0438 */ 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, 0x74, + /* 0440 */ 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, 0x73, + /* 0448 */ 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, 0x30, + /* 0450 */ 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, 0x69, + /* 0458 */ 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x38, 0x00, + /* 0460 */ 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 0468 */ 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, + /* 0470 */ 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, 0x72, + /* 0478 */ 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, 0x74, + /* 0480 */ 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, 0x44, + /* 0488 */ 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, 0x6F, + /* 0490 */ 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x61, 0x63, 0x39, + /* 0498 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 04A0 */ 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, + /* 04A8 */ 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, 0x61, + /* 04B0 */ 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, 0x6E, + /* 04B8 */ 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, 0x2E, + /* 04C0 */ 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, 0x70, + /* 04C8 */ 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x63, 0x72, + /* 04D0 */ 0x33, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 04D8 */ 0x00, 0x00, 0x76, 0x0E, 0x00, 0x00, 0x01, 0x00, + /* 04E0 */ 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, 0x70, + /* 04E8 */ 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, 0x61, + /* 04F0 */ 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, 0x55, + /* 04F8 */ 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, 0x70, + /* 0500 */ 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, 0x63, + /* 0508 */ 0x72, 0x74, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, + /* 0510 */ 0x00, 0x00, 0x00, 0x94, 0x0E, 0x00, 0x00, 0x01, + /* 0518 */ 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x2F, + /* 0520 */ 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, 0x70, + /* 0528 */ 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, 0x50, + /* 0530 */ 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, 0x69, + /* 0538 */ 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, 0x5F, + /* 0540 */ 0x68, 0x6F, 0x74, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 0548 */ 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + /* 0550 */ 0x01, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, + /* 0558 */ 0x2F, 0x70, 0x61, 0x72, 0x74, 0x69, 0x63, 0x69, + /* 0560 */ 0x70, 0x61, 0x6E, 0x74, 0x73, 0x2F, 0x54, 0x43, + /* 0568 */ 0x50, 0x55, 0x2E, 0x44, 0x30, 0x2F, 0x74, 0x72, + /* 0570 */ 0x69, 0x70, 0x70, 0x6F, 0x69, 0x6E, 0x74, 0x2F, + /* 0578 */ 0x5F, 0x70, 0x73, 0x76, 0x00, 0x06, 0x00, 0x00, + /* 0580 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0xCC, 0x0D, 0x00, + /* 0588 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, + /* 0590 */ 0x00, 0x2F, 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, + /* 0598 */ 0x2F, 0x65, 0x78, 0x70, 0x6F, 0x72, 0x74, 0x2F, + /* 05A0 */ 0x61, 0x70, 0x61, 0x74, 0x00, 0x07, 0x00, 0x00, + /* 05A8 */ 0x00, 0x2A, 0x34, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 05B0 */ 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 05B8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, + /* 05C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 05C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 05D0 */ 0x00, 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, + /* 05D8 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 05E0 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 05E8 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 05F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 05F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0600 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0608 */ 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, + /* 0610 */ 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + /* 0618 */ 0x00, 0x00, 0x00, 0x00, 0x34, 0x35, 0x30, 0x30, + /* 0620 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, + /* 0628 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0630 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0638 */ 0x00, 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, + /* 0640 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0648 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 0650 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 0658 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 0660 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0668 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0670 */ 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, + /* 0678 */ 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + /* 0680 */ 0x00, 0x00, 0x00, 0x00, 0x34, 0x35, 0x30, 0x30, + /* 0688 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, + /* 0690 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0698 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 06A0 */ 0x00, 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, + /* 06A8 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 06B0 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 06B8 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 06C0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 06C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 06D0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 06D8 */ 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, + /* 06E0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 06E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, + /* 06F0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, + /* 06F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0700 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0708 */ 0x00, 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, + /* 0710 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0718 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 0720 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 0728 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 0730 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0738 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0740 */ 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, + /* 0748 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, + /* 0750 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 0758 */ 0x00, 0x00, 0x00, 0x34, 0x35, 0x30, 0x30, 0x00, + /* 0760 */ 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 0768 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0770 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0778 */ 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0780 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0788 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 0790 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 0798 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 07A0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 07A8 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 07B0 */ 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, + /* 07B8 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, + /* 07C0 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 07C8 */ 0x00, 0x00, 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, + /* 07D0 */ 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 07D8 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 07E0 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 07E8 */ 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 07F0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 07F8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 0800 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 0808 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 0810 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0818 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0820 */ 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, + /* 0828 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, + /* 0830 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0838 */ 0x00, 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, + /* 0840 */ 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 0848 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0850 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0858 */ 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0860 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0868 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 0870 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 0878 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 0880 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0888 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0890 */ 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, + /* 0898 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, + /* 08A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, + /* 08A8 */ 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 08B0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 08B8 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 08C0 */ 0x53, 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 08C8 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 08D0 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, + /* 08D8 */ 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, + /* 08E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 08E8 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 08F0 */ 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, + /* 08F8 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 0900 */ 0x00, 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, + /* 0908 */ 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, + /* 0910 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0918 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0920 */ 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, 0x43, 0x00, + /* 0928 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 0930 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 0938 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 0940 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 0948 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0950 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + /* 0958 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, + /* 0960 */ 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 0968 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, + /* 0970 */ 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 0978 */ 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0980 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0988 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, + /* 0990 */ 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 0998 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 09A0 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 09A8 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 09B0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 09B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 09C0 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 09C8 */ 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, + /* 09D0 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 09D8 */ 0x00, 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, 0x30, + /* 09E0 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, + /* 09E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 09F0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 09F8 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, + /* 0A00 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 0A08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 0A10 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 0A18 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 0A20 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0A28 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0A30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 0A38 */ 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, + /* 0A40 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0A48 */ 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 0A50 */ 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0A58 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0A60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, + /* 0A68 */ 0x43, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 0A70 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0A78 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 0A80 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 0A88 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 0A90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0A98 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0AA0 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, + /* 0AA8 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, + /* 0AB0 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 0AB8 */ 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, 0x30, + /* 0AC0 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, + /* 0AC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0AD0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0AD8 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, + /* 0AE0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 0AE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 0AF0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 0AF8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 0B00 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0B08 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 0B10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 0B18 */ 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, + /* 0B20 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0B28 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0B30 */ 0x32, 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 0B38 */ 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0B40 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0B48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, + /* 0B50 */ 0x43, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 0B58 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0B60 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 0B68 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 0B70 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 0B78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0B80 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0B88 */ 0x00, 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, + /* 0B90 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, + /* 0B98 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 0BA0 */ 0x00, 0x00, 0x00, 0x00, 0x34, 0x33, 0x30, 0x30, + /* 0BA8 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x00, + /* 0BB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0BB8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0BC0 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x32, 0x5F, 0x44, + /* 0BC8 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 0BD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 0BD8 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 0BE0 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 0BE8 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0BF0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, + /* 0BF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, + /* 0C00 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, + /* 0C08 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + /* 0C10 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, + /* 0C18 */ 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0C20 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0C28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, + /* 0C30 */ 0x43, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 0C38 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0C40 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 0C48 */ 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, + /* 0C50 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0C58 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, + /* 0C60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, + /* 0C68 */ 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 0C70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x71, + /* 0C78 */ 0x6C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, + /* 0C80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 0C88 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0C90 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x37, 0x5F, 0x41, + /* 0C98 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 0CA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 0CA8 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 0CB0 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 0CB8 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0CC0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, + /* 0CC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 0CD0 */ 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, + /* 0CD8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0CE0 */ 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 0CE8 */ 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, + /* 0CF0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, + /* 0CF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 0D00 */ 0x53, 0x43, 0x37, 0x5F, 0x41, 0x43, 0x00, 0x08, + /* 0D08 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, + /* 0D10 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 0D18 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, + /* 0D20 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 0D28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 0D30 */ 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, + /* 0D38 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, + /* 0D40 */ 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, + /* 0D48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x33, + /* 0D50 */ 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 0D58 */ 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0D60 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0D68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, + /* 0D70 */ 0x37, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 0D78 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0D80 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 0D88 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 0D90 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 0D98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0DA0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0DA8 */ 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, + /* 0DB0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 0DB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, + /* 0DC0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, + /* 0DC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0DD0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0DD8 */ 0x00, 0x50, 0x53, 0x43, 0x37, 0x5F, 0x41, 0x43, + /* 0DE0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 0DE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 0DF0 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 0DF8 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 0E00 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0E08 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 0E10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 0E18 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, + /* 0E20 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 0E28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, + /* 0E30 */ 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 0E38 */ 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0E40 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0E48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, + /* 0E50 */ 0x37, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 0E58 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0E60 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 0E68 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 0E70 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 0E78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0E80 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0E88 */ 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, + /* 0E90 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, + /* 0E98 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 0EA0 */ 0x00, 0x00, 0x00, 0x32, 0x39, 0x30, 0x30, 0x30, + /* 0EA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, + /* 0EB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0EB8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0EC0 */ 0x00, 0x50, 0x53, 0x43, 0x37, 0x5F, 0x41, 0x43, + /* 0EC8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 0ED0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 0ED8 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 0EE0 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 0EE8 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0EF0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 0EF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, + /* 0F00 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, + /* 0F08 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 0F10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, + /* 0F18 */ 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 0F20 */ 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0F28 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0F30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, + /* 0F38 */ 0x37, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 0F40 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0F48 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 0F50 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 0F58 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 0F60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0F68 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0F70 */ 0x00, 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, + /* 0F78 */ 0x65, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, + /* 0F80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, + /* 0F88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, + /* 0F90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 0F98 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0FA0 */ 0x00, 0x50, 0x53, 0x43, 0x37, 0x5F, 0x41, 0x43, + /* 0FA8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 0FB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 0FB8 */ 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, + /* 0FC0 */ 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 0FC8 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0FD0 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0FD8 */ 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, + /* 0FE0 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0FE8 */ 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, + /* 0FF0 */ 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0FF8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 1000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, + /* 1008 */ 0x38, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 1010 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1018 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 1020 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 1028 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 1030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 1038 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1040 */ 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, + /* 1048 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 1050 */ 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, 0x30, + /* 1058 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, + /* 1060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 1068 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1070 */ 0x00, 0x00, 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, + /* 1078 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 1080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 1088 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 1090 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 1098 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 10A0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, + /* 10A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 10B0 */ 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, + /* 10B8 */ 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 10C0 */ 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, 0x30, 0x00, + /* 10C8 */ 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, + /* 10D0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 10D8 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 10E0 */ 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, 0x43, 0x00, + /* 10E8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 10F0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 10F8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 1100 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1108 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1110 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1118 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, + /* 1120 */ 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1128 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1130 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1138 */ 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1140 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1148 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x38, + /* 1150 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1158 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1160 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 1168 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 1170 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 1178 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1180 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1188 */ 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, + /* 1190 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, + /* 1198 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 11A0 */ 0x00, 0x00, 0x31, 0x35, 0x30, 0x30, 0x30, 0x00, + /* 11A8 */ 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, + /* 11B0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 11B8 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 11C0 */ 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, 0x43, 0x00, + /* 11C8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 11D0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 11D8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 11E0 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 11E8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 11F0 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 11F8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, + /* 1200 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, + /* 1208 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, + /* 1210 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x35, + /* 1218 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1220 */ 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1228 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1230 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x38, + /* 1238 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1240 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1248 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 1250 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 1258 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 1260 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1268 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1270 */ 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, + /* 1278 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, + /* 1280 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1288 */ 0x00, 0x00, 0x34, 0x33, 0x30, 0x30, 0x30, 0x00, + /* 1290 */ 0x04, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, + /* 1298 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 12A0 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 12A8 */ 0x50, 0x53, 0x43, 0x38, 0x5F, 0x44, 0x43, 0x00, + /* 12B0 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 12B8 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 12C0 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 12C8 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 12D0 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 12D8 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 12E0 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, + /* 12E8 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, + /* 12F0 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 12F8 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1300 */ 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1308 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1310 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x43, 0x38, + /* 1318 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1320 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1328 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, + /* 1330 */ 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, + /* 1338 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 1340 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 1348 */ 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, + /* 1350 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1358 */ 0x00, 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, + /* 1360 */ 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, + /* 1368 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1370 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1378 */ 0x4D, 0x4D, 0x43, 0x5F, 0x43, 0x4F, 0x4F, 0x4C, + /* 1380 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 1388 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 1390 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 1398 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 13A0 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 13A8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, + /* 13B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 13B8 */ 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 13C0 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 13C8 */ 0x31, 0x32, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 13D0 */ 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 13D8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 13E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, + /* 13E8 */ 0x43, 0x5F, 0x43, 0x4F, 0x4F, 0x4C, 0x00, 0x08, + /* 13F0 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, + /* 13F8 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 1400 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, + /* 1408 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 1410 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 1418 */ 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, + /* 1420 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, + /* 1428 */ 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, + /* 1430 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x35, + /* 1438 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x17, + /* 1440 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 1448 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 1450 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x43, + /* 1458 */ 0x4F, 0x4F, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1460 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1468 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 1470 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 1478 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 1480 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1488 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1490 */ 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, + /* 1498 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 14A0 */ 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, + /* 14A8 */ 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, + /* 14B0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 14B8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 14C0 */ 0x4D, 0x4D, 0x43, 0x5F, 0x43, 0x4F, 0x4F, 0x4C, + /* 14C8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 14D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 14D8 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 14E0 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 14E8 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 14F0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 14F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 1500 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, + /* 1508 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 1510 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, + /* 1518 */ 0x32, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 1520 */ 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1528 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 1530 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, + /* 1538 */ 0x5F, 0x43, 0x4F, 0x4F, 0x4C, 0x00, 0x08, 0x00, + /* 1540 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1548 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 1550 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 1558 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 1560 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 1568 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1570 */ 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, + /* 1578 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, + /* 1580 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 1588 */ 0x00, 0x00, 0x00, 0x00, 0x32, 0x39, 0x30, 0x30, + /* 1590 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x17, 0x00, + /* 1598 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 15A0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 15A8 */ 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x43, 0x4F, + /* 15B0 */ 0x4F, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 15B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 15C0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 15C8 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 15D0 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 15D8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 15E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 15E8 */ 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 15F0 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 15F8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1600 */ 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 1608 */ 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, + /* 1610 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x09, + /* 1618 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, + /* 1620 */ 0x4D, 0x43, 0x5F, 0x43, 0x4F, 0x4F, 0x4C, 0x00, + /* 1628 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 1630 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 1638 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 1640 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1648 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1650 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 1658 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, + /* 1660 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, + /* 1668 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1670 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1678 */ 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1680 */ 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 1688 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, + /* 1690 */ 0x43, 0x4F, 0x4F, 0x4C, 0x00, 0x08, 0x00, 0x00, + /* 1698 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 16A0 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, + /* 16A8 */ 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 16B0 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 16B8 */ 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + /* 16C0 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, + /* 16C8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 16D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x71, 0x6C, + /* 16D8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, + /* 16E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 16E8 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 16F0 */ 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, + /* 16F8 */ 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, + /* 1700 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1708 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1710 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 1718 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 1720 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 1728 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1730 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1738 */ 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, + /* 1740 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 1748 */ 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, + /* 1750 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, + /* 1758 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 1760 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1768 */ 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, + /* 1770 */ 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, + /* 1778 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1780 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1788 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 1790 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 1798 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 17A0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 17A8 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 17B0 */ 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, + /* 17B8 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 17C0 */ 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, + /* 17C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, + /* 17D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 17D8 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 17E0 */ 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, + /* 17E8 */ 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, + /* 17F0 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 17F8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1800 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 1808 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 1810 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 1818 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1820 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1828 */ 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, + /* 1830 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1838 */ 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, + /* 1840 */ 0x04, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, + /* 1848 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1850 */ 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1858 */ 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, + /* 1860 */ 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, + /* 1868 */ 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 1870 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 1878 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 1880 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 1888 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 1890 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 1898 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 18A0 */ 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 18A8 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 18B0 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 18B8 */ 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 18C0 */ 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, + /* 18C8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, + /* 18D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, + /* 18D8 */ 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, + /* 18E0 */ 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x41, + /* 18E8 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 18F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 18F8 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 1900 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 1908 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1910 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 1918 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 1920 */ 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, + /* 1928 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1930 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1938 */ 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 1940 */ 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1948 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, + /* 1950 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, + /* 1958 */ 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, + /* 1960 */ 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x41, 0x43, + /* 1968 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 1970 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 1978 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 1980 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 1988 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1990 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 1998 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, + /* 19A0 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, + /* 19A8 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 19B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, + /* 19B8 */ 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 19C0 */ 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 19C8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, + /* 19D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, + /* 19D8 */ 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, + /* 19E0 */ 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x41, 0x43, 0x00, + /* 19E8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 19F0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 19F8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 1A00 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1A08 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1A10 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 1A18 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, + /* 1A20 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, + /* 1A28 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1A30 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 1A38 */ 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1A40 */ 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, + /* 1A48 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, + /* 1A50 */ 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, + /* 1A58 */ 0x4E, 0x43, 0x45, 0x5F, 0x41, 0x43, 0x00, 0x08, + /* 1A60 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, + /* 1A68 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 1A70 */ 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, + /* 1A78 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1A80 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, + /* 1A88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, + /* 1A90 */ 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 1A98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x73, + /* 1AA0 */ 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, + /* 1AA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 1AB0 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, + /* 1AB8 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, + /* 1AC0 */ 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, + /* 1AC8 */ 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 1AD0 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1AD8 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 1AE0 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 1AE8 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 1AF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 1AF8 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1B00 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, + /* 1B08 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 1B10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, + /* 1B18 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, + /* 1B20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 1B28 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, + /* 1B30 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, + /* 1B38 */ 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, + /* 1B40 */ 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 1B48 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1B50 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 1B58 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 1B60 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 1B68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 1B70 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1B78 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, + /* 1B80 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 1B88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, + /* 1B90 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, + /* 1B98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 1BA0 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, + /* 1BA8 */ 0x00, 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, + /* 1BB0 */ 0x45, 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, + /* 1BB8 */ 0x43, 0x45, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 1BC0 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1BC8 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 1BD0 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 1BD8 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 1BE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 1BE8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1BF0 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, + /* 1BF8 */ 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 1C00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, + /* 1C08 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, 0x00, + /* 1C10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 1C18 */ 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1C20 */ 0x00, 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, + /* 1C28 */ 0x52, 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, + /* 1C30 */ 0x45, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 1C38 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1C40 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 1C48 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 1C50 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 1C58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 1C60 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1C68 */ 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, + /* 1C70 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, + /* 1C78 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 1C80 */ 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, 0x30, 0x30, + /* 1C88 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, + /* 1C90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 1C98 */ 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1CA0 */ 0x00, 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, + /* 1CA8 */ 0x46, 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, + /* 1CB0 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1CB8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1CC0 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 1CC8 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 1CD0 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 1CD8 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1CE0 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1CE8 */ 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, + /* 1CF0 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, + /* 1CF8 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1D00 */ 0x00, 0x00, 0x32, 0x35, 0x30, 0x30, 0x30, 0x00, + /* 1D08 */ 0x04, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, + /* 1D10 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1D18 */ 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1D20 */ 0x4D, 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, + /* 1D28 */ 0x4F, 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, + /* 1D30 */ 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 1D38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 1D40 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 1D48 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 1D50 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 1D58 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 1D60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 1D68 */ 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 1D70 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 1D78 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1D80 */ 0x00, 0x34, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 1D88 */ 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x00, + /* 1D90 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, + /* 1D98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, + /* 1DA0 */ 0x4D, 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, + /* 1DA8 */ 0x52, 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x44, + /* 1DB0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 1DB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 1DC0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 1DC8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 1DD0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1DD8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, + /* 1DE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, + /* 1DE8 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, + /* 1DF0 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + /* 1DF8 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, + /* 1E00 */ 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1E08 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x13, 0x00, + /* 1E10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x4D, + /* 1E18 */ 0x43, 0x5F, 0x50, 0x45, 0x52, 0x46, 0x4F, 0x52, + /* 1E20 */ 0x4D, 0x41, 0x4E, 0x43, 0x45, 0x5F, 0x44, 0x43, + /* 1E28 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 1E30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 1E38 */ 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, + /* 1E40 */ 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 1E48 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1E50 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1E58 */ 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, + /* 1E60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1E68 */ 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, + /* 1E70 */ 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1E78 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 1E80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, + /* 1E88 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 1E90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 1E98 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 1EA0 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 1EA8 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1EB0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, + /* 1EB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 1EC0 */ 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1EC8 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1ED0 */ 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 1ED8 */ 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1EE0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 1EE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, + /* 1EF0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 1EF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 1F00 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 1F08 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 1F10 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1F18 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, + /* 1F20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 1F28 */ 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 1F30 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1F38 */ 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 1F40 */ 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1F48 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 1F50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, + /* 1F58 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 1F60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 1F68 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 1F70 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 1F78 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1F80 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 1F88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 1F90 */ 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, + /* 1F98 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1FA0 */ 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 1FA8 */ 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1FB0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 1FB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, + /* 1FC0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 1FC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 1FD0 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 1FD8 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 1FE0 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 1FE8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 1FF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 1FF8 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, + /* 2000 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, + /* 2008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, + /* 2010 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2018 */ 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2020 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2028 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, 0x00, + /* 2030 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 2038 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 2040 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 2048 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2058 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 2060 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, + /* 2068 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, + /* 2070 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, + /* 2078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x39, + /* 2080 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2088 */ 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2090 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2098 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, 0x00, + /* 20A0 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 20A8 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 20B0 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 20B8 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 20C0 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 20C8 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 20D0 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, 0x50, + /* 20D8 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, + /* 20E0 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, + /* 20E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x31, + /* 20F0 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 20F8 */ 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2100 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2108 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, 0x00, + /* 2110 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 2118 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 2120 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 2128 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2130 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2138 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 2140 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, + /* 2148 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, + /* 2150 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2158 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2160 */ 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2168 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2170 */ 0x00, 0x00, 0x00, 0x00, 0x4D, 0x53, 0x43, 0x00, + /* 2178 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, + /* 2180 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 2188 */ 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, + /* 2190 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, + /* 2198 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, + /* 21A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 21A8 */ 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 21B0 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 21B8 */ 0x63, 0x71, 0x6C, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 21C0 */ 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 21C8 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 21D0 */ 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, + /* 21D8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 21E0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 21E8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 21F0 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 21F8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2200 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + /* 2208 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, + /* 2210 */ 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, + /* 2218 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, + /* 2220 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2228 */ 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2230 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2238 */ 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, + /* 2240 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 2248 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 2250 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 2258 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2260 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2268 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + /* 2270 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, + /* 2278 */ 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, + /* 2280 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, + /* 2288 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2290 */ 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2298 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 22A0 */ 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, + /* 22A8 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 22B0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 22B8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 22C0 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 22C8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 22D0 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 22D8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, + /* 22E0 */ 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 22E8 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 22F0 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 22F8 */ 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2300 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2308 */ 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, + /* 2310 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 2318 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 2320 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 2328 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2330 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2338 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 2340 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x50, + /* 2348 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, + /* 2350 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, + /* 2358 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x35, + /* 2360 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0F, + /* 2368 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 2370 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 2378 */ 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, 0x08, + /* 2380 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, + /* 2388 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 2390 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, + /* 2398 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 23A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 23A8 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, + /* 23B0 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, + /* 23B8 */ 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, + /* 23C0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 23C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x39, 0x30, + /* 23D0 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0F, + /* 23D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 23E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 23E8 */ 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, 0x08, + /* 23F0 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, + /* 23F8 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 2400 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, + /* 2408 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 2410 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 2418 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, + /* 2420 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, + /* 2428 */ 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, + /* 2430 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 2438 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x31, 0x30, + /* 2440 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0F, + /* 2448 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 2450 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 2458 */ 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, 0x08, + /* 2460 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, + /* 2468 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 2470 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, + /* 2478 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 2480 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 2488 */ 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, + /* 2490 */ 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, 0x66, + /* 2498 */ 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 24A0 */ 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 24A8 */ 0x00, 0x35, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 24B0 */ 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 24B8 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 24C0 */ 0x00, 0x00, 0x00, 0x00, 0x49, 0x46, 0x43, 0x00, + /* 24C8 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, + /* 24D0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 24D8 */ 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, + /* 24E0 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, + /* 24E8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, + /* 24F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 24F8 */ 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2500 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2508 */ 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2510 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2518 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2520 */ 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, 0x43, 0x00, + /* 2528 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 2530 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 2538 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 2540 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2548 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2550 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + /* 2558 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, + /* 2560 */ 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 2568 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, + /* 2570 */ 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 2578 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2580 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 2588 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, 0x43, + /* 2590 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 2598 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 25A0 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 25A8 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 25B0 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 25B8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, + /* 25C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 25C8 */ 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 25D0 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 25D8 */ 0x31, 0x33, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 25E0 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 25E8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 25F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, + /* 25F8 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 2600 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2608 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 2610 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 2618 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2620 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 2628 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 2630 */ 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, + /* 2638 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2640 */ 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 2648 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2650 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 2658 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, + /* 2660 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 2668 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2670 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 2678 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 2680 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2688 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 2690 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 2698 */ 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, + /* 26A0 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 26A8 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 26B0 */ 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 26B8 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 26C0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 26C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, + /* 26D0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 26D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 26E0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 26E8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 26F0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 26F8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 2700 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 2708 */ 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, + /* 2710 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2718 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2720 */ 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 2728 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2730 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 2738 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, + /* 2740 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 2748 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2750 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 2758 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 2760 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2768 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 2770 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 2778 */ 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, + /* 2780 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2788 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2790 */ 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 2798 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 27A0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 27A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, + /* 27B0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 27B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 27C0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 27C8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 27D0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 27D8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, + /* 27E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, + /* 27E8 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, + /* 27F0 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + /* 27F8 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, + /* 2800 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2808 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 2810 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x4D, + /* 2818 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, + /* 2820 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2828 */ 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, + /* 2830 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 2838 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 2840 */ 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2848 */ 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, + /* 2850 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2858 */ 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, + /* 2860 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2868 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 2870 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x51, + /* 2878 */ 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 2880 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2888 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 2890 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 2898 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 28A0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, + /* 28A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 28B0 */ 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, + /* 28B8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 28C0 */ 0x00, 0x31, 0x32, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 28C8 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 28D0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 28D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, + /* 28E0 */ 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 28E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 28F0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 28F8 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 2900 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 2908 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, + /* 2910 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 2918 */ 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, + /* 2920 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2928 */ 0x00, 0x00, 0x34, 0x35, 0x30, 0x30, 0x00, 0x04, + /* 2930 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 2938 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 2940 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, + /* 2948 */ 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 2950 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 2958 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 2960 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 2968 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 2970 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, + /* 2978 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 2980 */ 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, + /* 2988 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 2990 */ 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, + /* 2998 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 29A0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 29A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, + /* 29B0 */ 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 29B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 29C0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 29C8 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 29D0 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 29D8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 29E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 29E8 */ 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 29F0 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 29F8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2A00 */ 0x00, 0x31, 0x32, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 2A08 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 2A10 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 2A18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, + /* 2A20 */ 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 2A28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 2A30 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 2A38 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 2A40 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 2A48 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 2A50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 2A58 */ 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 2A60 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 2A68 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2A70 */ 0x00, 0x32, 0x39, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 2A78 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 2A80 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 2A88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, + /* 2A90 */ 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 2A98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 2AA0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 2AA8 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 2AB0 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 2AB8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 2AC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 2AC8 */ 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 2AD0 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 2AD8 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2AE0 */ 0x00, 0x37, 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 2AE8 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 2AF0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 2AF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, + /* 2B00 */ 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 2B08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 2B10 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 2B18 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 2B20 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 2B28 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, + /* 2B30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, + /* 2B38 */ 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, + /* 2B40 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, + /* 2B48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, + /* 2B50 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 2B58 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 2B60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, + /* 2B68 */ 0x51, 0x4C, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, + /* 2B70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 2B78 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, + /* 2B80 */ 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 2B88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 2B90 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2B98 */ 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, + /* 2BA0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 2BA8 */ 0x00, 0x00, 0x00, 0x63, 0x71, 0x6C, 0x00, 0x04, + /* 2BB0 */ 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, + /* 2BB8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, + /* 2BC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, + /* 2BC8 */ 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, + /* 2BD0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 2BD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2BE0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 2BE8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 2BF0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2BF8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, + /* 2C00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 2C08 */ 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, + /* 2C10 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2C18 */ 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 2C20 */ 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, + /* 2C28 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, + /* 2C30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, + /* 2C38 */ 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, + /* 2C40 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 2C48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2C50 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 2C58 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 2C60 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2C68 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, + /* 2C70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 2C78 */ 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, + /* 2C80 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2C88 */ 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, 0x00, 0x04, + /* 2C90 */ 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, + /* 2C98 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, + /* 2CA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, + /* 2CA8 */ 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, + /* 2CB0 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 2CB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 2CC0 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 2CC8 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 2CD0 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2CD8 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 2CE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 2CE8 */ 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, + /* 2CF0 */ 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2CF8 */ 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 2D00 */ 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2D08 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, + /* 2D10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, + /* 2D18 */ 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, 0x43, + /* 2D20 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 2D28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 2D30 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 2D38 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 2D40 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2D48 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 2D50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, + /* 2D58 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, + /* 2D60 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 2D68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, + /* 2D70 */ 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 2D78 */ 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2D80 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 2D88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, + /* 2D90 */ 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x41, 0x43, 0x00, + /* 2D98 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 2DA0 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 2DA8 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 2DB0 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2DB8 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2DC0 */ 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 2DC8 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, + /* 2DD0 */ 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, + /* 2DD8 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, + /* 2DE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x39, + /* 2DE8 */ 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2DF0 */ 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2DF8 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, + /* 2E00 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, + /* 2E08 */ 0x55, 0x34, 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, + /* 2E10 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, + /* 2E18 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 2E20 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, + /* 2E28 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 2E30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 2E38 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, + /* 2E40 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, + /* 2E48 */ 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, + /* 2E50 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 2E58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x31, 0x30, + /* 2E60 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x16, + /* 2E68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 2E70 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, + /* 2E78 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, + /* 2E80 */ 0x34, 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, + /* 2E88 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2E90 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 2E98 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 2EA0 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 2EA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 2EB0 */ 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2EB8 */ 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, + /* 2EC0 */ 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2EC8 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2ED0 */ 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, 0x16, 0x00, + /* 2ED8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 2EE0 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2EE8 */ 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, + /* 2EF0 */ 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 2EF8 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2F00 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, + /* 2F08 */ 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 2F10 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2F18 */ 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + /* 2F20 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, + /* 2F28 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 2F30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, + /* 2F38 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, + /* 2F40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 2F48 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2F50 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, + /* 2F58 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2F60 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2F68 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 2F70 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 2F78 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 2F80 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2F88 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2F90 */ 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, 0x00, 0x08, + /* 2F98 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 2FA0 */ 0x00, 0x00, 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, + /* 2FA8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, + /* 2FB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 2FB8 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2FC0 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, + /* 2FC8 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2FD0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 2FD8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 2FE0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 2FE8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 2FF0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 2FF8 */ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3000 */ 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, 0x00, 0x08, + /* 3008 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 3010 */ 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, 0x30, 0x30, + /* 3018 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, + /* 3020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 3028 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3030 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, + /* 3038 */ 0x5F, 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3040 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3048 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 3050 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 3058 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 3060 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3068 */ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3070 */ 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, 0x50, 0x00, + /* 3078 */ 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 3080 */ 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, 0x30, 0x00, + /* 3088 */ 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, + /* 3090 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3098 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 30A0 */ 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, + /* 30A8 */ 0x41, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 30B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 30B8 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 30C0 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 30C8 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 30D0 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 30D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 30E0 */ 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 30E8 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 30F0 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 30F8 */ 0x00, 0x32, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 3100 */ 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, + /* 3108 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, + /* 3110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, + /* 3118 */ 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x41, + /* 3120 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 3128 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 3130 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 3138 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 3140 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3148 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 3150 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, + /* 3158 */ 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, + /* 3160 */ 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3168 */ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3170 */ 0x32, 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, + /* 3178 */ 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3180 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, + /* 3188 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, + /* 3190 */ 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x41, 0x43, + /* 3198 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 31A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 31A8 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 31B0 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, + /* 31B8 */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 31C0 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, + /* 31C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x34, + /* 31D0 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, + /* 31D8 */ 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 31E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, + /* 31E8 */ 0x31, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 31F0 */ 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 31F8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 3200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, + /* 3208 */ 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x41, 0x43, 0x00, + /* 3210 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 3218 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 3220 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 3228 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 3230 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3238 */ 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 3240 */ 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, 0x63, 0x4F, + /* 3248 */ 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, 0x08, 0x00, + /* 3250 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3258 */ 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 3260 */ 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3268 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, + /* 3270 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, + /* 3278 */ 0x55, 0x32, 0x32, 0x5F, 0x41, 0x43, 0x00, 0x08, + /* 3280 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, + /* 3288 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 3290 */ 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, 0x04, 0x00, + /* 3298 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 32A0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x05, 0x00, + /* 32A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x53, + /* 32B0 */ 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 32B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x73, + /* 32C0 */ 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, + /* 32C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 32D0 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, + /* 32D8 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, + /* 32E0 */ 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 32E8 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 32F0 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 32F8 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 3300 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 3308 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 3310 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3318 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x41, 0x58, + /* 3320 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 3328 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, + /* 3330 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, + /* 3338 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 3340 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, + /* 3348 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, + /* 3350 */ 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 3358 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3360 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 3368 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 3370 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 3378 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 3380 */ 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3388 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, 0x49, 0x4E, + /* 3390 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 3398 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x33, 0x35, + /* 33A0 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, + /* 33A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 33B0 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, + /* 33B8 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, + /* 33C0 */ 0x34, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 33C8 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 33D0 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 33D8 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 33E0 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 33E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 33F0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 33F8 */ 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, 0x54, 0x45, + /* 3400 */ 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, + /* 3408 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x35, 0x30, + /* 3410 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, 0x00, + /* 3418 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 3420 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3428 */ 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, + /* 3430 */ 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 3438 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3440 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 3448 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 3450 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 3458 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 3460 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3468 */ 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, 0x77, 0x65, + /* 3470 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, + /* 3478 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 3480 */ 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, 0x30, 0x30, + /* 3488 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, + /* 3490 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 3498 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 34A0 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, + /* 34A8 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 34B0 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 34B8 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 34C0 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 34C8 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 34D0 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 34D8 */ 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 34E0 */ 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, 0x65, 0x72, + /* 34E8 */ 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, + /* 34F0 */ 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 34F8 */ 0x00, 0x00, 0x32, 0x35, 0x30, 0x30, 0x30, 0x00, + /* 3500 */ 0x04, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, + /* 3508 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3510 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3518 */ 0x53, 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, + /* 3520 */ 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 3528 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 3530 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 3538 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 3540 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 3548 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0E, + /* 3550 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, + /* 3558 */ 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4C, + /* 3560 */ 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, 0x00, 0x00, + /* 3568 */ 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3570 */ 0x00, 0x34, 0x33, 0x30, 0x30, 0x30, 0x00, 0x04, + /* 3578 */ 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, + /* 3580 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, + /* 3588 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, + /* 3590 */ 0x54, 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x44, + /* 3598 */ 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, + /* 35A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, + /* 35A8 */ 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, + /* 35B0 */ 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, + /* 35B8 */ 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 35C0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0A, 0x00, + /* 35C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x63, + /* 35D0 */ 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, 0x74, 0x00, + /* 35D8 */ 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + /* 35E0 */ 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x04, 0x00, + /* 35E8 */ 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 35F0 */ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, + /* 35F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, + /* 3600 */ 0x44, 0x5F, 0x55, 0x34, 0x32, 0x5F, 0x44, 0x43, + /* 3608 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 3610 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 3618 */ 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, 0x4D, 0x00, + /* 3620 */ 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 3628 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3630 */ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3638 */ 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, 0x00, 0x00, + /* 3640 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3648 */ 0x00, 0x73, 0x74, 0x64, 0x00, 0x04, 0x00, 0x00, + /* 3650 */ 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3658 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 3660 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, + /* 3668 */ 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, + /* 3670 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 3678 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 3680 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 3688 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 3690 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3698 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + /* 36A0 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, + /* 36A8 */ 0x41, 0x58, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 36B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, + /* 36B8 */ 0x35, 0x30, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 36C0 */ 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 36C8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 36D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, + /* 36D8 */ 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, + /* 36E0 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 36E8 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 36F0 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 36F8 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 3700 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3708 */ 0x08, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + /* 3710 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x4D, + /* 3718 */ 0x49, 0x4E, 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, + /* 3720 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, + /* 3728 */ 0x33, 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, + /* 3730 */ 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3738 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, + /* 3740 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, + /* 3748 */ 0x5F, 0x55, 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, + /* 3750 */ 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 3758 */ 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, + /* 3760 */ 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, + /* 3768 */ 0x30, 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 3770 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3778 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3780 */ 0x00, 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x53, + /* 3788 */ 0x54, 0x45, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3790 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3798 */ 0x35, 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 37A0 */ 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 37A8 */ 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, + /* 37B0 */ 0x00, 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, + /* 37B8 */ 0x55, 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, + /* 37C0 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, + /* 37C8 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 37D0 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, + /* 37D8 */ 0x44, 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 37E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 37E8 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, + /* 37F0 */ 0x00, 0x00, 0x00, 0x50, 0x4C, 0x31, 0x50, 0x6F, + /* 37F8 */ 0x77, 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, + /* 3800 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, + /* 3808 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x35, 0x30, + /* 3810 */ 0x30, 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, + /* 3818 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 3820 */ 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, + /* 3828 */ 0x00, 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, + /* 3830 */ 0x32, 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, + /* 3838 */ 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3840 */ 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, + /* 3848 */ 0x50, 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, + /* 3850 */ 0x34, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, + /* 3858 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 3860 */ 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3868 */ 0x00, 0x00, 0x50, 0x4C, 0x32, 0x50, 0x6F, 0x77, + /* 3870 */ 0x65, 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, + /* 3878 */ 0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 3880 */ 0x00, 0x00, 0x00, 0x00, 0x32, 0x35, 0x30, 0x30, + /* 3888 */ 0x30, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, + /* 3890 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 3898 */ 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 38A0 */ 0x00, 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, + /* 38A8 */ 0x32, 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, + /* 38B0 */ 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 38B8 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 38C0 */ 0x43, 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, + /* 38C8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 38D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 38D8 */ 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 38E0 */ 0x00, 0x50, 0x4C, 0x34, 0x50, 0x6F, 0x77, 0x65, + /* 38E8 */ 0x72, 0x4C, 0x69, 0x6D, 0x69, 0x74, 0x00, 0x08, + /* 38F0 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 38F8 */ 0x00, 0x00, 0x00, 0x34, 0x33, 0x30, 0x30, 0x30, + /* 3900 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, + /* 3908 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, + /* 3910 */ 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3918 */ 0x00, 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, + /* 3920 */ 0x5F, 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3928 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3930 */ 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, + /* 3938 */ 0x49, 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, + /* 3940 */ 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + /* 3948 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3950 */ 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3958 */ 0x54, 0x63, 0x63, 0x4F, 0x66, 0x66, 0x73, 0x65, + /* 3960 */ 0x74, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, + /* 3968 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, + /* 3970 */ 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, + /* 3978 */ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 3980 */ 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 3988 */ 0x53, 0x54, 0x44, 0x5F, 0x55, 0x32, 0x32, 0x5F, + /* 3990 */ 0x44, 0x43, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0B, + /* 3998 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 39A0 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x49, 0x45, 0x54, + /* 39A8 */ 0x4D, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, + /* 39B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + /* 39B8 */ 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 39C0 */ 0x00, 0x00, 0x50, 0x53, 0x56, 0x54, 0x00, 0x08, + /* 39C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 39D0 */ 0x00, 0x00, 0x00, 0x73, 0x74, 0x64, 0x00, 0x01, + /* 39D8 */ 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x2F, + /* 39E0 */ 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, 0x2F, 0x65, + /* 39E8 */ 0x78, 0x70, 0x6F, 0x72, 0x74, 0x2F, 0x61, 0x70, + /* 39F0 */ 0x63, 0x74, 0x00, 0x07, 0x00, 0x00, 0x00, 0xCC, + /* 39F8 */ 0x21, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3A00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3A08 */ 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, + /* 3A10 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 3A18 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3A20 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3A28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3A30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3A38 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3A40 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3A48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3A50 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3A58 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3A60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3A68 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3A70 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3A78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3A80 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3A88 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3A90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3A98 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3AA0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3AA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3AB0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3AB8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3AC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3AC8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3AD0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3AD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3AE0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3AE8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3AF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3AF8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3B00 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3B08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3B10 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3B18 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3B20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3B28 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3B30 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3B38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3B40 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3B48 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3B50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3B58 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3B60 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3B68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3B70 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3B78 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3B80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3B88 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3B90 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3B98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3BA0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3BA8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3BB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3BB8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3BC0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3BC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3BD0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3BD8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3BE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3BE8 */ 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, + /* 3BF0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0C, + /* 3BF8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3C00 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3C08 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, + /* 3C10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3C18 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3C20 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3C28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3C30 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3C38 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3C40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3C48 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3C50 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3C58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3C60 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3C68 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3C70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3C78 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3C80 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3C88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3C90 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3C98 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3CA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3CA8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3CB0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3CB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3CC0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3CC8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3CD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3CD8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3CE0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3CE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3CF0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3CF8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3D00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3D08 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3D10 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3D18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3D20 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3D28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3D30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3D38 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3D40 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3D48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3D50 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3D58 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3D60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3D68 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3D70 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3D78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3D80 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3D88 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3D90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3D98 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3DA0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3DA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3DB0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3DB8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3DC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3DC8 */ 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, + /* 3DD0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0C, + /* 3DD8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3DE0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3DE8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x07, + /* 3DF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3DF8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3E00 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3E08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3E10 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3E18 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3E20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3E28 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3E30 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3E38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3E40 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3E48 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3E50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3E58 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3E60 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3E68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3E70 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3E78 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3E80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3E88 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3E90 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3E98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3EA0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3EA8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3EB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3EB8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3EC0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3EC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3ED0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3ED8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3EE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3EE8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3EF0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3EF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3F00 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3F08 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3F10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3F18 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3F20 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3F28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3F30 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3F38 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3F40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3F48 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3F50 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3F58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3F60 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3F68 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3F70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3F78 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3F80 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3F88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3F90 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3F98 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3FA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3FA8 */ 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, + /* 3FB0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0C, + /* 3FB8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3FC0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3FC8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 3FD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3FD8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3FE0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 3FE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 3FF0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 3FF8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4008 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4010 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4020 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4028 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4038 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4040 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4050 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4058 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4068 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4070 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4080 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4088 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4098 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 40A0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 40A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 40B0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 40B8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 40C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 40C8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 40D0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 40D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 40E0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 40E8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 40F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 40F8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4100 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4108 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4110 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4118 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4120 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4128 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4130 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4138 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4140 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4148 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4150 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4158 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4160 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4168 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4170 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4178 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4180 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4188 */ 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, + /* 4190 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, + /* 4198 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 41A0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 41A8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 41B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 41B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 41C0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 41C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 41D0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 41D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 41E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 41E8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 41F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 41F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4200 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4208 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4210 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4218 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4220 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4228 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4230 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4238 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4240 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4248 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4250 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4258 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4260 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4268 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4270 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4278 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4280 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4288 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4290 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4298 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 42A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 42A8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 42B0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 42B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 42C0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 42C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 42D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 42D8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 42E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 42E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 42F0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 42F8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4300 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4308 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4310 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4318 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4320 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4328 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4330 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4338 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4340 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4348 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4350 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4358 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4360 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4368 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, + /* 4370 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, + /* 4378 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4380 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4388 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4390 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4398 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 43A0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 43A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 43B0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 43B8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 43C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 43C8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 43D0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 43D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 43E0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 43E8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 43F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 43F8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4400 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4408 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4410 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4418 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4420 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4428 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4430 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4438 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4440 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4448 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4450 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4458 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4460 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4468 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4470 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4478 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4480 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4488 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4490 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4498 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 44A0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 44A8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 44B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 44B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 44C0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 44C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 44D0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 44D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 44E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 44E8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 44F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 44F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4500 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4508 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4510 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4518 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4520 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4528 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4530 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4538 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4540 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4548 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 4550 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4558 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4560 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4568 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4570 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4578 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4580 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4588 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4590 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4598 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 45A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 45A8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 45B0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 45B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 45C0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 45C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 45D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 45D8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 45E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 45E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 45F0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 45F8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4600 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4608 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4610 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4618 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4620 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4628 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4630 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4638 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4640 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4648 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4650 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4658 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4660 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4668 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4670 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4678 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4680 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4688 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4690 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4698 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 46A0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 46A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 46B0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 46B8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 46C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 46C8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 46D0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 46D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 46E0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 46E8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 46F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 46F8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4700 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4708 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4710 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4718 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4720 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4728 */ 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, + /* 4730 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 4738 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4740 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4748 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4750 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4758 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4760 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4768 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4770 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4778 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4780 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4788 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4790 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4798 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 47A0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 47A8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 47B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 47B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 47C0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 47C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 47D0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 47D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 47E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 47E8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 47F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 47F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4800 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4808 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4810 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4818 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4820 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4828 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4830 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4838 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4840 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4848 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4850 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4858 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4860 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4868 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4870 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4878 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4880 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4888 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4890 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4898 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 48A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 48A8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 48B0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 48B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 48C0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 48C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 48D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 48D8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 48E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 48E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 48F0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 48F8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4900 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4908 */ 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, + /* 4910 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 4918 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4920 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4928 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4930 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4938 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4940 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 4948 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4950 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4958 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 4960 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4968 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4970 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4978 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4980 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4988 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4990 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4998 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 49A0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 49A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 49B0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 49B8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 49C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 49C8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 49D0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 49D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 49E0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 49E8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 49F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 49F8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4A00 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4A08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4A10 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4A18 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4A20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4A28 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4A30 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4A38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4A40 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4A48 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4A50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4A58 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4A60 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4A68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4A70 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4A78 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4A80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4A88 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4A90 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4A98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4AA0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4AA8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4AB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4AB8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4AC0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4AC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4AD0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4AD8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4AE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4AE8 */ 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x00, + /* 4AF0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, + /* 4AF8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4B00 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4B08 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4B10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4B18 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4B20 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 4B28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4B30 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4B38 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4B40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4B48 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4B50 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4B58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4B60 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4B68 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4B70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4B78 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4B80 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4B88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4B90 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4B98 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4BA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4BA8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4BB0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4BB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4BC0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4BC8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4BD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4BD8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4BE0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4BE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4BF0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4BF8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4C00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4C08 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4C10 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4C18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4C20 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4C28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4C30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4C38 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4C40 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4C48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4C50 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4C58 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4C60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4C68 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4C70 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4C78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4C80 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4C88 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4C90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4C98 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4CA0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4CA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4CB0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4CB8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4CC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4CC8 */ 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, + /* 4CD0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, + /* 4CD8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4CE0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4CE8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4CF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4CF8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4D00 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4D08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4D10 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4D18 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4D20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4D28 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4D30 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4D38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4D40 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4D48 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4D50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4D58 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4D60 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4D68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4D70 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4D78 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4D80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4D88 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4D90 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4D98 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4DA0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4DA8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4DB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4DB8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4DC0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4DC8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4DD0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4DD8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4DE0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4DE8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4DF0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4DF8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4E00 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4E08 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4E10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4E18 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4E20 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4E28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4E30 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4E38 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4E40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4E48 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4E50 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4E58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4E60 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4E68 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4E70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4E78 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4E80 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4E88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4E90 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4E98 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4EA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4EA8 */ 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, + /* 4EB0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, + /* 4EB8 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4EC0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4EC8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4ED0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4ED8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4EE0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4EE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4EF0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4EF8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4F00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4F08 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4F10 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4F18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4F20 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4F28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4F30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4F38 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4F40 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4F48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4F50 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4F58 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4F60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4F68 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4F70 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4F78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4F80 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4F88 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4F90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4F98 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4FA0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4FA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4FB0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4FB8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4FC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4FC8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4FD0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4FD8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4FE0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 4FE8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 4FF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 4FF8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5000 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5010 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5018 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5028 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5030 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5040 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5048 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5058 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5060 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5070 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5078 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5088 */ 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + /* 5090 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, + /* 5098 */ 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 50A0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 50A8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 50B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 50B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 50C0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 50C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 50D0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 50D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 50E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 50E8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 50F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 50F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5100 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5108 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5118 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5120 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5128 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5130 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5138 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5140 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5148 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5150 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5158 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5160 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5168 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5170 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5178 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5180 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5188 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5190 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5198 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 51A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 51A8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 51B0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 51B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 51C0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 51C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 51D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 51D8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 51E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 51E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 51F0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 51F8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5208 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5210 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5218 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5220 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5228 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5230 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5238 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5240 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5248 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5250 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5258 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5260 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5268 */ 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, + /* 5270 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x14, + /* 5278 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5280 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5288 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5290 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5298 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 52A0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 52A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 52B0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 52B8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 52C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 52C8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 52D0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 52D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 52E0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 52E8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 52F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 52F8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5300 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5308 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5310 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5318 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5320 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5328 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5330 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5338 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5340 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5348 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5350 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5358 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5360 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5368 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5370 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5378 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5380 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5388 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5390 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5398 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 53A0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 53A8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 53B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 53B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 53C0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 53C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 53D0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 53D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 53E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 53E8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 53F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 53F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5400 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5408 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5410 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5418 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5420 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5428 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5430 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5438 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5440 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5448 */ 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, + /* 5450 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x13, + /* 5458 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5460 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5468 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, + /* 5470 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5478 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5480 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 5488 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5490 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5498 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 54A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 54A8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 54B0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 54B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 54C0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 54C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 54D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 54D8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 54E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 54E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 54F0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 54F8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5500 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5508 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5510 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5518 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5520 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5528 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5530 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5538 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5540 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5548 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5550 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5558 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5560 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5568 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5570 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5578 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5580 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5588 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5590 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5598 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 55A0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 55A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 55B0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 55B8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 55C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 55C8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 55D0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 55D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 55E0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 55E8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 55F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 55F8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5600 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5608 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5610 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5618 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5620 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5628 */ 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, + /* 5630 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x13, + /* 5638 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5640 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5648 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, + /* 5650 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5658 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5660 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 5668 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5670 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5678 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5680 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5688 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5690 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5698 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 56A0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 56A8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 56B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 56B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 56C0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 56C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 56D0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 56D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 56E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 56E8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 56F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 56F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5700 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5708 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5710 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5718 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5720 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5728 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5730 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5738 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5740 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5748 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5750 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5758 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5760 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5768 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5770 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5778 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5780 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5788 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5790 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5798 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 57A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 57A8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 57B0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 57B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 57C0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 57C8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 57D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 57D8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 57E0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 57E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 57F0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 57F8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5800 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5808 */ 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, + /* 5810 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x13, + /* 5818 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5820 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5828 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, + /* 5830 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5838 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5840 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 5848 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5850 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5858 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 5860 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5868 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5870 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5878 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5880 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5888 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5890 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5898 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 58A0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 58A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 58B0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 58B8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 58C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 58C8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 58D0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 58D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 58E0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 58E8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 58F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 58F8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5900 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5908 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5910 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5918 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5920 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5928 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5930 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5938 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5940 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5948 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5950 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5958 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5960 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5968 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5970 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5978 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5980 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5988 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5990 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5998 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 59A0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 59A8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 59B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 59B8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 59C0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 59C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 59D0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 59D8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 59E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 59E8 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, + /* 59F0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x13, + /* 59F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5A00 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5A08 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, + /* 5A10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5A18 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5A20 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, + /* 5A28 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5A30 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5A38 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5A40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5A48 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5A50 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5A58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5A60 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5A68 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5A70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5A78 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5A80 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5A88 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5A90 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5A98 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5AA0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5AA8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5AB0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5AB8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5AC0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5AC8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5AD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5AD8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5AE0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5AE8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5AF0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5AF8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5B00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5B08 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5B10 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5B18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5B20 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5B28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5B30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5B38 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5B40 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5B48 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5B50 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5B58 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5B60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5B68 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5B70 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5B78 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5B80 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5B88 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5B90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5B98 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5BA0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5BA8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5BB0 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5BB8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5BC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, + /* 5BC8 */ 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x2F, + /* 5BD0 */ 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, 0x2F, 0x65, + /* 5BD8 */ 0x78, 0x70, 0x6F, 0x72, 0x74, 0x2F, 0x61, 0x70, + /* 5BE0 */ 0x70, 0x63, 0x00, 0x07, 0x00, 0x00, 0x00, 0xAC, + /* 5BE8 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5BF0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5BF8 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, + /* 5C00 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 5C08 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, + /* 5C10 */ 0x54, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 5C18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 5C20 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 5C28 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 5C30 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 5C38 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 5C40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5C48 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x01, 0x00, 0x00, + /* 5C50 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, + /* 5C58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, + /* 5C60 */ 0x48, 0x50, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 5C68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 5C70 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 5C78 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 5C80 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 5C88 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 5C90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, + /* 5C98 */ 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x2F, + /* 5CA0 */ 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, 0x2F, 0x74, + /* 5CA8 */ 0x61, 0x62, 0x6C, 0x65, 0x73, 0x2F, 0x70, 0x69, + /* 5CB0 */ 0x64, 0x61, 0x2F, 0x70, 0x69, 0x64, 0x00, 0x07, + /* 5CB8 */ 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, + /* 5CC0 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, + /* 5CC8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 5CD0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 5CD8 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 5CE0 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x04, + /* 5CE8 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 5CF0 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 5CF8 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 5D00 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, + /* 5D08 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 5D10 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x4C, 0x50, + /* 5D18 */ 0x43, 0x42, 0x2E, 0x45, 0x43, 0x5F, 0x5F, 0x2E, + /* 5D20 */ 0x53, 0x45, 0x4E, 0x31, 0x00, 0x04, 0x00, 0x00, + /* 5D28 */ 0x00, 0x96, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5D30 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x96, 0x0C, 0x00, + /* 5D38 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5D40 */ 0x00, 0xC0, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5D48 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, + /* 5D50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5D58 */ 0x00, 0xC4, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5D60 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, + /* 5D68 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5D70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5D78 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, + /* 5D80 */ 0xFF, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, + /* 5D88 */ 0x00, 0x18, 0x00, 0x00, 0x00, 0x2F, 0x73, 0x68, + /* 5D90 */ 0x61, 0x72, 0x65, 0x64, 0x2F, 0x74, 0x61, 0x62, + /* 5D98 */ 0x6C, 0x65, 0x73, 0x2F, 0x70, 0x73, 0x76, 0x74, + /* 5DA0 */ 0x2F, 0x63, 0x71, 0x6C, 0x00, 0x07, 0x00, 0x00, + /* 5DA8 */ 0x00, 0xCA, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5DB0 */ 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5DB8 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, + /* 5DC0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, + /* 5DC8 */ 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, + /* 5DD0 */ 0x42, 0x30, 0x44, 0x34, 0x00, 0x08, 0x00, 0x00, + /* 5DD8 */ 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5DE0 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, + /* 5DE8 */ 0x43, 0x49, 0x30, 0x2E, 0x4C, 0x50, 0x43, 0x42, + /* 5DF0 */ 0x2E, 0x45, 0x43, 0x5F, 0x5F, 0x2E, 0x53, 0x45, + /* 5DF8 */ 0x4E, 0x31, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, + /* 5E00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5E08 */ 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, 0x00, + /* 5E10 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xA0, + /* 5E18 */ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5E20 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, + /* 5E28 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 5E30 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + /* 5E38 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 5E40 */ 0x00, 0x00, 0x00, 0x4D, 0x41, 0x58, 0x00, 0x04, + /* 5E48 */ 0x00, 0x00, 0x00, 0x7D, 0x00, 0x00, 0x00, 0x00, + /* 5E50 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, + /* 5E58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, + /* 5E60 */ 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, + /* 5E68 */ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, + /* 5E70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, + /* 5E78 */ 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x2F, + /* 5E80 */ 0x73, 0x68, 0x61, 0x72, 0x65, 0x64, 0x2F, 0x74, + /* 5E88 */ 0x61, 0x62, 0x6C, 0x65, 0x73, 0x2F, 0x70, 0x73, + /* 5E90 */ 0x76, 0x74, 0x2F, 0x73, 0x74, 0x64, 0x00, 0x07, + /* 5E98 */ 0x00, 0x00, 0x00, 0xCA, 0x00, 0x00, 0x00, 0x04, + /* 5EA0 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, + /* 5EA8 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, + /* 5EB0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, + /* 5EB8 */ 0x5F, 0x53, 0x42, 0x5F, 0x2E, 0x50, 0x43, 0x49, + /* 5EC0 */ 0x30, 0x2E, 0x42, 0x30, 0x44, 0x34, 0x00, 0x08, + /* 5EC8 */ 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, + /* 5ED0 */ 0x00, 0x00, 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x5F, + /* 5ED8 */ 0x2E, 0x50, 0x43, 0x49, 0x30, 0x2E, 0x4C, 0x50, + /* 5EE0 */ 0x43, 0x42, 0x2E, 0x45, 0x43, 0x5F, 0x5F, 0x2E, + /* 5EE8 */ 0x53, 0x45, 0x4E, 0x31, 0x00, 0x04, 0x00, 0x00, + /* 5EF0 */ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5EF8 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, + /* 5F00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5F08 */ 0x00, 0xB4, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5F10 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, + /* 5F18 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5F20 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 5F28 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5F30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D, 0x41, 0x58, + /* 5F38 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x7D, 0x00, 0x00, + /* 5F40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5F48 */ 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5F50 */ 0x00, 0x04, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, + /* 5F58 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 5F60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 5F68 */ 0x00 + } + }) + Method (GDDV, 0, Serialized) + { + Return (BDV1) + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-1-SaSsdt.dsl b/ACPI/Disassembled ACPI files/SSDT-1-SaSsdt.dsl new file mode 100755 index 0000000..c85640b --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-1-SaSsdt.dsl @@ -0,0 +1,2832 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-1-SaSsdt.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000030A3 (12451) + * Revision 0x02 + * Checksum 0x0B + * OEM ID "LENOVO" + * OEM Table ID "SaSsdt " + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "SaSsdt ", 0x00003000) +{ + External (_SB_.LID_._LID, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0, DeviceObj) // (from opcode) + External (_SB_.PCI0.GFX0, DeviceObj) // (from opcode) + External (_SB_.PCI0.GFX0.HDOS, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.GFX0.HNOT, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.LPCB.EC__.BRNS, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.LPCB.EC__.BRTW, PkgObj) // (from opcode) + External (BRLV, UnknownObj) // (from opcode) + External (CPSC, UnknownObj) // (from opcode) + External (DSEN, UnknownObj) // (from opcode) + External (ECON, IntObj) // (from opcode) + External (GUAM, MethodObj) // 1 Arguments (from opcode) + External (OSYS, IntObj) // (from opcode) + External (PNHM, IntObj) // (from opcode) + External (S0ID, UnknownObj) // (from opcode) + + OperationRegion (SANV, SystemMemory, 0x5B567418, 0x01FE) + Field (SANV, AnyAcc, Lock, Preserve) + { + ASLB, 32, + IMON, 8, + IGDS, 8, + IBTT, 8, + IPAT, 8, + IPSC, 8, + IBIA, 8, + ISSC, 8, + IDMS, 8, + IF1E, 8, + HVCO, 8, + GSMI, 8, + PAVP, 8, + CADL, 8, + CSTE, 16, + NSTE, 16, + NDID, 8, + DID1, 32, + DID2, 32, + DID3, 32, + DID4, 32, + DID5, 32, + DID6, 32, + DID7, 32, + DID8, 32, + DID9, 32, + DIDA, 32, + DIDB, 32, + DIDC, 32, + DIDD, 32, + DIDE, 32, + DIDF, 32, + DIDX, 32, + NXD1, 32, + NXD2, 32, + NXD3, 32, + NXD4, 32, + NXD5, 32, + NXD6, 32, + NXD7, 32, + NXD8, 32, + NXDX, 32, + LIDS, 8, + KSV0, 32, + KSV1, 8, + BRTL, 8, + ALSE, 8, + ALAF, 8, + LLOW, 8, + LHIH, 8, + ALFP, 8, + IMTP, 8, + EDPV, 8, + SGMD, 8, + SGFL, 8, + SGGP, 8, + HRE0, 8, + HRG0, 32, + HRA0, 8, + PWE0, 8, + PWG0, 32, + PWA0, 8, + P1GP, 8, + HRE1, 8, + HRG1, 32, + HRA1, 8, + PWE1, 8, + PWG1, 32, + PWA1, 8, + P2GP, 8, + HRE2, 8, + HRG2, 32, + HRA2, 8, + PWE2, 8, + PWG2, 32, + PWA2, 8, + DLPW, 16, + DLHR, 16, + EECP, 8, + XBAS, 32, + GBAS, 16, + NVGA, 32, + NVHA, 32, + AMDA, 32, + LTRX, 8, + OBFX, 8, + LTRY, 8, + OBFY, 8, + LTRZ, 8, + OBFZ, 8, + SMSL, 16, + SNSL, 16, + P0UB, 8, + P1UB, 8, + P2UB, 8, + PCSL, 8, + PBGE, 8, + M64B, 64, + M64L, 64, + CPEX, 32, + EEC1, 8, + EEC2, 8, + SBN0, 8, + SBN1, 8, + SBN2, 8, + M32B, 32, + M32L, 32, + P0WK, 32, + P1WK, 32, + P2WK, 32, + CKM0, 32, + CKM1, 32, + CKM2, 32, + Offset (0x1F4), + Offset (0x1F7), + Offset (0x1FE) + } + + Scope (\_SB.PCI0.GFX0) + { + Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching + { + Store (And (Arg0, 0x07), DSEN) + If (LEqual (And (Arg0, 0x03), Zero)) + { + If (CondRefOf (HDOS)) + { + HDOS () + } + } + } + + Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices + { + If (LEqual (IMTP, One)) + { + Store (One, NDID) + } + Else + { + Store (Zero, NDID) + } + + If (LNotEqual (DIDL, Zero)) + { + Store (SDDL (DIDL), DID1) + } + + If (LNotEqual (DDL2, Zero)) + { + Store (SDDL (DDL2), DID2) + } + + If (LNotEqual (DDL3, Zero)) + { + Store (SDDL (DDL3), DID3) + } + + If (LNotEqual (DDL4, Zero)) + { + Store (SDDL (DDL4), DID4) + } + + If (LNotEqual (DDL5, Zero)) + { + Store (SDDL (DDL5), DID5) + } + + If (LNotEqual (DDL6, Zero)) + { + Store (SDDL (DDL6), DID6) + } + + If (LNotEqual (DDL7, Zero)) + { + Store (SDDL (DDL7), DID7) + } + + If (LNotEqual (DDL8, Zero)) + { + Store (SDDL (DDL8), DID8) + } + + If (LNotEqual (DDL9, Zero)) + { + Store (SDDL (DDL9), DID9) + } + + If (LNotEqual (DD10, Zero)) + { + Store (SDDL (DD10), DIDA) + } + + If (LNotEqual (DD11, Zero)) + { + Store (SDDL (DD11), DIDB) + } + + If (LNotEqual (DD12, Zero)) + { + Store (SDDL (DD12), DIDC) + } + + If (LNotEqual (DD13, Zero)) + { + Store (SDDL (DD13), DIDD) + } + + If (LNotEqual (DD14, Zero)) + { + Store (SDDL (DD14), DIDE) + } + + If (LNotEqual (DD15, Zero)) + { + Store (SDDL (DD15), DIDF) + } + + If (LEqual (NDID, One)) + { + Name (TMP1, Package (0x01) + { + 0xFFFFFFFF + }) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP1, Zero)) + } + Else + { + Store (Or (0x00010000, DID1), Index (TMP1, Zero)) + } + + Return (TMP1) + } + + If (LEqual (NDID, 0x02)) + { + Name (TMP2, Package (0x02) + { + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP2, Zero)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP2, One)) + } + Else + { + Store (Or (0x00010000, DID2), Index (TMP2, One)) + } + + Return (TMP2) + } + + If (LEqual (NDID, 0x03)) + { + Name (TMP3, Package (0x03) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP3, Zero)) + Store (Or (0x00010000, DID2), Index (TMP3, One)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP3, 0x02)) + } + Else + { + Store (Or (0x00010000, DID3), Index (TMP3, 0x02)) + } + + Return (TMP3) + } + + If (LEqual (NDID, 0x04)) + { + Name (TMP4, Package (0x04) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP4, Zero)) + Store (Or (0x00010000, DID2), Index (TMP4, One)) + Store (Or (0x00010000, DID3), Index (TMP4, 0x02)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP4, 0x03)) + } + Else + { + Store (Or (0x00010000, DID4), Index (TMP4, 0x03)) + } + + Return (TMP4) + } + + If (LEqual (NDID, 0x05)) + { + Name (TMP5, Package (0x05) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP5, Zero)) + Store (Or (0x00010000, DID2), Index (TMP5, One)) + Store (Or (0x00010000, DID3), Index (TMP5, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP5, 0x03)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP5, 0x04)) + } + Else + { + Store (Or (0x00010000, DID5), Index (TMP5, 0x04)) + } + + Return (TMP5) + } + + If (LEqual (NDID, 0x06)) + { + Name (TMP6, Package (0x06) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP6, Zero)) + Store (Or (0x00010000, DID2), Index (TMP6, One)) + Store (Or (0x00010000, DID3), Index (TMP6, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP6, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP6, 0x04)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP6, 0x05)) + } + Else + { + Store (Or (0x00010000, DID6), Index (TMP6, 0x05)) + } + + Return (TMP6) + } + + If (LEqual (NDID, 0x07)) + { + Name (TMP7, Package (0x07) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP7, Zero)) + Store (Or (0x00010000, DID2), Index (TMP7, One)) + Store (Or (0x00010000, DID3), Index (TMP7, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP7, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP7, 0x04)) + Store (Or (0x00010000, DID6), Index (TMP7, 0x05)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP7, 0x06)) + } + Else + { + Store (Or (0x00010000, DID7), Index (TMP7, 0x06)) + } + + Return (TMP7) + } + + If (LEqual (NDID, 0x08)) + { + Name (TMP8, Package (0x08) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP8, Zero)) + Store (Or (0x00010000, DID2), Index (TMP8, One)) + Store (Or (0x00010000, DID3), Index (TMP8, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP8, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP8, 0x04)) + Store (Or (0x00010000, DID6), Index (TMP8, 0x05)) + Store (Or (0x00010000, DID7), Index (TMP8, 0x06)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP8, 0x07)) + } + Else + { + Store (Or (0x00010000, DID8), Index (TMP8, 0x07)) + } + + Return (TMP8) + } + + If (LEqual (NDID, 0x09)) + { + Name (TMP9, Package (0x09) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMP9, Zero)) + Store (Or (0x00010000, DID2), Index (TMP9, One)) + Store (Or (0x00010000, DID3), Index (TMP9, 0x02)) + Store (Or (0x00010000, DID4), Index (TMP9, 0x03)) + Store (Or (0x00010000, DID5), Index (TMP9, 0x04)) + Store (Or (0x00010000, DID6), Index (TMP9, 0x05)) + Store (Or (0x00010000, DID7), Index (TMP9, 0x06)) + Store (Or (0x00010000, DID8), Index (TMP9, 0x07)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMP9, 0x08)) + } + Else + { + Store (Or (0x00010000, DID9), Index (TMP9, 0x08)) + } + + Return (TMP9) + } + + If (LEqual (NDID, 0x0A)) + { + Name (TMPA, Package (0x0A) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPA, Zero)) + Store (Or (0x00010000, DID2), Index (TMPA, One)) + Store (Or (0x00010000, DID3), Index (TMPA, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPA, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPA, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPA, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPA, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPA, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPA, 0x08)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPA, 0x09)) + } + Else + { + Store (Or (0x00010000, DIDA), Index (TMPA, 0x09)) + } + + Return (TMPA) + } + + If (LEqual (NDID, 0x0B)) + { + Name (TMPB, Package (0x0B) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPB, Zero)) + Store (Or (0x00010000, DID2), Index (TMPB, One)) + Store (Or (0x00010000, DID3), Index (TMPB, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPB, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPB, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPB, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPB, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPB, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPB, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPB, 0x09)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPB, 0x0A)) + } + Else + { + Store (Or (0x00010000, DIDB), Index (TMPB, 0x0A)) + } + + Return (TMPB) + } + + If (LEqual (NDID, 0x0C)) + { + Name (TMPC, Package (0x0C) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPC, Zero)) + Store (Or (0x00010000, DID2), Index (TMPC, One)) + Store (Or (0x00010000, DID3), Index (TMPC, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPC, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPC, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPC, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPC, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPC, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPC, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPC, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPC, 0x0A)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPC, 0x0B)) + } + Else + { + Store (Or (0x00010000, DIDC), Index (TMPC, 0x0B)) + } + + Return (TMPC) + } + + If (LEqual (NDID, 0x0D)) + { + Name (TMPD, Package (0x0D) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPD, Zero)) + Store (Or (0x00010000, DID2), Index (TMPD, One)) + Store (Or (0x00010000, DID3), Index (TMPD, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPD, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPD, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPD, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPD, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPD, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPD, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPD, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPD, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPD, 0x0B)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPD, 0x0C)) + } + Else + { + Store (Or (0x00010000, DIDD), Index (TMPD, 0x0C)) + } + + Return (TMPD) + } + + If (LEqual (NDID, 0x0E)) + { + Name (TMPE, Package (0x0E) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPE, Zero)) + Store (Or (0x00010000, DID2), Index (TMPE, One)) + Store (Or (0x00010000, DID3), Index (TMPE, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPE, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPE, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPE, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPE, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPE, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPE, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPE, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPE, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPE, 0x0B)) + Store (Or (0x00010000, DIDD), Index (TMPE, 0x0C)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPE, 0x0D)) + } + Else + { + Store (Or (0x00010000, DIDE), Index (TMPE, 0x0D)) + } + + Return (TMPE) + } + + If (LEqual (NDID, 0x0F)) + { + Name (TMPF, Package (0x0F) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPF, Zero)) + Store (Or (0x00010000, DID2), Index (TMPF, One)) + Store (Or (0x00010000, DID3), Index (TMPF, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPF, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPF, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPF, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPF, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPF, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPF, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPF, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPF, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPF, 0x0B)) + Store (Or (0x00010000, DIDD), Index (TMPF, 0x0C)) + Store (Or (0x00010000, DIDE), Index (TMPF, 0x0D)) + If (LEqual (IMTP, One)) + { + Store (0x0002CA00, Index (TMPF, 0x0E)) + } + Else + { + Store (Or (0x00010000, DIDF), Index (TMPF, 0x0E)) + } + + Return (TMPF) + } + + If (LEqual (NDID, 0x10)) + { + Name (TMPG, Package (0x10) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Store (Or (0x00010000, DID1), Index (TMPG, Zero)) + Store (Or (0x00010000, DID2), Index (TMPG, One)) + Store (Or (0x00010000, DID3), Index (TMPG, 0x02)) + Store (Or (0x00010000, DID4), Index (TMPG, 0x03)) + Store (Or (0x00010000, DID5), Index (TMPG, 0x04)) + Store (Or (0x00010000, DID6), Index (TMPG, 0x05)) + Store (Or (0x00010000, DID7), Index (TMPG, 0x06)) + Store (Or (0x00010000, DID8), Index (TMPG, 0x07)) + Store (Or (0x00010000, DID9), Index (TMPG, 0x08)) + Store (Or (0x00010000, DIDA), Index (TMPG, 0x09)) + Store (Or (0x00010000, DIDB), Index (TMPG, 0x0A)) + Store (Or (0x00010000, DIDC), Index (TMPG, 0x0B)) + Store (Or (0x00010000, DIDD), Index (TMPG, 0x0C)) + Store (Or (0x00010000, DIDE), Index (TMPG, 0x0D)) + Store (Or (0x00010000, DIDF), Index (TMPG, 0x0E)) + Store (0x0002CA00, Index (TMPG, 0x0F)) + Return (TMPG) + } + + Return (Package (0x01) + { + 0x0400 + }) + } + + Device (DD01) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID1), 0x0400)) + { + Store (One, EDPV) + Store (NXD1, NXDX) + Store (DID1, DIDX) + Return (One) + } + + If (LEqual (DID1, Zero)) + { + Return (One) + } + Else + { + Return (And (0xFFFF, DID1)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + Return (CDDS (DID1)) + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD1) + } + + Return (NDDS (DID1)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD02) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID2), 0x0400)) + { + Store (0x02, EDPV) + Store (NXD2, NXDX) + Store (DID2, DIDX) + Return (0x02) + } + + If (LEqual (DID2, Zero)) + { + Return (0x02) + } + Else + { + Return (And (0xFFFF, DID2)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (LIDS, Zero)) + { + Return (Zero) + } + + Return (CDDS (DID2)) + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD2) + } + + Return (NDDS (DID2)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD03) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID3), 0x0400)) + { + Store (0x03, EDPV) + Store (NXD3, NXDX) + Store (DID3, DIDX) + Return (0x03) + } + + If (LEqual (DID3, Zero)) + { + Return (0x03) + } + Else + { + Return (And (0xFFFF, DID3)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID3, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID3)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD3) + } + + Return (NDDS (DID3)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD04) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID4), 0x0400)) + { + Store (0x04, EDPV) + Store (NXD4, NXDX) + Store (DID4, DIDX) + Return (0x04) + } + + If (LEqual (DID4, Zero)) + { + Return (0x04) + } + Else + { + Return (And (0xFFFF, DID4)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID4, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID4)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD4) + } + + Return (NDDS (DID4)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD05) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID5), 0x0400)) + { + Store (0x05, EDPV) + Store (NXD5, NXDX) + Store (DID5, DIDX) + Return (0x05) + } + + If (LEqual (DID5, Zero)) + { + Return (0x05) + } + Else + { + Return (And (0xFFFF, DID5)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID5, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID5)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD5) + } + + Return (NDDS (DID5)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD06) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID6), 0x0400)) + { + Store (0x06, EDPV) + Store (NXD6, NXDX) + Store (DID6, DIDX) + Return (0x06) + } + + If (LEqual (DID6, Zero)) + { + Return (0x06) + } + Else + { + Return (And (0xFFFF, DID6)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID6, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID6)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD6) + } + + Return (NDDS (DID6)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD07) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID7), 0x0400)) + { + Store (0x07, EDPV) + Store (NXD7, NXDX) + Store (DID7, DIDX) + Return (0x07) + } + + If (LEqual (DID7, Zero)) + { + Return (0x07) + } + Else + { + Return (And (0xFFFF, DID7)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID7, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID7)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD7) + } + + Return (NDDS (DID7)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD08) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID8), 0x0400)) + { + Store (0x08, EDPV) + Store (NXD8, NXDX) + Store (DID8, DIDX) + Return (0x08) + } + + If (LEqual (DID8, Zero)) + { + Return (0x08) + } + Else + { + Return (And (0xFFFF, DID8)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID8, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID8)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DID8)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD09) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DID9), 0x0400)) + { + Store (0x09, EDPV) + Store (NXD8, NXDX) + Store (DID9, DIDX) + Return (0x09) + } + + If (LEqual (DID9, Zero)) + { + Return (0x09) + } + Else + { + Return (And (0xFFFF, DID9)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DID9, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DID9)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DID9)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0A) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDA), 0x0400)) + { + Store (0x0A, EDPV) + Store (NXD8, NXDX) + Store (DIDA, DIDX) + Return (0x0A) + } + + If (LEqual (DIDA, Zero)) + { + Return (0x0A) + } + Else + { + Return (And (0xFFFF, DIDA)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDA, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DIDA)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DIDA)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0B) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDB), 0x0400)) + { + Store (0x0B, EDPV) + Store (NXD8, NXDX) + Store (DIDB, DIDX) + Return (0x0B) + } + + If (LEqual (DIDB, Zero)) + { + Return (0x0B) + } + Else + { + Return (And (0xFFFF, DIDB)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDB, Zero)) + { + Return (0x0B) + } + Else + { + Return (CDDS (DIDB)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DIDB)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0C) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDC), 0x0400)) + { + Store (0x0C, EDPV) + Store (NXD8, NXDX) + Store (DIDC, DIDX) + Return (0x0C) + } + + If (LEqual (DIDC, Zero)) + { + Return (0x0C) + } + Else + { + Return (And (0xFFFF, DIDC)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDC, Zero)) + { + Return (0x0C) + } + Else + { + Return (CDDS (DIDC)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DIDC)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0D) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDD), 0x0400)) + { + Store (0x0D, EDPV) + Store (NXD8, NXDX) + Store (DIDD, DIDX) + Return (0x0D) + } + + If (LEqual (DIDD, Zero)) + { + Return (0x0D) + } + Else + { + Return (And (0xFFFF, DIDD)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDD, Zero)) + { + Return (0x0D) + } + Else + { + Return (CDDS (DIDD)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DIDD)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0E) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDE), 0x0400)) + { + Store (0x0E, EDPV) + Store (NXD8, NXDX) + Store (DIDE, DIDX) + Return (0x0E) + } + + If (LEqual (DIDE, Zero)) + { + Return (0x0E) + } + Else + { + Return (And (0xFFFF, DIDE)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDE, Zero)) + { + Return (0x0E) + } + Else + { + Return (CDDS (DIDE)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DIDE)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD0F) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (And (0x0F00, DIDF), 0x0400)) + { + Store (0x0F, EDPV) + Store (NXD8, NXDX) + Store (DIDF, DIDX) + Return (0x0F) + } + + If (LEqual (DIDF, Zero)) + { + Return (0x0F) + } + Else + { + Return (And (0xFFFF, DIDF)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (DIDC, Zero)) + { + Return (0x0F) + } + Else + { + Return (CDDS (DIDF)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXD8) + } + + Return (NDDS (DIDF)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + } + + Device (DD1F) + { + Method (_ADR, 0, Serialized) // _ADR: Address + { + If (LEqual (EDPV, Zero)) + { + Return (0x1F) + } + Else + { + Return (And (0xFFFF, DIDX)) + } + } + + Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status + { + If (LEqual (EDPV, Zero)) + { + Return (Zero) + } + Else + { + Return (CDDS (DIDX)) + } + } + + Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State + { + If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD))) + { + Return (NXDX) + } + + Return (NDDS (DIDX)) + } + + Method (_DSS, 1, NotSerialized) // _DSS: Device Set State + { + DSST (Arg0) + } + + Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels + { + If (LGreaterEqual (OSYS, 0x07DC)) + { + Return (Package (0x67) + { + 0x64, + 0x64, + Zero, + One, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08, + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10, + 0x11, + 0x12, + 0x13, + 0x14, + 0x15, + 0x16, + 0x17, + 0x18, + 0x19, + 0x1A, + 0x1B, + 0x1C, + 0x1D, + 0x1E, + 0x1F, + 0x20, + 0x21, + 0x22, + 0x23, + 0x24, + 0x25, + 0x26, + 0x27, + 0x28, + 0x29, + 0x2A, + 0x2B, + 0x2C, + 0x2D, + 0x2E, + 0x2F, + 0x30, + 0x31, + 0x32, + 0x33, + 0x34, + 0x35, + 0x36, + 0x37, + 0x38, + 0x39, + 0x3A, + 0x3B, + 0x3C, + 0x3D, + 0x3E, + 0x3F, + 0x40, + 0x41, + 0x42, + 0x43, + 0x44, + 0x45, + 0x46, + 0x47, + 0x48, + 0x49, + 0x4A, + 0x4B, + 0x4C, + 0x4D, + 0x4E, + 0x4F, + 0x50, + 0x51, + 0x52, + 0x53, + 0x54, + 0x55, + 0x56, + 0x57, + 0x58, + 0x59, + 0x5A, + 0x5B, + 0x5C, + 0x5D, + 0x5E, + 0x5F, + 0x60, + 0x61, + 0x62, + 0x63, + 0x64 + }) + } + + Return (\_SB.PCI0.LPCB.EC.BRTW) + } + + Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method + { + If (LGreaterEqual (OSYS, 0x07DC)) + { + If (LAnd (LGreaterEqual (Arg0, Zero), LLessEqual (Arg0, 0x64))) + { + Store (Divide (Multiply (Arg0, 0xFF), 0x64, ), Local0) + \_SB.PCI0.GFX0.AINT (One, Local0) + Store (Arg0, BRTL) + } + } + Else + { + Store (Match (\_SB.PCI0.LPCB.EC.BRTW, MEQ, Arg0, MTR, Zero, 0x02), Local0) + If (LNotEqual (Local0, Ones)) + { + Subtract (Local0, 0x02, Local1) + Store (Local1, \BRLV) + \_SB.PCI0.LPCB.EC.BRNS () + } + } + } + + Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current + { + If (LGreaterEqual (OSYS, 0x07DC)) + { + Return (BRTL) + } + Else + { + Store (\BRLV, Local0) + Add (Local0, 0x02, Local1) + If (LLessEqual (Local1, 0x11)) + { + Return (DerefOf (Index (\_SB.PCI0.LPCB.EC.BRTW, Local1))) + } + Else + { + Return (Zero) + } + } + } + } + + Method (SDDL, 1, NotSerialized) + { + Increment (NDID) + Store (And (Arg0, 0x0F0F), Local0) + Or (0x80000000, Local0, Local1) + If (LEqual (DIDL, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL2, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL3, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL4, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL5, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL6, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL7, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL8, Local0)) + { + Return (Local1) + } + + If (LEqual (DDL9, Local0)) + { + Return (Local1) + } + + If (LEqual (DD10, Local0)) + { + Return (Local1) + } + + If (LEqual (DD11, Local0)) + { + Return (Local1) + } + + If (LEqual (DD12, Local0)) + { + Return (Local1) + } + + If (LEqual (DD13, Local0)) + { + Return (Local1) + } + + If (LEqual (DD14, Local0)) + { + Return (Local1) + } + + If (LEqual (DD15, Local0)) + { + Return (Local1) + } + + Return (Zero) + } + + Method (CDDS, 1, NotSerialized) + { + Store (And (Arg0, 0x0F0F), Local0) + If (LEqual (Zero, Local0)) + { + Return (0x1D) + } + + If (LEqual (CADL, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL2, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL3, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL4, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL5, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL6, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL7, Local0)) + { + Return (0x1F) + } + + If (LEqual (CAL8, Local0)) + { + Return (0x1F) + } + + Return (0x1D) + } + + Method (NDDS, 1, NotSerialized) + { + Store (And (Arg0, 0x0F0F), Local0) + If (LEqual (Zero, Local0)) + { + Return (Zero) + } + + If (LEqual (NADL, Local0)) + { + Return (One) + } + + If (LEqual (NDL2, Local0)) + { + Return (One) + } + + If (LEqual (NDL3, Local0)) + { + Return (One) + } + + If (LEqual (NDL4, Local0)) + { + Return (One) + } + + If (LEqual (NDL5, Local0)) + { + Return (One) + } + + If (LEqual (NDL6, Local0)) + { + Return (One) + } + + If (LEqual (NDL7, Local0)) + { + Return (One) + } + + If (LEqual (NDL8, Local0)) + { + Return (One) + } + + Return (Zero) + } + + Method (DSST, 1, NotSerialized) + { + If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) + { + Store (NSTE, CSTE) + } + } + + Method (VLOC, 1, NotSerialized) + { + If (LEqual (Arg0, \_SB.LID._LID ())) + { + Store (Arg0, CLID) + GNOT (0x02, Zero) + } + } + + Scope (\_SB.PCI0) + { + OperationRegion (MCHP, PCI_Config, 0x40, 0xC0) + Field (MCHP, AnyAcc, NoLock, Preserve) + { + Offset (0x14), + AUDE, 8, + Offset (0x60), + TASM, 10, + Offset (0x62) + } + } + + OperationRegion (IGDP, PCI_Config, 0x40, 0xC0) + Field (IGDP, AnyAcc, NoLock, Preserve) + { + Offset (0x10), + , 1, + GIVD, 1, + , 2, + GUMA, 3, + Offset (0x12), + Offset (0x14), + , 4, + GMFN, 1, + Offset (0x18), + Offset (0xA4), + ASLE, 8, + Offset (0xA8), + GSSE, 1, + GSSB, 14, + GSES, 1, + Offset (0xB0), + , 12, + CDVL, 1, + Offset (0xB2), + Offset (0xB5), + LBPC, 8, + Offset (0xBC), + ASLS, 32 + } + + OperationRegion (IGDM, SystemMemory, ASLB, 0x2000) + Field (IGDM, AnyAcc, NoLock, Preserve) + { + SIGN, 128, + SIZE, 32, + OVER, 32, + SVER, 256, + VVER, 128, + GVER, 128, + MBOX, 32, + DMOD, 32, + PCON, 32, + DVER, 64, + Offset (0x100), + DRDY, 32, + CSTS, 32, + CEVT, 32, + Offset (0x120), + DIDL, 32, + DDL2, 32, + DDL3, 32, + DDL4, 32, + DDL5, 32, + DDL6, 32, + DDL7, 32, + DDL8, 32, + CPDL, 32, + CPL2, 32, + CPL3, 32, + CPL4, 32, + CPL5, 32, + CPL6, 32, + CPL7, 32, + CPL8, 32, + CADL, 32, + CAL2, 32, + CAL3, 32, + CAL4, 32, + CAL5, 32, + CAL6, 32, + CAL7, 32, + CAL8, 32, + NADL, 32, + NDL2, 32, + NDL3, 32, + NDL4, 32, + NDL5, 32, + NDL6, 32, + NDL7, 32, + NDL8, 32, + ASLP, 32, + TIDX, 32, + CHPD, 32, + CLID, 32, + CDCK, 32, + SXSW, 32, + EVTS, 32, + CNOT, 32, + NRDY, 32, + DDL9, 32, + DD10, 32, + DD11, 32, + DD12, 32, + DD13, 32, + DD14, 32, + DD15, 32, + CPL9, 32, + CP10, 32, + CP11, 32, + CP12, 32, + CP13, 32, + CP14, 32, + CP15, 32, + Offset (0x200), + SCIE, 1, + GEFC, 4, + GXFC, 3, + GESF, 8, + Offset (0x204), + PARM, 32, + DSLP, 32, + Offset (0x300), + ARDY, 32, + ASLC, 32, + TCHE, 32, + ALSI, 32, + BCLP, 32, + PFIT, 32, + CBLV, 32, + BCLM, 320, + CPFM, 32, + EPFM, 32, + PLUT, 592, + PFMB, 32, + CCDV, 32, + PCFT, 32, + SROT, 32, + IUER, 32, + FDSP, 64, + FDSS, 32, + STAT, 32, + Offset (0x400), + GVD1, 49152, + PHED, 32, + BDDC, 2048 + } + + Name (DBTB, Package (0x15) + { + Zero, + 0x07, + 0x38, + 0x01C0, + 0x0E00, + 0x3F, + 0x01C7, + 0x0E07, + 0x01F8, + 0x0E38, + 0x0FC0, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x7000, + 0x7007, + 0x7038, + 0x71C0, + 0x7E00 + }) + Name (CDCT, Package (0x05) + { + Package (0x02) + { + 0xE4, + 0x0140 + }, + + Package (0x02) + { + 0xDE, + 0x014D + }, + + Package (0x02) + { + 0xDE, + 0x014D + }, + + Package (0x02) + { + Zero, + Zero + }, + + Package (0x02) + { + 0xDE, + 0x014D + } + }) + Name (SUCC, One) + Name (NVLD, 0x02) + Name (CRIT, 0x04) + Name (NCRT, 0x06) + Method (GSCI, 0, Serialized) + { + Method (GBDA, 0, Serialized) + { + If (LEqual (GESF, Zero)) + { + Store (0x0659, PARM) + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GESF, One)) + { + Store (0x00300482, PARM) + If (LEqual (S0ID, One)) + { + Or (PARM, 0x0100, PARM) + } + + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GESF, 0x04)) + { + And (PARM, 0xEFFF0000, PARM) + And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10), PARM) + Or (IBTT, PARM, PARM) + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GESF, 0x05)) + { + Store (IPSC, PARM) + Or (PARM, ShiftLeft (IPAT, 0x08), PARM) + Add (PARM, 0x0100, PARM) + Or (PARM, ShiftLeft (LIDS, 0x10), PARM) + Add (PARM, 0x00010000, PARM) + Or (PARM, ShiftLeft (IBIA, 0x14), PARM) + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GESF, 0x07)) + { + Store (GIVD, PARM) + XOr (PARM, One, PARM) + Or (PARM, ShiftLeft (GMFN, One), PARM) + Or (PARM, 0x1800, PARM) + Or (PARM, ShiftLeft (IDMS, 0x11), PARM) + Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL)), 0x15), PARM, PARM) + Store (One, GESF) + Return (SUCC) + } + + If (LEqual (GESF, 0x0A)) + { + Store (Zero, PARM) + If (ISSC) + { + Or (PARM, 0x03, PARM) + } + + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GESF, 0x0B)) + { + Store (KSV0, PARM) + Store (KSV1, GESF) + Return (SUCC) + } + + Store (Zero, GESF) + Return (CRIT) + } + + Method (SBCB, 0, Serialized) + { + If (LEqual (GESF, Zero)) + { + Store (Zero, PARM) + Store (0x000F87DD, PARM) + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GESF, One)) + { + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x03)) + { + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x04)) + { + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x05)) + { + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x07)) + { + If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF))) + { + If (LEqual (And (PARM, 0xFF), One)) + { + \GUAM (One) + } + + If (LEqual (And (PARM, 0xFF), Zero)) + { + \GUAM (Zero) + } + } + + If (LEqual (PARM, Zero)) + { + Store (CLID, Local0) + If (And (0x80000000, Local0)) + { + And (CLID, 0x0F, CLID) + GLID (CLID) + } + } + + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x08)) + { + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x09)) + { + And (PARM, 0xFF, IBTT) + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x0A)) + { + And (PARM, 0xFF, IPSC) + If (And (ShiftRight (PARM, 0x08), 0xFF)) + { + And (ShiftRight (PARM, 0x08), 0xFF, IPAT) + Decrement (IPAT) + } + + And (ShiftRight (PARM, 0x14), 0x07, IBIA) + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x0B)) + { + And (ShiftRight (PARM, One), One, IF1E) + If (And (PARM, 0x0001E000)) + { + And (ShiftRight (PARM, 0x0D), 0x0F, IDMS) + } + Else + { + And (ShiftRight (PARM, 0x11), 0x0F, IDMS) + } + + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x10)) + { + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x11)) + { + Store (ShiftLeft (LIDS, 0x08), PARM) + Add (PARM, 0x0100, PARM) + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GESF, 0x12)) + { + If (And (PARM, One)) + { + If (LEqual (ShiftRight (PARM, One), One)) + { + Store (One, ISSC) + } + Else + { + Store (Zero, GESF) + Return (CRIT) + } + } + Else + { + Store (Zero, ISSC) + } + + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x13)) + { + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + If (LEqual (GESF, 0x14)) + { + And (PARM, 0x0F, PAVP) + Store (Zero, GESF) + Store (Zero, PARM) + Return (SUCC) + } + + Store (Zero, GESF) + Return (SUCC) + } + + If (LEqual (GEFC, 0x04)) + { + Store (GBDA (), GXFC) + } + + If (LEqual (GEFC, 0x06)) + { + Store (SBCB (), GXFC) + } + + Store (Zero, GEFC) + Store (One, CPSC) + Store (Zero, GSSE) + Store (Zero, SCIE) + Return (Zero) + } + + Method (PDRD, 0, NotSerialized) + { + Return (LNot (DRDY)) + } + + Method (PSTS, 0, NotSerialized) + { + If (LGreater (CSTS, 0x02)) + { + Sleep (ASLP) + } + + Return (LEqual (CSTS, 0x03)) + } + + Method (GNOT, 2, NotSerialized) + { + If (PDRD ()) + { + Return (One) + } + + Store (Arg0, CEVT) + Store (0x03, CSTS) + If (LAnd (LEqual (CHPD, Zero), LEqual (Arg1, Zero))) + { + Notify (\_SB.PCI0.GFX0, Arg1) + } + + If (CondRefOf (HNOT)) + { + HNOT (Arg0) + } + Else + { + Notify (\_SB.PCI0.GFX0, 0x80) + } + + Return (Zero) + } + + Method (GHDS, 1, NotSerialized) + { + Store (Arg0, TIDX) + Return (GNOT (One, Zero)) + } + + Method (GLID, 1, NotSerialized) + { + If (LEqual (Arg0, One)) + { + Store (0x03, CLID) + } + Else + { + Store (Arg0, CLID) + } + + If (GNOT (0x02, Zero)) + { + Or (CLID, 0x80000000, CLID) + Return (One) + } + + Return (Zero) + } + + Method (GDCK, 1, NotSerialized) + { + Store (Arg0, CDCK) + Return (GNOT (0x04, Zero)) + } + + Method (PARD, 0, NotSerialized) + { + If (LNot (ARDY)) + { + Sleep (ASLP) + } + + Return (LNot (ARDY)) + } + + Method (IUEH, 1, Serialized) + { + And (IUER, 0xC0, IUER) + XOr (IUER, ShiftLeft (One, Arg0), IUER) + If (LLessEqual (Arg0, 0x04)) + { + Return (AINT (0x05, Zero)) + } + Else + { + Return (AINT (Arg0, Zero)) + } + } + + Method (AINT, 2, NotSerialized) + { + If (LNot (And (TCHE, ShiftLeft (One, Arg0)))) + { + Return (One) + } + + If (PARD ()) + { + Return (One) + } + + If (LAnd (LGreaterEqual (Arg0, 0x05), LLessEqual (Arg0, 0x07))) + { + Store (ShiftLeft (One, Arg0), ASLC) + Store (One, ASLE) + Store (Zero, Local2) + While (LAnd (LLess (Local2, 0xFA), LNotEqual (ASLC, Zero))) + { + Sleep (0x04) + Increment (Local2) + } + + Return (Zero) + } + + If (LEqual (Arg0, 0x02)) + { + If (CPFM) + { + And (CPFM, 0x0F, Local0) + And (EPFM, 0x0F, Local1) + If (LEqual (Local0, One)) + { + If (And (Local1, 0x06)) + { + Store (0x06, PFIT) + } + ElseIf (And (Local1, 0x08)) + { + Store (0x08, PFIT) + } + Else + { + Store (One, PFIT) + } + } + + If (LEqual (Local0, 0x06)) + { + If (And (Local1, 0x08)) + { + Store (0x08, PFIT) + } + ElseIf (And (Local1, One)) + { + Store (One, PFIT) + } + Else + { + Store (0x06, PFIT) + } + } + + If (LEqual (Local0, 0x08)) + { + If (And (Local1, One)) + { + Store (One, PFIT) + } + ElseIf (And (Local1, 0x06)) + { + Store (0x06, PFIT) + } + Else + { + Store (0x08, PFIT) + } + } + } + Else + { + XOr (PFIT, 0x07, PFIT) + } + + Or (PFIT, 0x80000000, PFIT) + Store (0x04, ASLC) + } + ElseIf (LEqual (Arg0, One)) + { + Store (Arg1, BCLP) + Or (BCLP, 0x80000000, BCLP) + Store (0x02, ASLC) + } + ElseIf (LEqual (Arg0, Zero)) + { + Store (Arg1, ALSI) + Store (One, ASLC) + } + Else + { + Return (One) + } + + Store (One, ASLE) + Return (Zero) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("3e5b41c6-eb1d-4260-9d15-c71fbadae414"))) + { + Switch (ToInteger (Arg2)) + { + Case (Zero) + { + If (LEqual (Arg1, One)) + { + Return (0x0001E7FF) + } + } + Case (One) + { + If (LEqual (Arg1, One)) + { + If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF))) + { + If (LEqual (And (DerefOf (Index (Arg3, Zero)), 0xFF), One)) + { + \GUAM (One) + } + + Store (And (DerefOf (Index (Arg3, One)), 0xFF), Local0) + If (LEqual (Local0, Zero)) + { + \GUAM (Zero) + } + } + + If (LEqual (DerefOf (Index (Arg3, Zero)), Zero)) + { + Store (CLID, Local0) + If (And (0x80000000, Local0)) + { + And (CLID, 0x0F, CLID) + GLID (CLID) + } + } + + Return (One) + } + } + Case (0x02) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x03) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x04) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x05) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x06) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x07) + { + If (LEqual (Arg1, One)) + { + And (DerefOf (Index (Arg3, Zero)), 0xFF, IBTT) + Return (One) + } + } + Case (0x08) + { + If (LEqual (Arg1, One)) + { + And (DerefOf (Index (Arg3, Zero)), 0xFF, IPSC) + If (And (DerefOf (Index (Arg3, One)), 0xFF)) + { + And (DerefOf (Index (Arg3, One)), 0xFF, IPAT) + Decrement (IPAT) + } + + And (ShiftRight (DerefOf (Index (Arg3, 0x02)), 0x04), 0x07, IBIA) + Return (One) + } + } + Case (0x09) + { + If (LEqual (Arg1, One)) + { + Return (One) + } + } + Case (0x0A) + { + If (LEqual (Arg1, One)) + { + Store (ShiftLeft (LIDS, 0x08), Local0) + Add (Local0, 0x0100, Local0) + Return (Local0) + } + } + Case (0x0D) + { + If (LEqual (Arg1, One)) + { + Or (ShiftLeft (DerefOf (Index (Arg3, 0x03)), 0x18), ShiftLeft (DerefOf (Index (Arg3, 0x02)), 0x10), Local0) + And (Local0, 0xEFFF0000, Local0) + And (Local0, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10), Local0) + Or (IBTT, Local0, Local0) + Return (Local0) + } + } + Case (0x0E) + { + If (LEqual (Arg1, One)) + { + Store (IPSC, Local0) + Or (Local0, ShiftLeft (IPAT, 0x08), Local0) + Add (Local0, 0x0100, Local0) + Or (Local0, ShiftLeft (LIDS, 0x10), Local0) + Add (Local0, 0x00010000, Local0) + Or (Local0, ShiftLeft (IBIA, 0x14), Local0) + Return (Local0) + } + } + Case (0x0F) + { + If (LEqual (Arg1, One)) + { + Store (GIVD, Local0) + XOr (Local0, One, Local0) + Or (Local0, ShiftLeft (GMFN, One), Local0) + Or (Local0, 0x1800, Local0) + Or (Local0, ShiftLeft (IDMS, 0x11), Local0) + Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL)), 0x15), Local0, Local0) + Return (Local0) + } + } + Case (0x10) + { + If (LEqual (Arg1, One)) + { + Name (KSVP, Package (0x02) + { + 0x80000000, + 0x8000 + }) + Store (KSV0, Index (KSVP, Zero)) + Store (KSV1, Index (KSVP, One)) + Return (KSVP) + } + } + + } + } + + Return (Buffer (One) + { + 0x00 + }) + } + } + + Scope (\_SB) + { + Device (SKC0) + { + Name (_HID, "INT3470") // _HID: Hardware ID + Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (IMTP, 0x02)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + } + } + + Scope (\_SB.PCI0.GFX0) + { + Device (SKC0) + { + Name (_ADR, 0xCA00) // _ADR: Address + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (IMTP, One)) + { + Return (0x0F) + } + Else + { + Return (Zero) + } + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-10-Wwan.dsl b/ACPI/Disassembled ACPI files/SSDT-10-Wwan.dsl new file mode 100755 index 0000000..a5cc321 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-10-Wwan.dsl @@ -0,0 +1,117 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-10-Wwan.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000002D1 (721) + * Revision 0x02 + * Checksum 0x26 + * OEM ID "LENOVO" + * OEM Table ID "Wwan" + * OEM Revision 0x00000001 (1) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "Wwan", 0x00000001) +{ + External (_SB_.GPC0, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.GPCB, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP03, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP03._ADR, MethodObj) // 0 Arguments (from opcode) + External (_SB_.PCI0.RP03.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP03.PXSX._ADR, IntObj) // (from opcode) + External (_SB_.SPC0, MethodObj) // 2 Arguments (from opcode) + External (NEXP, IntObj) // (from opcode) + External (WDC2, IntObj) // (from opcode) + External (WDCT, IntObj) // (from opcode) + External (WGUR, IntObj) // (from opcode) + External (WLCT, IntObj) // (from opcode) + External (WMNS, IntObj) // (from opcode) + External (WMXS, IntObj) // (from opcode) + + Name (RSTP, Package (0x04) + { + Zero, + Zero, + Zero, + Zero + }) + Scope (\_SB.PCI0.RP03) + { + Method (M2PC, 1, Serialized) + { + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftRight (And (Arg0, 0x001F0000), One), Local0) + Add (Local0, ShiftLeft (And (Arg0, 0x07), 0x0C), Local0) + Return (Local0) + } + + Method (GMIO, 1, Serialized) + { + OperationRegion (PXCS, SystemMemory, M2PC (\_SB.PCI0.RP03._ADR ()), 0x20) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + Offset (0x18), + PBUS, 8, + SBUS, 8 + } + + Store (\_SB.PCI0.GPCB (), Local0) + Add (Local0, ShiftRight (And (Arg0, 0x001F0000), One), Local0) + Add (Local0, ShiftLeft (And (Arg0, 0x07), 0x0C), Local0) + Add (Local0, ShiftLeft (SBUS, 0x14), Local0) + Return (Local0) + } + + Scope (PXSX) + { + Method (_RST, 0, Serialized) // _RST: Device Reset + { + OperationRegion (PXCS, SystemMemory, GMIO (\_SB.PCI0.RP03.PXSX._ADR), 0x0480) + Field (PXCS, AnyAcc, NoLock, Preserve) + { + VDID, 16, + DVID, 16, + Offset (0x78), + DCTL, 16, + DSTS, 16, + Offset (0x80), + LCTL, 16, + LSTS, 16, + Offset (0x98), + DCT2, 16, + Offset (0x148), + Offset (0x14C), + MXSL, 16, + MNSL, 16 + } + + Store (\_SB.GPC0 (\WGUR), Local0) + And (Local0, 0xFFFFFFFFFFFFFEFF, Local0) + \_SB.SPC0 (\WGUR, Local0) + Sleep (0xC8) + Notify (\_SB.PCI0.RP03.PXSX, One) + Or (Local0, 0x0100, Local0) + \_SB.SPC0 (\WGUR, Local0) + Sleep (0xC8) + If (LEqual (NEXP, Zero)) + { + Store (\WDCT, DCTL) + Store (\WLCT, LCTL) + Store (\WDC2, DCT2) + Store (\WMXS, MXSL) + Store (\WMNS, MNSL) + } + + Notify (\_SB.PCI0.RP03.PXSX, One) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-2-PerfTune.dsl b/ACPI/Disassembled ACPI files/SSDT-2-PerfTune.dsl new file mode 100755 index 0000000..fe12b52 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-2-PerfTune.dsl @@ -0,0 +1,344 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-2-PerfTune.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000005C6 (1478) + * Revision 0x02 + * Checksum 0x9F + * OEM ID "LENOVO" + * OEM Table ID "PerfTune" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "PerfTune", 0x00001000) +{ + External (_SB_.PCI0.LPCB.H_EC.CFSP, UnknownObj) // (from opcode) + External (_SB_.PCI0.LPCB.H_EC.DIM0, UnknownObj) // (from opcode) + External (_SB_.PCI0.LPCB.H_EC.DIM1, UnknownObj) // (from opcode) + External (_SB_.PCI0.LPCB.H_EC.ECRD, MethodObj) // 1 Arguments (from opcode) + External (_TZ_.TZ01._TMP, MethodObj) // 0 Arguments (from opcode) + External (ADBG, MethodObj) // 1 Arguments (from opcode) + External (DDRF, UnknownObj) // (from opcode) + External (ECON, IntObj) // (from opcode) + External (TSOD, IntObj) // (from opcode) + External (XMPB, UnknownObj) // (from opcode) + External (XSMI, UnknownObj) // (from opcode) + External (XTUB, UnknownObj) // (from opcode) + External (XTUS, UnknownObj) // (from opcode) + + Scope (\_SB) + { + Device (PTMD) + { + Name (_HID, EisaId ("INT3394")) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID + Name (IVER, 0x00010000) + Name (SIZE, 0x055C) + Method (GACI, 0, NotSerialized) + { + Name (RPKG, Package (0x02){}) + Store (Zero, Index (RPKG, Zero)) + If (LNotEqual (XTUB, Zero)) + { + ADBG ("XTUB") + ADBG (XTUB) + ADBG ("XTUS") + ADBG (XTUS) + OperationRegion (XNVS, SystemMemory, XTUB, SIZE) + Field (XNVS, ByteAcc, NoLock, Preserve) + { + XBUF, 10976 + } + + Name (TEMP, Buffer (XTUS){}) + Store (XBUF, TEMP) + Store (TEMP, Index (RPKG, One)) + } + Else + { + ADBG ("XTUB ZERO") + Store (Zero, Index (RPKG, One)) + } + + Return (RPKG) + } + + Method (GDSV, 1, Serialized) + { + If (LEqual (Arg0, 0x05)) + { + Return (Package (0x02) + { + Zero, + Buffer (0x68) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x4C, 0x04, 0x00, 0x00, + /* 0010 */ 0x02, 0x00, 0x00, 0x00, 0x7E, 0x04, 0x00, 0x00, + /* 0018 */ 0x03, 0x00, 0x00, 0x00, 0xB0, 0x04, 0x00, 0x00, + /* 0020 */ 0x04, 0x00, 0x00, 0x00, 0xE2, 0x04, 0x00, 0x00, + /* 0028 */ 0x05, 0x00, 0x00, 0x00, 0x14, 0x05, 0x00, 0x00, + /* 0030 */ 0x06, 0x00, 0x00, 0x00, 0x46, 0x05, 0x00, 0x00, + /* 0038 */ 0x07, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, + /* 0040 */ 0x08, 0x00, 0x00, 0x00, 0xAA, 0x05, 0x00, 0x00, + /* 0048 */ 0x09, 0x00, 0x00, 0x00, 0xDC, 0x05, 0x00, 0x00, + /* 0050 */ 0x0A, 0x00, 0x00, 0x00, 0x0E, 0x06, 0x00, 0x00, + /* 0058 */ 0x0B, 0x00, 0x00, 0x00, 0x40, 0x06, 0x00, 0x00, + /* 0060 */ 0x0C, 0x00, 0x00, 0x00, 0x72, 0x06, 0x00, 0x00 + } + }) + } + + If (LEqual (Arg0, 0x13)) + { + ADBG ("DDR MULT") + If (LEqual (DDRF, One)) + { + ADBG ("DDR 1") + Return (Package (0x02) + { + Zero, + Buffer (0x50) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x04, 0x00, 0x00, 0x00, 0x2B, 0x04, 0x00, 0x00, + /* 0010 */ 0x05, 0x00, 0x00, 0x00, 0x35, 0x05, 0x00, 0x00, + /* 0018 */ 0x06, 0x00, 0x00, 0x00, 0x40, 0x06, 0x00, 0x00, + /* 0020 */ 0x07, 0x00, 0x00, 0x00, 0x4B, 0x07, 0x00, 0x00, + /* 0028 */ 0x08, 0x00, 0x00, 0x00, 0x55, 0x08, 0x00, 0x00, + /* 0030 */ 0x09, 0x00, 0x00, 0x00, 0x60, 0x09, 0x00, 0x00, + /* 0038 */ 0x0A, 0x00, 0x00, 0x00, 0x6B, 0x0A, 0x00, 0x00, + /* 0040 */ 0x0B, 0x00, 0x00, 0x00, 0x75, 0x0B, 0x00, 0x00, + /* 0048 */ 0x0C, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x00, 0x00 + } + }) + } + Else + { + ADBG ("DDR ELSE") + Return (Package (0x02) + { + Zero, + Buffer (0x68) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x05, 0x00, 0x00, 0x00, 0x2B, 0x04, 0x00, 0x00, + /* 0010 */ 0x06, 0x00, 0x00, 0x00, 0xB0, 0x04, 0x00, 0x00, + /* 0018 */ 0x07, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, + /* 0020 */ 0x08, 0x00, 0x00, 0x00, 0x40, 0x06, 0x00, 0x00, + /* 0028 */ 0x09, 0x00, 0x00, 0x00, 0x08, 0x07, 0x00, 0x00, + /* 0030 */ 0x0A, 0x00, 0x00, 0x00, 0xD0, 0x07, 0x00, 0x00, + /* 0038 */ 0x0B, 0x00, 0x00, 0x00, 0x98, 0x08, 0x00, 0x00, + /* 0040 */ 0x0C, 0x00, 0x00, 0x00, 0x60, 0x09, 0x00, 0x00, + /* 0048 */ 0x0D, 0x00, 0x00, 0x00, 0x28, 0x0A, 0x00, 0x00, + /* 0050 */ 0x0E, 0x00, 0x00, 0x00, 0xF0, 0x0A, 0x00, 0x00, + /* 0058 */ 0x0F, 0x00, 0x00, 0x00, 0xB8, 0x0B, 0x00, 0x00, + /* 0060 */ 0x10, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x00, 0x00 + } + }) + } + + ADBG ("DDR EXIT") + } + + If (LEqual (Arg0, 0x0B)) + { + Return (Package (0x02) + { + Zero, + Buffer (0x60) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x05, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + /* 0010 */ 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + /* 0018 */ 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + /* 0020 */ 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + /* 0028 */ 0x0A, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + /* 0030 */ 0x0C, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, + /* 0038 */ 0x0E, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, + /* 0040 */ 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + /* 0048 */ 0x12, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, + /* 0050 */ 0x14, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, + /* 0058 */ 0x18, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00 + } + }) + } + + If (LEqual (Arg0, 0x49)) + { + Return (Package (0x02) + { + Zero, + Buffer (0x18) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x85, 0x00, 0x00, 0x00, + /* 0010 */ 0x02, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00 + } + }) + } + + Return (Package (0x01) + { + One + }) + } + + Method (GXDV, 1, Serialized) + { + If (LNotEqual (XMPB, Zero)) + { + OperationRegion (XMPN, SystemMemory, XMPB, SIZE) + Field (XMPN, ByteAcc, NoLock, Preserve) + { + XMP1, 576, + XMP2, 576 + } + + If (LEqual (Arg0, One)) + { + Name (XP_1, Package (0x02){}) + Store (Zero, Index (XP_1, Zero)) + Store (XMP1, Index (XP_1, One)) + Return (XP_1) + } + + If (LEqual (Arg0, 0x02)) + { + Name (XP_2, Package (0x02){}) + Store (Zero, Index (XP_2, Zero)) + Store (XMP2, Index (XP_2, One)) + Return (XP_2) + } + } + + Return (Package (0x01) + { + One + }) + } + + Method (GSCV, 0, NotSerialized) + { + Return (Package (0x01) + { + 0x72 + }) + } + + Method (GSCB, 0, NotSerialized) + { + Return (XSMI) + } + + Method (CDRD, 1, Serialized) + { + Return (Package (0x01) + { + One + }) + } + + Method (CDWR, 2, Serialized) + { + Return (One) + } + + Name (RPMV, Package (0x04) + { + One, + 0x07, + Zero, + Zero + }) + Name (TMP1, Package (0x0C) + { + One, + 0x02, + Zero, + Zero, + 0x05, + 0x04, + Zero, + Zero, + 0x06, + 0x05, + Zero, + Zero + }) + Name (TMP2, Package (0x08) + { + One, + 0x02, + Zero, + Zero, + 0x05, + 0x04, + Zero, + Zero + }) + Name (TMP3, Package (0x04) + { + One, + 0x02, + Zero, + Zero + }) + Method (TSDD, 0, NotSerialized) + { + If (LEqual (XTUS, Zero)) + { + Return (Zero) + } + + If (\ECON) + { + If (\TSOD) + { + Store (\_TZ.TZ01._TMP (), Index (TMP1, 0x02)) + Return (TMP1) + } + Else + { + Store (\_TZ.TZ01._TMP (), Index (TMP2, 0x02)) + Return (TMP2) + } + } + Else + { + Store (\_TZ.TZ01._TMP (), Index (TMP3, 0x02)) + Return (TMP3) + } + } + + Method (FSDD, 0, NotSerialized) + { + If (LEqual (XTUS, Zero)) + { + Return (Zero) + } + + If (\ECON) + { + Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.CFSP)), Index (RPMV, 0x02)) + } + + Return (RPMV) + } + + Method (SDSP, 0, NotSerialized) + { + Return (0x0A) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-3-RVP7Rtd3.dsl b/ACPI/Disassembled ACPI files/SSDT-3-RVP7Rtd3.dsl new file mode 100755 index 0000000..33e4c8a --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-3-RVP7Rtd3.dsl @@ -0,0 +1,759 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-3-RVP7Rtd3.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00001C9C (7324) + * Revision 0x02 + * Checksum 0x38 + * OEM ID "LENOVO" + * OEM Table ID "RVP7Rtd3" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "RVP7Rtd3", 0x00001000) +{ + External (_SB_.GGOV, MethodObj) // 1 Arguments (from opcode) + External (_SB_.GPC0, MethodObj) // 1 Arguments (from opcode) + External (_SB_.OSCO, UnknownObj) // (from opcode) + External (_SB_.PCI0, DeviceObj) // (from opcode) + External (_SB_.PCI0.GEXP, DeviceObj) // (from opcode) + External (_SB_.PCI0.GEXP.GEPS, MethodObj) // 2 Arguments (from opcode) + External (_SB_.PCI0.GEXP.SGEP, MethodObj) // 3 Arguments (from opcode) + External (_SB_.PCI0.GLAN, DeviceObj) // (from opcode) + External (_SB_.PCI0.I2C0, DeviceObj) // (from opcode) + External (_SB_.PCI0.I2C0.TPD0, DeviceObj) // (from opcode) + External (_SB_.PCI0.I2C1, DeviceObj) // (from opcode) + External (_SB_.PCI0.I2C1.TPL1, DeviceObj) // (from opcode) + External (_SB_.PCI0.LPCB.H_EC.ECAV, IntObj) // (from opcode) + External (_SB_.PCI0.LPCB.H_EC.SPT2, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP01.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP01.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP01.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP02, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP02.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP02.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP02.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP02.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP02.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP02.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP02.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP02.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP03, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP03.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP03.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP03.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP03.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP03.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP03.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP03.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP03.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP04, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP04.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP04.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP04.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP04.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP04.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP04.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP04.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP04.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP05.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP05.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP05.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP06.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP06.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP06.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP07, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP07.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP07.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP07.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP07.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP07.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP07.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP07.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP07.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP08, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP08.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP08.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP08.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP08.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP08.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP08.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP08.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP08.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP09.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP09.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP09.PCRA, MethodObj) // 3 Arguments (from opcode) + External (_SB_.PCI0.RP09.PCRO, MethodObj) // 3 Arguments (from opcode) + External (_SB_.PCI0.RP09.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP10.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP10.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP10.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP11, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP11.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP11.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP11.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP11.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP11.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP11.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP11.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP11.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP12, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP12.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP12.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP12.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP12.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP12.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP12.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP12.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP12.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP13.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP13.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP13.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP14.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP14.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP14.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP15, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP15.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP15.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP15.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP15.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP15.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP15.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP15.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP15.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP16, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP16.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP16.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP16.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP16.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP16.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP16.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP16.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP16.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP17.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP17.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP17.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP18.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP18.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP18.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP19, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP19.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP19.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP19.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP19.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP19.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP19.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP19.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP19.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP20, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP20.D3HT, FieldUnitObj) // (from opcode) + External (_SB_.PCI0.RP20.DPGE, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP20.L23E, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP20.L23R, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP20.LASX, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP20.LDIS, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP20.LEDM, UnknownObj) // (from opcode) + External (_SB_.PCI0.RP20.VDID, UnknownObj) // (from opcode) + External (_SB_.PCI0.SAT0, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT0, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT1, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT2, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT3, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT4, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT5, DeviceObj) // (from opcode) + External (_SB_.PCI0.XDCI, DeviceObj) // (from opcode) + External (_SB_.PCI0.XDCI.D0I3, UnknownObj) // (from opcode) + External (_SB_.PCI0.XDCI.XDCB, UnknownObj) // (from opcode) + External (_SB_.PCI0.XHC_, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.MEMB, UnknownObj) // (from opcode) + External (_SB_.PCI0.XHC_.PMEE, UnknownObj) // (from opcode) + External (_SB_.PCI0.XHC_.PMES, UnknownObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS01, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS02, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS01, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS02, DeviceObj) // (from opcode) + External (_SB_.SGOV, MethodObj) // 2 Arguments (from opcode) + External (_SB_.SHPO, MethodObj) // 2 Arguments (from opcode) + External (_SB_.SPC0, MethodObj) // 2 Arguments (from opcode) + External (ADBG, MethodObj) // 1 Arguments (from opcode) + External (AUDD, FieldUnitObj) // (from opcode) + External (DVID, UnknownObj) // (from opcode) + External (ECON, IntObj) // (from opcode) + External (GBEP, UnknownObj) // (from opcode) + External (I20D, FieldUnitObj) // (from opcode) + External (I21D, FieldUnitObj) // (from opcode) + External (IC0D, FieldUnitObj) // (from opcode) + External (IC1D, FieldUnitObj) // (from opcode) + External (IC1S, FieldUnitObj) // (from opcode) + External (MMRP, MethodObj) // 1 Arguments (from opcode) + External (MMTB, MethodObj) // 1 Arguments (from opcode) + External (OSYS, UnknownObj) // (from opcode) + External (PCHG, UnknownObj) // (from opcode) + External (PCHS, UnknownObj) // (from opcode) + External (PEP0, UnknownObj) // (from opcode) + External (PEP3, UnknownObj) // (from opcode) + External (RCG0, IntObj) // (from opcode) + External (RCG1, IntObj) // (from opcode) + External (RIC0, FieldUnitObj) // (from opcode) + External (RTBC, IntObj) // (from opcode) + External (RTBT, IntObj) // (from opcode) + External (RTD3, IntObj) // (from opcode) + External (S0ID, UnknownObj) // (from opcode) + External (SDS0, FieldUnitObj) // (from opcode) + External (SDS1, FieldUnitObj) // (from opcode) + External (SGMD, UnknownObj) // (from opcode) + External (SHSB, FieldUnitObj) // (from opcode) + External (SPST, IntObj) // (from opcode) + External (TBCD, IntObj) // (from opcode) + External (TBHR, IntObj) // (from opcode) + External (TBOD, IntObj) // (from opcode) + External (TBPE, IntObj) // (from opcode) + External (TBRP, IntObj) // (from opcode) + External (TBSE, IntObj) // (from opcode) + External (TBTS, IntObj) // (from opcode) + External (TOFF, IntObj) // (from opcode) + External (TRD3, IntObj) // (from opcode) + External (TRDO, IntObj) // (from opcode) + External (UAMS, UnknownObj) // (from opcode) + External (VRRD, FieldUnitObj) // (from opcode) + External (VRSD, FieldUnitObj) // (from opcode) + External (XDST, IntObj) // (from opcode) + External (XHPR, UnknownObj) // (from opcode) + + If (LAnd (LEqual (\RTBT, 0x01), LEqual (\TBTS, 0x01))) + { + Scope (\_SB.PCI0.RP09) + { + Name (SLOT, 0x09) + ADBG ("Rvp7Rtd3:Slot:") + ADBG (SLOT) + Name (RSTG, Package (0x04) + { + 0x01, + 0x00, + 0x02060006, + 0x01 + }) + Name (PWRG, Package (0x04) + { + 0x01, + 0x00, + 0x02060004, + 0x01 + }) + Name (WAKG, Package (0x04) + { + 0x01, + 0x00, + 0x02060007, + 0x00 + }) + Name (SCLK, Package (0x03) + { + 0x01, + 0x20, + 0x00 + }) + Name (G2SD, 0x00) + Name (WKEN, 0x00) + Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State + { + Return (0x04) + } + + Method (_DSD, 0, NotSerialized) // _DSD: Device-Specific Data + { + ADBG ("Tbt:_DSD") + Return (Package (0x02) + { + ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"), + Package (0x01) + { + Package (0x02) + { + "HotPlugSupportInD3", + 0x01 + } + } + }) + } + + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + ADBG ("Tbt:_DSW") + ADBG (Arg0) + ADBG (Arg1) + ADBG (Arg2) + If (LGreaterEqual (Arg1, 0x01)) + { + Store (0x00, WKEN) + Store (0x02, TOFF) + } + ElseIf (LAnd (Arg0, Arg2)) + { + Store (0x01, WKEN) + Store (0x01, TOFF) + } + Else + { + Store (0x00, WKEN) + Store (0x00, TOFF) + } + } + + PowerResource (PXP, 0x00, 0x0000) + { + ADBG ("TBT:PXP") + Method (_STA, 0, NotSerialized) // _STA: Status + { + ADBG ("PSTA") + Return (PSTA ()) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + ADBG ("S_ON") + Store (0x01, TRDO) + PON () + Store (0x00, TRDO) + ADBG ("E_ON") + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + ADBG ("S_OFF") + Store (0x01, TRD3) + POFF () + Store (0x00, TRD3) + ADBG ("E_OFF") + } + } + + Method (PSTA, 0, NotSerialized) + { + If (LNotEqual (DerefOf (Index (PWRG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x01)) + { + If (LEqual (\_SB.GGOV (DerefOf (Index (PWRG, 0x02))), DerefOf (Index (PWRG, 0x03)))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x02)) + { + If (LEqual (\_SB.PCI0.GEXP.GEPS (DerefOf (Index (PWRG, 0x01)), DerefOf (Index (PWRG, 0x02))), DerefOf (Index (PWRG, 0x03)))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + } + + If (LNotEqual (DerefOf (Index (RSTG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x01)) + { + If (LEqual (\_SB.GGOV (DerefOf (Index (RSTG, 0x02))), DerefOf (Index (RSTG, 0x03)))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x02)) + { + If (LEqual (\_SB.PCI0.GEXP.GEPS (DerefOf (Index (RSTG, 0x01)), DerefOf (Index (RSTG, 0x02))), DerefOf (Index (RSTG, 0x03)))) + { + Return (0x01) + } + Else + { + Return (0x00) + } + } + } + + Return (0x00) + } + + Method (SXEX, 0, Serialized) + { + Store (\MMTB (TBSE), Local7) + OperationRegion (TBDI, SystemMemory, Local7, 0x0550) + Field (TBDI, DWordAcc, NoLock, Preserve) + { + DIVI, 32, + CMDR, 32, + Offset (0x548), + TB2P, 32, + P2TB, 32 + } + + Store (0x64, Local1) + Store (0x09, P2TB) + While (LGreater (Local1, 0x00)) + { + Store (Subtract (Local1, 0x01), Local1) + Store (TB2P, Local2) + If (LEqual (Local2, 0xFFFFFFFF)) + { + Return (Zero) + } + + If (And (Local2, 0x01)) + { + Break + } + + Sleep (0x05) + } + + Store (0x00, P2TB) + Store (0x01F4, Local1) + While (LGreater (Local1, 0x00)) + { + Store (Subtract (Local1, 0x01), Local1) + Store (TB2P, Local2) + If (LEqual (Local2, 0xFFFFFFFF)) + { + Return (Zero) + } + + If (LNotEqual (DIVI, 0xFFFFFFFF)) + { + Break + } + + Sleep (0x0A) + } + } + + Method (PON, 0, NotSerialized) + { + Store (\MMRP (\TBSE), Local7) + OperationRegion (L23P, SystemMemory, Local7, 0xE4) + Field (L23P, WordAcc, NoLock, Preserve) + { + Offset (0xA4), + PSD0, 2, + Offset (0xE2), + , 2, + L2TE, 1, + L2TR, 1 + } + + Store (\MMTB (\TBSE), Local6) + OperationRegion (TBDI, SystemMemory, Local6, 0x0550) + Field (TBDI, DWordAcc, NoLock, Preserve) + { + DIVI, 32, + CMDR, 32, + Offset (0xA4), + TBPS, 2, + Offset (0x548), + TB2P, 32, + P2TB, 32 + } + + If (TBPE) + { + Return (Zero) + } + + Store (0x00, TOFF) + Store (0x00, G2SD) + If (\RTBC) + { + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, 0x01)))) + } + + Sleep (\TBCD) + } + + If (LNotEqual (DerefOf (Index (PWRG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x01)) + { + \_SB.SGOV (DerefOf (Index (PWRG, 0x02)), DerefOf (Index (PWRG, 0x03))) + Store (0x01, TBPE) + Sleep (0x0A) + } + + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (PWRG, 0x01)), DerefOf (Index (PWRG, 0x02)), DerefOf (Index (PWRG, 0x03))) + Store (0x01, TBPE) + Sleep (0x0A) + } + } + + If (LNotEqual (DerefOf (Index (RSTG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x01)) + { + \_SB.SPC0 (DerefOf (Index (RSTG, 0x02)), Or (\_SB.GPC0 (DerefOf (Index (RSTG, 0x02))), 0x0100)) + } + + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (RSTG, 0x01)), DerefOf (Index (RSTG, 0x02)), DerefOf (Index (RSTG, 0x03))) + } + } + + Store (0x00, DPGE) + Store (0x01, L2TR) + Sleep (0x10) + Store (0x00, Local0) + While (L2TR) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + Store (0x01, DPGE) + Store (0x00, Local0) + While (LEqual (LASX, 0x00)) + { + If (LGreater (Local0, 0x08)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + Store (0x00, LEDM) + Store (PSD0, Local1) + Store (0x00, PSD0) + Store (0x14, Local2) + While (LGreater (Local2, 0x00)) + { + Store (Subtract (Local2, 0x01), Local2) + Store (TB2P, Local3) + If (LNotEqual (Local3, 0xFFFFFFFF)) + { + Break + } + + Sleep (0x0A) + } + + If (LLessEqual (Local2, 0x00)){} + SXEX () + Store (Local1, PSD0) + } + + Method (POFF, 0, NotSerialized) + { + If (LEqual (TOFF, 0x00)) + { + Return (Zero) + } + + Store (\MMRP (\TBSE), Local7) + OperationRegion (L23P, SystemMemory, Local7, 0xE4) + Field (L23P, WordAcc, NoLock, Preserve) + { + Offset (0xA4), + PSD0, 2, + Offset (0xE2), + , 2, + L2TE, 1, + L2TR, 1 + } + + Store (\MMTB (TBSE), Local6) + OperationRegion (TBDI, SystemMemory, Local6, 0x0550) + Field (TBDI, DWordAcc, NoLock, Preserve) + { + DIVI, 32, + CMDR, 32, + Offset (0xA4), + TBPS, 2, + Offset (0x548), + TB2P, 32, + P2TB, 32 + } + + Store (PSD0, Local1) + Store (0x00, PSD0) + Store (P2TB, Local3) + If (LGreater (TOFF, 0x01)) + { + Sleep (0x0A) + Store (Local1, PSD0) + Return (Zero) + } + + Store (0x00, TOFF) + Store (Local1, PSD0) + Store (0x01, L2TE) + Sleep (0x10) + Store (0x00, Local0) + While (L2TE) + { + If (LGreater (Local0, 0x04)) + { + Break + } + + Sleep (0x10) + Increment (Local0) + } + + Store (0x01, LEDM) + If (LNotEqual (DerefOf (Index (RSTG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x01)) + { + \_SB.SPC0 (DerefOf (Index (RSTG, 0x02)), And (\_SB.GPC0 (DerefOf (Index (RSTG, 0x02))), 0xFFFFFEFF, Local4)) + Sleep (0x0A) + } + + If (LEqual (DerefOf (Index (RSTG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (RSTG, 0x01)), DerefOf (Index (RSTG, 0x02)), XOr (DerefOf (Index (RSTG, 0x03)), 0x01)) + Sleep (0x0A) + } + } + + If (\RTBC) + { + If (LNotEqual (DerefOf (Index (SCLK, 0x00)), 0x00)) + { + PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, 0x01))) + Sleep (0x10) + } + } + + If (LNotEqual (DerefOf (Index (PWRG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x01)) + { + \_SB.SGOV (DerefOf (Index (PWRG, 0x02)), XOr (DerefOf (Index (PWRG, 0x03)), 0x01)) + } + + If (LEqual (DerefOf (Index (PWRG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (PWRG, 0x01)), DerefOf (Index (PWRG, 0x02)), XOr (DerefOf (Index (PWRG, 0x03)), 0x01)) + } + } + + Store (0x00, TBPE) + Store (0x01, LDIS) + Store (0x00, LDIS) + If (WKEN) + { + If (LNotEqual (DerefOf (Index (WAKG, 0x00)), 0x00)) + { + If (LEqual (DerefOf (Index (WAKG, 0x00)), 0x01)) + { + \_SB.SGOV (DerefOf (Index (WAKG, 0x02)), DerefOf (Index (WAKG, 0x03))) + \_SB.SHPO (DerefOf (Index (WAKG, 0x02)), 0x00) + } + + If (LEqual (DerefOf (Index (WAKG, 0x00)), 0x02)) + { + \_SB.PCI0.GEXP.SGEP (DerefOf (Index (WAKG, 0x01)), DerefOf (Index (WAKG, 0x02)), DerefOf (Index (WAKG, 0x03))) + } + } + } + + Sleep (\TBOD) + } + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + PXP + }) + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + PXP + }) + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-4-ProjSsdt.dsl b/ACPI/Disassembled ACPI files/SSDT-4-ProjSsdt.dsl new file mode 100755 index 0000000..3aafca0 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-4-ProjSsdt.dsl @@ -0,0 +1,1166 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-4-ProjSsdt.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x0000173F (5951) + * Revision 0x02 + * Checksum 0x52 + * OEM ID "LENOVO" + * OEM Table ID "ProjSsdt" + * OEM Revision 0x00000010 (16) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "ProjSsdt", 0x00000010) +{ + External (_SB_.PCI0.LPCB.EC__.DOCD, UnknownObj) // (from opcode) + External (_SB_.PCI0.SAT0, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT0, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT1, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT2, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT3, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT4, DeviceObj) // (from opcode) + External (_SB_.PCI0.SAT0.PRT5, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.MEMB, UnknownObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS01, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS02, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS03, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS04, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS05, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS06, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS07, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS08, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS09, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.HS10, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS01, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS02, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS03, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS04, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS05, DeviceObj) // (from opcode) + External (_SB_.PCI0.XHC_.RHUB.SS06, DeviceObj) // (from opcode) + External (ADBG, MethodObj) // 1 Arguments (from opcode) + External (DPP0, UnknownObj) // (from opcode) + External (DPP1, UnknownObj) // (from opcode) + External (DPP2, UnknownObj) // (from opcode) + External (DPP3, UnknownObj) // (from opcode) + External (DPP4, UnknownObj) // (from opcode) + External (DVS0, UnknownObj) // (from opcode) + External (DVS1, UnknownObj) // (from opcode) + External (DVS2, UnknownObj) // (from opcode) + External (DVS3, UnknownObj) // (from opcode) + External (UPT1, IntObj) // (from opcode) + External (UPT2, IntObj) // (from opcode) + External (WIN8, UnknownObj) // (from opcode) + + Scope (\) + { + Name (UPC0, Package (0x04) + { + 0xFF, + 0x00, + 0x00, + 0x00 + }) + Name (PLD0, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x59, 0x12, 0x80, 0x00, 0x03, 0x00, 0x00, 0x00 + }) + Name (UPC1, Package (0x04) + { + 0xFF, + 0x00, + 0x00, + 0x00 + }) + Name (PLD1, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x51, 0x11, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00 + }) + Name (UPC3, Package (0x04) + { + 0xFF, + 0x09, + 0x00, + 0x00 + }) + Name (PLD3, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x08, 0x00, 0x03, 0x00, + /* 0008 */ 0x51, 0x11, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00 + }) + Name (UPC4, Package (0x04) + { + 0xFF, + 0x08, + 0x00, + 0x00 + }) + Name (PLD4, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x08, 0x00, 0x03, 0x00, + /* 0008 */ 0x51, 0x11, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00 + }) + Name (PLD5, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x08, 0x00, 0x03, 0x00, + /* 0008 */ 0x51, 0x11, 0x80, 0x02, 0x03, 0x00, 0x00, 0x00 + }) + Name (UPCI, Package (0x04) + { + 0x00, + 0xFF, + 0x00, + 0x00 + }) + Name (PLDI, Buffer (0x10) + { + /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + Name (PLDC, Buffer (0x14) + { + /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x24, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0010 */ 0xDD, 0x00, 0x95, 0x00 + }) + } + + Scope (\_SB.PCI0.XHC.RHUB) + { + Method (TPLD, 2, Serialized) + { + Name (PCKG, Package (0x01) + { + Buffer (0x10){} + }) + CreateField (DerefOf (Index (PCKG, 0x00)), 0x00, 0x07, REV) + Store (0x01, REV) + CreateField (DerefOf (Index (PCKG, 0x00)), 0x40, 0x01, VISI) + Store (Arg0, VISI) + CreateField (DerefOf (Index (PCKG, 0x00)), 0x57, 0x08, GPOS) + Store (Arg1, GPOS) + CreateField (DerefOf (Index (PCKG, 0x00)), 0x4A, 0x04, SHAP) + Store (0x01, SHAP) + CreateField (DerefOf (Index (PCKG, 0x00)), 0x20, 0x10, WID) + Store (0x08, WID) + CreateField (DerefOf (Index (PCKG, 0x00)), 0x30, 0x10, HGT) + Store (0x03, HGT) + Return (PCKG) + } + + Method (TUPC, 2, Serialized) + { + Name (PCKG, Package (0x04) + { + 0x01, + 0x00, + 0x00, + 0x00 + }) + Store (Arg0, Index (PCKG, 0x00)) + Store (Arg1, Index (PCKG, 0x01)) + Return (PCKG) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS01) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC0, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD0, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS02) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC1, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD1, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS03) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Return (TUPC (0x01, 0x0A)) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (TPLD (0x01, UPT1)) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS04) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Return (TUPC (0x01, 0x0A)) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (TPLD (0x01, UPT2)) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS05) + { + Device (WCAM) + { + Name (_ADR, 0x05) // _ADR: Address + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS06) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS07) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS08) + { + Device (WCAM) + { + Name (_ADR, 0x08) // _ADR: Address + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS09) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS10) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS01) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC0, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD0, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS02) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPC1, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLD1, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS03) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS04) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS05) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.SS06) + { + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Name (UPCP, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + CopyObject (\UPCI, UPCP) + Return (UPCP) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Name (PLDP, Buffer (0x10){}) + Store (\PLDI, PLDP) + Return (PLDP) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS08.WCAM) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\WIN8) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Return (\UPCI) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (\PLDC) + } + } + + Scope (\_SB.PCI0.XHC.RHUB.HS05.WCAM) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (\WIN8) + { + Return (0x0F) + } + Else + { + Return (0x00) + } + } + + Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities + { + Return (\UPCI) + } + + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (\PLDC) + } + } + + Scope (\_SB.PCI0.XHC) + { + Name (UPWR, 0x00) + Name (USPP, 0x00) + } + + Scope (\_SB.PCI0.XHC.RHUB) + { + Method (PS0X, 0, Serialized) + { + Store (0x00, \_SB.PCI0.XHC.USPP) + } + + Method (PS2X, 0, Serialized) + { + OperationRegion (XHCM, SystemMemory, And (ToInteger (MEMB), 0xFFFFFFFFFFFF0000), 0x0600) + Field (XHCM, DWordAcc, NoLock, Preserve) + { + Offset (0x02), + XHCV, 16, + Offset (0x480), + HP01, 1, + Offset (0x490), + HP02, 1, + Offset (0x530), + SP00, 1, + Offset (0x540), + SP01, 1 + } + + If (LEqual (XHCV, 0xFFFF)) + { + Return (Zero) + } + + If (LAnd (LEqual (HP01, 0x00), LEqual (SP00, 0x00))) + { + Or (\_SB.PCI0.XHC.USPP, 0x02, \_SB.PCI0.XHC.USPP) + } + + If (LAnd (LEqual (HP02, 0x00), LEqual (SP01, 0x00))) + { + Or (\_SB.PCI0.XHC.USPP, 0x04, \_SB.PCI0.XHC.USPP) + } + } + + Method (PS3X, 0, Serialized) + { + } + } + + Scope (\_SB.PCI0.SAT0) + { + Scope (PRT0) + { + Name (DIP0, 0x00) + Name (FDEV, Zero) + Name (FDRP, Zero) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT0: _SDD") + Store (0x00, DIP0) + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP0, And (M078, 0x08))) + { + Store (0x01, DIP0) + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT0: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS0, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) + } + Else + { + Return (HPTF) + } + } + ElseIf (LAnd (LAnd (LEqual (DVS0, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) + } + Else + { + Return (HDTF) + } + } + } + + Scope (PRT1) + { + Name (DIP0, 0x00) + Name (FDEV, 0x00) + Name (FDRP, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT1: _SDD") + Store (0x00, DIP0) + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP1, And (M078, 0x08))) + { + Store (0x01, DIP0) + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT1: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS1, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) + } + Else + { + Return (HPTF) + } + } + ElseIf (LAnd (LAnd (LEqual (DVS1, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) + } + Else + { + Return (HDTF) + } + } + } + + Scope (PRT2) + { + Name (DIP0, 0x00) + Name (FDEV, 0x00) + Name (FDRP, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT2: _SDD") + Store (0x00, DIP0) + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP2, And (M078, 0x08))) + { + Store (0x01, DIP0) + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT2: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS2, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) + } + Else + { + Return (HPTF) + } + } + ElseIf (LAnd (LAnd (LEqual (DVS2, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) + } + Else + { + Return (HDTF) + } + } + } + + Scope (PRT3) + { + Name (DIP0, 0x00) + Name (FDEV, 0x00) + Name (FDRP, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT3: _SDD") + Store (0x00, DIP0) + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP3, And (M078, 0x08))) + { + Store (0x01, DIP0) + } + + CreateByteField (Arg0, 0x9D, BFDS) + ToInteger (BFDS, FDEV) + CreateByteField (Arg0, 0x9A, BFRP) + ToInteger (BFRP, FDRP) + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT3: _GTF") + If (DIP0) + { + If (LAnd (LAnd (LEqual (DVS3, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HQTF) + } + Else + { + Return (HPTF) + } + } + ElseIf (LAnd (LAnd (LEqual (DVS3, 0x01), LEqual (And (FDEV, 0x01), 0x01)), LEqual (And (FDRP, 0x80), 0x80))) + { + Return (HETF) + } + Else + { + Return (HDTF) + } + } + } + + Scope (PRT4) + { + Name (DIP0, 0x00) + Name (HDTF, Buffer (0x0E) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5 + }) + Name (HETF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x09, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (ERTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HPTF, Buffer (0x15) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + Name (HQTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x09, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (HXTF, Buffer (0x1C) + { + /* 0000 */ 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xF5, 0x5F, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, 0x00, + /* 0018 */ 0x00, 0x00, 0xA0, 0xEF + }) + Name (DDTF, Buffer (0x0E) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3 + }) + CreateByteField (DDTF, 0x01, DTAT) + CreateByteField (DDTF, 0x08, DTFT) + Name (DGTF, Buffer (0x15) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xE3, 0x10, 0x03, + /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF + }) + CreateByteField (DGTF, 0x01, GTAT) + CreateByteField (DGTF, 0x08, GTFT) + Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data + { + ADBG ("PRT4: _SDD") + Store (0x00, DIP0) + If (LEqual (SizeOf (Arg0), 0x0200)) + { + CreateWordField (Arg0, 0x9C, M078) + If (LAnd (\DPP4, And (M078, 0x08))) + { + Store (0x01, DIP0) + } + } + } + + Method (_GTF, 0, NotSerialized) // _GTF: Get Task File + { + ADBG ("PRT4: _GTF") + If (DIP0) + { + Return (HPTF) + } + + Return (HDTF) + } + } + } + + Scope (\_SB.PCI0.SAT0) + { + Scope (PRT0) + { + Name (PORT, 0x00) + Name (PBAR, 0x0118) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x00 + }) + } + + Scope (PRT1) + { + Name (PORT, 0x01) + Name (PBAR, 0x0198) + Name (PWRG, Package (0x04) + { + 0x02, + 0x00, + 0x00, + 0x00 + }) + } + + Scope (PRT2) + { + Name (PORT, 0x02) + Name (PBAR, 0x0218) + Name (PWRG, Package (0x04) + { + 0x00, + 0x00, + 0x00, + 0x01 + }) + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-5-CpuSsdt.dsl b/ACPI/Disassembled ACPI files/SSDT-5-CpuSsdt.dsl new file mode 100755 index 0000000..bd27fb3 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-5-CpuSsdt.dsl @@ -0,0 +1,1132 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-5-CpuSsdt.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000017AE (6062) + * Revision 0x02 + * Checksum 0xB5 + * OEM ID "LENOVO" + * OEM Table ID "CpuSsdt" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "CpuSsdt", 0x00003000) +{ + External (_PR_.PR00, DeviceObj) // (from opcode) + External (_PR_.PR01, DeviceObj) // (from opcode) + External (_PR_.PR02, DeviceObj) // (from opcode) + External (_PR_.PR03, DeviceObj) // (from opcode) + External (_PR_.PR04, DeviceObj) // (from opcode) + External (_PR_.PR05, DeviceObj) // (from opcode) + External (_PR_.PR06, DeviceObj) // (from opcode) + External (_PR_.PR07, DeviceObj) // (from opcode) + External (_PR_.PR08, DeviceObj) // (from opcode) + External (_PR_.PR09, DeviceObj) // (from opcode) + External (_PR_.PR10, DeviceObj) // (from opcode) + External (_PR_.PR11, DeviceObj) // (from opcode) + External (_PR_.PR12, DeviceObj) // (from opcode) + External (_PR_.PR13, DeviceObj) // (from opcode) + External (_PR_.PR14, DeviceObj) // (from opcode) + External (_PR_.PR15, DeviceObj) // (from opcode) + External (_SB_.OSCP, IntObj) // (from opcode) + External (OSYS, UnknownObj) // (from opcode) + + Scope (\) + { + Name (SSDT, Package (0x15) + { + "CPU0IST ", + 0x5B51B098, + 0x000005EE, + "APIST ", + 0x5B4A1018, + 0x00000D14, + "CPU0CST ", + 0x5B4A2698, + 0x000003FF, + "APCST ", + 0x5B51BB18, + 0x0000030A, + "CPU0HWP ", + 0x5B51B718, + 0x000000BA, + "APHWP ", + 0x5B4A0018, + 0x00000317, + "HWPLVT ", + 0x5B4A2018, + 0x00000628 + }) + Name (\PC00, 0x80000000) + Name (\PC01, 0x80000000) + Name (\PC02, 0x80000000) + Name (\PC03, 0x80000000) + Name (\PC04, 0x80000000) + Name (\PC05, 0x80000000) + Name (\PC06, 0x80000000) + Name (\PC07, 0x80000000) + Name (\PC08, 0x80000000) + Name (\PC09, 0x80000000) + Name (\PC10, 0x80000000) + Name (\PC11, 0x80000000) + Name (\PC12, 0x80000000) + Name (\PC13, 0x80000000) + Name (\PC14, 0x80000000) + Name (\PC15, 0x80000000) + Name (\SDTL, Zero) + } + + Scope (\_PR) + { + Name (CTPC, Zero) + OperationRegion (PNVS, SystemMemory, 0x4D567000, 0x006C) + Field (PNVS, AnyAcc, Lock, Preserve) + { + PGRV, 8, + CFGD, 32, + Offset (0x06), + ACRT, 8, + APSV, 8, + AAC0, 8, + CPID, 32, + CPPC, 8, + CLVL, 8, + CBMI, 8, + PL10, 16, + PL20, 16, + PLW0, 8, + CTC0, 8, + TAR0, 8, + PPC0, 8, + PL11, 16, + PL21, 16, + PLW1, 8, + CTC1, 8, + TAR1, 8, + PPC1, 8, + PL12, 16, + PL22, 16, + PLW2, 8, + CTC2, 8, + TAR2, 8, + PPC2, 8, + C3MW, 8, + C6MW, 8, + C7MW, 8, + CDMW, 8, + C3LT, 16, + C6LT, 16, + C7LT, 16, + CDLT, 16, + CDLV, 16, + CDPW, 16, + MPMF, 8, + DTSE, 8, + DTS1, 8, + DTS2, 8, + DTSF, 8, + PDTS, 8, + PKGA, 8, + DTS3, 8, + DTS4, 8, + BGMA, 64, + BGMS, 8, + BGIA, 16, + BGIL, 16, + DSIA, 16, + DSIL, 8, + DSAE, 8, + EPCS, 8, + EMNA, 64, + ELNG, 64, + HWPV, 8, + HWPA, 16, + HWPL, 16, + POWS, 8, + HDCE, 8, + HWPI, 8, + DTSI, 8 + } + + OperationRegion (IO_D, SystemIO, \_PR.DSIA, \_PR.DSIL) + Field (IO_D, ByteAcc, NoLock, Preserve) + { + TRPD, 8 + } + + OperationRegion (IO_P, SystemIO, \_PR.BGIA, \_PR.BGIL) + Field (IO_P, ByteAcc, NoLock, Preserve) + { + TRPF, 8 + } + } + + Scope (\_PR.PR00) + { + Name (HI0, Zero) + Name (HC0, Zero) + Name (HW0, Zero) + Name (HW2, Zero) + Method (_PDC, 1, Serialized) // _PDC: Processor Driver Capabilities + { + Store (CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Store (COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Name (STS0, Buffer (0x04) + { + 0x00, 0x00, 0x00, 0x00 + }) + Method (CPDC, 1, Serialized) + { + CreateDWordField (Arg0, Zero, REVS) + CreateDWordField (Arg0, 0x04, SIZE) + Store (SizeOf (Arg0), Local0) + Store (Subtract (Local0, 0x08), Local1) + CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP) + Concatenate (STS0, TEMP, Local2) + Return (COSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)) + } + + Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953")) + OperationRegion (SMIP, SystemIO, 0xB2, One) + Field (SMIP, ByteAcc, NoLock, Preserve) + { + IOB2, 8 + } + + Method (COSC, 4, Serialized) + { + CreateDWordField (Arg3, Zero, STS0) + CreateDWordField (Arg3, 0x04, CAP0) + CreateDWordField (Arg0, Zero, IID0) + CreateDWordField (Arg0, 0x04, IID1) + CreateDWordField (Arg0, 0x08, IID2) + CreateDWordField (Arg0, 0x0C, IID3) + CreateDWordField (UID0, Zero, EID0) + CreateDWordField (UID0, 0x04, EID1) + CreateDWordField (UID0, 0x08, EID2) + CreateDWordField (UID0, 0x0C, EID3) + If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3))))) + { + Store (0x06, STS0) + Return (Arg3) + } + + If (LNotEqual (Arg1, One)) + { + Store (0x0A, STS0) + Return (Arg3) + } + + If (LNot (LGreaterEqual (Arg2, 0x02))) + { + Store (0x02, STS0) + Return (Arg3) + } + + If (Not (And (STS0, One))) + { + If (And (CAP0, 0x2000)) + { + Store (Zero, \_PR.HDCE) + } + Else + { + Store (0x28, IOB2) + } + } + + Return (Arg3) + } + + Method (GCAP, 1, Serialized) + { + CreateDWordField (Arg0, Zero, STS0) + CreateDWordField (Arg0, 0x04, CAP0) + If (LOr (LEqual (STS0, 0x06), LEqual (STS0, 0x0A))) + { + Return (Zero) + } + + If (And (STS0, One)) + { + And (CAP0, 0x0BFF, CAP0) + Return (Zero) + } + + Or (And (PC00, 0x7FFFFFFF), CAP0, PC00) + If (And (CFGD, 0x7A)) + { + If (LAnd (LAnd (And (CFGD, 0x0200), And (PC00, 0x18)), LNot (And (SDTL, 0x02)))) + { + Or (SDTL, 0x02, SDTL) + OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08))) + Load (CST0, HC0) + } + } + + If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x08)))) + { + Or (SDTL, 0x08, SDTL) + OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, One)), DerefOf (Index (SSDT, 0x02))) + Load (IST0, HI0) + } + + If (LGreaterEqual (OSYS, 0x07DF)) + { + If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x40)))) + { + If (And (\_SB.OSCP, 0x40)) + { + Or (SDTL, 0x40, SDTL) + OperationRegion (HWP0, SystemMemory, DerefOf (Index (SSDT, 0x0D)), DerefOf (Index (SSDT, 0x0E))) + Load (HWP0, HW0) + If (And (CFGD, 0x00800000)) + { + OperationRegion (HWPL, SystemMemory, DerefOf (Index (SSDT, 0x13)), DerefOf (Index (SSDT, 0x14))) + Load (HWPL, HW2) + } + } + + If (And (\_SB.OSCP, 0x20)) + { + If (LNot (And (\_SB.OSCP, 0x40))) + { + Store (Zero, HWPV) + } + } + + If (And (\_SB.OSCP, 0x40)) + { + Store (0x02, HWPV) + } + } + } + + If (LNot (And (PC00, 0x1000))) + { + Store (0x27, IOB2) + } + + Return (Zero) + } + } + + Scope (\_PR.PR01) + { + Name (HI1, Zero) + Name (HC1, Zero) + Name (HW1, Zero) + Method (_PDC, 1, Serialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, Serialized) + { + CreateDWordField (Arg0, Zero, ST01) + CreateDWordField (Arg0, 0x04, CP01) + If (LOr (LEqual (ST01, 0x06), LEqual (ST01, 0x0A))) + { + Return (Zero) + } + + If (And (ST01, One)) + { + And (CP01, 0x0BFF, CP01) + Return (Zero) + } + + Or (And (PC01, 0x7FFFFFFF), CP01, PC01) + If (LEqual (And (PC01, 0x09), 0x09)) + { + APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + HWPT () + } + + If (And (PC01, 0x18)) + { + APCT () + } + + Store (PC01, PC00) + Return (Zero) + } + + Method (APCT, 0, Serialized) + { + If (LAnd (And (CFGD, 0x7A), LNot (And (SDTL, 0x20)))) + { + Or (SDTL, 0x20, SDTL) + OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B))) + Load (CST1, HC1) + } + } + + Method (APPT, 0, Serialized) + { + If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x10)))) + { + Or (SDTL, 0x10, SDTL) + OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, 0x04)), DerefOf (Index (SSDT, 0x05))) + Load (IST1, HI1) + } + } + + Method (HWPT, 0, Serialized) + { + If (LGreaterEqual (OSYS, 0x07DF)) + { + If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x80)))) + { + Or (SDTL, 0x80, SDTL) + OperationRegion (HWP1, SystemMemory, DerefOf (Index (SSDT, 0x10)), DerefOf (Index (SSDT, 0x11))) + Load (HWP1, HW1) + } + } + } + } + + Scope (\_PR.PR02) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST02) + CreateDWordField (Arg0, 0x04, CP02) + If (LOr (LEqual (ST02, 0x06), LEqual (ST02, 0x0A))) + { + Return (Zero) + } + + If (And (ST02, One)) + { + And (CP02, 0x0BFF, CP02) + Return (Zero) + } + + Or (And (PC02, 0x7FFFFFFF), CP02, PC02) + If (LEqual (And (PC02, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC02, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC02, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR03) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST03) + CreateDWordField (Arg0, 0x04, CP03) + If (LOr (LEqual (ST03, 0x06), LEqual (ST03, 0x0A))) + { + Return (Zero) + } + + If (And (ST03, One)) + { + And (CP03, 0x0BFF, CP03) + Return (Zero) + } + + Or (And (PC03, 0x7FFFFFFF), CP03, PC03) + If (LEqual (And (PC03, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC03, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC03, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR04) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST04) + CreateDWordField (Arg0, 0x04, CP04) + If (LOr (LEqual (ST04, 0x06), LEqual (ST04, 0x0A))) + { + Return (Zero) + } + + If (And (ST04, One)) + { + And (CP04, 0x0BFF, CP04) + Return (Zero) + } + + Or (And (PC04, 0x7FFFFFFF), CP04, PC04) + If (LEqual (And (PC04, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC04, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC04, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR05) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST05) + CreateDWordField (Arg0, 0x04, CP05) + If (LOr (LEqual (ST05, 0x06), LEqual (ST05, 0x0A))) + { + Return (Zero) + } + + If (And (ST05, One)) + { + And (CP05, 0x0BFF, CP05) + Return (Zero) + } + + Or (And (PC05, 0x7FFFFFFF), CP05, PC05) + If (LEqual (And (PC05, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC05, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC05, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR06) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST06) + CreateDWordField (Arg0, 0x04, CP06) + If (LOr (LEqual (ST06, 0x06), LEqual (ST06, 0x0A))) + { + Return (Zero) + } + + If (And (ST06, One)) + { + And (CP06, 0x0BFF, CP06) + Return (Zero) + } + + Or (And (PC06, 0x7FFFFFFF), CP06, PC06) + If (LEqual (And (PC06, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC06, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC06, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR07) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST07) + CreateDWordField (Arg0, 0x04, CP07) + If (LOr (LEqual (ST07, 0x06), LEqual (ST07, 0x0A))) + { + Return (Zero) + } + + If (And (ST07, One)) + { + And (CP07, 0x0BFF, CP07) + Return (Zero) + } + + Or (And (PC07, 0x7FFFFFFF), CP07, PC07) + If (LEqual (And (PC07, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC07, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC07, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR08) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST08) + CreateDWordField (Arg0, 0x04, CP08) + If (LOr (LEqual (ST08, 0x06), LEqual (ST08, 0x0A))) + { + Return (Zero) + } + + If (And (ST08, One)) + { + And (CP08, 0x0BFF, CP08) + Return (Zero) + } + + Or (And (PC08, 0x7FFFFFFF), CP08, PC08) + If (LEqual (And (PC08, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC08, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC08, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR09) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST09) + CreateDWordField (Arg0, 0x04, CP09) + If (LOr (LEqual (ST09, 0x06), LEqual (ST09, 0x0A))) + { + Return (Zero) + } + + If (And (ST09, One)) + { + And (CP09, 0x0BFF, CP09) + Return (Zero) + } + + Or (And (PC09, 0x7FFFFFFF), CP09, PC09) + If (LEqual (And (PC09, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC09, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC09, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR10) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST10) + CreateDWordField (Arg0, 0x04, CP10) + If (LOr (LEqual (ST10, 0x06), LEqual (ST10, 0x0A))) + { + Return (Zero) + } + + If (And (ST10, One)) + { + And (ST10, 0x0BFF, CP10) + Return (Zero) + } + + Or (And (PC10, 0x7FFFFFFF), CP10, PC10) + If (LEqual (And (PC10, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC10, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC10, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR11) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST11) + CreateDWordField (Arg0, 0x04, CP11) + If (LOr (LEqual (ST11, 0x06), LEqual (ST11, 0x0A))) + { + Return (Zero) + } + + If (And (ST11, One)) + { + And (ST11, 0x0BFF, CP11) + Return (Zero) + } + + Or (And (PC11, 0x7FFFFFFF), CP11, PC11) + If (LEqual (And (PC11, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC11, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC11, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR12) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST12) + CreateDWordField (Arg0, 0x04, CP12) + If (LOr (LEqual (ST12, 0x06), LEqual (ST12, 0x0A))) + { + Return (Zero) + } + + If (And (ST12, One)) + { + And (ST12, 0x0BFF, CP12) + Return (Zero) + } + + Or (And (PC12, 0x7FFFFFFF), CP12, PC12) + If (LEqual (And (PC12, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC12, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC12, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR13) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST13) + CreateDWordField (Arg0, 0x04, CP13) + If (LOr (LEqual (ST13, 0x06), LEqual (ST13, 0x0A))) + { + Return (Zero) + } + + If (And (ST13, One)) + { + And (ST13, 0x0BFF, CP13) + Return (Zero) + } + + Or (And (PC13, 0x7FFFFFFF), CP13, PC13) + If (LEqual (And (PC13, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC13, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC13, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR14) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST14) + CreateDWordField (Arg0, 0x04, CP14) + If (LOr (LEqual (ST14, 0x06), LEqual (ST14, 0x0A))) + { + Return (Zero) + } + + If (And (ST14, One)) + { + And (ST14, 0x0BFF, CP14) + Return (Zero) + } + + Or (And (PC14, 0x7FFFFFFF), CP14, PC14) + If (LEqual (And (PC14, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC14, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC14, PC00) + Return (Zero) + } + } + + Scope (\_PR.PR15) + { + Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities + { + Store (\_PR.PR00.CPDC (Arg0), Local0) + GCAP (Local0) + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + Store (\_PR.PR00.COSC (Arg0, Arg1, Arg2, Arg3), Local0) + GCAP (Local0) + Return (Local0) + } + + Method (GCAP, 1, NotSerialized) + { + CreateDWordField (Arg0, Zero, ST15) + CreateDWordField (Arg0, 0x04, CP15) + If (LOr (LEqual (ST15, 0x06), LEqual (ST15, 0x0A))) + { + Return (Zero) + } + + If (And (ST15, One)) + { + And (ST15, 0x0BFF, CP15) + Return (Zero) + } + + Or (And (PC15, 0x7FFFFFFF), CP15, PC15) + If (LEqual (And (PC15, 0x09), 0x09)) + { + \_PR.PR01.APPT () + } + + If (And (\_SB.OSCP, 0x20)) + { + \_PR.PR01.HWPT () + } + + If (And (PC15, 0x18)) + { + \_PR.PR01.APCT () + } + + Store (PC15, PC00) + Return (Zero) + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-6-CtdpB.dsl b/ACPI/Disassembled ACPI files/SSDT-6-CtdpB.dsl new file mode 100755 index 0000000..092f1e3 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-6-CtdpB.dsl @@ -0,0 +1,253 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-6-CtdpB.aml, Sat May 26 18:40:30 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x0000056D (1389) + * Revision 0x02 + * Checksum 0x55 + * OEM ID "LENOVO" + * OEM Table ID "CtdpB" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "CtdpB", 0x00001000) +{ + External (_PR_.CPPC, IntObj) // (from opcode) + External (_PR_.PR00, DeviceObj) // (from opcode) + External (_PR_.PR00.LPSS, PkgObj) // (from opcode) + External (_PR_.PR00.TPSS, PkgObj) // (from opcode) + External (_PR_.PR01, DeviceObj) // (from opcode) + External (_PR_.PR02, DeviceObj) // (from opcode) + External (_PR_.PR03, DeviceObj) // (from opcode) + External (_PR_.PR04, DeviceObj) // (from opcode) + External (_PR_.PR05, DeviceObj) // (from opcode) + External (_PR_.PR06, DeviceObj) // (from opcode) + External (_PR_.PR07, DeviceObj) // (from opcode) + External (_PR_.PR08, DeviceObj) // (from opcode) + External (_PR_.PR09, DeviceObj) // (from opcode) + External (_PR_.PR10, DeviceObj) // (from opcode) + External (_PR_.PR11, DeviceObj) // (from opcode) + External (_PR_.PR12, DeviceObj) // (from opcode) + External (_PR_.PR13, DeviceObj) // (from opcode) + External (_PR_.PR14, DeviceObj) // (from opcode) + External (_PR_.PR15, DeviceObj) // (from opcode) + External (_SB_.OSCP, IntObj) // (from opcode) + External (_SB_.PCI0, DeviceObj) // (from opcode) + External (CTPC, UnknownObj) // (from opcode) + External (CTPR, UnknownObj) // (from opcode) + External (FTPS, UnknownObj) // (from opcode) + External (PNHM, FieldUnitObj) // (from opcode) + External (PNTF, MethodObj) // 1 Arguments (from opcode) + External (PT0D, UnknownObj) // (from opcode) + External (PT1D, UnknownObj) // (from opcode) + External (PT2D, UnknownObj) // (from opcode) + External (TCNT, FieldUnitObj) // (from opcode) + + Scope (\_SB.PCI0) + { + OperationRegion (MBAR, SystemMemory, 0xFED15000, 0x1000) + Field (MBAR, ByteAcc, NoLock, Preserve) + { + Offset (0x930), + PTDP, 15, + Offset (0x932), + PMIN, 15, + Offset (0x934), + PMAX, 15, + Offset (0x936), + TMAX, 7, + Offset (0x938), + PWRU, 4, + Offset (0x939), + EGYU, 5, + Offset (0x93A), + TIMU, 4, + Offset (0x958), + Offset (0x95C), + LPMS, 1, + CTNL, 2, + Offset (0x9A0), + PPL1, 15, + PL1E, 1, + , 1, + PL1T, 7, + Offset (0x9A4), + PPL2, 15, + PL2E, 1, + , 1, + PL2T, 7, + Offset (0xF3C), + TARN, 8, + Offset (0xF40), + PTD1, 15, + Offset (0xF42), + TAR1, 8, + Offset (0xF44), + PMX1, 15, + Offset (0xF46), + PMN1, 15, + Offset (0xF48), + PTD2, 15, + Offset (0xF4A), + TAR2, 8, + Offset (0xF4C), + PMX2, 15, + Offset (0xF4E), + PMN2, 15, + Offset (0xF50), + CTCL, 2, + , 29, + CLCK, 1, + TAR, 8 + } + + Method (CTCU, 0, NotSerialized) + { + Store (PT2D, PPL1) + Store (One, PL1E) + Store (One, \CTPC) + If (LEqual (Zero, \FTPS)) + { + Store (\CTPC, \CTPR) + } + ElseIf (LEqual (\CTPR, \FTPS)) + { + Store (\CTPC, \CTPR) + Store (\CTPC, \FTPS) + } + Else + { + Store (\CTPC, \CTPR) + Store (\CTPC, \FTPS) + Increment (\FTPS) + } + + \PNTF (0x80) + Subtract (TAR2, One, TAR) + Store (0x02, CTCL) + } + + Method (CTCN, 0, NotSerialized) + { + If (LEqual (CTCL, One)) + { + Store (PT0D, PPL1) + Store (One, PL1E) + NPPC (TARN) + Subtract (TARN, One, TAR) + Store (Zero, CTCL) + } + ElseIf (LEqual (CTCL, 0x02)) + { + Store (Zero, CTCL) + Subtract (TARN, One, TAR) + NPPC (TARN) + Store (PT0D, PPL1) + Store (One, PL1E) + } + Else + { + Store (Zero, CTCL) + Subtract (TARN, One, TAR) + NPPC (TARN) + Store (PT0D, PPL1) + Store (One, PL1E) + } + } + + Method (CTCD, 0, NotSerialized) + { + Store (One, CTCL) + Subtract (TAR1, One, TAR) + NPPC (TAR1) + Store (PT1D, PPL1) + Store (One, PL1E) + } + + Name (TRAT, Zero) + Name (PRAT, Zero) + Name (TMPI, Zero) + Method (NPPC, 1, Serialized) + { + Store (Arg0, TRAT) + If (CondRefOf (\_PR.PR00._PSS)) + { + If (And (\_SB.OSCP, 0x0400)) + { + Store (SizeOf (\_PR.PR00.TPSS), TMPI) + } + Else + { + Store (SizeOf (\_PR.PR00.LPSS), TMPI) + } + + While (LNotEqual (TMPI, Zero)) + { + Decrement (TMPI) + If (And (\_SB.OSCP, 0x0400)) + { + Store (DerefOf (Index (DerefOf (Index (\_PR.PR00.TPSS, TMPI)), 0x04)), PRAT) + } + Else + { + Store (DerefOf (Index (DerefOf (Index (\_PR.PR00.LPSS, TMPI)), 0x04)), PRAT) + } + + ShiftRight (PRAT, 0x08, PRAT) + If (LGreaterEqual (PRAT, TRAT)) + { + Store (TMPI, \CTPC) + If (LEqual (Zero, \FTPS)) + { + Store (\CTPC, \CTPR) + } + ElseIf (LEqual (\CTPR, \FTPS)) + { + Store (\CTPC, \CTPR) + Store (\CTPC, \FTPS) + } + Else + { + Store (\CTPC, \CTPR) + Store (\CTPC, \FTPS) + Increment (\FTPS) + } + + \PNTF (0x80) + Break + } + } + } + } + + Method (CLC2, 1, Serialized) + { + And (PNHM, 0x0FFF0FF0, Local0) + Switch (ToInteger (Local0)) + { + Case (0x000306C0) + { + Return (Divide (Multiply (Arg0, 0x05), 0x04, )) + } + Case (0x00040650) + { + Return (0xC8) + } + Default + { + Return (Divide (Multiply (Arg0, 0x05), 0x04, )) + } + + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-7-UsbCTabl.dsl b/ACPI/Disassembled ACPI files/SSDT-7-UsbCTabl.dsl new file mode 100755 index 0000000..8641daf --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-7-UsbCTabl.dsl @@ -0,0 +1,280 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-7-UsbCTabl.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000006BF (1727) + * Revision 0x02 + * Checksum 0xBC + * OEM ID "LENOVO" + * OEM Table ID "UsbCTabl" + * OEM Revision 0x00001000 (4096) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "UsbCTabl", 0x00001000) +{ + External (_SB_.PCI0.LPCB.EC__.HKEY.MHPF, MethodObj) // 1 Arguments (from opcode) + External (_SB_.PCI0.RP09.PXSX.TBDU.XHC_.RHUB.TPLD, MethodObj) // 2 Arguments (from opcode) + External (_SB_.PCI0.XHC_.RHUB, DeviceObj) // (from opcode) + External (ADBG, MethodObj) // 1 Arguments (from opcode) + External (OSYS, UnknownObj) // (from opcode) + External (TBTS, UnknownObj) // (from opcode) + External (UBCB, UnknownObj) // (from opcode) + External (USTC, UnknownObj) // (from opcode) + External (UTCM, UnknownObj) // (from opcode) + External (XDCE, UnknownObj) // (from opcode) + + Scope (\_SB) + { + Device (UBTC) + { + Name (_HID, EisaId ("USBC000")) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0CA0")) // _CID: Compatible ID + Name (_UID, Zero) // _UID: Unique ID + Name (_DDN, "USB Type C") // _DDN: DOS Device Name + Name (_ADR, Zero) // _ADR: Address + Name (CRS, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00000000, // Address Base + 0x00001000, // Address Length + _Y48) + }) + Device (CR01) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USTC, One)) + { + Return (\_SB.PCI0.RP09.PXSX.TBDU.XHC.RHUB.TPLD (One, One)) + } + } + } + + Device (CR02) + { + Name (_ADR, One) // _ADR: Address + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USTC, One)) + { + Return (\_SB.PCI0.RP09.PXSX.TBDU.XHC.RHUB.TPLD (One, 0x02)) + } + } + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + CreateDWordField (CRS, \_SB.UBTC._Y48._BAS, CBAS) // _BAS: Base Address + Store (UBCB, CBAS) + Return (CRS) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LAnd (LGreaterEqual (OSYS, 0x07DF), LEqual (TBTS, One))) + { + If (LEqual (USTC, One)) + { + Return (0x0F) + } + } + + Return (Zero) + } + + OperationRegion (USBC, SystemMemory, UBCB, 0x38) + Field (USBC, ByteAcc, Lock, Preserve) + { + VER1, 8, + VER2, 8, + RSV1, 8, + RSV2, 8, + CCI0, 8, + CCI1, 8, + CCI2, 8, + CCI3, 8, + CTL0, 8, + CTL1, 8, + CTL2, 8, + CTL3, 8, + CTL4, 8, + CTL5, 8, + CTL6, 8, + CTL7, 8, + MGI0, 8, + MGI1, 8, + MGI2, 8, + MGI3, 8, + MGI4, 8, + MGI5, 8, + MGI6, 8, + MGI7, 8, + MGI8, 8, + MGI9, 8, + MGIA, 8, + MGIB, 8, + MGIC, 8, + MGID, 8, + MGIE, 8, + MGIF, 8, + MGO0, 8, + MGO1, 8, + MGO2, 8, + MGO3, 8, + MGO4, 8, + MGO5, 8, + MGO6, 8, + MGO7, 8, + MGO8, 8, + MGO9, 8, + MGOA, 8, + MGOB, 8, + MGOC, 8, + MGOD, 8, + MGOE, 8, + MGOF, 8 + } + + Mutex (UBSY, 0x00) + Method (ECWR, 0, Serialized) + { + ADBG ("ECWR") + Acquire (UBSY, 0xFFFF) + Store (Buffer (0x25){}, Local0) + Store (0x0A, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x06, Index (Local0, 0x03)) + Store (MGO0, Index (Local0, 0x04)) + Store (MGO1, Index (Local0, 0x05)) + Store (MGO2, Index (Local0, 0x06)) + Store (MGO3, Index (Local0, 0x07)) + Store (MGO4, Index (Local0, 0x08)) + Store (MGO5, Index (Local0, 0x09)) + Store (MGO6, Index (Local0, 0x0A)) + Store (MGO7, Index (Local0, 0x0B)) + Store (MGO8, Index (Local0, 0x0C)) + Store (MGO9, Index (Local0, 0x0D)) + Store (MGOA, Index (Local0, 0x0E)) + Store (MGOB, Index (Local0, 0x0F)) + Store (MGOC, Index (Local0, 0x10)) + Store (MGOD, Index (Local0, 0x11)) + Store (MGOE, Index (Local0, 0x12)) + Store (MGOF, Index (Local0, 0x13)) + Store (0x10, Index (Local0, 0x24)) + \_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0) + Store (0x0A, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x04, Index (Local0, 0x03)) + Store (CTL0, Index (Local0, 0x04)) + Store (CTL1, Index (Local0, 0x05)) + Store (CTL2, Index (Local0, 0x06)) + Store (CTL3, Index (Local0, 0x07)) + Store (CTL4, Index (Local0, 0x08)) + Store (CTL5, Index (Local0, 0x09)) + Store (CTL6, Index (Local0, 0x0A)) + Store (CTL7, Index (Local0, 0x0B)) + Store (0x08, Index (Local0, 0x24)) + \_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0) + Release (UBSY) + } + + Method (ECRD, 0, Serialized) + { + ADBG ("ECRD") + Acquire (UBSY, 0xFFFF) + Store (Buffer (0x25){}, Local0) + Store (0x0B, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x05, Index (Local0, 0x03)) + Store (0x10, Index (Local0, 0x24)) + Store (\_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0), Local1) + Store (DerefOf (Index (Local1, 0x04)), MGI0) + Store (DerefOf (Index (Local1, 0x05)), MGI1) + Store (DerefOf (Index (Local1, 0x06)), MGI2) + Store (DerefOf (Index (Local1, 0x07)), MGI3) + Store (DerefOf (Index (Local1, 0x08)), MGI4) + Store (DerefOf (Index (Local1, 0x09)), MGI5) + Store (DerefOf (Index (Local1, 0x0A)), MGI6) + Store (DerefOf (Index (Local1, 0x0B)), MGI7) + Store (DerefOf (Index (Local1, 0x0C)), MGI8) + Store (DerefOf (Index (Local1, 0x0D)), MGI9) + Store (DerefOf (Index (Local1, 0x0E)), MGIA) + Store (DerefOf (Index (Local1, 0x0F)), MGIB) + Store (DerefOf (Index (Local1, 0x10)), MGIC) + Store (DerefOf (Index (Local1, 0x11)), MGID) + Store (DerefOf (Index (Local1, 0x12)), MGIE) + Store (DerefOf (Index (Local1, 0x13)), MGIF) + Store (0x0B, Index (Local0, Zero)) + Store (Zero, Index (Local0, One)) + Store (0x02, Index (Local0, 0x02)) + Store (0x03, Index (Local0, 0x03)) + Store (0x04, Index (Local0, 0x24)) + Store (\_SB.PCI0.LPCB.EC.HKEY.MHPF (Local0), Local1) + Store (DerefOf (Index (Local1, 0x04)), CCI0) + Store (DerefOf (Index (Local1, 0x05)), CCI1) + Store (DerefOf (Index (Local1, 0x06)), CCI2) + Store (DerefOf (Index (Local1, 0x07)), CCI3) + Release (UBSY) + } + + Method (NTFY, 0, Serialized) + { + ADBG ("NTFY_EC") + ECRD () + Sleep (One) + Notify (\_SB.UBTC, 0x80) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, ToUUID ("6f8398c2-7ca4-11e4-ad36-631042b5008f"))) + { + ADBG (Concatenate ("S_UCSI=", ToHexString (Arg2))) + Switch (ToInteger (Arg2)) + { + Case (Zero) + { + Return (Buffer (One) + { + 0x0F + }) + } + Case (One) + { + ECWR () + } + Case (0x02) + { + ECRD () + } + Case (0x03) + { + Return (XDCE) + } + + } + + ADBG ("E_UCSI") + } + + Return (Buffer (One) + { + 0x00 + }) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-8-HdaDsp.dsl b/ACPI/Disassembled ACPI files/SSDT-8-HdaDsp.dsl new file mode 100755 index 0000000..b2b9647 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-8-HdaDsp.dsl @@ -0,0 +1,95 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-8-HdaDsp.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000001D8 (472) + * Revision 0x02 + * Checksum 0xBA + * OEM ID "LENOVO" + * OEM Table ID "HdaDsp" + * OEM Revision 0x00000000 (0) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "HdaDsp", 0x00000000) +{ + External (_SB_.PCI0.HDAS, DeviceObj) // (from opcode) + External (ADBG, MethodObj) // 1 Arguments (from opcode) + External (ADPM, IntObj) // (from opcode) + External (AG1H, IntObj) // (from opcode) + External (AG1L, IntObj) // (from opcode) + External (AG2H, IntObj) // (from opcode) + External (AG2L, IntObj) // (from opcode) + External (AG3H, IntObj) // (from opcode) + External (AG3L, IntObj) // (from opcode) + + Scope (\_SB.PCI0.HDAS) + { + Method (PPMS, 1, Serialized) + { + If (LEqual (Arg0, ToUUID ("7111001f-d35f-44d9-81d2-7ac685bed3d7"))) + { + Store (And (ADPM, 0x2000), Local0) + ADBG ("RkSA:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ToUUID ("7c708106-3aff-40fe-88be-8c999b3f7445"))) + { + Store (And (ADPM, 0x04), Local0) + ADBG ("iSSP:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ToUUID ("ec774fa9-28d3-424a-90e4-69f984f1eeb7"))) + { + Store (And (ADPM, 0x0100), Local0) + ADBG ("WoV:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ToUUID ("e0e018a8-3550-4b54-a8d0-a8e05d0fcba2"))) + { + Store (And (ADPM, 0x08), Local0) + ADBG ("Dolby:") + ADBG (Local0) + Return (Local0) + } + + If (LEqual (Arg0, ACCG (AG1L, AG1H))) + { + Return (And (ADPM, 0x20000000)) + } + + If (LEqual (Arg0, ACCG (AG2L, AG2H))) + { + Return (And (ADPM, 0x40000000)) + } + + If (LEqual (Arg0, ACCG (AG3L, AG3H))) + { + Return (And (ADPM, 0x80000000)) + } + + Return (Zero) + } + + Method (ACCG, 2, NotSerialized) + { + Name (GBUF, Buffer (0x10){}) + Concatenate (Arg0, Arg1, GBUF) + Return (GBUF) + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-9-TbtTypeC.dsl b/ACPI/Disassembled ACPI files/SSDT-9-TbtTypeC.dsl new file mode 100755 index 0000000..663b088 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-9-TbtTypeC.dsl @@ -0,0 +1,391 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-9-TbtTypeC.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000590 (1424) + * Revision 0x02 + * Checksum 0x32 + * OEM ID "LENOVO" + * OEM Table ID "TbtTypeC" + * OEM Revision 0x00000000 (0) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "LENOVO", "TbtTypeC", 0x00000000) +{ + External (_SB_.PCI0.RP01.PXSX, DeviceObj) // (from opcode) + External (_SB_.PCI0.RP09.PXSX, DeviceObj) // (from opcode) + External (TBSE, IntObj) // (from opcode) + External (TBTS, IntObj) // (from opcode) + External (UPT1, IntObj) // (from opcode) + External (UPT2, IntObj) // (from opcode) + External (USME, IntObj) // (from opcode) + + If (LAnd (LEqual (TBTS, One), LEqual (TBSE, One))) + { + Scope (\_SB.PCI0.RP01.PXSX) + { + Name (TUSB, Package (0x02) + { + One, + 0x04 + }) + Device (TBDU) + { + Name (_ADR, 0x00020000) // _ADR: Address + Device (XHC) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + Sleep (0xC8) + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + Sleep (0xC8) + } + + Device (RHUB) + { + Name (_ADR, Zero) // _ADR: Address + Method (TPLD, 2, Serialized) + { + Name (PCKG, Package (0x01) + { + Buffer (0x10){} + }) + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) + Store (One, REV) + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) + Store (Arg0, VISI) + CreateField (DerefOf (Index (PCKG, Zero)), 0x57, 0x08, GPOS) + Store (Arg1, GPOS) + CreateField (DerefOf (Index (PCKG, Zero)), 0x4A, 0x04, SHAP) + Store (One, SHAP) + CreateField (DerefOf (Index (PCKG, Zero)), 0x20, 0x10, WID) + Store (0x08, WID) + CreateField (DerefOf (Index (PCKG, Zero)), 0x30, 0x10, HGT) + Store (0x03, HGT) + Return (PCKG) + } + + Method (TUPC, 2, Serialized) + { + Name (PCKG, Package (0x04) + { + One, + Zero, + Zero, + Zero + }) + Store (Arg0, Index (PCKG, Zero)) + Store (Arg1, Index (PCKG, One)) + Return (PCKG) + } + + Device (HS01) + { + Name (_ADR, One) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (HS02) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (SS01) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (One, UPT1)) + } + } + } + + Device (SS02) + { + Name (_ADR, 0x04) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (One, UPT2)) + } + } + } + } + } + } + } + } + + If (LAnd (LEqual (TBTS, One), LEqual (TBSE, 0x09))) + { + Scope (\_SB.PCI0.RP09.PXSX) + { + Name (TUSB, Package (0x02) + { + 0x03, + 0x04 + }) + Device (TBDU) + { + Name (_ADR, 0x00020000) // _ADR: Address + Device (XHC) + { + Name (_ADR, Zero) // _ADR: Address + Method (_PS0, 0, Serialized) // _PS0: Power State 0 + { + Sleep (0xC8) + } + + Method (_PS3, 0, Serialized) // _PS3: Power State 3 + { + Sleep (0xC8) + } + + Device (RHUB) + { + Name (_ADR, Zero) // _ADR: Address + Method (TPLD, 2, Serialized) + { + Name (PCKG, Package (0x01) + { + Buffer (0x10){} + }) + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) + Store (One, REV) + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) + Store (Arg0, VISI) + CreateField (DerefOf (Index (PCKG, Zero)), 0x57, 0x08, GPOS) + Store (Arg1, GPOS) + CreateField (DerefOf (Index (PCKG, Zero)), 0x4A, 0x04, SHAP) + Store (One, SHAP) + CreateField (DerefOf (Index (PCKG, Zero)), 0x20, 0x10, WID) + Store (0x08, WID) + CreateField (DerefOf (Index (PCKG, Zero)), 0x30, 0x10, HGT) + Store (0x03, HGT) + Return (PCKG) + } + + Method (TUPC, 2, Serialized) + { + Name (PCKG, Package (0x04) + { + One, + Zero, + Zero, + Zero + }) + Store (Arg0, Index (PCKG, Zero)) + Store (Arg1, Index (PCKG, One)) + Return (PCKG) + } + + Device (HS01) + { + Name (_ADR, One) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (HS02) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x08)) + } + Else + { + Return (TUPC (Zero, Zero)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (Zero, Zero)) + } + } + } + + Device (SS01) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, One)) + } + Else + { + Return (TPLD (One, UPT1)) + } + } + } + + Device (SS02) + { + Name (_ADR, 0x04) // _ADR: Address + Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities + { + If (LEqual (USME, Zero)) + { + Return (TUPC (One, 0x09)) + } + Else + { + Return (TUPC (One, 0x0A)) + } + } + + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + If (LEqual (USME, Zero)) + { + Return (TPLD (One, 0x02)) + } + Else + { + Return (TPLD (One, UPT2)) + } + } + } + } + } + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-x5_0-Cpu0Ist.dsl b/ACPI/Disassembled ACPI files/SSDT-x5_0-Cpu0Ist.dsl new file mode 100755 index 0000000..c58e6bd --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-x5_0-Cpu0Ist.dsl @@ -0,0 +1,465 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_0-Cpu0Ist.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000005EE (1518) + * Revision 0x02 + * Checksum 0x8C + * OEM ID "PmRef" + * OEM Table ID "Cpu0Ist" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "Cpu0Ist", 0x00003000) +{ + External (_PR_.CFGD, FieldUnitObj) // (from opcode) + External (_PR_.CPPC, FieldUnitObj) // (from opcode) + External (_PR_.PR00, DeviceObj) // (from opcode) + External (_SB_.OSCP, IntObj) // (from opcode) + External (PC00, IntObj) // (from opcode) + External (TCNT, FieldUnitObj) // (from opcode) + + Scope (\_PR.PR00) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.CPPC) + } + + Name (_PCT, Package (0x02) // _PCT: Performance Control + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + } + }) + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + If (And (\_SB.OSCP, 0x0400)) + { + Return (TPSS) + } + Else + { + Return (LPSS) + } + } + + Name (LPSS, Package (0x10) + { + Package (0x06) + { + 0x00000835, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00002A00, + 0x00002A00 + }, + + Package (0x06) + { + 0x00000834, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00001500, + 0x00001500 + }, + + Package (0x06) + { + 0x0000076C, + 0x00003389, + 0x0000000A, + 0x0000000A, + 0x00001300, + 0x00001300 + }, + + Package (0x06) + { + 0x00000708, + 0x0000301D, + 0x0000000A, + 0x0000000A, + 0x00001200, + 0x00001200 + }, + + Package (0x06) + { + 0x000006A4, + 0x00002CC3, + 0x0000000A, + 0x0000000A, + 0x00001100, + 0x00001100 + }, + + Package (0x06) + { + 0x00000640, + 0x00002A07, + 0x0000000A, + 0x0000000A, + 0x00001000, + 0x00001000 + }, + + Package (0x06) + { + 0x000005DC, + 0x000026D0, + 0x0000000A, + 0x0000000A, + 0x00000F00, + 0x00000F00 + }, + + Package (0x06) + { + 0x00000578, + 0x000023A7, + 0x0000000A, + 0x0000000A, + 0x00000E00, + 0x00000E00 + }, + + Package (0x06) + { + 0x000004B0, + 0x00001E10, + 0x0000000A, + 0x0000000A, + 0x00000C00, + 0x00000C00 + }, + + Package (0x06) + { + 0x0000044C, + 0x00001B19, + 0x0000000A, + 0x0000000A, + 0x00000B00, + 0x00000B00 + }, + + Package (0x06) + { + 0x000003E8, + 0x00001834, + 0x0000000A, + 0x0000000A, + 0x00000A00, + 0x00000A00 + }, + + Package (0x06) + { + 0x00000320, + 0x00001318, + 0x0000000A, + 0x0000000A, + 0x00000800, + 0x00000800 + }, + + Package (0x06) + { + 0x000002BC, + 0x00001061, + 0x0000000A, + 0x0000000A, + 0x00000700, + 0x00000700 + }, + + Package (0x06) + { + 0x00000258, + 0x00000DBA, + 0x0000000A, + 0x0000000A, + 0x00000600, + 0x00000600 + }, + + Package (0x06) + { + 0x000001F4, + 0x00000B22, + 0x0000000A, + 0x0000000A, + 0x00000500, + 0x00000500 + }, + + Package (0x06) + { + 0x00000190, + 0x00000915, + 0x0000000A, + 0x0000000A, + 0x00000400, + 0x00000400 + } + }) + Name (TPSS, Package (0x13) + { + Package (0x06) + { + 0x00000835, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00002A00, + 0x00002A00 + }, + + Package (0x06) + { + 0x00000834, + 0x00003A98, + 0x0000000A, + 0x0000000A, + 0x00001500, + 0x00001500 + }, + + Package (0x06) + { + 0x000007D0, + 0x00003708, + 0x0000000A, + 0x0000000A, + 0x00001400, + 0x00001400 + }, + + Package (0x06) + { + 0x0000076C, + 0x00003389, + 0x0000000A, + 0x0000000A, + 0x00001300, + 0x00001300 + }, + + Package (0x06) + { + 0x00000708, + 0x0000301D, + 0x0000000A, + 0x0000000A, + 0x00001200, + 0x00001200 + }, + + Package (0x06) + { + 0x000006A4, + 0x00002CC3, + 0x0000000A, + 0x0000000A, + 0x00001100, + 0x00001100 + }, + + Package (0x06) + { + 0x00000640, + 0x00002A07, + 0x0000000A, + 0x0000000A, + 0x00001000, + 0x00001000 + }, + + Package (0x06) + { + 0x000005DC, + 0x000026D0, + 0x0000000A, + 0x0000000A, + 0x00000F00, + 0x00000F00 + }, + + Package (0x06) + { + 0x00000578, + 0x000023A7, + 0x0000000A, + 0x0000000A, + 0x00000E00, + 0x00000E00 + }, + + Package (0x06) + { + 0x00000514, + 0x00002090, + 0x0000000A, + 0x0000000A, + 0x00000D00, + 0x00000D00 + }, + + Package (0x06) + { + 0x000004B0, + 0x00001E10, + 0x0000000A, + 0x0000000A, + 0x00000C00, + 0x00000C00 + }, + + Package (0x06) + { + 0x0000044C, + 0x00001B19, + 0x0000000A, + 0x0000000A, + 0x00000B00, + 0x00000B00 + }, + + Package (0x06) + { + 0x000003E8, + 0x00001834, + 0x0000000A, + 0x0000000A, + 0x00000A00, + 0x00000A00 + }, + + Package (0x06) + { + 0x00000384, + 0x0000155D, + 0x0000000A, + 0x0000000A, + 0x00000900, + 0x00000900 + }, + + Package (0x06) + { + 0x00000320, + 0x00001318, + 0x0000000A, + 0x0000000A, + 0x00000800, + 0x00000800 + }, + + Package (0x06) + { + 0x000002BC, + 0x00001061, + 0x0000000A, + 0x0000000A, + 0x00000700, + 0x00000700 + }, + + Package (0x06) + { + 0x00000258, + 0x00000DBA, + 0x0000000A, + 0x0000000A, + 0x00000600, + 0x00000600 + }, + + Package (0x06) + { + 0x000001F4, + 0x00000B22, + 0x0000000A, + 0x0000000A, + 0x00000500, + 0x00000500 + }, + + Package (0x06) + { + 0x00000190, + 0x00000915, + 0x0000000A, + 0x0000000A, + 0x00000400, + 0x00000400 + } + }) + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-x5_1-ApIst.dsl b/ACPI/Disassembled ACPI files/SSDT-x5_1-ApIst.dsl new file mode 100755 index 0000000..9c9ff4b --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-x5_1-ApIst.dsl @@ -0,0 +1,930 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_1-ApIst.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000D14 (3348) + * Revision 0x02 + * Checksum 0x2A + * OEM ID "PmRef" + * OEM Table ID "ApIst" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "ApIst", 0x00003000) +{ + External (_PR_.PR00, DeviceObj) // (from opcode) + External (_PR_.PR00._PCT, MethodObj) // 0 Arguments (from opcode) + External (_PR_.PR00._PPC, MethodObj) // 0 Arguments (from opcode) + External (_PR_.PR00._PSS, MethodObj) // 0 Arguments (from opcode) + External (_PR_.PR01, DeviceObj) // (from opcode) + External (_PR_.PR02, DeviceObj) // (from opcode) + External (_PR_.PR03, DeviceObj) // (from opcode) + External (_PR_.PR04, DeviceObj) // (from opcode) + External (_PR_.PR05, DeviceObj) // (from opcode) + External (_PR_.PR06, DeviceObj) // (from opcode) + External (_PR_.PR07, DeviceObj) // (from opcode) + External (_PR_.PR08, DeviceObj) // (from opcode) + External (_PR_.PR09, DeviceObj) // (from opcode) + External (_PR_.PR10, DeviceObj) // (from opcode) + External (_PR_.PR11, DeviceObj) // (from opcode) + External (_PR_.PR12, DeviceObj) // (from opcode) + External (_PR_.PR13, DeviceObj) // (from opcode) + External (_PR_.PR14, DeviceObj) // (from opcode) + External (_PR_.PR15, DeviceObj) // (from opcode) + External (PC00, IntObj) // (from opcode) + External (TCNT, FieldUnitObj) // (from opcode) + + Scope (\_PR.PR01) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR02) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR03) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR04) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR05) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR06) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR07) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR08) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR09) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR10) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR11) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR12) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR13) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR14) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } + + Scope (\_PR.PR15) + { + Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities + { + Return (\_PR.PR00._PPC ()) + } + + Method (_PCT, 0, NotSerialized) // _PCT: Performance Control + { + Return (\_PR.PR00._PCT ()) + } + + Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States + { + Return (\_PR.PR00._PSS ()) + } + + Name (PSDF, Zero) + Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies + { + If (LNot (PSDF)) + { + Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04)) + Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04)) + Store (Ones, PSDF) + } + + If (And (PC00, 0x0800)) + { + Return (HPSD) + } + + Return (SPSD) + } + + Name (HPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFE, + 0x80 + } + }) + Name (SPSD, Package (0x01) + { + Package (0x05) + { + 0x05, + Zero, + Zero, + 0xFC, + 0x80 + } + }) + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-x5_2-Cpu0Cst.dsl b/ACPI/Disassembled ACPI files/SSDT-x5_2-Cpu0Cst.dsl new file mode 100755 index 0000000..10c9f79 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-x5_2-Cpu0Cst.dsl @@ -0,0 +1,259 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_2-Cpu0Cst.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000003FF (1023) + * Revision 0x02 + * Checksum 0x11 + * OEM ID "PmRef" + * OEM Table ID "Cpu0Cst" + * OEM Revision 0x00003001 (12289) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "Cpu0Cst", 0x00003001) +{ + External (_PR_.C3LT, FieldUnitObj) + External (_PR_.C3MW, FieldUnitObj) + External (_PR_.C6LT, FieldUnitObj) + External (_PR_.C6MW, FieldUnitObj) + External (_PR_.C7LT, FieldUnitObj) + External (_PR_.C7MW, FieldUnitObj) + External (_PR_.CDLT, FieldUnitObj) + External (_PR_.CDLV, FieldUnitObj) + External (_PR_.CDMW, FieldUnitObj) + External (_PR_.CDPW, FieldUnitObj) + External (_PR_.CFGD, UnknownObj) // Warning: Unknown object + External (_PR_.PR00, DeviceObj) // (from opcode) + External (C3LT, UnknownObj) // (from opcode) + External (C3MW, UnknownObj) // (from opcode) + External (C6LT, UnknownObj) // (from opcode) + External (C6MW, UnknownObj) // (from opcode) + External (C7LT, UnknownObj) // (from opcode) + External (C7MW, UnknownObj) // (from opcode) + External (CDLT, UnknownObj) // (from opcode) + External (CDLV, UnknownObj) // (from opcode) + External (CDMW, UnknownObj) // (from opcode) + External (CDPW, UnknownObj) // (from opcode) + External (CFGD, UnknownObj) // (from opcode) + External (FEMD, UnknownObj) // (from opcode) + External (FMBL, UnknownObj) // (from opcode) + External (PC00, UnknownObj) // (from opcode) + External (PFLV, UnknownObj) // (from opcode) + + Scope (\_PR.PR00) + { + Name (C1TM, Package (0x04) + { + ResourceTemplate () + { + Register (FFixedHW, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + One, + One, + 0x03E8 + }) + Name (C3TM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001814, // Address + ,) + }, + + 0x02, + Zero, + 0x01F4 + }) + Name (C6TM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001815, // Address + ,) + }, + + 0x02, + Zero, + 0x015E + }) + Name (C7TM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001816, // Address + ,) + }, + + 0x02, + Zero, + 0xC8 + }) + Name (CDTM, Package (0x04) + { + ResourceTemplate () + { + Register (SystemIO, + 0x08, // Bit Width + 0x00, // Bit Offset + 0x0000000000001816, // Address + ,) + }, + + 0x03, + Zero, + Zero + }) + Name (MWES, ResourceTemplate () + { + Register (FFixedHW, + 0x01, // Bit Width + 0x02, // Bit Offset + 0x0000000000000000, // Address + 0x01, // Access Size + ) + }) + Name (AC2V, Zero) + Name (AC3V, Zero) + Name (C3ST, Package (0x04) + { + 0x03, + Package (0x01) + { + Zero + }, + + Package (0x01) + { + Zero + }, + + Package (0x01) + { + Zero + } + }) + Name (C2ST, Package (0x03) + { + 0x02, + Package (0x01) + { + Zero + }, + + Package (0x01) + { + Zero + } + }) + Name (C1ST, Package (0x02) + { + One, + Package (0x01) + { + Zero + } + }) + Name (CSTF, Zero) + Method (_CST, 0, Serialized) // _CST: C-States + { + If (LNot (CSTF)) + { + Store (C3LT, Index (C3TM, 0x02)) + Store (C6LT, Index (C6TM, 0x02)) + Store (C7LT, Index (C7TM, 0x02)) + Store (CDLT, Index (CDTM, 0x02)) + Store (CDPW, Index (CDTM, 0x03)) + Store (CDLV, Index (DerefOf (Index (CDTM, Zero)), 0x07)) + If (LAnd (And (CFGD, 0x0800), And (PC00, 0x0200))) + { + Store (MWES, Index (C1TM, Zero)) + Store (MWES, Index (C3TM, Zero)) + Store (MWES, Index (C6TM, Zero)) + Store (MWES, Index (C7TM, Zero)) + Store (MWES, Index (CDTM, Zero)) + Store (C3MW, Index (DerefOf (Index (C3TM, Zero)), 0x07)) + Store (C6MW, Index (DerefOf (Index (C6TM, Zero)), 0x07)) + Store (C7MW, Index (DerefOf (Index (C7TM, Zero)), 0x07)) + Store (CDMW, Index (DerefOf (Index (CDTM, Zero)), 0x07)) + } + ElseIf (LAnd (And (CFGD, 0x0800), And (PC00, 0x0100))) + { + Store (MWES, Index (C1TM, Zero)) + } + + Store (Ones, CSTF) + } + + Store (Zero, AC2V) + Store (Zero, AC3V) + Store (C1TM, Index (C3ST, One)) + If (And (CFGD, 0x20)) + { + Store (C7TM, Index (C3ST, 0x02)) + Store (Ones, AC2V) + } + ElseIf (And (CFGD, 0x10)) + { + Store (C6TM, Index (C3ST, 0x02)) + Store (Ones, AC2V) + } + ElseIf (And (CFGD, 0x08)) + { + Store (C3TM, Index (C3ST, 0x02)) + Store (Ones, AC2V) + } + + If (And (CFGD, 0x4000)) + { + Store (CDTM, Index (C3ST, 0x03)) + Store (Ones, AC3V) + } + + If (LAnd (AC2V, AC3V)) + { + Return (C3ST) + } + ElseIf (AC2V) + { + Store (DerefOf (Index (C3ST, One)), Index (C2ST, One)) + Store (DerefOf (Index (C3ST, 0x02)), Index (C2ST, 0x02)) + Return (C2ST) + } + ElseIf (AC3V) + { + Store (DerefOf (Index (C3ST, One)), Index (C2ST, One)) + Store (DerefOf (Index (C3ST, 0x03)), Index (C2ST, 0x02)) + Store (0x02, Index (DerefOf (Index (C2ST, 0x02)), One)) + Return (C2ST) + } + Else + { + Store (DerefOf (Index (C3ST, One)), Index (C1ST, One)) + Return (C1ST) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-x5_3-ApCst.dsl b/ACPI/Disassembled ACPI files/SSDT-x5_3-ApCst.dsl new file mode 100755 index 0000000..947312a --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-x5_3-ApCst.dsl @@ -0,0 +1,160 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_3-ApCst.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x0000030A (778) + * Revision 0x02 + * Checksum 0x93 + * OEM ID "PmRef" + * OEM Table ID "ApCst" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "ApCst", 0x00003000) +{ + External (_PR_.PR00._CST, UnknownObj) // (from opcode) + External (_PR_.PR01, DeviceObj) // (from opcode) + External (_PR_.PR02, DeviceObj) // (from opcode) + External (_PR_.PR03, DeviceObj) // (from opcode) + External (_PR_.PR04, DeviceObj) // (from opcode) + External (_PR_.PR05, DeviceObj) // (from opcode) + External (_PR_.PR06, DeviceObj) // (from opcode) + External (_PR_.PR07, DeviceObj) // (from opcode) + External (_PR_.PR08, DeviceObj) // (from opcode) + External (_PR_.PR09, DeviceObj) // (from opcode) + External (_PR_.PR10, DeviceObj) // (from opcode) + External (_PR_.PR11, DeviceObj) // (from opcode) + External (_PR_.PR12, DeviceObj) // (from opcode) + External (_PR_.PR13, DeviceObj) // (from opcode) + External (_PR_.PR14, DeviceObj) // (from opcode) + External (_PR_.PR15, DeviceObj) // (from opcode) + + Scope (\_PR.PR01) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR02) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR03) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR04) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR05) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR06) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR07) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR08) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR09) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR10) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR11) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR12) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR13) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR14) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } + + Scope (\_PR.PR15) + { + Method (_CST, 0, NotSerialized) // _CST: C-States + { + Return (\_PR.PR00._CST) + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-x5_4-Cpu0Hwp.dsl b/ACPI/Disassembled ACPI files/SSDT-x5_4-Cpu0Hwp.dsl new file mode 100755 index 0000000..b770dba --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-x5_4-Cpu0Hwp.dsl @@ -0,0 +1,48 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_4-Cpu0Hwp.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000000BA (186) + * Revision 0x02 + * Checksum 0x7D + * OEM ID "PmRef" + * OEM Table ID "Cpu0Hwp" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "Cpu0Hwp", 0x00003000) +{ + External (_PR_.CFGD, IntObj) // (from opcode) + External (_PR_.HWPA, FieldUnitObj) // (from opcode) + External (_PR_.HWPV, IntObj) // (from opcode) + External (_PR_.PR00, DeviceObj) // (from opcode) + External (_PR_.PR00.CPC2, PkgObj) // (from opcode) + External (_PR_.PR00.CPOC, PkgObj) // (from opcode) + External (CPC2, IntObj) // Warning: Unknown object + External (CPOC, IntObj) // Warning: Unknown object + External (TCNT, FieldUnitObj) // (from opcode) + + Scope (\_PR.PR00) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + If (And (\_PR.CFGD, 0x01000000)) + { + Return (CPOC) + } + Else + { + Return (CPC2) + } + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-x5_5-ApHwp.dsl b/ACPI/Disassembled ACPI files/SSDT-x5_5-ApHwp.dsl new file mode 100755 index 0000000..631dce9 --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-x5_5-ApHwp.dsl @@ -0,0 +1,161 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_5-ApHwp.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000317 (791) + * Revision 0x02 + * Checksum 0x80 + * OEM ID "PmRef" + * OEM Table ID "ApHwp" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "ApHwp", 0x00003000) +{ + External (_PR_.PR00, ProcessorObj) // (from opcode) + External (_PR_.PR00._CPC, MethodObj) // 0 Arguments (from opcode) + External (_PR_.PR01, ProcessorObj) // (from opcode) + External (_PR_.PR02, ProcessorObj) // (from opcode) + External (_PR_.PR03, ProcessorObj) // (from opcode) + External (_PR_.PR04, ProcessorObj) // (from opcode) + External (_PR_.PR05, ProcessorObj) // (from opcode) + External (_PR_.PR06, ProcessorObj) // (from opcode) + External (_PR_.PR07, ProcessorObj) // (from opcode) + External (_PR_.PR08, ProcessorObj) // (from opcode) + External (_PR_.PR09, ProcessorObj) // (from opcode) + External (_PR_.PR10, ProcessorObj) // (from opcode) + External (_PR_.PR11, ProcessorObj) // (from opcode) + External (_PR_.PR12, ProcessorObj) // (from opcode) + External (_PR_.PR13, ProcessorObj) // (from opcode) + External (_PR_.PR14, ProcessorObj) // (from opcode) + External (_PR_.PR15, ProcessorObj) // (from opcode) + + Scope (\_PR.PR01) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR02) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR03) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR04) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR05) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR06) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR07) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR08) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR09) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR10) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR11) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR12) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR13) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR14) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } + + Scope (\_PR.PR15) + { + Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control + { + Return (\_PR.PR00._CPC ()) + } + } +} + diff --git a/ACPI/Disassembled ACPI files/SSDT-x5_6-HwpLvt.dsl b/ACPI/Disassembled ACPI files/SSDT-x5_6-HwpLvt.dsl new file mode 100755 index 0000000..96c6a5e --- /dev/null +++ b/ACPI/Disassembled ACPI files/SSDT-x5_6-HwpLvt.dsl @@ -0,0 +1,176 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to non-symbolic legacy ASL operators + * + * Disassembly of SSDT-x5_6-HwpLvt.aml, Sat May 26 18:40:31 2018 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x00000628 (1576) + * Revision 0x02 + * Checksum 0x85 + * OEM ID "PmRef" + * OEM Table ID "HwpLvt" + * OEM Revision 0x00003000 (12288) + * Compiler ID "INTL" + * Compiler Version 0x20160527 (538314023) + */ +DefinitionBlock ("", "SSDT", 2, "PmRef", "HwpLvt", 0x00003000) +{ + External (_PR_.PR00, DeviceObj) // (from opcode) + External (_PR_.PR01, ProcessorObj) // (from opcode) + External (_PR_.PR02, ProcessorObj) // (from opcode) + External (_PR_.PR03, ProcessorObj) // (from opcode) + External (_PR_.PR04, ProcessorObj) // (from opcode) + External (_PR_.PR05, ProcessorObj) // (from opcode) + External (_PR_.PR06, ProcessorObj) // (from opcode) + External (_PR_.PR07, ProcessorObj) // (from opcode) + External (_PR_.PR08, ProcessorObj) // (from opcode) + External (_PR_.PR09, ProcessorObj) // (from opcode) + External (_PR_.PR10, ProcessorObj) // (from opcode) + External (_PR_.PR11, ProcessorObj) // (from opcode) + External (_PR_.PR12, ProcessorObj) // (from opcode) + External (_PR_.PR13, ProcessorObj) // (from opcode) + External (_PR_.PR14, ProcessorObj) // (from opcode) + External (_PR_.PR15, ProcessorObj) // (from opcode) + External (TCNT, FieldUnitObj) // (from opcode) + + Scope (\_GPE) + { + Method (HLVT, 0, Serialized) + { + Switch (ToInteger (TCNT)) + { + Case (0x10) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + Notify (\_PR.PR05, 0x83) + Notify (\_PR.PR06, 0x83) + Notify (\_PR.PR07, 0x83) + Notify (\_PR.PR08, 0x83) + Notify (\_PR.PR09, 0x83) + Notify (\_PR.PR10, 0x83) + Notify (\_PR.PR11, 0x83) + Notify (\_PR.PR12, 0x83) + Notify (\_PR.PR13, 0x83) + Notify (\_PR.PR14, 0x83) + Notify (\_PR.PR15, 0x83) + } + Case (0x0E) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + Notify (\_PR.PR05, 0x83) + Notify (\_PR.PR06, 0x83) + Notify (\_PR.PR07, 0x83) + Notify (\_PR.PR08, 0x83) + Notify (\_PR.PR09, 0x83) + Notify (\_PR.PR10, 0x83) + Notify (\_PR.PR11, 0x83) + Notify (\_PR.PR12, 0x83) + Notify (\_PR.PR13, 0x83) + } + Case (0x0C) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + Notify (\_PR.PR05, 0x83) + Notify (\_PR.PR06, 0x83) + Notify (\_PR.PR07, 0x83) + Notify (\_PR.PR08, 0x83) + Notify (\_PR.PR09, 0x83) + Notify (\_PR.PR10, 0x83) + Notify (\_PR.PR11, 0x83) + } + Case (0x0A) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + Notify (\_PR.PR05, 0x83) + Notify (\_PR.PR06, 0x83) + Notify (\_PR.PR07, 0x83) + Notify (\_PR.PR08, 0x83) + Notify (\_PR.PR09, 0x83) + } + Case (0x08) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + Notify (\_PR.PR05, 0x83) + Notify (\_PR.PR06, 0x83) + Notify (\_PR.PR07, 0x83) + } + Case (0x07) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + Notify (\_PR.PR05, 0x83) + Notify (\_PR.PR06, 0x83) + } + Case (0x06) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + Notify (\_PR.PR05, 0x83) + } + Case (0x05) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + Notify (\_PR.PR04, 0x83) + } + Case (0x04) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + Notify (\_PR.PR03, 0x83) + } + Case (0x03) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + Notify (\_PR.PR02, 0x83) + } + Case (0x02) + { + Notify (\_PR.PR00, 0x83) + Notify (\_PR.PR01, 0x83) + } + Default + { + Notify (\_PR.PR00, 0x83) + } + + } + } + } +} + diff --git a/ACPI/origin/APIC.aml b/ACPI/origin/APIC.aml new file mode 100755 index 0000000000000000000000000000000000000000..6a7c6cdf7a85f0b357f1ec6ba543f8de83fe7230 GIT binary patch literal 300 zcmXZWO%B2!5QgF5x6ndcZ_oqiMo(axE=)|zqVc>Q#el)Vo$~WZNYF7=_SnaDr wb%Y|6ZQe)uLbmyqp-kRqBjqg&32h~+P>mYYq7CX$kG5!s1~j5QI-q0jA4iZD0RR91 literal 0 HcmV?d00001 diff --git a/ACPI/origin/ASF!.aml b/ACPI/origin/ASF!.aml new file mode 100755 index 0000000000000000000000000000000000000000..1f9e02fd80a00076bd5aa8b48d7ba8be8c89c1f1 GIT binary patch literal 160 zcmZ<^c2iuyz`&po>*MO@ALbttpzCL3te_Ae$iNT~;_A!h39;tZWEEG+Cmwn7IpLnkXEqa>KE#K6QL!N9@-RNleB%-F%e t#MHsS$lSre!ptDf0F+{25dHupAm#!YEet?=xnnXq4qdvlV9}CgCjgi39RUCU literal 0 HcmV?d00001 diff --git a/ACPI/origin/BATB.aml b/ACPI/origin/BATB.aml new file mode 100755 index 0000000000000000000000000000000000000000..4812b74caaa8a4da95d4d1053c0f56d67678e5c0 GIT binary patch literal 74 zcmZ>A3~};eU|?XX@p1L@5AzQR(DgGiR!|5KWMBvgadl<_%DqUQdg9ayJTL0D}KMu73Vu{viRnen!R$3IT!)3;`jo&P+fl9Ux`|snK9yWMWVQu^1Q{ YK!g~B5(6U#1H%ty5RZXD0f_Y&06CEg0RR91 literal 0 HcmV?d00001 diff --git a/ACPI/origin/DBGP.aml b/ACPI/origin/DBGP.aml new file mode 100755 index 0000000000000000000000000000000000000000..62167f4152d1c68bd40722d327647ac46bed2ad1 GIT binary patch literal 52 zcmZ>9at|Ov{5AzQR(DgGiR!|5KWMBvgadl<_$}xB>;AiAuVEDld;xI4( E02ibQ0RR91 literal 0 HcmV?d00001 diff --git a/ACPI/origin/DSDT.aml b/ACPI/origin/DSDT.aml new file mode 100755 index 0000000000000000000000000000000000000000..ca2b1a9024ea2c540029596d9f61fa1b43766aa9 GIT binary patch literal 156035 zcmeFadu$}fnI{-kERxA2*|*W1%)0OQi^!}OixOoE7%V_`*Ow7rd=cLx;){$|X1bx<_{L6BB!9J1 zsMa=W;aVljKY>55+NeA>ej(fWRyrZ>sg%94z@<`a;^LLukTFkQ?0TbuSiTY#a4Chp zhs%>68`}=;?ZEMJrQ&98f|yi42IPuv0PDEUn#?_jwJRG(v87Nl?BnExf#THV9TZAK zyotdtkP`LN8AmYYQK?;Q*?l>Z4m61ZjcR}Va&fBmMF02aQGG)v%8S69rX4%;e!rUgs>Q#rr zS_(TJR}!)H^19unACY1no9DRFysB51+`FY!0>>_I7o1Hu-x!pu?B>HR_ilqw*r@zL zY~Y7l0-ANJwd}b~Ej5T~I+CW#Kg>6B)eYa+s06;W)^Lh>Y>L%Q>B_;w>erU0y4E&i!0N)kN1y>?k%WHHrNwvo!2tz{(1oT#mkgt3eauYDQNpy3R+} zh3L8%U6-Qka&%o$S0fi)qwU4h{`i$dCDP+C6}4Pk}t1zbzQa>ndmmcA`{~X zd%|u+@`zI;BN+*hsY@2DmGa#P5~Lh)9x05BH0pt59!L6^hWQ>-yX5yuL!`&YE_qQ3 z?CYWTU~i_xsWl~8uU}w&c3#4e1)E{?=5jl?dG z#IB6OqV`8fW*8%}=1A;F-BA0Z${nd2YJU{%NZnBTqi9F!hT4y5yEj)k4lCt)W3m1e zBPhYA<560Fiis36PI00xd9Z(RFfL{P5;Phd1-YKP$!OlSOS0*7i;J61(+kzeqd!HO zcw~w+^T-rw>X9kZ+#^$@$w#J0vyV)XrXQIi%|9wdHLsB=vWbmMIo1Z~Xi%Xe^Bijf zbU4T5Io1Z~c#g|+tPRis9g{~j!%Mf#krK6oQ7OmT05_XstP{0^QKcPggQy*h%5$s@qINJU&#^X$+QEoCQ9FoI zKDu2B3JtqjvqGbHj1C?CmZZ|+`9WYIk4#tV>lZK>Yf~A z^=RcB!Ku3PmeuWZVyquF>PJ&pN~z%&I1K*SkvwrqBz8@TEhAwG5l&6JdC=>vumi1b zsMan=c1~qOP8DPQYwm^|apP)`C9Y<4wW8~MbX|z9i_vu{x-Li8mFSv}u6A^lvs;wQ z=_|{Zs^MCU;-%yGz07Oaa5s3BI>y7;-n`F2RmtICcP0poJBSGyZZKF|cFvuz z296WW%A*0Y8#FM8)qH!sIG36ht6O`%YuClhr6Amz(N=}ndi6nK()qCBCMvkgOoFtU zMi#e}+Y{N0pW?7a*R~tmInntH>F%r~+W%lz5Yw66=S3H;ZI-VeJQT+hZj=w29BO>Q#A6*JjN_j?cLVPySlb>v!&l{-Q3ad?l8yBS11)jt;`2m zR795s-Sk}&0`9PYh!UYz#z}ExHr4qAg>HX)x22(!a4y+u?=qkSxRYry@Qv4qdI3a2 ze5KWs>VC>PMT%;p=0LQRh$Fk1hbvySptUJm3j&{Q-8m}@)5VJ_o-s)bVPB(~q!Tv? z^#oxj^L<`kK)vV*(bffHnJ3nR?FzD7dFhIty5iS13Rg&R@<3@Y+|dwZ9<=pHlQJSiDI1;!~N2sL9mLUC7(f-)!mnjh3Ek9ZcY| z)H-ZwVQ6gY0vA(VtnEYsv3Xp!_Db+PF(caRThqTZx%KLIo=*^yu7#fq(^xz!YC+x4 z5f~a)kYvnvBjfx}XKiIX8<5d8nb$g<7LrD{6VCVGuO5AlztZ4ae93Fag3~ zLv!j#!0fU>U=WxD==wBHXL0HMs~0w^T0Za`-~YC>kz!Kv+&2D@y&}yOMXw||dO13vpsJ&ro1*cX;DTS(5qRbBIDmlZ^ zHj338fk9vrSOoI~3j~V$(uU-f%4~D6kC`0@x+Myv}usg>;yA3tE_W z>Hy`2<^<~@D$iv@@+H_n)fU#ZMyXgrQ}JC?4=fZAAnFj5HS}x-fvM$v8zer~67zmQ z;1HnXaE*-CkPxmRAzVX3xQ2v65ebDN5(-5m6pBbF6p^q|N5V!O2^)1JY}ApkQAdIs zptZX}K!7&xI*_zcZ)`y38Y(KNQSe$w&;%&d(VoN4XI&4D$EBIo6xU=B^zv!14jrmR zr=Vf6q^gBEG;-)~Ywj9W5ks$Lqyfxy7})uASa5P#0E56Jun6V}76=vzmI#)!V)a_n zLoGI`T9c|Zsalh&q1PyAA`KPl>A()4W(XiIZI0lATSAX4sZs6Nsx0)Mgek; z#SlQwnP&(f=PWR^kZ#!M5KCVDvsu?iUk2a;gk>!(htQ+qz~3=kN|&leK`R+BZpnag zO9qTvGGN?N)kK2H1d|CS6HFvDn;|N90|3gnnpdp=uy#Dwj>p>ZSUaKHENJVYUDj-8 zV_s`EHgW{$*n{G_7S_rEI=O|SR%Hm{7PRIXoDZJmWH;&|s=}sdRWzk$z6#J}3uv+h zG}!{0;33KrKCSGOOVa-=I+8_yvFIBX{Qw0r3;<+nKo&R??lx>08wRYgVZa&yFejS_QgIt%^Vl$% zYBH6E-C!FD4R%w^8?se}Y*it%g(ef2Eo7?-*{VXB!(sxh8`8QVtsBz1;XD&)-H_G| zY2A?44HuX|>xQ&$Nb82QZn($`6O-4=JCy?s8Fr8cRjI>L)c1h>@jQV+k z1^}~x4xr+hqyvxz_>B5_f`*w!=ZA4c4a2C4=Nst;Ko(Klg+1S76fA2TRe8R}sFlUN zHiwS9LV)`TLWb6KQGny2cR|Qx$V`jJ^8va`_z!v&vd4~34ql5P6#yELOWoaYo&XKV z4bgzy5Dmx;(a_v*g&?mrf{IO0PQ$x5wWinDgkz(-DYcgm*Do*sQ|OG0LwZMO1QVLpjtz#UL;VEC2^G zX-*DiaB>bq7}q*E&nC#HogBtO04ODgrVL;Kl!z-4S0b)NT#-18afkg={N?=g}ixOCrz@h{e zC9o)gMF}iQU{L~#5?GYLq68Ktuqc5=2`oxrQ38t+Sd_q`1QsQ*D1ikDDmgT+O0JwE zK#!CwqaVtZ*>cL54dlw04dlw04dlw04dlw04Y2YmIXE8xbFk;ivA@c}`2d&$&IiC8 za6SOcA98R$0L&k97+C^f{*XiG3xN4U&c&=DXNLg!TpGY2FbOPzd4dIkMS>-QWr7ug zJb?}1QYv(j0F(-2djLx1QYx2Hxs=MKR4%1*DHXEoCeKl(3}R%Y0#Vo&1uk_2F=NqSTSf$gXT17 zPJ`w&XikIXG-ytP<}_$dgXT17PJ`w&XikIXG-ytP<}_$dgXV-oqyb<~I0OOAY0#Vo z&1uk_2F+>EoCeKl(3}R%Y0#Vo&1uk_2F+>EoCeKl(3}R%Y0#Vo&1uk_2F+>Eob>LB zL30{3r$KWXG^asx8Z;+H#RTL*b8<8S0CO5Nr%7{~G^a^(nlz_LbDA`#NpqSsr%7{~ zG$-AvV$z%@&1uq{Ce3NmoF>g_(wrvEY0{h~&1uq{Ce3NmoLJl;fVd{jY0{h~%?a;L z1Hhc{ZUUIoq&ZER)1)~~n$x5?O`6lBIZc|=q&ZER)1)~~n$x5?O`6lBIZc|=q&ZER z)1)~~n$x5?*;Q3cn$x5?O`6lBIZc|=q&YFaARrH#lfyRvnA4;=Et=D!IW3ygqB$*^ z)1o;on$w~=Et=D!Ib|PV(VP~|Y0;b(&1un`7R_nVoEFV#(VP~|Y0;b(&1un`7R_nV zoEFV#(VP~|iLNRQ0CS?NB7iw9n$w~=Et=D!IW3ygqB$*^)1o;on$w~=Et=D!IW3yg zqB$*^)1o;on$w~=Et=D!IW3x#{cgpgIW3ygqB$*^)1o;on$w~=Et=D!IXR36fH^Ig z6O#!8^OduniF-3vh;sy3*}$4K0ai9#%#r{Wv~}CDvjrb3G#LFknpkcG6^xYv$O2GK z17Q5*27WeQGAgSnz%rpJ!=?;dGHfAS=E~Hji|KFJ*pvVxp~fagLXAy~gc_R|2{kq` z5^8K>B-Gf%NT{)ikx*k3BcaCT3RXQfe2#=1&E_guBZM3-W@#7+LppB*3u)zoZDi~A z=L`)1g*suVmGhXnRk37E;1QIyGFAbg0|(z_tUeSxfX@d|6yup7>lC0@p}dA^TX}7s zV1ZzfV2J=rTlPjk-~yCw04x|`VJ<`n6SzFiT49yKE@krt3?1`jNE+CfsbY9t0Vr3r zpy`z``@w7zBYKR*91IgZ2a^{7j`A@Z*u?r}7KuO>-B824m&sNsD1#G0CUT_Gq2^F8(tPO)h1?Wm~CRj7how6pSyu&J{K+sfMq^xz7SxU&)vW>pSyu&K6eAl zeD20&INodlYjIhCFe}pQSVM-8H8jZuiBL zh&z4pF~r?C{=iUv#0T;tK9C>rf&BLm1@P#)3;%0qmhyv$I3#0T;tK9C>rf&7V~{D=?aM|>bZ;sg1UL-|uf@$sR!){Sd< zHVp5vkDQy08-_0QbT^hjY_1ziB6hAD8$;~8iam$|@h{VjG2cDi81r4|#+dJ-im@T# zU&N2i2(gGC8xdj=KQ&wT6*yG1$h*+c_8zEv5KQ=+cB7WypzNr4#9PuyGfsGNds1!Cu#G+Ez5D|+? zVKc;NhjHGekW`EzFK+_cIs zIjFFbS%sCvDlFwC--SWGHafQ+U#A-*Uv_*wzIkjsg73m0-?>Nz@;w)Y$@hE|CSR%V z;vnB1C+gedM84qE#}^Wk@8Tfem>2oRyvR4*$9InUE)DYSaU$OyC-Uvtf_8?4vv_4 zZ_JB)V_xJN+kt##{T2rK_BfreehY(qV_xJN^CI8a4&*EAw>Zf6UDt1MkZ;V3d}ChZ z8{2_=W&N6ieDmEld&2rP2l>Xl$T#LizOfz1SJrQSkgq+!w`cWZ>o-5hH|9mYF)#9s z?LfY=e(gcNJx(XAUwe>m%!_^R`W0XGg5 z;y^JDl;S{n>sIj(`P`7UjmI};@;}lwZ5zw(42@~qdAF{MjQ$0?n#+kp1gE!cyDAPD z*S6O^G_1@8JZ{qv9UTV&{6q8&xkETyZfmb>uZIwRS|qk!t({?POsr-LSU*pQ=|W)F zGa~C_7d9cz_+`63C$c3xh>;Kvxmey!;L#tGz#zcssLFV-2{g{eeLg8J2AejHZDEgB z7Up`gFp=>Kc6~;yP6R#+8Vmef8P8h z7=!%#u}Ts@!L^k5$;?k?5?UX{EONU-XbKBUhO ze@FmQ_z_7}dHtkxF#Rm?hXf$Svq2t!~Ebe|OT zNG6fGf`VPFkD*{Cet*IAQhkQ_LxPOIyzO9jsNGi0Vs1sJpO0LkvRZWjxLY?X&j3> zlnRhJtcb_Iait!FGKbaW@mmwF)PqpwhHM0(I-ny2vwFY7j4Rwnh-L}Ld2z#C`eTZWtN35mwz=?kg5>M zED@J4CJIs)LY1Y<<#+Ug)P;~)79%cuiGtLHP-a=|a{1bHLFz&%vqW6}s|1cQpsf(9 zEL|?;87zaMRtT9T7iIY;iK5hnP-e+>vs{`jN?izL!zpbGU1zk6#grQ zH`^=#4HxY2&?-~G1&}Cm0m&f?*GjmV&z;xPTmJuH{rI8#SAV1VLjJ8!{cm5yrgadY zJ94l;kIN=bC!$wcJ+oa4otgGCt?#sS;kZo$*A%WMuGouhTAixCzso|~#Ig_ua9W~X z>0H?7aY9|(WNhXy(YZ2ka0vVpcKbaq8j*x zPWtx#^~5WZlrk8d3%B=UrV5=Vx=n7x%K-Fn4qFFj6ajTG4qNH`BkHs>henw>j%viA z!Z4hf;}9ptFf3`z7y}wp(sVJP0S5T_KAL$+)5U-W7|<;A(JV-sE(SEffM&6eW>L~~ zF`xkkG)sLnOOmFG0Sz#qS?;4*mNZ=qXn+CDN*~RNr0HTn0}N>LeKdJV)5U-W7|_^# zG`6JaVnAbW-Fkq}DalbM?lK9nb!&!a=c8e$N;Xt-;+SMpB_~HDpXDQPap6f6{$Ur68}`hl z_Qn=NmFaIMxAqXo3*w2{dbR2jkq(@4NKi`Gu@IgGFbOPzd4dIkMS>-QWr7ugJb_K% z5V!;df+9hQ0LOTPyhm`EV2z+c;1g5{YT0VJf>WA+m2BQE`q|K~mvH){;AgQ_lp`<* zOahBwo?wAskzk2nnP4T0p}&y^FbOPzd4dIkMS>-QWr7s~=FCjYR-#r}@}e1i--}9~+CIS4TDvTY><{=HW;+0J3>?Wb<&O z8UWcm9H|CCHV>SlMc&PU1R=>maVUNUgX?t++@nU=J7osRir-SF!m> zz^Kir!zeas01&N{xK83aiGA!;0-z}0Mp6C-qZ^EFAc~zS0z?C*222f@8ZfmUAX*O) ztp`?CXyIlZN6R+rVb<|*W*Wf5kv5p8frGc&X4B_3E;h??;5*cuaBW@l8rZ`IFbGTn z3n0uP0o!H(CV`~|zKzbKS@*N){QK1Q5(n|;99=tiegeJt9|--@v`Fbc(zDa6i9Xz0 zDgA%dbJK2w`~4Ag5;ux&Z(RRZ`s#E!%KN(`@&cz#59R$mq0jVW!Qnrrd~R(JZEIfSqDEB-qZ`d{jm>7XCCJE{L0eRI0eQ*yc|ypnlH zq55WFwgv30H7YAqJ zXqnN>y(NFMgn?L(TGtLzhq|75q=faNWcvn-+tmfTanWka*!7*m8?7CYd7y+RUlQ#S z8uc!cO7&ouDPP^uFA0&cyk6>#O64O&c#`PNt5;;PSM|is&Wl$MZ|IkPWk+uzPlkm| zy?k>QjSXuhdK!-eWoF4>>hR_+b`nIUk}9Dy09UdDS2EwhVDsk7yvcmEh504+F0cu4 zs6T)3PoTEP{ll`jO(DTYwxC%*>3e<=~0#8ruZP|yHIGL zjDB^zcdyPxrH-aVfo)5k_bx<Pr;Gug_5|c9Em|nls&xpGOtfz3M(?ji4f%tiS_Qv z>!h#0!UA8?6HiGF2Xi+W-;)T5$++X_MTW(W9Y006(S@Xx^Hb2s`G;lxD)gF^grLu` ze(U)m+2cY-^(IlpWGEfh(Ib;yMlsFcNHNEFa?~;P*Ktami;9|9F9o5NnZSdA>VhL( z8GFLXFUQm74R2|QkCB)e}-inbFnHHgygS{Q{{D^YPm6Ew zVz&7kyH~-zh2PGd_r1CEG~~N_ZcT(%L9xG=kCYBc`RlZ;hR1?jc%C;4)Pj5EGnS#-6bSI!}&+=t?O-G)%5 zO1?UT!f8y8sC4Zky>$nTU5}0x5qm1A<3Y4&<8US^Hw0%PYrPO|VC@7?Z0Tc}%7k3z zS6gD2$MubGO<{3Hi2p3a?+O+EJ%kfc_#Y!2L}7uwlB5c^#(pYVLWO^XaPE^4O&&C# z5iem&604Y7x5^j1TBANJllOe%#!maoBI9K!jA(PcYkt7zFY%U;<+jgFs#eEMR1I1o9TvlsJLY6W?s1@Z3&&r=?I>!jdSXhcY9S*+W?o z$|CBpwRLNClJA#`7sMVCZ@ZATwFlzucsF=~5$q!2nH@JRvQ8Zba7FnOUJXkW062cU zdRCxu*_DJSJ|L2XFz^ysuL}YkyXKzsOj5iP!&@H?vE!_$Q}0Bbu3eQgp{-km86JS? zwx6?VlRJ@lU>iNF_DbXh`MRU;^}^T{#|FHHeeW=j`GIQhcu%L=r56Ib^xtJvPhh&8 zYYRf${%-b4(9cTbA*nKtY~z&i)OU9k`7Khn@QR04k391rolEPS>n~yt)0Zhu#HJ%P zP&sN(eug42RW_0u8It>+hpRH9n+9p-&Bj`_w4(t5FzKqi~EGEUl+T;hoeV!(la~ zK*MSjhihYENR48j8VL8PQS4WvIH*SP7&Ta0PmSU`sX>OrYDj^G)hG?CF*&40sZR}r z`_w4)t5F(MqjZcKEUl+T>7CRd!(la~K*MU3ht<%A)F}6Z+0U@55l*2%LIdzwy$po)*_zH@N)OYGDHF)N`VxCa?&e$D4OC z?k3E93Te&hljUeX%`9!nLh#Oz*gwO?sHEp}Mo?)4p+mhYwA>`!|z zaPqa8UOpy1)6I%k!q^+w;(Z*~P;~C!S8>JoucyEE7~T{#{g-!%JtTmFzE?|dAy{v1 zy^76p#IXHjhnOFg9ujjHKstC44`}lVfRHngvoa>KV#>jbERY&B{knLP3(3<$+j{je z85gT1(Yf?G zQD}wGGc3Q6X)<^$v(`8l1!{lZsy%e7NCsT()}XI z_bDWV|F}rHR=I%VdH0hVqJP}Q!=*_ncvpUHvsmGlfBCH3DCIlLW*HJMu|PfBdZoqU z(JIdTd(I;9hep4NRv=o_;`OapA7wZ#_I@Xcw|${5QURV4O9hPp74)qyeFmKU(L-YS`|H1deQrIe| z^c>MydE*T%Q9Ge7_Q^~auit)?to79G@5}4i&Y67~(Ao(a;$X5ZqN|LnE!WJ{c4)b9 z^)ZI#yCDm88sSvv!giQz;vD2YWkZ_aSPW+E7k>#{^ zWGS5|X!Y*f3TY?^ya|gR!F3j1XHWIUJ|#l??I*#M+{Nn#bgV2T*sI-{Vi&jd2=-rA zA4ZARyEDPhp|rMc1-L_;<37M zsCR3#Q%%W=e_d7l*c&5je(VTV-8-P|P=k2X!2zr(98{Bi>3@Ij&0ikB_)jW-@JjIX zqwoJmzoZU|U>)Zd_~ik4ClQ&#xN@WW2AH6&cAe^&-Xm(u-8WydeaBxkP^Fq0BmKxn28Iw=^bm(P*g2vDRcLb% z&Erz{gpj<8W{0V$f$mXDbWCjxQuA083z;88k45N(K{Ss=k$Q0u&BIaCT~|tb`cR#- zRVY0pD`UX|RyHCl&!|{rTpDCJ5y`PUh@OnlD}!iFp^e-idP<}(e`a8S z^=U4D%6h?ZZw|0(jglJ=uriE{$)O(ySgwP+7Y0(qVjyL+iyj(CWiD>I7%d*&`~s)K607P!mKiLF;nB9h`Q?U(VM$#v5SlIs?Lm=Dk=VnIAuuj8$-Ga@a<);EJf z5}Qf8JMHUNI@R(09o}99(YUnkOuvb@Zf-rSKlLJ)_?cg#AAGYl{i8|ZJ9Dq^lLhWo zWTJ~7yx8hY-HvcFB+(cZb@CG^er!}KIkouTWla!2dgy3wY)0 z)9RJ4XQEfW%JJNPI9R<0gGl)jSe%nf9ON@N_#mSx>{>hnhuNV)VS$6B9Kgp8K;gU_3JoC$1V6y$3Y4eJu;2*?iC0(~Vi(vo`qB&mn>hsUNaO3%B zpS^ZN?gZ55KBPY$Vr9R9N#CX@3rBbeT@}xZ=fn%*2CmQI-!+7ArUL_Q45c}|ejgV) zMdvKGsc@5%+f>nrP{4iPW@2^X@hYn%nf~^K*6;hP%iJJQzCVUJA)aP(^Yz&Gr)6XV ztJm0dy2uDz{)xe9AGSYoO(-xh+Z&enlWI^syU((ea-#ECcm5|QGZch}A|_5 z*cI|q(VhBsFT2uV!}rU0QYRTxnutX@lb!RT{n)RK*sNE{h}Mb7P6K2Zb}8M-)L~kO0T_%A7n>--Ft8XF*XV2dT_#(GS;D z**q}&aT#Rjkl>)GbuLH!*4SW9D;r>qM07qmFcp#2M!X~@g(~rx!@fIrO!SN-ve!%a zFK4-z23b^VYf?+`gU-WS=gM9aQ}Ii@>~`iDcj4HCJZ0U>xsHKqR%K10=C*FtK8aVS z<25awip0#g1gIqnf&|vnsUc~ zShdyR)982HY_F}BrlQ8G)q+OItx+L)T(oZzH+^?3 z!r(pXAYc%mS>Z*SeYpC6o1^N*vRmMf!$YMl?h-gjTXV|C#sMmEeR>zZ*?9h>-($ARbh zIPiSr(B_F8+Efm0(xDS4cW6^KHaIk%t5Ob)hn$o{o2L$a>d=^+NJkSrpFMSGIqG~@ z4!uB!UWgpp>N+&G5O8OgyBtUE&{(bH9onKpCr|FsR_xGL?9f*1(AKF#pE~rZL(|iK z?mP4%9eOcx==rWg_sy=4IP|=7=y^Ky*vTDwK6Yq4ldSI0c)(lTq32H>`qZIM9r`_S z=p{PzQsmGJCvxZo<=tbqw zi*)GmlRNZc?9hv`Lodb-y?E--rw)DU(C>*u56q#LPUO%_%AuF&&=V(j=%v`9mtu!r ziXD3C)S*uu`qZJ{6Nes{Loc7mp_i3IFVmqXPwvpmu|qG%4vjaSsX6rWsY9PS^r=I? zCk`FYq3us$9~$2lIl2%1*zi8|igM@`I^cU{mf!#_cdqjE>BPx>Iv@LVKKAK+ z?9=(4PxCz4sY9PSw0!B-=~nd5w-s%i?68=v9NMNsCr|FscI?o0?9h1cv>J8Wrw)BO z>OLKHzbB*a{%JIx2RX?d8b{lChj!@DV<&fLCw6Ejc4)i>TsgFJ>d>bSed^Hfi9^TJ zXddS_dWXf{?re#x9NMKrr%vwBZtT!*?9guP(C(>2pE~rZL%$~uJurtp*Hx)3{b;nbl|9s1Ov-xG)K--D5K>d>bS{hm1Vz#RHyhs8?Dp-Xh=$&)*DDR$^m?9ipyp-ZO@ed^Gs4*i}u z^uQeYWQWD@_&*oL%5-QU-gnZiXgqta?$G7fq06yDmrot~)S*uu`aN;zfjRWa4vTrp zp*=cu;^YqP#SZPo4(-Jb?VURGsY9PS^n2pa19Rw+hsDTd;9$vR<9NIkDNwGEM&}($)v6DOWTI|qku|u!L4!w5j(5DW4 z>d^0rL-)_2@j=&<94x`x!Z?Sn(4kW&cj!v&(3RMs@%}k=u%vS8(5DW4>d^0rL-)_2 z@p0ypI5fT!K!^6}(Bmg}Xg_vneDE87jQ0fMqur}ODLVCbd?79hzC0eUIG;K4s`QTyyk?x4LcUVH z|Fz;VlCJ|-9}?KQHH(jWsp9cPw5?lb5mjFb!4qP9H#iaMV7gd|>K)-F5P_>N6c%dt4eg@`0-x zH}IJDG{0~quH#!*cyIVL>CV>!2j2?VE8sbmqj^*oZ44Rk>AN(E&O3Rpo^|lm7v!os z_0n;<-Z~qxA<=pKoNPz?KE9mJ_e4*&cZs=En8eGzpH&~jm{qTa=1j_x z%ZxG^U-tgx*=jwgempDi$!l?E^)bk`tK?dZUP7Mge0ZSI;OYAXeBZAm{+qsc(Z|T^ zBZ%=au%pC8K0SgsbSi5{N+$A|1N(taER%LL=gKIVByxmIE2CtR$PqHFjFL$rpE;Dbtd^p@|omsAh3Zz08Btk z08Bs(9+#o$_*@G-yGl1=^p|MPU!s|QiRx?kMmA0c@Pemiw7~IsVRGLm0W{|6k2B{v zZA^VIKx6U9MCEyb>hj{q3)E%|O3RCiL1D(AE-z44Uii^a#8f`0$rzNBmkoJ=f{Z~u zUZ4#w{-%e=12iw>ckb|c_IgmOYWRktLLBldL=39>Wa5|Ec`&o+|8O4fB1qh(s+|wq z-v7pHR1&Y-$JdG+d^79Mr)Sc85fWb`!3S^Becef%n}%Z_Pm@e%Q@B&y{UNNBh;jPA zChD%P;k#fcL4Hc-k(<3#Wl>!dor&+`gRlIqPWr`GoF0{U7YDM$s*Z2d;loNF*zaY> zmw5PZ8lT0%SCUwQHeAA^V>3Ud0FY_x5qx^7y5Z(}rn%NLO~yY9W8pg>`aWp*`fd4b zk1x*xSs;R?v{{}cE-m@eYf+dB0yz4N>}O;JsJ_g zu@0(}owZ3th!0z&2MNCAUvh{0Ue&P8W*KqyC zop$@$Q(5=gSFT^Zmfd;osciZBQ%_xcE?W=eN2jiR?S8Y8YpdMw9J%$h2 z-rnaeM(@gWLq=!t)*n#G{~KX zCgi;D{|G*}YHy?O^##e;ir=23gtP4`tQF%tI^{H@{wzzN_eY zV@PyX$M&+77{NMD|1wS6_JwmT0T*Hhy2b9%3uzZTKQg`#~c zZRjor{owsKZb+3{*l`3yjaWT9(<4#PRY_>|cYZ0@br=?zf{ukTNUVGsh z8f!E>>CQR+cwl&9#={dc9-bheh9_n`JTc?p2?A<(f+RIOK|l>p%y@W$fEu14poS-A zJUlVu;Ryn2cmiH(c!Gc$o`9Iclf>!pG0&gyx~cAo%K%!h9_1$Jh9^82?A<(V#UJ~D;}O8poS+%Qo|Dj z)bPZLhbIWA;Ryn2cw)uF6DuB`AfSdP;H8Eq2&mx+h&en-o(@k=hbO1QlW0-vba)ak zm2~HiHYt0$+cC)k+dYRiAgt0$SY$pGJqpX$tF^?z3`{bM<_^T9Zlz&CT%=g~{0 z+6GCIf)HQUu?9ckK6!Qj-m!pIs zL_8{C#@4ywKh?S1FW9H!(z}9TQ{WvW`#KB9(pf@usz;?m{&y!{uehySl?lhInVE~* zs6K%;d&CN?lC$z_$J#c&7C!4$8`iv45ShQC{#dGV6?4%78tb0itc1B9mxFtOQYm5}rI;>WP-JX~ z8KV-o*3{OX=h%k0v8#Vmoq=F<4BwGF6`x%%IE{iIWR{U5_jWmMl62;8zmCQ7 zfs7xhlPL-tt3T6M z{V97RUr{YVvnz#af1|k0wD!|%7oC~?T|L#-C5>t%k5*JS^#)P|eq(GVGjGX>{xD>7Sfssl9xMt&Dq~&a1_ozS#n$9r|uAv~&0wIhNnW z8o=Ub7z0=nSo{og0BZq@pJ5GP=Yhq~m><9{0E?foFo0bI7C&Qg0J{V%e#X)Ob{Saw zjO79B3b6PYD+Aa(u=p8yVmrBk8%yBjWW9-Rw)*ckM8i(ZaM;?qwR#R+b1t*Yeo%BC z1yTRXKD9hM;2JZY>EwpBCQg3bK6LPrYIF&xl3eD@b`a(Sd!TOA zVw6oOhh3`M`)r*$+^c&Jnm1Vtx)yQB4oK#^C~bMj-lN-^y?PFGyrUh`--+*htXmuo zOu;tyh|K*X56-EBaHAA6MkrDZ(4k|W3tQf}{{fenR#jBe`ikV6=SsWEh z{w#`FBNUUS?pMqjR7^#?idnH@)}Uew!-`o$im7hVt6M{gSxPZk92Fb;SrnTep_nvv zzhd))im7Np z?dq@?>##VegX~B9JHW*u9n`JVt1k}eu&8v9#i`19@Es~=gbwU{`gK?u)ImkNIxNLH zEDh=)yUczamWFgtH-4|aG^E3l(m@udJm;Ns@Y4PDuy%GmpUZVBn!L3v>q*QRQIj74yL19`TVk)oXm#TZd~7a)_Z;(2U~K$xo&j`2TA)iS{~9!4O+bV@{mT$ zN+XC8ALxDujXFz_?5UxuSRSkj7425Va(aX%jMx$@LzY-MYKfH*mM}(G;z-@D3|T@A z)V%u2kR?`>B_N8jL_(a*5|DMs5-Wq2P|>a>Rz_LEj4hELvPAxecf@mdGnhK$N&myhCpjwF$^NWQqKsB~-L)iF~>=)$FAucv?fpZ?;L zU$WN=zc>De`lo(%`Tx`!!IDh4^>4rZ*Ps3W{`cZH|6S(W_xVooHn>@Xqr?wi2jO-}IDP+JZJCGEdvaGA!bwol>?Z!CAlkNrXiyDu&H{VYFxS+_G9Ooi@{DR#hsfdb@f6C?xun|9 zAzKrXtO-^@+{)An(EHzrbcwEs=$eddfoThu4d>-Bv~wn|q(jyqp2$$OaQMx*aM2BV zcreAeh@~1e`RB~9Pmx}Xw+9cW4W50x{=sbci@0fI!{=YbVadj|tGmxV|LpT$dMTTK z@u}<2XPxJtx^`7{D0)KU^BWLsZ9+Alg*Wy+Gjy;TATOw7u)soGUe!!51~azx` zRE&4(O)G=486$d5biMq0yPlIxEAD_}Yme?t`?}D+jx|$yXk>3%>Gh_S{@zqZqTbYq zds7m34En#p-ZbCvD{v$;>I(%sm$qJE_txve;7d^scph_@D+@z8E+3Zz-dCvPt7dLx zDdLe(Jmei@6pvJUw%VwddL6GG<(NE<2fFGgM=Vv8oq3@AhVq`gv{^ zy}m}8ChBY6?yi8=)a?#Ry&&%j)k)6})Zv`yE{FJKRHlU}?{a-n>~WGj6!HxeVx86Ag+j2xelwTjTg;^nsfHJUj5#~7_cQdF7i zj4YRs@awWXJir(R-=&QD#dQ>-2BF0uB%e6qkyBfaNKr%N)lFfZ&WGhF3UlwMp0Qg+ zDX=v~2@oS|#K^XDK@nl^rJv}|v6j_ir}1O1=nqkoGzI8shJ)3q_!(IA32*)B zM+Op|$vAPWJtNM&93>`X&f<8SnCeed#jeC@<4Ak-KMs`oK%6#llw;xt7_-RMnK-0H zI}g7eDTs@|#D0P3Z_>mxKAv=WB&NW8eVBxG2ogEe>}HnvR5>y|?L5}!)Lgj0Zo~)d zMmd*R zxDUb<$$2yFbP=N78}qdFjA!JG@XM zgo_$<#2#)%3l;6NNE5y*MxweHr4;QzK8O zMp2L&%_}EW8qLQ_P@`^y8qLcl>o22mqLk9X1TWrTZ_7k^=TVcdWV$%8n^T@CRl~41 zuC?-5)bOWN13?=$=AO_W8#dRfSRHO3a^whlGwxMKbk0Yb0Os7xqF=0cyP{IH&IlX_ za$#NsZ-Ee`5>SuV-hEY4Kszd!_Mh)9bYS%R9M5dX#T87tcq7)QxAyFOJtweVI6ti= zw_aVvu&bUM^BkQ0XyohLS+SaO^NoDA>{J`s3V~SF#CYDWHxlCVRNZ#gh;b^CRxecT z?SyzJ?=&_NjbgQkdqTZfEhI!`yj-ieAU#v4hIT^K{t%DYZD%v*d4^=#2@7=ySH}c2IDCk=b?1|Bw)8Zn&vnbiCp%lr)9eNl zaYCY(AcKh;Ej`iFf}p;wYnoTBZ>uMl6Ihz6tvBk7rSx%qLUW2G8Jp2(^)p&ftH_w9 zPwBb_Tj%vhv~|b90Sm2Ab+@NQQmYs8F5c9j@f-qHbez0XKDTxzdCr+kpPRt9xpi^$ zf~Tg5L`QV=^7Ewq9q`Otr2SLvXI}dT{!#l~ytLwJk-5k!8apI*0PoE<>xI%x`^J_v z9sG&dY3q}0IH+AVwKm%yP1$Axl!2N1#r=Y9tv#JivemYy_mXV5?HjC->w?X?tzTmk z$8DRX+&Oo9pRE#eCGGoL)(*U<{WM!WvY^_Y5e$=v%^K$>x1Tkn1q3XX?;wy7S<^Y9ct}&?QYCM#042rQ&R>$Lda-w4!PlVF8@H$YJ4a z8>e8}y&V2lLZ?w17IFO>vVmmoy~9wLzh+;@}&^Id{* z67W2UB;fv?Bv_CHd=-mSNBjPDF4wSGKCNF=foEdOv$7R-u;#=}>Oj!+{#WFn_XRt^-CGP_B6Xn+MC91f8(_luL2<7W*et?*BPVr(dmM9 z`=*|FnNj8vAZ=_M*r}Vu?7gHX6qdF0%1h742*dn!?#Dy4xRR1RL$_=q*?uU{A6)oauHyWGk6 z!KeS(fBIjpJyiThFMsgIfAweobf;tMx8J-j?yOB=7V@;3f<$lALAm?PjYh$fSUX91 zc{q7co#;fz_QvHR^VmUUJjP5&%=p3ORHu|uhyAARd@9i{_-;s%6&+U%=2AGidGK(I z023e*2k97*l8Dp~exN9~Ze4Klbytm0w9M3Y-N%U+U8Mc-f!a%XVOde(Jj;2J`83Uy z8a7eq;jMFJujz=+C0=$rbBw!9!L{`!m(dm1Bc+!Mju&r1UHG|6f9(^=zWGcgaO|yH z-}swE!P(xHBTR0+PN_3=sB4@t(l2DrZ=+==V_UXAC^Tq?iyB)pZn(a`HYlrt(;y1~3UMf_Z`kf<=NQ zf@Ojgf;@pu;1IY31%jd`E|v4uhK7TWNd)pqk-{QJB3vtg`Gf#Xqpp=3xiUcoz+lKg zs2D=niL$?r5h*k(uQxHi9NWP0<-`WY3W;(v@Bu0|K@GrN11MGjY^K&dhSmWp>#%?r z3p^VNj+FyYgK;zOq|0_LoCL_jlm&6wu`9ky5PKSL(tW6R9B-3k%Ed#v*Jx$KtOJ+Q&6LF0NHS{v3>@jY$pUt zj;u>z19B$I6%e>J$Av_81*BnRotM0mNB$H(V2g@Qmm59}=EGo^GNsFYP}fl1zFUP1 z=No>I(**YY%bw@r9U-V}56vKO(<0pnE4j%=SkEO8G8i%#G8r-%vKX=wrGPas$s@gE z05*Y>6svP(w@}Rj1O&bY5Ngmnbk`u}q_~7d=1oe)$`6_l695elm0AcZ0W=ZiGa^-X zT`V9LCgp6N{oibPIjfe)XQhjvUuGjdn0eB-3l7HTKh^QNo(bF$ zo+3P$xhW%mBO~{BW_MMKx<|jOr{d;ykN!8P)OFYZ0({e-3gFy$+fL>~(O#Zv3v~Gw z%6qcT#_$O}4N+Q$dP44?Wvp#Hz#-cDQ>{C*ud}EYR7rfL)rlLl>@s4Gp8)$b^AwB7 zlOTPUP>@lN@UNv&GB7QvG9PlvYoTaQ|J7LQ&Ut!%#Afn#>u`E+uOqvGLvc9$>Rx8; zTqW>bFz7anE1gwMS*bk9-l;Rgp0WKTHr5-h19zg6pLmnrtAD=p5WC3Ey>HxPe~I_G zyr}|{nDRj4odY!Z#15&9h{}km5QwO*NUAHH>DPCzbeT+b@>7u!izv5qK8noidm<*P zO>`;~Zz@aw3;pwL67YZ|+V#D#wJ_Lx(g^^t7f{sq4(@ByuC2~g>&dWD2+)u;6&TMr4;C;##UOwq zy*q^mde2h0lkvk8*wI6GDZ4#9(NOr>^%t^Ei0*BCxO-!Fq|-Z&Nz(Pb!m1>m3SU&+>5}T7%6-@FpM`*ROr~ z`m@)sJ$LmbX@I^5nP$#nsa8*@Q6isg!s*fk#`9?BI!j#D_B093f$P%A>;l@ix zitI7d?rKtHCgkXh$8gG5OVwkNln~;qDwhReEnN4@YZy~=CCV+YIq1P~ z!NLbGs9|23>Vj^KF;`ux)0)O8-batfZi?g?3{H zAHq};k9Hi+;MGlc4<3*S@=c-VWWpFf7W$Ahlge8i$jdG}afpJe2M@~rJIP4lU`|HH z7%8gGw3Y(nwPcU+r#s6?b+8`HB5tyb>*C;18BfZ10r8BCkI8rualS{C&nRUa+R9IE zy`O5`y^ELQ;h~t{KEV6!mTx1NeJSyk-B#y=H(OFMJWX@`l@@vMcW_R!`+7^haY9H` z^0zr-nq=P9-#++E=Ti)|UO;TOR}@XrEvkroMO9R>uc+cd^0&7hqg0vm5HS?rirRf8 zu=Tyn3~)}Oy^C}w<7tQmqN~K5TW&Vn1Uqer)odQr#ydc+5xJ(2YfTDDq)VhLDc9VC z1&IrZ!*e23D#YB5bPeJf3fDN8Wvr}XWhLn0PUh1Pq%bALvSV>%A!P}hsz3={2^)mX zW~6Ch8u>pv)$w%{ZsVCpT%5R^&cvI$(;|J~PvDs*gtC%N`M@7n@tlk|5B!vhugZ9M z@F^7yWYj(QsEW3t+z+W}TSgn0waT*h7=_&uO0aLyVbQ(cgVp)n=~Q~KF1&F_Z6`V( zpfil<^*9uigRmzn-v7_uo5#0xm3iY=vTQ5YRxHa(;%2Lwv`yM3sU~!GNb;?& zY`Mf!OSa`Dacp5b&DKtx6xz}On#L_KtWq!o?=SrS({ zjG==TjFA40!bU_`Q&@Y3NMt@#o}^Tg7t`_$KwAoHj97tV)kc8$urou_(7ZiUXc_c( zq?4FE;@9iHo3`=`4R9yCaGNuQWZvK(!n%7h%pqWkMk!U&R@}zuFj+<#FF@zC z^?B31rlmpr$P;MiF@M;UAH;$Z{W4MsY2#J^Wff>bUlgrBgWd>dhnVbaJ23$lj@DKf z9jG-mm@>tnrQoxyOoO9QurXhdi^C3S906Glo9=E9EQ3bQNv}xQ2RhcnDjne1jj$hCOeq1 zv{3+xWmPCdnFLoOT*w_(q_~|KM_<1*h;10GS%FJ27%5_;tn=EsWLFTrdQ+$4gXr1jP#fNU!4;*2pBzhW@j z>zDG!PfTEvO(6?SX9k0>OZs8E8z?!2loXt&85L+uw040fm?&P2*W8arl^Kjx@6(YgGP^BQceCIz&1+A&+AwMubqp-H!H z&{kgBbRa)SB`qCJ09JNX#18bP}s7 z0SlY1!gb6KPrgd`P0OR~-PvQ}PAovO*jHdhn*9Lk_PU|lJRX785m;AY^>m*PW`!|~ zHxJ#`;bm|RImsYC9fZ+%It-9&eIY;k>aA63Jn_YIQu&Pip^3H``GZ zdL&$V^rM}I=;ICIla$Ft-u_;4h4Asoc5IZFg81S9#sm2H{lIK1VFDB|(2q|q(a2Hq zrpT25;p!5hKjPYdvZ>^cCwgF+UIz#e0DBjyIBXxR4f~>@n*CeJi^*BUao}#$E!w@x zL%R6*@o}+f{GM^q^uVMj2>A)Z6vXi(lrT}u!c0B6aNQMnvw*PX5(UnR#SEheP$dS1 zNjRDnox^a|!kFuLUi>1Qb+om;h7xzQvBy?}L-asDkpNEnG|Yuq0{w7V1i0ix#)|W* zMDr@K&P9Jv&n?4e*JO@nAW~*FE4DpA_+jDB;XFAIP$b#vlyn6MvWg%Uf>?d2+ofhJ zWTHQaz#kzjxZ(xfxE z4jDaA%IIK=KBN8q@%%UfSSj|hTnGOP=6cP`=DJzS^}157*RPQ4fGfFPPr|TVN77zd zt~XcYy8U8v-BFS2E&5zHmvWosK7>_s9dAe|xo-8fMcdH1;RnYk^h38l@Y7B|ZjN(v zoSWm^gmdn7g?)0$qBRTg#H2{I%$zAY3gqd52ctf1JZ1`Y03h4y*enQYV9X2cR?(6H z9vg+UcPES#d+K;eA~XAYM+)Krw4x;1$S`XoNk1wp`iCrz<{r&92n&VPCot&}=F!KQ zge==*L7!(UG+=guszs~|wgX2-ve~0qY)Or0^EmN4jyf#}xx0OG+Kc~5`YrU-EuJ7p z4!tni;X!K2S^S`C4dVyAM(|T3&|Ms&plr)$DcADDlxg`9$}`xJ$WW#MgFFKUSq2Pp zjCLA=^;P;x8gOVV!L0&fOniCl#G4C1{J9Ji2NR=sO`hUWC=r)JiTD&s#K|c)T`)N} zo?b*&S&-_}j|_{#BO{`~@?jw-PtWt#zS}7B$wtyZLV_%(jZ%V>pQbw&CT9GFG zSssY54Du0Qn@lB(O*(nFu<^t&YEVJM39`V{VhZA!M>1LTRj5WSg=V08fIjnRCOc0s zG9D1yh0X)-oZy^|PPatubW1l@TM-NG9r#jhQO8!B$Za#SrXZRc+ODNZ7}+JU3H-0s zHvq!DmNldX!^jj`{sU?bY@IXd(5PP6>@AV2+<3&2!)$Q|V9|z5z%(fvwitp*G%StO zJ;rX@W5lL8LFw?990ex-l6X1o7c@D8EkhWNsA^+u5Xa75clylun6ew%vZ!r>(%$n= zYVI6kJDlUJ6^>E&3Z6*aI8MuEX#$`-2a3dF2HQ1KN=jRHX%P#_isQlmj?6$l0& zg{Dq{pkq`Z^$G;NzXDmUK+rQOkR}C!US5IN704?B+o^8N7`aF4$k| z6;*h%21mOthF7U@hXzN8VsE|1n{=O9j_j)|?BKj{>vGNFU)5FM%{im)Dr6bTfpib?oZ{l>4)Ik+HH=q)*R1k0; zh%1|Q5h<8bdq0z69|t{MU#P8Q7w6fR1dMk$KXmZ!#~P7RL9UeQyoy*`3zrdyjODap zx+kUD^7#13K`NiniVljg8ZBH-yJ!oW&I{*phPp*?Asa5^*^Cc9*(vRaFv5OwLXQ283*+oJFXY+p z0!o)obI%B8*ze=Q<1G9_-9nwo6*kd)nDFJlLaWefS`M2MYZGftFkrO*)IJM@L7O6bSY!mBl8CVJH*`R?|ZD6ss5Ou1co-ns!Ko5}IWh6WqFm*R-9fXgsOr zEEuy4X%*LmO+9F^CQH~P36fy9Y$5Ap$VZDm9Z)LfRo}c7kBUK=hzrZ=CKE5!nrgLJ zARb#GTWN4>VAWBnbX#O;pBAUu3Rp;<=M+)IvdHkk*HdRz!9} zN<`v~=bM(BGPszNX?(s8V;{wQf@CS~C~Vg4kdi_`BIFM+f`=JF19P7tw>9YRLm#r= z6ogId%(GyC|qC;#EojUY}OmSmjJ)xnAyhdCr zuG1k+nGZ1el*dY@XV?J{?cMmcLgr9e8bZQZpR1Gx}6Khp)JqPb*;4p2o zGfAu*+|9r}P8Gb0gZD6S)S-e!4)!vzuUQ2*aIlYo_cf{DMh^BfFs|<_QQ9~-z`%HT zPyw&z;2;Bs8dPu-2ZtEAca;jZb8wh}BUTmM%)t=`##pcLc5rZ%f%j_f=CyF}UIxay zc?z|YgZDA;4rNFe*U%&f=WcvDAg*N#z}2dE9W4%dg$W&=9+{tI;)SmW`O54PZ-phGSk&tGI~IEF-4GvS+Sw=Xgj%Oo=RjaR?xskaGP5T{z0Z&Ark0?y$Cn>yh9p%-kf_=Xu?hDI!gfT3jz)13cyl;yY&}1afr(izUqaQLQJKJ`z>> zLK8E0c;->;pfP`ZBWC*yU1iNr(|DYU;Dozyd6g|((&Zb(b$nU06~d%WRDGitdUM#2 zC&L8Q&ihEMZY7K?753GEZ_QwTzZAfa97{>4^A!qg>gL3t*N=th?nT6h^8{1D#aFP^ zBZj`CsvhJKp&nG&g{UlrhW>yosDG9lr5kyC*we$2{4Fbs00X`L0+qa)D~Qn zuQWdm0$5fICedx6G({l=&8k8aYJn+v0Jj5q{UZ0x0t4~p z4Qf|9dobskJ2E*xGQogzHeYTGPlbVytv~#DJB}@N>{!IBAneD`>IWd!dk`Pa!ZkWG zom2RD$DmnLl}&Nm3IZi&4D!I9}|`w zUfZ}RiP*j@pB2#^DgEq6o#ycQjMyq(CaxDZh#SRC;%4!3JkWK8xJBG5UMXHBUM+4D zw~N<^*NWGPJ8-13OT1oe6WxfVUF;A$#V&ET*e&i6Z-BzxP2$bsE#j?WkLVSBqF)S% zK`|tT#fTUc_lo<(m>3rmVlQO8O-zcim=gQMelaZ$h_{Qc6ZeaQ;vb23h(lsV%!X{nC_3tI89Ckifx5m%y$vtSb)KP8YxgptQl#su+9{XanKJX zOuecI>A5kWPAeJny&F$g$(%AxrmzvwalwmO{h{|Vr{4*$wifP z!Of59FaBVE<+@>h#dTvL^Zz98t7H;(%hMApRNHhoy>EhQO6qk(sR-<3Ee!U{G1ON> z#VTBLv9%iNc-LHPO~yQjhIp7Wd>G5Vq%S0zg%efe$LTgS5`<$DqBWDhyP?H}wfqXn zp;nkFcxnDbQ-=(cXD}b76Co$`w+Er8?5Am5UU70PREAY-u!Id3#LRtcnvB^@Z!Pt^ zYk#_hHriQUL5_>pn*<{_c8gg08Efk2*_4Cz@6NDHajjw#4wLv{$d~d-xHyUB z2q7SV!DK$&O@=x3MHm3@4T&ZUi;Hp_ZgwD?GL&MrUf7+$UDZPC33Ro%?+qTTw8@lm zA|i!VgvEe>rSd`|qGba#6R`(AfYTYh1nAqMeZh!WcMo2F4vJVsxPvO?LRHFoPHAV9 z7d@$P7H(X`1P5K<{;jm)SYAfzaJeZ3HB?#=;a+UYha1q8=n~kye;W}Oc4Aa1Wg8w| zclQUdRYkjS_v!M25GeZ!YR^j4n1)nRx35Hv1Jz3Ej+LmP3s*_qxe|3}HR`UFsJlQ7 z1DM7<*{xC2BNGAK1rnhNTB<3?9T?fD4A=eg;kv6yw?_+C7R#P0)b6$wsNHSVs8=dq zceV0$uT;M7YUS%*seIkl%GbS8`MRr>uY0BPbyq82_e$mKrt&SX#qLu18uQytrCLE< zD%CRTYGvtOsVv>q%F?q^S$e1}HR)0L0pq_F9cRiJk;7VF>EvZxI z%`k}WYdAt<#t|rxWcRlm$YgPD)4oI>XXI8X(VMasqOHnmrLgYApyY3B!yz0EhjigM z3EzSOcN^et4el|(JsP~-0B_ge9R@hAmni%@4e(A4-erJyY4F_!_-+l}ZGhuwS>eCO z0NqM$No6nhL5do&7G`a}VT zE-mn>ImYS%qi`E2N_om^1fwwIDZm;JHBV7V^s$ukl+_Z(!;q%{Ydq9EMa9wcK%N>a z&Pmw22uQdQWuoFmM-dIC;^KX{wSi|P@B$Aufng*FY!1B`z|!X^A!u$(bi^6edp`i3co;NN(bZ18<5FYh=+x!Hc$IcQSyPd`Bdh0V4;L z`Jm$g?WruWB3dva?qK8Go`lZ|-f};~QUnZ75fBAttR#lD&x_@wU=7Fo`yh3ET^Io6 z;O1=an$mHNdQnR#`0E!LHEm>(L%Fi`UG|HKDVve9dt;?*RLa&AJp@#^2KSjHbt_2e zU56yePjg>>xeXrblMAaP=$%tSim-wlSB@1-1%D$KfbvHt!1Ia#eA6q)E{;``AcPxQ zOayQJX}%w&34tx}G6=+ihC3S%pm8qD-%r&=p-fagzayON)AJDM3^( z*xN+;(-UWCr-O<>8uH7|a2@?v*^XLiRw{Y>0upHSlV%lG=vY)<)+q}#5W#tHSs)c= z-#7?E6w%(HhzT{FzbizZR8opqov~WBU6-GfL%WZt`|vSr>C%)E)EbX64XtmX~&1qxT9H)l7eA|B18~dNp7!G3M&$?4IVBXcefnZ%~Tqsv3=cR*s*EiFs^`G&9a z@Y^c`xnxNR`0|7v#9$ue9KXRiURlAhi;IChxqQPvuSB$m6Gaod^9|owfyhnKAwf_} z$m8`ZmH`#fx!ZL_|GpAYr;g}3PPB;&9-Ev#e3W6Sy3*Zi7SH7z8=B4Kd~%=yU)+g{ z1lSmjOGGzhi%*Ws&dkk>&AZg{NTk?F7r)DO9h-ckr{kOaP{7riKE_f?B<~?)ZxFjU z>O{Qiid_4$4_lc)CX^t)+8g0v#<*hNhOs!wFhl6gFOPrKgJq4#v^ zJzaXwZoQ{l@7bgCxZCs|y##K(1a7?qZoLF6k_Qr$JdmK|fdnNFB+xvR2PF^kpybg@KzUHY=p~>$C}H#xP#%;p zdI=~GGz{f|=4o@|4p=D<^qzLTr$g`Q)O))0p51y+x8Acy=W(~`J$eb;9z8}cfm<(u zTQ7lIFM(Sxfm<(uTQ7l!N#N{t;WhGLsZGFBY7=@-yWZ2G_jKw#U3$-My{B96*`xCy zFG`WR-FlBl@6k(uywHWwOMtx4Ve}FpFLW5a1jq}9QQ8Eq(&_4h&I1Wb7)Vg^K!TD7 z5|liUpyYuBB@ZOfJd_6|5AvYoK^~MmdI=~GN*KKalm{h@UINO45=Jip<$*k4kJS%i z9Rf85T8<>slEVTE&3O1R439ZK@c_YaOq@R^%kClU_R`fmS@sNJOPxF0VP!>eb`0TK zKnAMmxH2&bjk)|J4-PY1_T#v9kvW-B0ZYW!?!(B8nVl6o$xtY#pI-ihD4nrp3^M-4 z2XV0i+lOuVg|R28?dA8ULzq^Qsj=zDnyuURz7Tjz=B7_Qx$8uv5UR&RD0m7%Y6D}b zaPtXrLgc(?p{NTxaIsDf$4Q4uG-D~4Oa-tF$Ej{4+Pg^*(N14nE?}WuY?LHh8pU-S z^1d=kT)(@F3)FbW8~^L{)MvwgcJ0;w(e(Mh99%kBTz`U?H44}~CI^o|BxiM09if&E zLXp=Qg!-nc@w>W_Or|EA-QupGFb%!ZDd?EqDdeDPE5S9+TzqV8Gr>Y!}-eyiR~>Bv@YXk4gZo$OwNV;vr%nt`5ed3GQ4QjC%*T z^Xee2arrbM7*BYKNcF}NVZzSOme7g|7@S-X7ye%2My|aJ6PXHuw#F!IoS?Z+<-s$V{UW^-EZQnA4>MfJ*pG*-?HE;N0x&9+O!cE3 z(_(tgMsDbp&=2&`LXEto(axv1?A%*RFXdV}B{@M!C@B7mi;M=l4%qf!3{Ax=aa7No zX0}lG&dufUd`fK6=|Y?SPOz*sKh!{!5VtoCDvENN`Q`aAeXJeoVE>! zxiuAtdmDwGz5C&k=rK)fo}>b)sNzZnsQ*YMso7d-2|+*5n-Ni1|1d~rIZkgQ4sj%= z0SNUhIJxf4?8__NiKE%PXp^9TcedB^NERukJ4M(_A#J>2wDIARHXhVlUE`!TvxJUh z6Rshd_zr{r(5Ndra&UU)$W(50JU1$Q07hUu*t|(4aT5y3Y$X2dA`dzEw#fA8&Y7{D zBrB=+IipQdIPK*+jN}pu;nk$=v<8b-?IiAkijc$>DsEn%9}0$S@>yCl~qX@otztS`3}#q z>?PGwdQCz`Z<*F2Cl}>i2LH2X6Bbk)k_T6X*0P&CHX_&=nw*}To1i*YypCUv+x!Ua z{;_LbEG9;V7B@OIGjdQU)>2M8FDIkrylk0k|5bD{f~!A#VdeCPvDCg@ucu9Z82Ah< zCVC^1Xgce~fw8J}&M%&Gbv0XJW`1()n2VNT*!wP3Rs!H2O{7P;r!MktrbO;3C&yV@ zF?zE~Uc*vTB5yAzM|V)%dxJ`jcb-v!O5`2ob~} z$h*qPah_I;yH)b~GV$KJkB^j@u!H--b*QwSr(p_GvbV^zbJ5}=LGVbN2O2?$d zNV7`rC?hW~RX3GtbhS#}Qbt~0s&r6V+}og%JB{R+*%%uios<^$Sygi0`6)@IEk*-5 z0YDzBRms=txdUsg1Oxy%Z5*+i5lr7&t-nAT>i_}J<142FPb!=9Pr|N8B6NG0cS_6! zm72v=APfx->^2Ad(2M43j)dGreuK=kg^HsdC>JfteF11AbCHRb{8eaiWhaHFSa^)g zMbl0!RY-R>BzXY}CPES!@5Wu84C5C(Iv<)Hk&eu|g(5G14FWZMGEU-8_*0x^$(2O+ z%VA_agr+E%t;#~)536$H^!1IMZF*!(w9dj@#P~cMWBV6C)na zUo3|RG!&SeyO~`}Q0_VejCUOz?5;yZ3c*C}zwJN_=5U9?Lld?v=Bb9;55$>s z%~Q}}PEAfw4}*HcBIaNiE(xT`!b6n2?D~W=diel!0(e(QE&)$}`a>S*yfR9EDf@5- zKr1k%dU(U~HtXuzdGd7@yY z6iqDQ%%%E81Qs4VcSfY0k?i#7R8A>UG$B`dX7-?WmL4~RE%3B=LftM!PKH95C0qqN zrY0Kf`L-(Kh5g*V{7^DClAF8}a|Xy6w}6a~#3-|ond#}=$UH1YEn<{Uh$b5KCvbuj z<~}s0GLE`H#0_s*vgtvgb8*ryh23fjTyolla~>CMd$&US3fuR;qq`P)af8lR#Jw4Q zhen|X^%@;MFRs`5E?&qWpIozYcJ92Likn5mTm%KzAjC~Ds6x$<&VBWyFQ&{!>39jV z(WEqi*{E`V1{Pzm?L0J41AEzRE_~ed@zAH8J{|Pwq)!)pcDwTA%<@U?FwI1V^H~Dv z&V`BM_gBY`Mep_(_t#70OO8Y(or$B1b0+oWOm<%i6Dwz8Eoahw0Vb_w)npatv8uA{MUD~6xVvFl z;NmM#1834u&IB(pUObaV&ZM!N$tBf78)srGXL3okkaQJMfmW9@xujZ%ttMj9RLOt%|1PJQFRgiS|mF z=|u}@qCrFDB6E$(Ov^Q;%$R5aO|)0aOcBlBBBug=E*iOnJc^Y)jau~Me=O=S> zt|@G%gVogJ+&nSL-kF`8Vtebj_)lzn^p=p=F?`myN;Kgh;>F>@cC3XtGmX&@;Vl-DLBKDYXxDdgr0mw0#1^Ink6Ke>Pv2JIxA-3!ycf65Fta1*cXd_&Dtro>5m>3Cd-E=g<4BNbK*`mx00wo)pC zd8!0suwvp?H5k9SZQ$HqB^ZMh!#AnHES0f!R0+ml#hyKCu-eLComGM{STRb=SC+QA z%3xhpf-zXp=TU>zR|eZ%B^ZMh_w7=Hm8;$&v%9MVW3Xc2IyKm;%GmZ)3C3W>_%=0| zSP=}GBo)QYVa3puYOsdNU{z`fbaB9{*y~b*HC6_zQcIx0M8P7P)L^#CU{z{~o7WQW zdNtVU%3xJ$3AA7+w!LfBU`>_5s?-wbPf;*`iyF*c8LUbzfo2T_i#4gink$1=Zbx=)z$O7rw zI!{-<&a>O9^K`G$d2kg)i`3oLp!2vJbsmpR=V@Q9^K>-nJe_vtu?KfyHwX!%R9XF! z-{a_6w+5CT%*{@*`BbBD51yHOeLYueIVNa8tL3YTs*4V2uSVHg4QQVQzv@JqdZ zM|=&-b#Yk@YW@GSn6h3g%X?l$7SltLwAZ`;RG?P!hPkas)ndJ0aC*3s)YV)AT$-I3 z$<58p%(}ee^z(SHeDsfDfSKxtlRe`l{cU5vGs!ju36A?Qg~IPRrll+3~u5^ z=)vU}sDmC56Gg7-T4>nS}HEOz@XQcL2PaVR zZm*zj*Qn{%o{_qvg1SSarrTyl>dp%4PK}yw^BJkTDyX|OYP#8Hq~2XYy?X)%)iy9H z`kbW9*5|L?Z+LGuxSrYQBGtE&aY#J6#LO=4wTk!Mw+e>3=+A;6Xm0xoZjf=BZ@ffL zbHI&1-+2ipA30q5=1an376s1jl5(2oL66IMYFrv03eRkj#+#U_N5$r7+?Q-KC_LdF z9>F-;9wP|y7u52V69GIwkp9x zbXeeA92DxxM#Tka4Vf!=dZcPRSAtgZ^i<*5UX|xc&`O@|Rd{w*<+&2Hl4oZXo_nhD zTnSpqbB}0-z3Nz(TbPZtxnbOczKS*m?CrtA9)mbHf`-m(_47%(_9dsoK{A{j>*~T4 zNL{H?r0wR%T}$Vd6bzv9RXB5%l|9M2V<_g?%}I9RfQw#I z4U%0GqxuIb8WD%l9J&;S%mwTE*yJQLAh5f{ulvez?XY*wM#sK8ZxP->zp9}$I&j7A zDx)e3#ZI(YD7O;IT^0&?8Ft&Fhjbak8o_`(z_%Tup{Ps71!Fow9vC2dY!V(aVQ#Wm z;SzdW0ce-wlS&Ez<{*N&Y72BK*`f8M&S@xF!E ztsHsWX>87XxvI8^FPD%?}28Rp1k{6+fbD9)8ZDq6qy*H1%)%0hxc?14Y`n=SJQL$= zWphxLXA;_ki+NEeoKE%>tquWA8s{4J)~p@~9U5oH5SZ~Uf%715Ve<)UHr}`93aVx~R?KZW5X*pMObs5guC4U%_>AOybMv5R6|-w5l`3)TKQ zR@cFdq=s@vp^g!dHA$cp7Oqt#iCZp8l&Ir!5{1QS67LeH@E6ZhmRuxV)G2z?{eJ6G zgURG)$09^;NcU@@0P~o3g!Z$!0@y_NCoWGdnc&3WcC`@qp=UZ#_DRd+}-tY8LBU zmHiVaroxi8xF&Evcv!+P5B8Z=8DXGX*1U7#FeOhs^wa{D7 zg=!&&zvO6C6nUhe z6e!j%In2i3QCYgw;4zCXdb+Xhyn#o*^K?c0xGsi>{kZ>z>qOOL*{vJtiC2Gbtj)QF z^Mf88?zT7lJ5qr*Z3tZmWA#>+R{Iv6Tv3l7FW4Yg48h7t+%HdpHvwLbOZ&@{bi6!C z=gW}DcscLoNnS2ReO~O~T{uM`xd<*VmoJf^AFHd1tkYLrvYc^=RTp*_v$RM?-LK`ub-$Jqx92sS zIGo?VcE>qr8N7xQ_gbEzxL?aN6zG+_hO6akd4>WVo!4;5y_RPv(06(bm)vW4h63HO z*HFprDJg(m;+9P*r27?z^ju=d1Z}f&eYJL{*TOb>_%TSbt=)wkBWQ?EOFX|nDjg->kVI~wS4 z3AVbH@uS1JFM#u00M~v2T*n1)ofp7$T>!Vc9Ot6+$-Z554zr7nP;io{OJt2>i=KcE zCWwQLasf}aA{WGy4g(L`S1;#LPJrApMq(hK6N{H4sNit9UQFz#moqRVgEq{G-~!2z zg7FF-1}P;O7k6GJ87TP+rxV40VFJ{F3lpFsTz~+DabX$gEaie6Kv0p_+w^%&#|XP< zfUm3<<#e8lq-(!Ox{iya>%2(1u8XAGeUWtC7fHA0;^^FM7fE-K<>9`_@^D{ddAKjK zJlq#q9`1`Q5BEiuhx;PS!+nwE;aRCX4E+S1D;qoA8pl=o21I=-h8NzkmWG!VsLBSK z6{yOFoE50b2A>tE%7&p8sLBSUYE(GJy9nt)brI5oszQ20cf)d(&d@8nCEc*yZ7dnX zkiKVS9E_b|{414}KAgKOjRss<$_%)&^cZkuWnjRS<-A}VvFY@gI(Xwyw@Y6E(S!3E zzboYn^zEuLcp55nIOa{14H~J^rN!RJ!&{52*CHFB{N#4ZnPH`NNuO&uPW=Z}qC~gV;oh0}p-P z#FV)T3!gV}rKdvAPoMtA)c2a7_=8n&HNJCE^OtOuaCBa;Q(1JHzB1ud?n<{HyI zh5J8jg5nnJRx$k=DBeKp-D`PRrz1~=LvtTeWvB*5H^mkAXgwibhT30+13Lz&VMBEeY(u+}0|y&9Y^=_K?HX5d;9w(%P1QNDt=UQr9BkyUxjF~7 z|5?d_gN+<6ug-yOGFEcnU?T@tbq;JNuaW}?8#!E2l>|*BtLs8li}*>9IDqzT<@(+#kT4k zs@F+=icluQ_Uas}*GXLZt(4)K>Kv-qNxmOmCd0MWIaIHcxC&e;!*x|T@GabmI;nt- z^lo9MICs-&WxW1eKm(C1P(3;i|1+JGF2xv`f zB(N9>XxVHeuo?+y>24&j8wqIXZX`gDq0a|ex*G|4j0D)o0RimLk=`9s@n?8aA7|qU z$bsLeXqNH>Xh@oBm5^L`4cWkujY>!oTw}w9)F>MbY`B0L(q=#|7^PdykegIRL0&>y zP&}Ie@iZ(i9t{g|fxYa^qbWZUfk zn+|i60kc|%x!Hhe(qV2fVC*`~tqhZ}tA$%u_gEqEdk(CkvZB%XS%K*MtQd5DmianA z%W|EcWwg%EvRCJ4nX2=%tkn5g2I~AQ+jM@GSvo(RY+()~w#SHVF=7{tSSQ1l`WD>UrOruYs>JK zGW@zSytNG9%J6EIl{J4KLx$g}P4NqR>&ddGb~ja>chlV|*o(zg(Wqt;MmQDfr1Lev_@5H+Axqh`~m>QQT`vZyiRUmAQ3F~vYBoiz9<_!liyEt%6{6NKhNuCp8a118R*zakl|}7ZF=`EC zh#JtUQL{;D^{6#eS=3jo7`28mL=9-QsQC)3YSblES=3urj9SAOq6V~T)NI98J!%bA z7ByCGE0nc{F+>e$)u^>DtD+<2%RQ2+Eb1#)j9SAOq6V~T)LNHS8MTHgiyCXi6;iEX z3{eAGHEONPs*GAgl|_w3<_b}37(>*6R*hQgvMQt2P-RhLb-F^-8paScpjD&Rx~$5m zHB?#D+gFTQ!x*9lv})8^msJ_HhAN91>){nrtzisN^YwGZc+FSJ)f?AJy%`qLD@3hf z3{mricV*OCmsOc+4ONzEtiV@@TEiHk<}3D!sQKEwYN|`9vZ%3iUmIB$MZ@U0@Ls=?i&jG`xM&z1 z7v6zaa8Y{cDz&bJ(Q#pY@e-|Daclno-l(H9Sv;r*cMX~3<#)un?k5hs2?_9 z(H72Rl!soQ53(&cjWEaw3;XK8$x;a5Z5DR3UL#rACKyEQU@PVo;(U4EK5CRiDLVvhye2C?Mm9fQ%o1Y)#|W zwPM=MWf7Ih*Tu~{2>VZYub1Sw_O5D&iz^R8n~qIYEBVwgxVM52 zUJ3?1D+2?cT7vT|W+JMh1SHB&6{JW_pb}6em0}feMd}K;B6S5^k-7q|NL>N16_!Xe zdc?ME$RS!pWFY+|KnDZViFGQVlL6{s^92;nRZ>bGG8N1d&N^7z8Zy~;3<~>CZVM;+ zWxEh*^0mo+tItgz4}IEXnY{RT@WE36pc5Kf7y9?J$47hn2v8#|EYyX)lGlY#3?{Dj zMd>5E`u%|z-XIP5>64-l-X+D4ER)-ZPc&ib@0WV5zC=rcJj89w>@G{c~b~eho6`UpR_fV2&F8k zL<*lk$cs;kKA`})@bMGOPcT2h`~;IJgiIl#sW!@;Hp(4*qA53dkwub>Pc-ErFEUG# z@ri~&91Vda8uD0$ZeJ>b7vbt7RFaWEFoKUP;Um$f&xcRkZ%TyxA=Hf&O3mtv27(s+ zPg!t~h(rYNaJE&j22wCxj1LMh)rJC0wY5{Fh@v9-JJLyfkd3{8z<|jgmy)JvEDDAmY5zYCwB%bQC2TzI2h@+Yk+d}=`* zsrRR(B*DA{^8)4zrF{`cuPhCi@TPf(iC!i*3AHlbD>TXeB&0P3Q{FyPG~)A{yizw9zNkgRc~` z;}gLr9)mX?vC^x%Jv~yuAGJqif7lh3k-n&$-e-==A+&X~9Pzq)(AmV&e#sO|L%L`$ zT+v?Ul2g>`WM7i<*(%t5DGwm^DM^x$P|0say8YHrBE1hq3gtGq{ix{uczFT+!ENX- zQqf-I?d=g0U=qRL3iy%VatOTzRhIrx1c+#e%7DCaDh(JO1Tj8>2?nA<7JT9su<=_# z-`d}WEELaj>6@dSNfwM@n%-f4LsSa^w#SB~28L1?cm&2d|`pxzvxJSfXzL zKap;FX3UEBV94k7%PIVX;=UN{+lB%uNig!GU#m`o12ByX~fK5qJW=+o}nZ;B(B;EdPeXUMjH zD|wgk90di#M4tlYCn;q900qq-q_FuZ3Y-^zOR=48StKgR&_dRzApulFT9l9gsUd55 z$f)eqLe{Av0aQcQDC>;s3rr(zgYm}=sN`G87tI;>G^nfxI&?uWU%E;|L zjnd92TlxdHCp1_yhsgn{#L>ZXs1LCyqMMmGltVrYluBUani4n_l(^tL&nSE4SV}3H zS}qF#{k~+B=Q-*7@;qPT!=R)HUaQU>olf8FNm(UTI5?d#kSY?@ib_p!`eLbw0^}eP zQ^G_>5fc+lo}Q@OtJctZQK_NM;Omg-JS*!(rO2HyxY@4&SE(uY)ynBq%2e2EVZ|<@ z9#IMkHw<21N9NG!ij=xY#wdGx0ORcnsCZ=GZ4GT1=bDrph$%@IMYR$-Loq3f5L ztqEi1qmgPE;+Om43h8Q9P$zn5wcMIiU`sk4RSTF^11b)0x;LSOcBq8cqo+@p^Y>3= ztcWq$Y|i8-$bom^Q^`TwxahR*ZPPv4Cwz?!@oV*0whH?qH}*`Lk89pL|aZsgDm?lVr^s8yvnMMnh$T!~1Nb zi3Ufx*=G~KTC%+^D)!lFS zVf0+UM4QVA1N6erP26_;IoOVOa+%M;zI@Mhrenf`lrGU3_qWBk(-rr3D9#;mf4Ac7 z#aq|K0>K6!(A`awzUkz^&4^)<6;kezXRnDDH2=to22i*Yia&>f}Xk8s%-*^F=u`S}reg+eq7C z;A@Z0qp)YJt1LphH8fZ5wKN_4P;tFi^3xI zDrrt$*gQzHa#)kC*rkq0u|RQcq3OgRO-sd)Xu)G6CT6soJ|^eoFnf>|3abZc)wo1g zw%3W4;wr^e z59Hs#VlRk{Ijvla(EStu3?}xUI@NE+m<4%^?~;IBYls3=VNdA z&0l*xrnx z_pbTZ2R)kygHJ5BJ^07pITiADnoNKA&TUt3e0Xx--zA>?kAHgGjo&Y#pP!tWPWHwH7z+jp zdjh^_udKujTj>P!P94b}o9mqhQgGPKqREz;&5j(DW+tcS1;=Uzm^nN$A!SFISFnYq z<@w2xgU1BN8nbAz;koqbgTN*ZABxS49At4d+N7Byx!K-n4Ys^evMLC1p(KvZ=cY$EUlhc!j4j+;fX=AzR@%af{ha`qXts=bhebba}BrFw?;JAiJ zLg18}&CjADNVB=o+}y$WnY{Nf>en>Np9vz6ZE>rfGMUSc=4PeY$(h;7d5E{kEY|4p za&F`>VR)*Mb!M9i@=r`6+gT+h>H6}c+4-FBSa5o@Z!R}G$9M@gdUrB-6kI4HAlIEF z&CImmKn*k0e%^!>czSX+H-)x`R#6oWv+ydMmAh~1aBd!1F`+^kca;m;iVA0Kh!S&1 zg|v_yppekIRTyi2(O@v>Zr{_P0=d9P>FLrrKdO!jXE}hiRgk0PsTm`mzNz`y>~Qv& zfu2_~Vxy;LwMsseot-boY$Pe8)APCUS>*DlA05wZR^`ZAM0|2&b|ybDGo4ex=nO>G zhI!#J`Q>>qKb+@X4H|)3OsuK1H?LxNT{YzPa0-DM{3v76JBx~ii?`w28>*f}3ag>u>X!?S2G4A7q%)dQMr-gruBS%PC51<_Yxr5%)4VN_8A z9k0TwH0W*wTQB68&y7$;3(d^RM<(Y-Cg`D9RZ79(GK)=UzlZXNQ8*(xN~K!S3n6m_TQY~5ekXc--uvXJr_k3UCTawQd?Y)YQ=2dE%aE0RX%2%sZdV4YNLgb!)xTKGZYs{CsufM|A>q3=$}{*pHWn=YvN_FmmQbgR`?U5THuW zPBHN|MD37`GfrD-WRKF@XjI6(3zlHr>p+9 z^kjGv0~E@;d^}M`f7VLZ+T`$n)+o!WISWhO(Cl<}O2$KZ80dMj+0a69@Qxdeb_TU+ zWM+Drw?kzzQfe`5%tgNoLA6p-$3nqIy8xr3DBC&8K(vpU!{eyYtPe{~9LCT$J3KR` zb+oJ~(v#DpGe_q7f}v<=a`q6lIX)-}4p#5AsaJr_d-xE6>6q`Bjw5T9>o7~w;!wxC z7{;zCHse`uLp`CAqDogHRQtXwS-DrEKyp2(QZ#?hkptJhS6$h zK7piNrWc3CTJPK(Y6t7qt^GLQaP0GJKpJhxarPdzEjZ17(Y8u3Dw0EBIwCl(vS7wa zGd3DivWlxBu-%NAFHPtKTV#@Qf0G&Hqq#iIJTTkDG^1^x513Q1$rv%=gC4nhr>9VnuQ1!<*`t$( z5T%rx9V7A3_)(v;Q{-UTXuIt&=DV1BOlHTYXXcP%jB?kArJU#xY@LFwOR()0Y~6xw zk6?pA3>yqz*xVj^lE_9`g;8W0|HsBi6+}1mhR2Q)>$#Cx3^B~38()BPTw^K4i(j*udZnvi`0b51@%MpdGDCWWBxg5@u*I%q6K z#-Z8JU{;ccm5*ahjhd4XNv*wP%u97^Xf)TI)Ly;*m|*RX$tg$3+KlWCpxE(6^6*6p z@kJu>MGe8&PpdQ=4e3!oQ7SIVcn(7dh!zT<(&LxvK7J4y)rMAeB^RM^$v6il^aBow zUTC`Egd0bS)Nr$NBa@SYZEggWnAR6o3CE0%)it)mSbmOSfjK@4Sn77k(Pg#eF%z)m zXYe^ZF`5UnL;Qz)5Q%*FAs-S$zIFj;b6Bc_g+CN-t`S?UQM`EBY-tco)+k=3!6_il z!IQw8bjG)&Z}Ya9aD0al%gcqeXBG!(Yo6^P;}{O^C7XcFTUyr+(iy8jo4OfjBxTtz z9=tDH@n}{Yog2385XJzbE(+Vcb7S{DFfvF7vch;Vu_1pymBdJ4^O;8malYC%!sy56 z#t{Gr1_LVv?I!dMf&uL=p*>a5o)Wsf3c9_7?x=$9D4{#6pgT+Gt}5uR5_)$P^zIV6 zy9&Cygx*sHy{ClsRzZ79XkQhyuY~qjLHkSSKoxWV8~4NGNf(fKY_ta~4z-It8u^buc= z##d#vgMt;-oLS_xHt)w7JXK|IFtEf3T%Be6D`ttquj(v2UNK9kp;fSq)}#4#YRxat zvk1p&88~qo^8htrru|3i2HZzlZ=`p?eOB%p;J!xY3o1Cg2nWi2K8|w=O12YEoZBPI zyR^hW3s)=3b~XR6W%=Kt<-e@tzcKf5++2~aSOd84u7PzL;z~V;QaijNs|sOsBvg`A zMY4tZ#q4sam&ulTn8K~pvy}Q2xJHm0!}`nEG$Ssr4hj zEJ736 z`NSRIrH01HT^1S;l!G(TM9sy-WMc7PJV%BaBElG-XE6XbRwV)@9gV0)%T?1*DN|X} z8z~s_ic+p7Kau`_kopt6-z$L<`Y!rm@eRF1XXV|fB)z(tHIRJ zM+-MRI?6hL$x$K4iYrI0XxNa8D8$)e%EsInReeSvj21(;QgFZ#Egf_NNBy7gMR7kU#xXLYQEwrv$G+;tLKx#54X=YZZZGv7ftTf z4>)@wSHB@3$XDdwP#7{qBPuBi^ZDEsdVvX2#&ADyw*dd;_UHz~5 z(bm`xTBYG<7QV5k_B)of^TqA&3_W70Kit@S>h0I{{K~R)?2gB8vD!|)Wg+~q@Z|6g z`FmMubI+CIAKIQd@tz0nJN)jLW8;BG-nRYRi(l+`c;w*mr%#Q3HrEY*rqS{i$JQVH-P4^@Z)m-u_X_FX{=42= z_m&Nx?rj)9Yz{9kWz4-VoO`b=@%+I1pXq+o^432roUXG6PleyJ_O4y$pI!Ygb2puI z-JiGgHa1x{*L>=l-&>z=G5<$r;UjfTbyLrNx9$7CJ^$2u&P8v@oPX-R`upGY<1cNz z{ePMNVe{(w)8{AeeUGW_SM?{?|7r2&pTB*z|CVhV*S4Ja&%*aj%ef!ydFmg3cUQda zXXn0NiWyWaVHxZ!jMy6M-uTE6?8XTG(*_lmcEv@>+qpC0|V`{$p#`JZq4LF*4Dwmi{lx$B8v z{#D%*!*^_dJpUJ_j+d4n>O5!rsj2p^aNV8$lSh1}7q9$d(@(zm-H*8*|7G3zYZm_8 z^o@>eORRU-(aTr8`(1%A-5>n!yMOEQc^iM?`ogN;T=x0;hgHT=SrC!acc^)KyrUw5kW;l=+x^xe^WKl9$~ zbnvm|<&SUaUf1!CKmB>%hX#IkZO_jhyW_-NkDWU4(Nib>*YW=DXU;dt?!^E8n}6)d zo_+enM}O7&+=sut=Gxd_y#2cOez07kvxI zKK8q7+wR!#ZQH7~&;H4p%=TY@{=px8df*Bq)A46N9uEF!)$&+v{{JlB^VjA#|NEb` zg|9n$%}jsCS3S&|`saP98VPh@U8^@9C-|9j&v{ZH;YH}cl{7ki%n@|t(N zv~0QMh4=pOU%z?c`dc%fPQP$|!%yGy-5>t_);G;Mig$hd_(wf^pI$fozEieCk9_dK zpFDHo@5~=v`tq8d#qWN0@Z>LkwD9SxKlj4&(BkiZE1qBc!|~wU&_|`St|e=vz4mK= z5TAc~dHIiP2UZ{XtoiuIx1K-y#HQ>=2Y&zN^p5poS3UUgtHtkMx3&$T|7zhoUgz!u zpIEo;x#KrI_rPbK$|MHbrU%a7|C_d-Ek1qY+aBt#J67|@j~{>R!QnS7eBsx-e)j%< zde_@-8~(zt-uR!lfB9QG{7>KQ`fppqV}DrwY}WMFU8`Swe&N$u(=FrTdpE3o?1km$ z9ur<#UY;2^_uV_+_~~4B=K9e!9pBvReDOrC_4rffjc@ta_t$;lJI_bWb02x;D?fVP z9RA6s)ZF;novk0=@rk$p`Th58um9z>FJ^wb{qX2R>E5Sq8GGSvxer-qZvR_EYa~z977BU)#Mk%YXB|XK#M+TlFnR^Di#n+Wmv zrf2T0`B$&d-MISl1Noo)vbB5ZYa>5<^8D%V7f;%r_1C;@@u;|`qitX7dg;O49sg(f z^7WUWX=-r4Z+6QQ*ZsA8y?9 z&fiab{=WLZeb;;MufOXf@5(&k`_;i!Z*FnE^vPBKvAle^<>*^a9sKm@Ke|4;@$<)< z(fYq5gh%cktNHS$7ykX*&%gJdGtX_>{MF6>xcQ$pKYQ2HZ~f)l)?S%-!?#X;uye@s zz1riiYY)Bq?Oj_xlYGO`fnR^=D@U7JzWd}8kKO#2C%?aZ&+G2p`r`*}&;H=-LpLrh z{P17SOxbzi)YXG#=jPCN;G}tmdFeF^Dq8p`JrFl@#A-W^WY=bw|&9x{`)Wg-}b%)JgOr5 z_ugKT&h1Y6Ch3F#Av9sfIAnn&Xu#f*?oQH4lMWChAL&klM#rUPQ6liS6A*%egl$Ac zxed6CIu1I{8@JIY%AyX4@?2&dCkW&IA92JPaLfO9>UMV;(j6G*&G)|deJ@Jasj72N zZKtYEovJ$ZZ&-cXeY-#2aHel$_MXIvfg!@R-yUr{`mp(~VGD*G z{mk>rf|ifnRhL$|3vNHsmaSg(>W}wmUmmsN62;;@L$(I;etxauhUMwv`herL7K`an za<1`_hRuOT&+w!DpC9F4uIqfmrXBLo@s76qRTZX`ic!YbPA}HJuXvOzIAg5eGsOKs zj?Fatnc4i@lCHpyeUn!fDi0Mt!#4{f1;yjzrc2evuE(-p){C1Ha*g|^ZPUDegMqKJ z@4eqx|NYlCV`gj8y3RK=cbm4A)f)4T?r3~4W9QXfM>90q@AKdAZU^a_ZyywF3s-6m zoY|49xaqTZR;{jmzQNq})S6lDod%@*k0;Z*mvm|l^xZPAv*I48#qdJ&*+;At8u^G- zg3$Wam?yu#JTax_g_oPZ{&>g@-{M#ke|-M)AO6wuC+EtgBkSy?oeFa)ueh7fU;OF& zj`C;r?D!yQ>Z^U`X@XkmKXuDBm(H)*IsVi3&dOVln9VVcL_s>zxa-QRQ?&v_B>B(a z6riOlftD(Ca1NO)koCo~z6vMWp=iPqr;9$tx{dh?WFKAjL|mclqbr{970EuO?3*I{ zm|_c8bYvf0Jq2d5>`Rb+C9*FOs;qPJvYV1N*mTf4l`7Xk=>&g1Tpn%#Tm{@hxJtN1 za8+=pz*WPY3O506G2BGBB{53sM|eIfBtZoP6%bTNP$5A@1Qii9g`g<}O(ke5LB#|W z6I4PFen`u%!MWvgOCld3GpA_e9b@NpZP+kdTu$4tbY>uQpv$uW2RpbloD@+eyXsvY zMEb75jtY+cEC_GGv%@lUlmJ_p2XJ&6g-0tWD*QiVrDI zCo^SaRCs(Xy8wmNz|>cEMSU#m-f3}UNp*R&rRwnFXo8yK9?R-q9BupHc6o7>EZ!zB zj@*MUjzn4lV zuXc8??AXcGzO*QBe&A&4=HHmssb-`vJ+Xh?h?!3XK3=5Tcs%Fob-TKjm+Jm|@$u|; zKQ*X+*6p2sc&@RpFDvoIlXvi=)<=*rw-WLmWhTr{Q?)Dwu_oeyXx8ED_)+3!sWuKO;dT`~g z(my^_aQEm1kG%c#OB;JS9KfH(Ew3c>Wx!SJS(DCPt<(iX2`7ejL?_6nD z7JusB_SMaQyYHF9S>Hc*?8RdhHy7GxKg|8+9d5+f<-OjUIv(WG8-6spM;AT0|GN)- z2gcvJx4BuLv$(AHg$-p_E&cYsUneE3?%w*9l+gUioLl#nChssU$9QvmTN!5Zr0k!c zIJN!5uT_^do-TW_M)%-X*}ccMZ{3jIqxf)1r`|B*i(tE9a_aT^ab5oqmHUPsJ2c#1 zQ_!RQOw3=Cr0>x84n2{*;`M1o@86Jk&EDRP7YFu~)+*G?hr6>zUf1(o-(~M}?|jYw z?KJn#<`+}+8%lb-jtx_;pIR{gT8nMzL+!sSsC#bz@Eg}pyFIac!Yjc~o6|?Xde3^_ zUl!{Olj>IGPtF{bbA3GT^R&}0j zM`r2v!+F_<>}mfMIAI^_Pb!-dP#pNDa)mlO#y2M6kDEIW3p19#*w;7m`QFz* zU+{;-J4&y-;h8TpPp41J*DlO0fAO?Uc=tKA_t)Cm-26kSha2+svmQKM_su@>*ul@H ze#XD%ovc{h{>tA!o%FKu7l$uDVp+8=?Td`hXYI33TA8RDesSF@d*1hbeO>CDq{O5-_YU2WJbtC4v2vO4#Ui11;+eHu9+#GdAKA*vF>g)Udspt1jIB=x>^ue7U*8HM#=@WMp&OKEPv3=bK&n{oNpk(gSJ3G2J zBs_ocr4hGJ9^L!wLB)Lg@!zN~z4i1n2~|PYj$!LB|DkXAmS4_%!2GKjTZa|h7~J!e zHeu_NdFx;6Ftr8d{nC{Et#-FZapvlz1I=^Bim%o4M-Ke?C8J{DbG7SDBb^!sUF$fD`Jtt!=O-V#2U6 znFd#h^KXYt1D9kPCEUUo6N#Vj8tEP~L6B9jZAuVi72HUcB@Zo=*$^0Gn(!J-2}sjA zAk7O*OHM&|6$H3A3DB%#O|3O)1yy*~`Buqsg=tZ<&fYG0)=B(7JL@zgrjB~EV9G?( zPVRO^>)r#!xp%E8Pf?7$LY#1K?-OeuF>kNl@^#my-iK0hEnh5DJ8}Y3YOCM=Slak_ z>d7s`ObybKNxe5GTc-ychZ<(~{Ns|;^`DvU8dG{SfBJ7f8vnrB?U%o0%^b72*l_gS z>A%|i_v+C(TYPCt4Z8K|TbATX%D)E2ADfmr*>t+=;FGT2qK-A~ufLmmt9I#({o=I0 z1^1QScEIi(qkQEe&Dy}}8~y%`-}l+qrcT=TC+@oWNw?)BRwk?}6ZYIZ!Klg{Z#rJ8 ze(NsoTE%nF%=Kih4s>pxyTzDlDd-Z^SyscVmzvkTYFyl@F-%{&?QPTIwI>feZs&Fk zJ@lz+B>zEXb#MC%W3sP)S9!;<;}g;v-YBwUnhZ%fOIlAJ>luCN!ow$3o!Kv?mKB#} zEY*GSOz)z=hNPwM1n&O&E&iT`rLX&^|KK0*e>0)=H(&SqkC)vw`l4BZ_tHCS(q}B% z^K8$VQ#$7fy<%#i^}D>2pZN}~q3P!^O+S~7ExU$IKRc&y2psFXC8uNB_QX}=6K@Rk zWIF-}&nRx10DT*mGxpGt$}3lwJsr6CyWyrp{l^I#*Ut$gEiQdL$LKQXRByfYb8bdP zY0276`gJc&`@Ef2muBOM6H?%khfkL+d{{sIzAg4+kKCpoHKTUvsTmVbe!1?~DHXrF z`?w&yer0Nn`<-j~ZzuL@%C_9JX@9rsn|m`&{E2%yY8B8H)h6cb-5W#w^~kN`7gw4O z9ZCPkEY;g*j3;jIc+dyk*WUIgmghZxb``IsFee1Trw|;Z;Ut4|=Jk&elwcnN1j;h>#=fyYf zFLby^U)ENzrT4239_Oy_>$^15`@QPLq~-e+*{}Rp$tRWNe`}bK^2pOI=Is+cx=p>h zuP;N}yQJr$%(fr<=H#86e@EaiNk?u<{;#|L*Uo1XwhVnf@ywp|yf=5PzutLl`JcFV z|K9h)wOsYk7p@=PQ!9_BQzv+KRj<5!#iXfMR3Cit&`r8Y*DM%zcT2|`;{I_%`I)&Q zKlg|0u?Sb>8ZT1`nw(iJb(q{IAH=<0IlR;O5*Mh`6Fa%UP$py2kAnVCJH6>@S-gS!B?LSezmW~(8e z5hzA1K8!dUisNdb3rYsFmR$qX)M4i^wKhq(=Z+jQY62VKd;%93mcUKq`rjd9&pECe z%dDPoFhqjCAsjc9n*iXNC_FnoMM!u&*+yZ15xnsih}U{9UOTs&GHIA9Ti3d1)7HjX z&s>l8FNqSiIpoT*+nuv@nVb@bUN$$9Ss2>drWb@nb5cmU$6>a7k7br8REMzeRb&&C zWb?t|RtRoEHLpWYu#!{PTWc*aRRsGq78sW>T|QS5H| znHRvXna7Vu5J8psU@r{&@g6HL4vET;yWE~1Zq(>-dc`wVI6cP|4maacyE2>)y3`(u znAcf8%;T)>zn=$H$t<#VVQ^*1ZI0S(O06|$D|tIFaw5lzcD|eIX6_hn47k9~Pe9|6 zo5$rbH=oOA?i6kcb4$5W=9Y0~%-zlHX6{4WL(F}Ydz86*xIN$~JO32-6!SmFJ;z)( z=jM2oonHupY7`IKGg-U@7ZzUlfSnI$0?g%-xFqIJ3NV+$^=sxA0?g&KoR;~u0p|8* z^kz_bxJ)jS!cCc`Ox_r}>wFR{sgdC$xHru1I`dorFs>J~@a`y>+k<U_=Wzd+DphOZJq?y7f1{_N&O(qJ3VRa`)pDqZpxuN!FMu}lfMIb0ab8D- zmVCH(o$q$mnKk%ZD88^4m{T~h!H#J16~brIayT+lMV5GA zw*%p7&ZMSBX~4lwo~u>a>+r-AM8&Ia3ev>ws+!u6hVJ(q4@l{haAx&WKcMC>6i@u^(7B zB`*q$eh%E6c>%YJ5zAsVIgxy*$P6w4#83byf?=NtP>l#~vZs5jL^)wz!0ED^d2Me7 zWqlO$P(iUZYObmixl+5?*#Mv2Y=dbe&Aiq56hJ;?E5FEjI5>ZX|m6)-BSif@6UO5kzf9&eUSSVjh! zw44r?SYukUVCE{)#743QBBU59R3Ki=Ni*W3gSKFbA3al>C>kn>jFp4&$@qwJ9yt^> ze#VA|Na2p~1&~q z`pcW@9j<&KfIH`8bqZ&C(N&=gfW~}IoktqI3`p*}CY%+u;arxKz7e8`yP=V+t~I*J zT2(+2cWQrqWi(?K*Q-dEMM5S9!go*48x3>Tz;XE}6$? zY&*+BZ=6-kMHbHT8%BUJDiAur^o6CuY85LJqL?cz9T;qw+=|Vdlt3mfcLmE;=NTbM zK;Q%*{A(-2=>03 zwb$i?AH58`7N9}~uK}p^N*7bPfZZZvxAtSVY9rXKS{ZxZc*^;1ujq(=Y%9!oj2mXy zZB-r`N4@bX(fn3r3pAKEvN-SFbG419AUIDLAV%}UP^>A!3?W2ZsBsFm2fR- zRau&}{7m4e@L!^!6;fewCPx@6!i$jXX_ zilUU=NYnW0DE^>%95)^-gw+NoC30RNl!n;z$g_i{vt~DEFsVuM>`G2;c)Te90aqIp3`hLSX7pZx|y6`hpYwYevSMIBg+ZtoNons zXcFfg5S4)_pO?C;Wp)(p@Hn8c;9928r?GhIap6&8LH~m4C>Jvs)`7z}%fWt&ois{> zT4SjzC)Y3(C^qh_7-tQOv1u>@l!l|cQmq=pmfm86luni^$;@DlrM!}G{a*UTMUzG{ z=q%9fny5Zc>MwU4R_gVx@_{iPYmJR!f(A+La9d^tbuzUYi?hayRS@Nr$85T_P0&fB z!zq9>BGWU`Cn_#n3=x#UA<)7NqBYGEG}utrZ5{37ogE)8le;|v*uKRpvkP0qiZA^ zk^)DILjrh%Q%$vl*WT5e&gmzl^^vmA4JD0L=v$OD#wUJ3-$*9PAxB%>&>KOHj)?`9 zKWi3c$qhdzus=1C zhpGgD7>B6|F2KkdI$T^MYlu7B$XcM^$l5JPWEiE5^|ahveNlsmp;AL*4TMk_VC(Y+ zoe5GJGxz4Fru6w87$=&8S$<|h&fdJNS>S#6Q8nM(EGU|BmIIZJi?~t}nT==gC~4?M zEFsYjf->YL_?h1u#Ph+4UWpA)lD@l8|%3Z-6 zC<@48p1;k3;GkZ%MW+;Yw6|fCL3Co#5E-w+V>Zb^2GQ;zQ^1X6MwQt$P4`3v@UUHq zrP3si!)E6FxWt(r_2L)gIg%_x-zs4HQOSvRq;wXWkn&R2yvNvdf6@TQ&+zyNUKR|z%XoDR5>yP&p_8iAAgBo;ib7Vc z%`!_)o(Ib1jCL&rN|U-b&z~=gJp|BvqFe#PsKBCsD+EOt^b2Z$9vY)2gL+bgy2d;! zlnpb3@Y**k2#x^@O7=;yGzDKM{EcMyn;O)&%qQq&ECqM7Pf$e#L_XV1RIvPYIXq5< zTw@M(xW;Bs0j1Kbpvz?A$^7|j#0=^}tco}Oe0Wja=SQKKG$$8s{(PE4eL+2&3KVjN z_^ZV7xC2j;dydPB{Z`D`DuB=?#NatZIK1s%L4);T?C5F|NzG$pMAGo4nPacODQZK~ z99WZPiRo}+81~(X(M3av9rp0p!c|IH#!$h?v`m$>vRA|H#>#n)dyWUe3S>f1(U3me zgYS4rhtW~NAr{KLU?Oul(6qq%JfsqDm?l^_nr48}v<#$)@4_?@%V;u}GmN7gaMF;- zzIE+v9iA4!HXx-#^AAtia;hm0yj0NL)*UX+rf@+*I~Vrwr~C?5U9tH|s4rf1kAxxgWu(!qjMCXFWk8dQS?QLSEE=HQNWa0LB?3irGkUN`f z^avnPg9Y$y2KX%zKc0!wTb$O&2TIu=iC2-|S|5p5Ge0&@L-Z1uzdyl5*&m75kl)rH zpCtPu@dAnxSKTSvVV;=VjX|5)Ddr5*JqUnEyczQiN$q64m=+?IY7a&OXO&DTbB4)yhyYm? z!&#+J%Ht3UlJgi2qRfe|m;#R-V$PIuTGhzY0-CbkD~%>+FnMi{cW?#i-Lhwi*Xmm_36bKag8U|mIdnz4)mFscwxe&?QW#^X&UL#EGY$ZEv7w!K_+Mtq$(AH zFgDP`S>A=-b^!HeLB)mO3LCBxg~M%vE(GJfEkO*!_4R^*2IHVvEfvbr0X?}Te}!ka zBGmBuR)iWJ;Ua4IYB<(0SWyJiS?+Lkf}ZrE2*ob8uFG;c%qWO+NK`@m?1ckNl$)R_ zp6vyme;I}~4TrZ7&JJx8^jsrlhaspq*;_ArfiK6}SgbA_Yonb_sZtZQ-vi+h6-Td8 z`J{Y^t)yw=ptO_sSz-9W-$;*MF^nbbm+WuzGL$Q2#zd4&bQ4iR%Mn47gYsDn4M znx%_a!YbU+0%Z!qGB6hRRe0RN(KHswIDt4g{ziIpt3^s>WN{FV$WoA;FM>iQXB=se z{)n4WqZ+QTD35l3{Cqjmd!unPu?QScJLoLK`uc z+}=J(&)OU6d~IJJScHQ0Fx8VxhEf)K8|isAZ*Uy*^RmCdixG|D6|%q38%$UTn?Lv# z48!=rC#A~YgZc3o9IuJLewbe*(rTJmc9mC)f zSwi(=5y!SSBs;p0t`C1Je2w%9n-9l22p=*mz0Br?DyuuhfjAOC?WR}(lRX%9&JEWf z+~f-;!0GV?D-xtjyQ2>e5K+c0eH>{n#O4)V*lQSaOEXJ{^E1~RK4UPR9dSS-jci^4 zyUGlYvPXDuLwKDKw?#<0s3NbS>Id80dTWxVslKTYhd}F_=!j^2Q$7b>04joQP%TO( z93yyRI=9V>Zs<52#g;oO|H=FBS_T$D52a7B??ev92rNC&R8T9oV@D)g24GT`02+u* zrzGdoGA_UDX6REe9yAjm0%#$?zzKY4OAI+^qUW+;D2MHcElS42Y)h_dL6(}iNC+AJ zL`X|GWHyoMPDZ0R2=n6OJ@eefb_;^xqC$UCELyv3t{&76IcN>_A;W z(Iu;@n>bLxe(|OdzGWPXlgCEqb*z^dsqf?&nFVMgjC2|)4u+@~FZdZPLR*7Ql{A64 z_}{L(sH#I6tm@!~s*XZXbrj%I%k5Qwu6OG?^4-wbYm%cgup6;aD_gj6&TiI&_HH6?;HWgwCwgfumRG!-eMqtlngEI$qc zO90|!Ndij=p`wPsX%y;Wp=N-1Ws*WI0MRuGw1!f2K}$h-ha1kjEs~;bAW}H*y{eHO_moOvO$)haO$(u^fbI(5JyuU6z1$frm5O7`5$FG~k=}?Cl7r<% zQWi3Ud{SmoSZ3rnKIkl9acCEcONxq91znRRCzV1jy^tIg$xF2fk=Y3GY+j`5k@B#& zL4bfSnVZP?zoe-Y3$n;{0Vc?Nl;O;u%$IZS_F9!Lbo6Ic;}^YXH{LaO#$k7}+Rwxej$_r9LrI6No;S243(6 zf3TL|f>pz0GT?nGgb+nWC-sv-^guGyUlTTzLG(Z}Gzf*rR3x)n#=9?guO%`h(x}6@-ldAg_9f?IdmAG(wg%^fSh1i!rB+2Lm_uFJwqQj&8-1~2U%+4tzffz+ zFb%rO5KP@(6@u{+Ftl&7w{-n#ZrOM%QT%SA|v;NFhSas#J#-f3O zWE$q8M==-qXD)hDC|>rX2g%_THO$3m#$5Co=Ay?i7lo2tS?r@JjQP<+$fcejyCI1> z6c6sMkj^`?+CoDFo=~k9%EF!F|6SgV&u)pt5xnpIAOKZd30Grx*H;T=8gq>uTZe|q zM5-9<@yAi;61G&X?k03tc^RmEo{b|Tki-i~JdUWQ>)iR%a9h!hs}3})4G5<+&$_E> zFsGB0!I*AQGJ%l2@kUhv7Q$`eWjhOY*W26$Mg&I-Chvdora$E;#1A$rW)y zhe|3}Z5@zYLG%<0L)hoZ_Y_XlB732mzM>@~*1lDBI%!Zj$(A0an1L+laGR~re35pT zoO-j*PpWOGo4Mv&n(<9Ti=R2t$jvMsLO$HOeEO*e=!R_s{LF?(7{(ywwY9FG9|Is^ z@WCpamqA)KIW60H(z2a5EgKpmPFm9RmY+Pi<$I&=^mK@mW7O!p&Y?~`@GM)Y$bSqc zWRlo5W85AVZK;iPBWT{Ou4K9uWYFREY`tbTs}P(9Z>o2>H8_waZ=*zYiSVf$#OI@m z`uj>G!c$%7ixW}Q45pJG#9RtpstnyG+yXP_A zr_y4cx}m48rDUivBe=Vptc6ux!^PwzExf4>vX1sq!7J%DZSex|YuD+#!DLBGK0Wi% znbFi3wP>i;V^b-gT^i}XLsc5TW(KK%f@T~ei&gHmtlZ;pxa&p?K(WgRQB}vAMsmSX zgJbA9sjNF53M$GMCyw2+%%v(~r;4EgaMX!alWK(NiJKh4uYf%4vUcu_PvU({>VuLOJX4X dTh$Y{@PpTjWTGaGb;yflIaXbSxZx)z_&?>K2~q$6 literal 0 HcmV?d00001 diff --git a/ACPI/origin/DumpLog.txt b/ACPI/origin/DumpLog.txt new file mode 100755 index 0000000..d7fc4c5 --- /dev/null +++ b/ACPI/origin/DumpLog.txt @@ -0,0 +1,189 @@ +8:747 1:980 Found BIOS RSDP at F0140 +8:747 0:000 Printing ACPI tables from RSDP F0140 ... +8:747 0:000 F0140: 'RSD PTR ', Rev: 2 (Acpi 2.0 or newer), Len: 36 +8:747 0:000 (Xsdt: 5B5B2188, Rsdt: 5B5B20C4) +8:747 0:000 5B5B2188: 'XSDT', 'TP-N23', Rev: 1, Len: 268 +8:747 0:000 5B5B20C4: 'RSDT', 'TP-N23', Rev: 1, Len: 152 +8:747 0:000 Tables in Xsdt: 29 +8:747 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 +8:747 0:000 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +8:747 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 156035 +8:751 0:004 5B546000: 'FACS', Ver: 2, Len: 64 +8:751 0:000 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39360 +8:751 0:000 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 +8:751 0:000 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12451 +8:751 0:000 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 +8:751 0:000 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 +8:751 0:000 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 +8:751 0:000 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 +8:751 0:000 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 +8:751 0:000 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7324 +8:751 0:000 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 5951 +8:751 0:000 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 +8:751 0:000 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 +8:751 0:000 13. 5B5BB000: 'SLIC', 'TP-N23', Rev: 1, Len: 374 +8:751 0:000 14. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 +8:751 0:000 15. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 +8:751 0:000 16. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 +8:751 0:000 17. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 +8:751 0:000 18. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 +8:751 0:000 19. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 +8:751 0:000 20. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 +8:751 0:000 21. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 +8:751 0:000 22. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 +8:751 0:000 23. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 +8:751 0:000 24. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 +8:751 0:000 25. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 +8:751 0:000 26. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 +8:751 0:000 27. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 +8:751 0:000 28. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 +8:751 0:000 Tables in Rsdt: 29 +8:751 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 +8:751 0:000 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +8:751 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 156035 +8:755 0:004 5B546000: 'FACS', Ver: 2, Len: 64 +8:755 0:000 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39360 +8:755 0:000 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 +8:755 0:000 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12451 +8:755 0:000 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 +8:755 0:000 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 +8:755 0:000 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 +8:755 0:000 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 +8:755 0:000 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 +8:755 0:000 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7324 +8:755 0:000 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 5951 +8:755 0:000 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 +8:755 0:000 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 +8:755 0:000 13. 5B5BB000: 'SLIC', 'TP-N23', Rev: 1, Len: 374 +8:755 0:000 14. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 +8:755 0:000 15. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 +8:755 0:000 16. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 +8:755 0:000 17. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 +8:755 0:000 18. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 +8:755 0:000 19. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 +8:755 0:000 20. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 +8:755 0:000 21. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 +8:755 0:000 22. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 +8:755 0:000 23. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 +8:755 0:000 24. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 +8:755 0:000 25. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 +8:755 0:000 26. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 +8:755 0:000 27. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 +8:755 0:000 28. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 +8:755 0:000 Found UEFI Acpi 2.0 RSDP at 5B5FE014 +8:755 0:000 Saving ACPI tables from RSDP 5B5FE014 to EFI\CLOVER\ACPI\origin ... +8:755 0:000 5B5FE014: 'RSD PTR ', Rev: 2 (Acpi 2.0 or newer), Len: 36 -> RSDP.aml +8:768 0:013 (Xsdt: 5B5B2188, Rsdt: 5B5B20C4) +8:768 0:000 5B5B2188: 'XSDT', 'TP-N23', Rev: 1, Len: 268 -> XSDT.aml +8:775 0:006 5B5B20C4: 'RSDT', 'TP-N23', Rev: 1, Len: 152 -> RSDT.aml +8:782 0:006 Tables in Xsdt: 29 +8:782 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 -> FACP.aml +8:788 0:006 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +8:788 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 156035 -> DSDT.aml +8:800 0:011 5B546000: 'FACS', Ver: 2, Len: 64 -> FACS.aml +8:806 0:006 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39360 -> SSDT-0-DptfTabl.aml +8:814 0:007 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 -> UEFI.aml +8:821 0:006 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12451 -> SSDT-1-SaSsdt.aml +8:828 0:006 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 -> SSDT-2-PerfTune.aml +8:835 0:007 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 -> HPET.aml +8:842 0:006 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 -> APIC.aml +8:848 0:006 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 -> MCFG.aml +8:855 0:006 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 -> ECDT.aml +8:861 0:006 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7324 -> SSDT-3-RVP7Rtd3.aml +8:868 0:006 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 5951 -> SSDT-4-ProjSsdt.aml +8:875 0:006 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 -> BOOT.aml +8:882 0:006 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 -> BATB.aml +8:888 0:006 13. 5B5BB000: 'SLIC', 'TP-N23', Rev: 1, Len: 374 -> SLIC.aml +8:898 0:009 14. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 -> SSDT-5-CpuSsdt.aml (Found hidden SSDT 7 pcs) +8:905 0:007 * 5B51B098: 'SSDT', 'Cpu0Ist', Rev: 2, Len: 1518 53 53 44 54 EE 05 00 00 02 8C 50 6D 52 65 66 00 Internal length = 1518 -> SSDT-x5_0-Cpu0Ist.aml +8:912 0:006 * 5B4A1018: 'SSDT', 'ApIst', Rev: 2, Len: 3348 53 53 44 54 14 0D 00 00 02 2A 50 6D 52 65 66 00 Internal length = 3348 -> SSDT-x5_1-ApIst.aml +8:918 0:006 * 5B4A2698: 'SSDT', 'Cpu0Cst', Rev: 2, Len: 1023 53 53 44 54 FF 03 00 00 02 11 50 6D 52 65 66 00 Internal length = 1023 -> SSDT-x5_2-Cpu0Cst.aml +8:925 0:006 * 5B51BB18: 'SSDT', 'ApCst', Rev: 2, Len: 778 53 53 44 54 0A 03 00 00 02 93 50 6D 52 65 66 00 Internal length = 778 -> SSDT-x5_3-ApCst.aml +8:931 0:006 * 5B51B718: 'SSDT', 'Cpu0Hwp', Rev: 2, Len: 186 53 53 44 54 BA 00 00 00 02 7D 50 6D 52 65 66 00 Internal length = 186 -> SSDT-x5_4-Cpu0Hwp.aml +8:938 0:006 * 5B4A0018: 'SSDT', 'ApHwp', Rev: 2, Len: 791 53 53 44 54 17 03 00 00 02 80 50 6D 52 65 66 00 Internal length = 791 -> SSDT-x5_5-ApHwp.aml +8:945 0:006 * 5B4A2018: 'SSDT', 'HwpLvt', Rev: 2, Len: 1576 53 53 44 54 28 06 00 00 02 85 50 6D 52 65 66 00 Internal length = 1576 -> SSDT-x5_6-HwpLvt.aml +8:952 0:006 +8:952 0:000 15. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 -> SSDT-6-CtdpB.aml +8:958 0:006 16. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 -> SSDT-7-UsbCTabl.aml +8:965 0:006 17. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 -> LPIT.aml +8:971 0:006 18. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 -> WSMT.aml +8:978 0:006 19. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 -> SSDT-8-HdaDsp.aml +8:985 0:007 20. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 -> SSDT-9-TbtTypeC.aml +8:992 0:006 21. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 -> SSDT-10-Wwan.aml +8:999 0:006 22. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 -> DBGP.aml +9:005 0:006 23. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 -> DBG2.aml +9:011 0:006 24. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 -> MSDM.aml +9:018 0:006 25. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 -> NHLT.aml +9:024 0:006 26. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 -> ASF!.aml +9:031 0:006 27. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 -> FPDT.aml +9:038 0:006 28. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 -> UEFI.aml +9:047 0:009 Tables in Rsdt: 29 +9:047 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 +9:047 0:000 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +9:047 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 156035 +9:051 0:004 5B546000: 'FACS', Ver: 2, Len: 64 +9:051 0:000 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39360 +9:051 0:000 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 +9:051 0:000 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12451 +9:051 0:000 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 +9:051 0:000 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 +9:051 0:000 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 +9:052 0:000 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 +9:052 0:000 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 +9:052 0:000 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7324 +9:052 0:000 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 5951 +9:052 0:000 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 +9:052 0:000 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 +9:052 0:000 13. 5B5BB000: 'SLIC', 'TP-N23', Rev: 1, Len: 374 +9:052 0:000 14. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 +9:052 0:000 15. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 +9:052 0:000 16. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 +9:052 0:000 17. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 +9:052 0:000 18. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 +9:052 0:000 19. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 +9:052 0:000 20. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 +9:052 0:000 21. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 +9:052 0:000 22. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 +9:052 0:000 23. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 +9:052 0:000 24. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 +9:052 0:000 25. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 +9:052 0:000 26. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 +9:052 0:000 27. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 +9:052 0:000 28. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 +9:052 0:000 Found UEFI Acpi 1.0 RSDP at 5B5FE000 +9:052 0:000 Printing ACPI tables from RSDP 5B5FE000 ... +9:052 0:000 5B5FE000: 'RSD PTR ', Rev: 0 (Acpi 1.0), Len: 20 +9:052 0:000 (Rsdt: 5B5B2000) +9:052 0:000 5B5B2000: 'RSDT', 'TP-N23', Rev: 1, Len: 148 +9:052 0:000 Tables in Rsdt: 28 +9:052 0:000 0. 5B5ED000: 'FACP', 'TP-N23', Rev: 5, Len: 244 +9:052 0:000 (Dsdt: 5B5C2000, Facs: 5B546000, XDsdt: 5B5C2000, XFacs: 0) +9:052 0:000 5B5C2000: 'DSDT', 'SKL', Rev: 2, Len: 156035 +9:056 0:004 5B546000: 'FACS', Ver: 2, Len: 64 +9:056 0:000 1. 5B5F3000: 'SSDT', 'DptfTabl', Rev: 2, Len: 39360 +9:056 0:000 2. 5B55C000: 'UEFI', 'TP-N23', Rev: 1, Len: 66 +9:056 0:000 3. 5B5EF000: 'SSDT', 'SaSsdt', Rev: 2, Len: 12451 +9:056 0:000 4. 5B5EE000: 'SSDT', 'PerfTune', Rev: 2, Len: 1478 +9:056 0:000 5. 5B5EC000: 'HPET', 'TP-N23', Rev: 1, Len: 56 +9:056 0:000 6. 5B5EB000: 'APIC', 'TP-N23', Rev: 3, Len: 300 +9:056 0:000 7. 5B5EA000: 'MCFG', 'TP-N23', Rev: 1, Len: 60 +9:056 0:000 8. 5B5E9000: 'ECDT', 'TP-N23', Rev: 1, Len: 83 +9:056 0:000 9. 5B5C0000: 'SSDT', 'RVP7Rtd3', Rev: 2, Len: 7324 +9:056 0:000 10. 5B5BE000: 'SSDT', 'ProjSsdt', Rev: 2, Len: 5951 +9:056 0:000 11. 5B5BD000: 'BOOT', 'TP-N23', Rev: 1, Len: 40 +9:056 0:000 12. 5B5BC000: 'BATB', 'TP-N23', Rev: 2, Len: 74 +9:056 0:000 13. 5B5B9000: 'SSDT', 'CpuSsdt', Rev: 2, Len: 6062 +9:056 0:000 14. 5B5B8000: 'SSDT', 'CtdpB', Rev: 2, Len: 1389 +9:056 0:000 15. 5B5B7000: 'SSDT', 'UsbCTabl', Rev: 2, Len: 1727 +9:056 0:000 16. 5B5B6000: 'LPIT', 'TP-N23', Rev: 1, Len: 148 +9:056 0:000 17. 5B5B5000: 'WSMT', 'TP-N23', Rev: 1, Len: 40 +9:056 0:000 18. 5B5B4000: 'SSDT', 'HdaDsp', Rev: 2, Len: 472 +9:056 0:000 19. 5B5B3000: 'SSDT', 'TbtTypeC', Rev: 2, Len: 1424 +9:056 0:000 20. 5B5FD000: 'SSDT', 'Wwan', Rev: 2, Len: 721 +9:056 0:000 21. 5B5B1000: 'DBGP', 'TP-N23', Rev: 1, Len: 52 +9:056 0:000 22. 5B5B0000: 'DBG2', 'TP-N23', Rev: 0, Len: 84 +9:056 0:000 23. 5B5AF000: 'MSDM', 'TP-N23', Rev: 3, Len: 85 +9:056 0:000 24. 5B5AE000: 'NHLT', 'TP-N23', Rev: 0, Len: 45 +9:056 0:000 25. 5B5AD000: 'ASF!', 'TP-N23', Rev: 32, Len: 160 +9:056 0:000 26. 5B5AC000: 'FPDT', 'TP-N23', Rev: 1, Len: 68 +9:056 0:000 27. 5B534000: 'UEFI', 'TP-N23', Rev: 1, Len: 318 diff --git a/ACPI/origin/ECDT.aml b/ACPI/origin/ECDT.aml new file mode 100755 index 0000000000000000000000000000000000000000..5132d1518f482237a8fe7b7e752efc734619404c GIT binary patch literal 83 zcmZ>Db_oe)U|?W;?&Ip`ALbttpzCL3te_Ae$iNT~;_A!=%2R;AM!r?$f%JKT(`exI*5tZV@3$U!;NI!E0} z>dEPOB(^8XfP>9Dxe?j{ZlH+3DpRRtEZxByncNla>;yu<6 GD*OOoXchqg literal 0 HcmV?d00001 diff --git a/ACPI/origin/FACS.aml b/ACPI/origin/FACS.aml new file mode 100755 index 0000000000000000000000000000000000000000..8cb33789ab9f852afda8391f1c1aff4e461d9aaa GIT binary patch literal 64 ZcmZ>BbPjf4U|>jA0}@yO6BaRKApmmH0qFn$ literal 0 HcmV?d00001 diff --git a/ACPI/origin/FPDT.aml b/ACPI/origin/FPDT.aml new file mode 100755 index 0000000000000000000000000000000000000000..0c44419a551611dd19dc64218325ec69343c4f4a GIT binary patch literal 68 zcmZ<@a0zi?U|?XpmBG$EJ@#fq~hEk>MXmNscN+ApkxR4*>uG literal 0 HcmV?d00001 diff --git a/ACPI/origin/MCFG.aml b/ACPI/origin/MCFG.aml new file mode 100755 index 0000000000000000000000000000000000000000..6c6d541afa775058289e66bdc5fb8041f1cec65c GIT binary patch literal 60 xcmeZuc5}C3U|?Vr^l|m`5AzQR(DgGiR!|5KWMBvgadl<_${~RdP!&;AMl literal 0 HcmV?d00001 diff --git a/ACPI/origin/RSDP.aml b/ACPI/origin/RSDP.aml new file mode 100755 index 0000000000000000000000000000000000000000..8c69f33383c136396b0f5fac456fad8303c8e4ee GIT binary patch literal 36 ocmWFvc2Nij2~sHXarN^L^JhAu5FM?;z`)R<7#$6y7;1qS0I#SB0RR91 literal 0 HcmV?d00001 diff --git a/ACPI/origin/RSDT.aml b/ACPI/origin/RSDT.aml new file mode 100755 index 0000000000000000000000000000000000000000..443eaafea232723c265b88de7997ef12b388b8b8 GIT binary patch literal 152 zcmWN}!3}~y5QX8V6<`N6U_zh)66Ho_A!O0X=nZ+V8a&+)U!8JM8JjxGbW61 SD3KxZFCm5fO&1XXWoHNS_ALPb literal 0 HcmV?d00001 diff --git a/ACPI/origin/SLIC.aml b/ACPI/origin/SLIC.aml new file mode 100755 index 0000000000000000000000000000000000000000..f54a966767f83aa8395760ca4131807c94e72d50 GIT binary patch literal 374 zcmWIc@pLX@WME+2;p6J(ALbttpzCL3te_Ae$iNT~;_A%A00DD=6dQ=6!oUy|>}bfq z0@MS9nPOh^H+ozBZctdY{>V?egAJbVvQpKGsze7q=;Bl{p=~ z`f{7IL#WH)ljbwy9j6z3zW9y(O|_Kf!h;_t{`F|fvpaVh=yZl{U?(y$p!y)()6c~} zJXnE|0pzS{2Z>_Uxsq8X{$u-xn%9r$8dSB=Nvh@4wEv?@!e{+{t z=6JjR?2C?#mrP2ueYn2t3*a;J>pgjRYVCTdHw{exB=oq0gLh84*jISyd;qi1l@|uR ui{&4^3{{$RTCi$W{kF~x){f^c<{pw>b7aM$(C>RLKUg!PG_#-0;1>WuHIxAW literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-0-DptfTabl.aml b/ACPI/origin/SSDT-0-DptfTabl.aml new file mode 100755 index 0000000000000000000000000000000000000000..ac505a24d2246bcc113b503715274677a6a503e5 GIT binary patch literal 39360 zcmeG_3v3+6b+gAiYPrkr`J~9-$g(XdPAuLYzfu}O$Gs0vygP2VD^j)`oM?&(Y5guD zE!l95D7G7`N`lIw)Hr|}?5U^NK!UUdf;J73G+!ez3?yjNq-dL<0n#Su4``a!ZQ9g* zZ)Wy(j(1C*$UVhUbP)H=n|Ys^dGlu8&di-mGhu!C0) z<#bxkVO(eVhB?X04PMS*JTa1%rHv0K3@e3v2|blWXvPy9>Jtpt`xqRha&%)q)t|~I zXuSZ^dQD|gv>j8aIHj9P864^kq;jTGOwN>L8Yp)vo@abhoNtQrO>w>{rhjUR@tGR0 zpT_7-jnSJLqc=5^)mP*6ra|jz#yDS$^Tjw{jPu1fU#!AM+hz7~zCO;^$NBm=Umxe| ztMD=X{hY6#^YwGSe$Lm=`T8q-{j{G4INt#08{m8coNs{h4OI9BDBmFG8{~Y0oNtix z4RXH03f~~*8{&LJoNtKp4RO99&No!y8=`!}oNt)(4RgL>&Ns~YhAVu-$d}G*bbO_` z{nFfiX>LD&wExoFelSd^{nGgudE~$9;|dKP2q&a=Cjc>qo0~! z&@kvcWQ=e*NuHl%XvKs4GtT&X73Koe`Ai8au~8fb0}^z3A| z()0RAE>l5_tQHlJn21cdh;HdFV#Oz11O#ZJ01=sT5fI=aAizaHKui=MB2z8`0$cEvsfq?MBkP=)sUzS~bC4-^t+uHC--U>Ivd?9B+~ z>>k7uQ>2W~x%o$rlzUnv64{82CbqIfgVD0mRca{{85A4gv7XMJTNH?zt3NmM2$2nI z!holl%n>t;ba&};9xjm#0*k=<}8Ke zEcQ7idJLcT4o)c{p~(pWdJsY+0EBT)h_Hr`>5enqajqL-4JFeJ;~YflTqMH!gcxlA zVU80btRd76hG8Z*2yGU9&soCPC_{qw(}H>&Is`sd95es|4q8ydfwiWg%E7QPK0pX%W^Xq%j!~0%T(V;Bvw; z4vEP4OabPcb~(R42SaXuCJ{pqd}G_JKIA}`Qt5_Fg1bJ%oj z@wqvY$t0rZ=9C~n4WJA#2CyAq-#P3Ll0*tjDM3hTEGa`W#**!j?7KV~M1e4TQ1&9G zB|?x3yz=}KYC$=e&`=7^ilGq9>O&D%P9c}QbqN7^5<9$|fFUsP6h4$ze3p;cTP`fk zOZ5m8PH^{yrAL)OJ&FLQNU3}Vz`25rS6u7BLQ8bsDM|>6ZVApw_C_32;=Do|xUaRr z7TSBx&^kfS*cDk{faC8h2n>TxqZ1WCSLDIbKEC!K18W4Tm~)S9~tP7};5*Sgl+ zC$Fy7qW}Ji`kK!Dyw(r^VPDhLs3;+DMhKMPN<~LV)jHv4tw9Nl5Y*$=XZZ->1Dh>G zE?Fbh78k8+U2Q(F>8i+U4FM+BnlAT634znuP=cWV?d+-*)Q?*KxvL&J8}+yu%R0M! zBy#7NHLkbW;fr(Xru$Gu`WE5rZMvvR*h%UG-e*hn(|DV zhV=_;V{c?}n1uZWaWuxz$}{#RCpr_epJT+}Wn%8Lk#^X(O_MU+zLnu!`#^Y8q&ie) zSY#v&rG{Lj8v|#Nk`Rh$6pB2=9QCf63(I`qNvXl(jJ1L7~Z+o7{!MIzX1VjWmz;7tWJ@(y{ zK?&HKm(#=;&6RQj1kgxY z)*--CWIaELQ;e~HKTIpR#00TBme5ELuVQAYGff#&rCp~H zfLsKpkpR*N9>)ijj){|4j0uF4GctY$b`B{jfwRI^7H)T8Yrs*-*=OpNK!gM%8IOv* z%E7O(iOdeT?IL+mg43UN$flxDb5Ft+a`i)>!wlk4C#VrLPpp2- ztNK8?tfecF;{4{(qfn&4e78dBitR!65MlPz)?rW0tGkx9Qqw&8P9jhh*GgK$_C(5S zXHT!{L*-Bwxcu&_AC7cf9BkGvaKK0Kc%bkWOnuobBrBQn16ubgoaO+;cM z(kCMQA~GN%gCa5{BEurGOF*=!h=?`N#2RQ~4K%R^8q}ba9(Ia0VyYdoEm@qm#SczvR3H;sG7J&nsQUIf%a5F*HB4lL&SbKeJQL z$noTXY&aI|SU5E^cVc02=j`LNq~q|>qb{;=Y+-?APt6}U;}%Uv#v%~lJMUZ&2m=N$ z=9kCAu-0JYi?5M{tv5TEeRdVq|9T0+38bX)fBWVI3FB3kA(2wN%jUGbMfJc7l_ChH z+hsUJtYiRfvfbXs42(Am{<&`Z>5QMw5VUCiSM_l+XGni;h=hqCiaBX5>31wQeUBoms{0;po#Zv zP~V`5&9d6lf?VI0)vYw~;#<@Y(!}3BpuR{GFDKMb(8R#Q>c?o}sYUgpH1UCts!!9z z+)L^ynt10|)p?rO_Cxg{n)uECQTMgTaPh_nZ)v4Hyi5lu_EMHRNNVJCcP4qOYjziVCVDz?~jLAu3mCxd)fy*P*a^K3J{$ac@!7CGA! zXPe-3r@K~f_ja~!(hDPah92G|;aRfsvE+}w^5ccv`Oa^Barh8<1U_(303X;Xf}PVt_QvOz4oORglmI^l!F|O;rPgv7ZkoUq6T0hJ zlnzzxE5WuHimT4kBotnq7n4vG-lNdMcS+&fL!J{T(!|2M11r(2REGS0;dH2FC8D*K z+55Ia54G624HvQ9*iL&SMAO(ld;3Mq!eo)m6iGHY2|KrkixMO>*rc3=KS;((cL~Kj z6U!MTE#|qv&g6*2i4CaK(F97dE=(ztP{k!GtrQDNnfzr+-8%E);z>5e;B7LAOrM@s z4nI;vy%1brkI%r|ReYp^z*@(rB)E!J$;DL=$wj);?DU+^n|0E9#i7(t&$XC}*}x2VjB@z+f># zDtm7aI+MM%GE&gyFc|o#phE)FvC^$Y0{snzfJJG!MxQaEL+W*UOzd<(#17$|4!J^y zAm&yUv8oQK*Xc2_(*Y56@J@$ZQAbs$V;Sp^n4P{2CYa0FTkD*Ikbg%Sp(i34b*@cn#~IMjFpnI zJ;HZ00zwt)4bhdVz=vo9RiG15l+8ytw_q)<;K0@31|gibStO#ussVu+A~KFlf=`V; zV-sbO3kYIOn0VJST^yp z8ecYB4<`RK^TaEAKlQW0-NkPfk4El=SMVHMxP+J3%AIHortxeMPR7dsCuMk8;Z$2l z3g6SZY?URjqQM~sT=s>xDEg>R6NK@(5{*U_am{!8wAyXDINNL|->5H&f}?j`;C!1rd58>nuZ!~x% z_Rw^BS~lVk>dSClc2tS5jpoR<>X)1l-8X=!#%Ue4qUvQQ;)I*9H?2i(s~c|O7oQ?K zShU%(gkOL12n(@@5<;wrgr--hiA6w2BTXdq3^cJQ(#zt^9n0fPkJj;cbLGn%$q_pF&NC#XDf;LhbP0AD@~Y>Ir`0xzF5@yF|M7^sE2(n2cA5dD-{k<&j4} z^Y+xsWBWexlk?mELdILeyzIBXc4_zLe*Cu7m2Ka6$Js}YdB{&=4F5KZ?A3|{=vWO{iCnk ze(u&={!)|iQZ6rx7{C7?ZC@>?KEC^(CV%)?v?SvdTweBPpMUmC-~IZ#_I~z~w&RzH zzy1o;1umttHs2NF2YT;*J4@o`0^PeGgzVP>N#mNyY z#~-%?>@7~8T%4boFHRp{TvZ*k$&BG~}Nufkst{_y-9KQjDv(-a}}#{N$H zZp}_y7HHXRwPiRp?ZofV?4(mHN~1LZh-o@rdHS=oek{KY^6-N+4hL#yI3chI)AUoc zoaMtUF#16nG0n57-r7c6@FtFpe&6E49KkIfWdAboV>P$IUv(cjnvB!CipAp047JOPT$y7Rr&l1GR^o--n5s>) zT$WFM!7$_%dr`E`#U7XD?>^99}EquC+1FoOI1`s*`z6Lql%n3OIdYR)}U0(mwz}2h#hk2V#V#=|RExf%ceI zlJy0)0Y84W2L=iKfF1+q`t1C%`Nifn%T*U!rj8##kk~Ga5&bfktFPZf-;m~~K4*wo zGc)7weec37>q=*^_pRD4m79YFAQ-by7N;5FaKqS^8p;_K3yX&-@x5FI5?6+ismBTl zc;$k;b-0vcBn^fjGg32@alfi4>vIOYU&<=IvVwE@rOPp0t%FtC=X+`KhW+>wx=PaTcdK~j_zqB>ta(?M@ zhyU_5&2c&Zd(+kF>2j5Y&Hr|KxtzPW`K7ZFms?HOdR)#~&1oLxU7{gy3bYT>3fxk*Wc!OIhz~o`k}88?^;REdfdqgal7icQzqrVJNd20%bont(}+9y zp~oHH%Y)P!ck)-=>h9#PzSZ5y4}JCBsf7>l0k*BalA`talM`q<8{IgDoaHHzTem+s zV%@hEC&w>Eo}r{4iW>1KKlFHelq22W4s`Xc?ov(-)?+YN-|8;qhraqQReh?yk{&-i z%9#tre$(IGgpE(X6?rXDe&}h$q5RO}4!Gq@lw)?SveW6WzSSMdUwx}Plpp#Uaj2E_ ztjD38kZ+R^@;UP0TPB75{jsL(W;RKm=Yr**iqCT=i6R5%p7?%I)yc{8J^fAeV(4^qrOHw(MNSxVBJOhJBmpH8{V=?MZq}`K>}?Tj=Vf2#iwZaWnswIo)DQPHU|%PsxSrZ|)0deqi@w?7F+bnz ztJ-<*dg&92ATN8g?FLv~*r}NbgI``hR?+s^P=PL_nU-_neZ#etjEyP!CS7~2y zZWreVF7k%!E3u8&OWL{UjQ;DFeXp0c|2ovuxoV5{b^cFpx)uw5{p-*VH)D>!{QFwY1p+_qdn2u1*Lz!>t6D4Bw}nktHEYvN|9$iOuXF9dPy1f)WBx{|KenUp zeUBphZRk%!`SP_G{#!-r&FH&WhM%kX^;m}o`7n+DsWN^gBHuHNQiSbmIQJbMpmx9KR5LyS&ctlmD*p zJLF;-e-s=)s6mWszs}WRe$~wyB!&;>;|~U7+N-tji|f7ktq(jId=>tX$BCd;YHj1K xViseP#a~^wh1PoY8`cItYyH*rdiKQ@<5w}SeT$p@JM$4Wok+lc>xMtT|NrwMl{^3d literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-1-SaSsdt.aml b/ACPI/origin/SSDT-1-SaSsdt.aml new file mode 100755 index 0000000000000000000000000000000000000000..4c0e35dc9d896b6b676a754e224cc971710767c3 GIT binary patch literal 12451 zcmb_i&2t+^cJBc}V)y_O5CqD!Wv#~Y=gMmv-yggF;LP;Q02aQM15uRegplK^P}vLO zc#~*Zie)>MD3yy!un#$;YPdoEiJWxGR_!5`b1Gklt;!*Xy{2-A@?Q50KyX@-HoL6i zL(l6s@BQBI%}n?7wD0rL-xL{3q`OXkus85;`G4@~=LTb_>-0z6*H0M&6%thvH4=3a4H8WfEfOXPi-b*r zlW<75B=(K|KKesZCQ%_#B~c?$C($6$B(ZNGO}>83-zyp@O1iZ>>gs0KcTkwF-t7)< z=-qawjfd_~@AO7P-QmMM-S>JNh1*5p4fXb}Q$*nvjrOit)Q30laCid`hd1c3Buz?W zQX-QQnUKIkG{II`nv}_;OeSSAA%TZzQr3BQcq7NV?cJQ?*h78aGJV5Ck?ZeyrqSPP zn}*p#a=N44eSKiL`#QF6QtKwQKBCq~y5IA=Ilqr$SiEi_G!kVJw%^rYyBtyd&bB2hNj&Sz|! zHFJOZ4~a83M&Y$Xyb-j?@e!mLUFN~o6x%C|1(}09-6V`e;V&;}XvkTxF{L7C6RnT6 zK1od&{RUePr})!l6QA=gweY_rw7gpmwb(*!In-9>+6rnbp|(2LR#96GwY9mnhT2-F zt!Nz&%{**uf~H{ zwNrRxkSYd=1FGVEa2ilm03s~`ss}mXOv0D0zSbHK;CER)(ZaogSu7F!dxQi4dtUAJqr%;F0r4;HS z1=3Oq_2AluOd&-nH1e;e{_hl&c{JjAG~#(Q6nQihc{DJOMQ##r1M$XlYrxu4ZVize zX(_ixz_T(popNjDujJi%r>!KNa?rXsMq+9uS)}J+LW#+AT=B;?q8OGUY zfxg5>ORzy&VxtwfdC3M48)m)=zY-ftO3XMVW}FgJL5ZoL#8gmXDkw1(l$c1#f+m@| ziK)kFGGTp*CR5NvTB6Ae2InPBX`;!>x6;2lO-in;I9FDjD@(zZrQpg^aAhgDvJ_ld z3a%{VYQdl6#6nKu{8<1?{8@rO(h`4G(B6{#Wr#mJ|9&?yamqPlmMG_f za?%pzJh-+kDc>Z@oqQ*``D;_I(+j)Heb!Mmg2-BIxFD0p`i zygSJIq85^02lq@`Lo0e?Z(B1^S!^ZjJ@H&Y8`LELyj+;~A;ML}Fe zL0m;aTtz`#ML}FeL0m;aTtz`#ML}FeL0l}zqDYc>7m1G-$%W0OBDtbSq@^Oc!QgpW zq#PB=%iF8D-(ZoHmGa`1^5T{96qWK6mGTso@)VWw6qWK6mGTso@)VWw6qWK6mGTso z@~~2i>dA_DSdq#6wbz5JsE;?xuWD(QJow65=e$@dxXDA4@9M!D)8jPDino01o@lfH zHo?WS5-p%jNRR*fGc8!BMVJzsX(#E~ar*INaa712a@%J!n{%HOg*Ohl=d)n@!St9` z(clZF9pruV#b)Gm){hL+hurry{2v`1d^I3U_bB*xVUV=cl+>sE+yRbs3miq!?i+A>D!J%zFM6pXb9V@-jv z9>-Xh7}p|<^#~)a5F*AkiLs6-))pA+%NVKm6vp~fFxDfCbp^&o9AiUbOhp(Q5k^|C zM2snkv4JR33yh6rjMRGyW8*0p8xh8a0%J3du_-Z%rFMGKG$V|(dWslziLr?&^aaM| zGDhk>g|Yb*jLisRQ-QG+$Jmk>*CQV17-=mRF|JFDEkv=tz}Q;GNWG^pww@JZOM%gh zV>Bg3h+#A(MvxdyL;(wo<}ya=J%!PHR*a?sqZP+!NsQ?jMoVH$ON^F4F&|f~WsI_S z{(Q8a6{DrVXvZIj9H1%MU2@6Mt2z_)jGQvuia~c3qFkCI_$v>*oT|&5gfqB@LTZPa0p|#1)sq0z^Ah(d>Aj7>zI5` z3*MXO9+V$E{Pu`F{N@Ngo&5119l>LUJh1V{?<{>dH*qt7Hl7^O7vz&`$;n?lA%b?q z7$nBQ8xN=B$DfZOacgo*e2Z7w_x(aQd1(F6W@-D{7UB^Hyozn#U;3W0dAGN)!V@TPb>ZppV1?Z;+a@@eD5EjY!)Guz6WD z32@XzZ&4H7MNRYd5qaz}61#;RcS#$XlfY zw9=X8b@p&kFX3J9nJa9a=i?^O0i=_MBbAN3oOJBdL2r_N>9a z!FvO43~_gi!AY59J0J30e$zl!e8YD3M!2g0@G9;actPXV5#GhEBfN`SM|c;vj_@vS z9pPQvI>Nh6!yclYJw!Vc6%thvH4=3a4H9UF)kQ&eCfS)}XOf*sb|%@GXh&CpK^FiC z++sp;QQ#I6ii-lbm{45IeQ1nuK4@SWxIq;&Y;IpO{C)q1fk|L0SV5ytnITf#-@;2p z61XFVmnf|grB$M|N&;>Rk)jC-+*~n46BLvYnxLo|%<%0F*2i(}q_^+dE1u)KI?D~s z-JZb-58L^PN%0VzZH(-;W8j9Dj)Bkop)qtjBg3}3dvw^_DcD1|XE-E=-Rq;BSFvRo zHkKPp#O-x0)CO+ z(dhSI)4j!SGQn7+)cxzWt?B)}E-ppu_HJhcNxg6Hj$p0O>3hhIUf8+hS=`iv7pBAx z2D`aN{7e`f&d5Pf6kXaR^Hs9Qs53Y}r43lxT{=iJ?d%C&Qk((FW9q@%`0+2PA&%~R zeVCsk7-!AH)h9l3|aB$#}@s@Lx+jz@t#*?itAx~ zx&-4!?y9tc$O3!R<|6>+Cws=0X2_hb_1CU=k{UvcBeQ)KBo;k}y=UK4O|dr)pF z5=NL4jjqv?On3raZ?y4@l<}}3p!4ybko$sUHA~weV@6>J@c=r93Ap$Xazc+PdXnQ+ zA~b6gy4FcU<|sAVE{bg&mnV##{y4A53~{t%vxhWh7A_5O&}6~pH#B%c;@}F6OS7ps zS}F8aX%>+PQgq5p!-)kBOcPk4?%>4-QyRM1^fvpmGkf=L2OGFW4^L$zj!w>>HGq2v z)24Iy=PEDwjM$w6e61o56r{^Dh`w9H_!zpRm!4*jU z_!FEq?qsG%xDxHH({OrB0@GAK5ZCuRnW%R?*VUY#iThpU+ z=OOp^=E3`y{&Q^o_14cW|J^_RqVUuHo7&{Bevgq=ke^CpnBLZAnaBTudjk944cwGa zYe8=f^+D_Gvo$|G{`&rp@D*$RaGj7sBgGhB6UNa4_RXoVdzL3Ge$e1of~*LPWu(BU zGGB^RE0L;yIZ`Df)wSpWP-~zgzKQr;=5~msC+4#iH z2ROkIHXFfvXmb~b{2$>*GT3IKg+X#`d_2Z0eQi!QoJ!<1YZ%W{#r$U#ICjHs4g*GWk*Bd88ybvWOaPb9v0S-Ql zS6@h+*^)>q9^7PiXXcyT`Q{tWY4lklq;%=^gK!+i^ZN$^OM&eMk#|)-wbo&soJ?*G zGTzIWC%>avmku?|Ef;eUQ2@C{V8EP~rfeOKPHDFyz&-pW=qC){ z#DkH18&fBezPG)p)0V!U@ca(o)`mP{&5DYB8TMJB6SL#DnNyqXgt44>6wixkgOGC+ z1H7ljRId`fLBzW-X?5VcVJ%&<#Nh-#D5!zm=~lWrmI=geu-=Gk9FKogf~xpLH?gSE zZ=%L#aFjtq+O{_G_(R?LQcYJ~RWcY;ml|{o2eI!!HP4_t;s&umInVHUg#gM1u2lU@*?U)*_*z;eZ#Sm*#xJF)WAYk VxdjtNRuBV9$O^51BelJSz5xj6y8!?I literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-2-PerfTune.aml b/ACPI/origin/SSDT-2-PerfTune.aml new file mode 100755 index 0000000000000000000000000000000000000000..46164e2548e36fd1a015fe70c203341853fbc6e1 GIT binary patch literal 1478 zcmZ`(&ubGw7@bYK$z+q(cDoft&_dM;9@=d2Dou7a$(n4kWVbQ2f%IUdAV@3}JV_OV zo~;LOZedRz#G`+K=N>$I@-OgD@V!l1tBu2c-~M}->hk2O312Q_ePYG}Yw!zLUx?7&gOGdOBEfTM;( zxD!X76S>XM1=po@!0;&-IXM4|^CTxZBs$4)3M9t|aFc`FGr)TY&H{e{uK>Ry3HKw_ z@JB$;!vd7K9|g=g%Q;;3;=q|7(#E>aRtm8xy;uYw~FwZ{EvqyP0^XyTcJrYu^g-#curZr>VDxgupD7d>; z!BHKRA0e}3FDCT!p~UOpcR4E2%7+SXXJQz?0Vg#T5C8xG literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-3-RVP7Rtd3.aml b/ACPI/origin/SSDT-3-RVP7Rtd3.aml new file mode 100755 index 0000000000000000000000000000000000000000..2b6e8b3a6efd3d06f24b8b6bd368e5838a5b056f GIT binary patch literal 7324 zcmbW6U2hx56^3W24^wLiRTwHLkTy_^AVJYI-dR#2=>o0E-3`f@AJd&R#X<&X$wr(6 zK}`g5FB%ke(4y#7V2JKrFE+0FKl(#@)1v>Ny{>c4EJ-bQUl~Pwq1k!n%}F!k``q)poJ99-E~84+g|q@`719Gp4T&RuW=2ij_H$*GYwhHM1q=%5!Agx2%K$PMJ{FP7} z#SPg)Z4@_T3$;<)kS)|kaYMFH8^sOSI?`8d5I0CGkX9i*fbB-AFMHVL&!sLh4iOudD$-tv@lGEX@t^OSQkPdO*^lyfpqIVba!b23Lw zz2zy_Tb^>gMd^zwV8U$+d^%o-tx9ko2j>)ts_Uic~{E(zCl`nv14s`ctwBmJ z>Ae?sNT>DP#e`7vW42H-jFTSM)d}4DQ-kBQMsY*7P#eV!*wTARr4w!Bz5^hwKw5?L z0MbK9Ymn9<@X)WQvD$F)ikM*euvqQ5}U#w4R`&=A9+F#z+*k*Sk|HuF=GO>a|_% zQ*(4D7}%n`HPOzIxUkpD-SvsDeRI2===AKC>0OlE!fUVFyMO=JYo~u5|L3D;|2+TA zVEgVx=}oKj{lZS?@tOMk$s_$_I(_`bS@&0dMc7t(ut9T=){L0>N=IhhPZ)j5e?E)L z=YRgxwx+gVN2YcmqJ977ow)Sulh3BMl|akD?=6i4_mBV3DXOuW2r>7y72Tq~DDO>l z)Jz!FUQ=A~-}3vD;b4+bO_zce=g=#nv@Ty7KLZ{se=wmNERE?hv92h>iFIXRO@n2> zWNsAqis!T6|A~WP3t@}6n(A5c+p~E-P~Fe13Sxe-Mq6)vvwlI7+Uu!Vg}5?HrT3!n z=d-NEbhJ+53@6K_GmBo<8N+!IbCGpsG3!cai~&1y)jFiBJh1gR7#F9e@}iaw9vwf8 zT7FkNx~?{kzj}+W*Zl6NyYKb=a9=!)3sK8e`^t@4`&0Yj$<*HB>lZ(IeqxL1*@tw!KQMgll1X!qdvb_xZ6R zD2e&8W(x}ZcTYM_)bEmWt4g?R9>nG6#vzOIAo2AwCyndLMsl89Ze)<%NZzN|+v2QU z#9PEaOZ8CnzXZ|We)+$bFCVfqvCq%Q#cKaw68vsHVU2#7s6uFwA1C$nPPU$grktSNv8OBLilO;(dlu{{4Z}INh1jwO{?KR#_Z9Lgs3>8Rw>4Ef8tL+U{ za?(R9l>?Ghsi_*tNd8+r^#|nCGktHyhV`=RK*2Xanz!@5Z{ECl^JeCO=UM)j_X$b4 zjoN0b-QwSW_pSHCH$SR`5NFeGd_Hq;x$hLn;$GRR)Ty$#S4an5CE!&@-?6Jf7LYt;~feSH>W!mFtgc<=UfKv2KfV9lZl-45c}g#i1+-+4dx_?MYtSlf1SEJhiUw z5xT{z`U1OVu_%diBa6imk%BEC zrbfh)B+?PF6iWo3R>pzusRaiu5a~WT?~I7(yuO4jI1fNIf1hb@WuH7!c@`5RC$8$RS*oJ{^M(e!g zbzWl|241p^XO}tHLJ>xmnY!&*FbhQyMs%jybsvy4iUGQ%6@1vFp~nyv1*6JHXMf~$ z=e7J&h~TT6Gogcl7am@3c#&z31F%GK&$*1Ru=F0zQ&mUh02}RL01=`XT#n)C?7^3g zy#Y3f=FLgwjmhSXGxN{moiA$h!uf#+hQgSZ7j6#3b}D!?s0l+$A029{jcok1E4y!R zZCA@p8k8-U%}iRNGkJ;5*%FgB=-G75uU?P&q)@Gmg^FI!WJ#e~pQ?F7pQ3qq%%*t~ z!TdFy#Msz_`QmhgQ<|>%mFb$lrZe2k>=m*x#poJdM%rTF`DN0d69vtH%^zn5jA*yy z1&O!010A?;=m78Ts+weN<$qaw7^$b>J=u1l#@O;WXGCqNaqsRD_w*gwVI%_LAgywn zd*%+^?ZRu-BnR(Ay>^F?6Y)cGB)j|ODPn1&f@rIx`$fv;IuwJgS&&c+wpt$7b?k#Q zlzy&<#N5frfb`dodPruZha5(Jit&M^VwA&?rW^?dVn@POoz`IZCbT&>Ot60Ny$ zXdq2co5!Il)@l6@)P4o%r)()=S)!u}?43B$aDtH~Yv{W4`JbUUL^V?^zwFCT3Voki zb?MYNd1&eoQKrbHINS5seI z>)$)VGFm^t4x_+RkaxJx-d8p(?;SQ6dQkjX*>E{1T#mb-IkN#wNWv3gzi*0p9v>a` zEGWO3(mTNMOd;~q<*Z9scYq;1&JHl{$4~nor^DVN9pa+C#KbVdi6Qa>EZ?Mt$k&Ud zhHO$&{qj&=SZoOUi$4Uwlje literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-5-CpuSsdt.aml b/ACPI/origin/SSDT-5-CpuSsdt.aml new file mode 100755 index 0000000000000000000000000000000000000000..1917e553172857a61c308632dde2c2df3ba43da9 GIT binary patch literal 6062 zcmb`LOK&5`5yzV{rELwV#q2Kk0T?!j9Q-=OQ!^xoa|%a8E=7ANwKX)EgaRlVImlKH z3~a-I1tTDw|s+q1*K}L=OHc+0l`Z@tE+o{RXzL< zqo_Oj$73P3z7KncN8_Vl{#o?N?>-g65@K*T3SZxTRFC_2#lw?d&Z7OnnqqG;_8IQFAR>}Vvh6S(#<+2Key#>Hq?$FVndgpemHu&gSsSR_rz zn|9uG@@6A%HuGjHZ@PK2oj1L#3Hff2?*{p9knaZhZjkPV5JO@1UOvGrnaNs{Zj<22cClx{!WwJd(bO#?to#O9pDttp`d4G6=_^4EBcu zsY0+!71~rx&}4*mBmdZvXof`yK(ka#fM$Vafo8D?!KPU%CN|C5G;7l=cAeow1}!RF zD!NoS;m8bHRJc@hxfo+hP0XPhK9${3)T08Zu&H<|6_!%H+xMyKP|=Y4{h{9}V;Ny{ z;G0;4W;enX7NP7$eoyvP5Xs)~5Dk0bVZT$xWEe{JwT_jSsKM@4W|x`RLovJJmOT z?*IL#f6ssY2QMN&5jLfM4WSk7y zWJ^O1SPmNeD~`4N2R%8=&pHn_4UWb*4)_A18*%Zs8tdoesn>{t%$mq3yv6N z#y4_qyg|=*eO}vtg(5?+X$?IQt%&dc^*Qy89j=UP^2J`+Z zxj<6-hs@~c9Xh-NUa52kV=vv}E^a{+2blZu+sVVC(}lp-8QsX#>_OV7v3+TQP8q0j z%HRm548-PhdJ-^pg|X`^HHse;pSVsGM)4loJQ2PMMsu>Kbh{R{cgi#(wuJ0+`hX=t`k0U%SeZ&D5UEEZH(o<wfNj&qTK@!?mZ-=%pokaNwMcKyJ zL}4NgI623F7YR5UCg5lSjwawR0VgNmFad`NIGTWy5peL3jwax&O~6@AfSfN8Xl$53 zLlbCd0u3h6$O$xMXabG32{cv{Am>X2nj0q2)C8KEK$8hHa{^5! z&}0HlO`w?(XyPH8nm}`H0?pL~$oUe1)`khRG=Y{T&|(6uoIr~Sw3t9k6KG`wT6oBo zCeT`&Kx;Jta=t{s-7o=H6L2*FmkGEz0hbB5Ou*Fy+>C&WhjcXocWnahY69eZi9mb9 z1lpQFTN7wAfp$)y%>>#^psfkCGXiZqWLpzxuT7x6ngBUpBH(S9fTsy~nt;ayyqti? z1Ux3-X#!qGz{5j&nt-=90dF+{a(;o^THDFIZexS9#D!d-^|tR|o(a6u8lhBYB*O$b^O0&7C7G6JLtkpOE#(3%kc z3Q7r}Y{S(|U~Nr^8?MZO7d0VlSQCQQgrGGcuqMPRBS4xE39u#vtqJiTu#^DGHeAgF z*4Bi$;YtE8YC_nsCIqbsL2E)_O^8)SfHWZzU`+^G6XG9#DFKvixS9#9tqF0%l>}bY wgs@>v2wD?@)`Y;C5UY#;X+k8xnh>-m#Q!@}0w~*XH4|7{6XJ#|3206DKhHH*TL1t6 literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-6-CtdpB.aml b/ACPI/origin/SSDT-6-CtdpB.aml new file mode 100755 index 0000000000000000000000000000000000000000..4ec3306dd5d4a6c0f05c23b8c52f7b6ca057dcb3 GIT binary patch literal 1389 zcmcgsJ8#oa6h2Pv)^VezqG`lZsYODt(B_)=g5+E$5Nf+u_6-EJk~=VTLApbEh%QAP z=-dbiHoI#72P0zRpYRKSb8b@QHez5RQu5_H&+iV%|RBgc5 zB0w*Z(G91$T6CMRytAHX?R+ca!a^c>A{|7LJc$XlQ}AAERuhrtB5hqF%=Gvsxowg= zCb?^pdnUPWk_RSvXb@&9V5S0QDqyApW-4G41zZSDlW)x6XnMLxWSM=*BF7ey$gXQG z?{FzNU<6`H*u?-sAz3&=e~c}}#o*CokK2cFJ4m4h;>WLfSls>)*2rMN;b&XOP}IQ^ zaWByj3=m`-4CbIJo~L~q?9SsCeFtV_FGdzEz-lDo%;GYMDiE&;5wSYHI~G=nn4AL_ zO+K3Zk;zBX@%M@h(!_g;&l8I42a})j zJlLQ<8X4Db0LohN4y literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-7-UsbCTabl.aml b/ACPI/origin/SSDT-7-UsbCTabl.aml new file mode 100755 index 0000000000000000000000000000000000000000..b2029163de5a2067942704d774167687a2458590 GIT binary patch literal 1727 zcmb7_&2Jk;7{+J)mC4wSy^VuFLJ&c#T%h%Lk^>Un+4Tq58EZd6B1c*$RV7p*u~JW! zIFweZA}$~zq;hkRIdbHN1mZ8?Kj6auQQqhE`a~(khi85>v-9jc`|hlRzzu&b2$A_^ z>>Zh76Fs=l;rYd9qAJAbC>-zQU)x<6DR$286ym^%r+QQ$PqpLeI39lNolb_+zO-mo zu4nye{cw5`oP>@WoeXvC4j$N7AF~Mmd#7^jhXwG`BGoZDRqaEs=xZ0y83PO!0 z)Dv8DC%5)pdlf|Wqxl&|XODYx^42mQj@;7m#cx8!nyB|jX(8iitkIGTt?1m4M zd%Kzjdaf^|_Ji2A)z;HZVF~;w?L$F+IqlaQtBY#wn074|?_Xg{*76l1TGs5b1B)hG zShdc|;`aZrP?_4>G3`%&g-xoQc6vdAM+8`6tad97!k$>X`OUZA;fWUi+_=IcwH7M9 zkE$%i>=DJ*0xQ+Q?8`v~UHjPc8OF0BkaD09%X_*k;@Wb{G|~%UA^NGnRk{jAh^<;})>TSOGeWRiI|HfiB|>pvSlk z>?i7lk+W%JRP3gBrN}tfY@8Q3-HZj`Ix=A^t;60?*gsvB0Tg>$pfIy{tfyzU@vX&o zRz0eHxEZ^_q$J}ou8YNF6fp~Ub zh#&enEBXGuz`8~0ikC0#tW~*wZ&Bo~g=2aBRywINxczlyQRYdNUE=TI$JO~|UxDS~ EZ_9$X5C8xG literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-8-HdaDsp.aml b/ACPI/origin/SSDT-8-HdaDsp.aml new file mode 100755 index 0000000000000000000000000000000000000000..9bc72b73c773127cc7030cd03b900c50c908b03d GIT binary patch literal 472 zcmWFzb_uz`$iTp~%g5EvKg{1FCDEn0fB_6V{X%@yS;Z6c#yGk-xpOdz#^^K0 z2Rp?FIC~m+xHty0fn@@G89}tWp%0YyfY3%zz7dpf4CNaG`2xP^W{LO<1qAp8b1pEM zoFOR8B_PirSQvl#rc2|cs$;GDE?+OGc615w2M1v2S?OQ?=CX#D(}X9PKU+S&+YYmc5vnOX zKMbJ<>bMmW4;}=VhIp^Iu;M{1|LH|gdpMw4T=H|0DiNBbCucZ1JG+BI2#7tFfPKOP z3}pp|1#medpqvqsoCA`aF;LDJNv?rm34@3<$V?^i?C^d(@7w2|yF8ToY-%8+HG1uv{;<#PAK6p#;34saH>`JT>{YXlfp+iC zbWUAPywDjC=YovrsQ44DFHz<)ip7+D0|v-q5C8xG literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-x5_0-Cpu0Ist.aml b/ACPI/origin/SSDT-x5_0-Cpu0Ist.aml new file mode 100755 index 0000000000000000000000000000000000000000..b114d9d200571e616dba8cb262379676c8027ed9 GIT binary patch literal 1518 zcmds%K}#D^5XUF!CT=%tP1a4Z6eTvGAR-G@gr2M~M5RF=**$n@S$e1^1;G{+50$nD z1rOrMV}ylXJ&U(~0Y88rz>_DBrS|_%(Ch9zIlxx4#%~;jvYF$HX zb!X^i5agx!b{SCs()3F)2uV5~g|!`P6?x;?lJAthx$;%Izb(1f=~rVNhSDl;ce5*q zB}oMLaXx9_VN*OcT=Xh=cghxVkKRBW1n-E9VMQS@c^^2n?_@sVdlAfe<*$!uZI# zQUIGL5CY2tPJ2y&y%7k3>kN!n%qkUur3-|>0fF*U6JTYS5wSTWUVXHm z=3YMcf^dt+F*!c_dr&dUcjxI7$C6t|c;~nw*XrBm^;^J)l#osM-sZ~d&3I1E!4WxsoE@9~l!Q}dORL?kN*eCVN5On literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-x5_2-Cpu0Cst.aml b/ACPI/origin/SSDT-x5_2-Cpu0Cst.aml new file mode 100755 index 0000000000000000000000000000000000000000..1c13cb6ffd92e9bc09cf9ba3dec7187b5212f6d6 GIT binary patch literal 1023 zcmZ`%O>5gg5S^8hdMgKN8_N`$6jKVll%hmnA4(zZN=^e(5s{EDr8%{?fS~Qc>732Pn5i+5F=0~Z znlV#jB5QPel%c(MJlXO}by%c>{hj{M>tF5B58D1MNQmxlSE>+*1B(!nX!zKm7UVh9 z{UfBB+=cl6Kt2I7ZS(Lcqc+6*B~=8(lQvHafo;lk9_Lo4aD-L5Ao*4umHZ9yRbgHX zdOMywa0S_asg97{b3JF9IYg%82u?_q7c&~3JU@pcoA>>noTwC5TJ!iAvr-cdFsKf& z-kL|!0hU~|dJ|-G6S(M!lCr+mA(7XiCVqHx$@knPNtb-nUBb~kSj`tf)(7Xt2j#{G zd ziDQJ!F-GQ?AahKSIcCTlb7YPMGRG2$V`zZPL3V*5vI`86U0{gp0ztL)VaS=o;b*T>xnX$N>NV literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-x5_4-Cpu0Hwp.aml b/ACPI/origin/SSDT-x5_4-Cpu0Hwp.aml new file mode 100755 index 0000000000000000000000000000000000000000..4aa1285de31d2620d3d1be99301a2be95948c357 GIT binary patch literal 186 zcmWFzb_v} zK%5X~zYtcKphtK>7$XwL5hSC}3{&qM;B3T#CgSf55&;|O?B?#m$RJ>dus}pL9;k<5 Zfp|4S1rN}Tj0{Vh1N@yAvH>Y)BLGOJEdc-k literal 0 HcmV?d00001 diff --git a/ACPI/origin/SSDT-x5_5-ApHwp.aml b/ACPI/origin/SSDT-x5_5-ApHwp.aml new file mode 100755 index 0000000000000000000000000000000000000000..e6a66a6c6510e0350a4b741935f16fbb111a9ecd GIT binary patch literal 791 zcmaiwy9&ZU6a_B^!9v7BV=Fdxx+m|H5`_pNOOi5>N;@H)t)F7yhZ+UtSjb(rnPrOE zQ5-;*KJsV5FhqQZTAom^hg@OB>FEQp8^jm9F}H+J@9P@(PF zQ5q-9!iFZ?ZOj%3e^$a#VTDZoB%Be+K(52aeD{a1fdZEd&>#jnF~p0&s?a1{@7I z8gMk=O9SPf%4kEE+syl5G{b0y(F~&*Mza-`Q=TjPwyseA&lOZ~C<9B2+J7&q!n*90 zw2rkZ9p&#z&(upxzqnLIHR&6AkNLBEl(!|%i#po)cC;GU@z|xg Qj;!m6!p9Tp{oml_6`ya>5C8xG literal 0 HcmV?d00001 diff --git a/ACPI/origin/UEFI.aml b/ACPI/origin/UEFI.aml new file mode 100755 index 0000000000000000000000000000000000000000..5e5b3eef1e5bca829ae83612709f17f9eb40246a GIT binary patch literal 318 zcmWG_b@Q}iWME)4_i^>}5AzQR(DgGiR!|5KWMBvgadl>5U|^WOaX#;#a})j6Y*aP9 z`E-Sg83Qj+6a+2;F-Qe75VHU=D-g2*u>ugk1Y!;#<^*CcAm#>QW>wbzKc!xKH6J;2 z<=jS|#bTPT8W;Q&b!={xYV*@Kn3KvdJJO)7(0j`qZlU#I><#COuV-xfeb;@>Ma90K zl1p`-9xe>LdtB6I{qI$8uBZMJy=7=^aQ#Gp*UqZe3pbM^j9BMAd^d|-+_&HDe4|jp zZMC%GxFF4zRPT-D)|D)G_qRseS${(*?}yXOG_(H|J#*IU-*CBUWPH}OamBH=dhQUZ zIW^ProcdBd=H~b}u}5AzQR(DgGiR!|5KWMBvgadl<_%CQ460IfO)0RR91 literal 0 HcmV?d00001 diff --git a/ACPI/origin/XSDT.aml b/ACPI/origin/XSDT.aml new file mode 100755 index 0000000000000000000000000000000000000000..7027857b66b18e6a5462d7efb90430af2b0e32ab GIT binary patch literal 268 zcmazDb_wBOWME*-_i^>}5AzQR(DgGiR!|5KWMBvgadl>50D=o~(IAS!ARa;=2!+re zpyCgp^Z_Wn0ZK1`(i5OGLkvXUgJ=kS0ZJc$(i@=k1Ss7Ar3;{R0+bGb(hgAC07_qg bx=#SgXMoZlqM-Id=?hT$0F-tJ2Fn8gc!Vqg literal 0 HcmV?d00001 diff --git a/ACPI/patch-files/1_fix_compile.txt b/ACPI/patch-files/1_fix_compile.txt new file mode 100755 index 0000000..c6dd51e --- /dev/null +++ b/ACPI/patch-files/1_fix_compile.txt @@ -0,0 +1,34 @@ +#Maintained by: franksanderdo +# patches to allow compilation after disassembly related T470p +# I found some weird "One" between the definitions of SS1 to SS4 +# Name (SS1, 0x00) +# Name (SS2, 0x00) +# Name (SS3, One) +# One <--- +# Name (SS4, One) +# One <--- +# Those create the error: +# Compiler aborting due to parser-detected syntax error(s) +# DSDT.dsl 150: Name (SS4, One) +# Error 6126 - ^ syntax error, unexpected PARSEOP_NAME +# +# I am removing the two with: + +into_all all code_regex (\s+One\n) replaceall_matched +begin +\n +end; + +# for whatever reason the disassembler creates an external reference for BNUM +# BNUM also gets generated in: +# Field (GNVS, AnyAcc, Lock, Preserve) +# this creates the error: +# DSDT.dsl 179: BNUM, 8, +# Error 6074 - ^ Name already exists in scope (BNUM) +# +# I am renaming the external reference with: + +into_all all code_regex External\s+\(BNUM, replaceall_matched +begin +External (BNU1, +end; diff --git a/ACPI/patch-files/3_Fn_Keys.txt b/ACPI/patch-files/3_Fn_Keys.txt new file mode 100755 index 0000000..09dda5b --- /dev/null +++ b/ACPI/patch-files/3_Fn_Keys.txt @@ -0,0 +1,83 @@ +# T460 - based on T440s keys +# +# F1-F3 - use extend scan code +# F1 - Mute e020 +# F2 - Volume Down e02e +# F3 - Volume up e030 + +# F4-F12 specials use _Q methods +# ADB map +# 0x69, // 64 F13 +# 0x6b, // 65 F14 +# 0x71, // 66 F15 +# 0x6a, // 67 F16 +# 0x40, // 68 F17 +# 0x4f, // 69 F18 +# 0x50, // 6a F19 +# 0x5a, // 6b F20 +# DEADKEY,// 6c F21 +# DEADKEY,// 6d F22 +# DEADKEY,// 6e F23 + +# _Q6A (F4 key -> F17) Microphone Mute key +into method label _Q6A replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x0168)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x01e8)\n +end; + +# _Q15 (F5 key) brightness down key +into method label _Q15 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x0205)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x0285)\n +end; + +# _Q14 (F6 key) brightness up key +into method label _Q14 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x0206)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x0286)\n +end; + +# _Q16 (F7 key) Projector / Mirror mode key +into method label _Q16 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x026e)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x02ee)\n +end; + +# _Q64 (F8 key -> F18 ) Wireless disable key +into method label _Q64 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x0169)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x01e9)\n +end; + +# _Q66 (F9 key -> F19 ) Settings key +into method label _Q66 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x016a)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x01ea)\n +#end; + +# _Q67 (F10 -> F20) Spotlight key +into method label _Q67 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x016b)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x01eb)\n +end; + + _Q68 (F11 key) App switcher key +into method label _Q68 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x020A)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x028A)\n +end; + +# _Q69 (F12 key) Launchpad key +into method label _Q69 replace_content +begin + Notify(\_SB.PCI0.LPCB.PS2K, 0x0209)\n + Notify(\_SB.PCI0.LPCB.PS2K, 0x0289)\n +end; diff --git a/README-kexts.md b/README-kexts.md new file mode 100644 index 0000000..ed0df27 --- /dev/null +++ b/README-kexts.md @@ -0,0 +1,9 @@ +FakeSMC +VoodooPS2Controller +AppleALC +USBInjectAll +Lilu +IntelGraphicsFixup +IntelMausiEthernet +BrcmFirmwareRepo +BrcmPatchRAM2 diff --git a/README-references.md b/README-references.md new file mode 100644 index 0000000..f191f4f --- /dev/null +++ b/README-references.md @@ -0,0 +1,7 @@ +https://www.tonymacx86.com/threads/faq-read-first-laptop-frequent-questions.164990/ +https://www.tonymacx86.com/threads/guide-2015-x1-carbon-yosemite.162391/ +https://www.tonymacx86.com/threads/99-perfect-sierra-10-12-6-on-thinkpad-x1-carbon-5th-gen-with-dual-boot-unchanged-win7.237922/ +https://www.tonymacx86.com/threads/guide-creating-a-custom-ssdt-for-usbinjectall-kext.211311/ +https://www.tonymacx86.com/threads/laptop-screen-goes-blank-when-plugging-in-external-monitor.226226/ +https://www.tonymacx86.com/threads/override-edid-for-display-problem.47200/ +https://www.tonymacx86.com/threads/an-idiots-guide-to-imessage.196827/ diff --git a/README-utilities.md b/README-utilities.md new file mode 100644 index 0000000..a3f89ec --- /dev/null +++ b/README-utilities.md @@ -0,0 +1,7 @@ +Clover Configurator +PlistEdit Pro +MaciASL +IORegistryExplorer +DarwinDumper +FixEDID +KextBeast diff --git a/RehabMan-May2018-config_HD615_620_630_640_650.plist b/RehabMan-May2018-config_HD615_620_630_640_650.plist new file mode 100755 index 0000000..baa6000 --- /dev/null +++ b/RehabMan-May2018-config_HD615_620_630_640_650.plist @@ -0,0 +1,511 @@ + + + + + Comment + This file is for 10.12.6+ with native KabyLake support + ACPI + + AutoMerge + + FixHeaders + + Comment-DisabledAML + Disable other forms of CPU PM due to SSDT/Generate/PluginType=true + DisabledAML + + SSDT.aml + SSDT-XCPM.aml + SSDT-PluginType1.aml + + DSDT + + DropOEM_DSM + + Fixes + + Comment-IRQ Fix + The following fixes may be needed for onboard audio/USB/etc + FixTMR + + FixRTC + + FixIPIC + + FixHPET + + + Patches + + + Comment + change OSID to XSID (to avoid match against _OSI XOSI patch) + Disabled + + Find + T1NJRA== + Replace + WFNJRA== + + + Comment + change _OSI to XOSI + Disabled + + Find + X09TSQ== + Replace + WE9TSQ== + + + Comment + change _DSM to XDSM + Disabled + + Find + X0RTTQ== + Replace + WERTTQ== + + + Comment + change EC0 to EC + Disabled + + Find + RUMwXw== + Replace + RUNfXw== + + + Comment + change H_EC to EC + Disabled + + Find + SF9FQw== + Replace + RUNfXw== + + + Comment + change ECDV to EC + Disabled + + Find + RUNEVg== + Replace + RUNfXw== + + + Comment + change HDAS to HDEF + Find + SERBUw== + Replace + SERFRg== + + + Comment + change HECI to IMEI + Find + SEVDSQ== + Replace + SU1FSQ== + + + Comment + change MEI to IMEI + Find + TUVJXw== + Replace + SU1FSQ== + + + Comment + change GFX0 to IGPU + Find + R0ZYMA== + Replace + SUdQVQ== + + + Comment + change PCI0.VID to IGPU #1 (Thinkpad) + Find + UENJMFZJRF8= + Replace + UENJMElHUFU= + + + Comment + change PCI0.VID to IGPU #2 (Thinkpad) + Find + VklEXwhfQURSDAAAAgA= + Replace + SUdQVQhfQURSDAAAAgA= + + + + DropTables + + + Signature + #MCFG + + + Signature + DMAR + + + Signature + SSDT + TableId + xh_rvp10 + + + SSDT + + DropOem + + Generate + + PluginType + + + NoOemTableId + + + + Boot + + Arguments + kext-dev-mode=1 dart=0 nv_disable=1 -disablegfxfirmware + #DefaultVolume + LastBootedVolume + NeverHibernate + + Secure + + Timeout + 5 + + Devices + + AddProperties + + + Device + NVidia + Key + name + Value + I2Rpc3BsYXkA + Comment + Inject "name" as (data)"#display" to disable graphics drivers on NVidia + + + Device + NVidia + Key + IOName + Value + #display + Comment + Inject "IOName" as "#display" to disable graphics drivers on NVidia + + + Device + NVidia + Key + class-code + Value + /////w== + Comment + Inject bogus class-code to prevent graphics drivers loading for NVidia + + + Device + ATI + Key + name + Value + I2Rpc3BsYXkA + Comment + Inject "name" as (data)"#display" to disable graphics drivers on AMD + + + Device + ATI + Key + IOName + Value + #display + Comment + Inject "IOName" as "#display" to disable graphics drivers on AMD + + + Device + ATI + Key + class-code + Value + /////w== + Comment + Inject bogus class-code to prevent graphics drivers loading for AMD + + + Device + ATI + Key + vendor-id + Value + //8AAA== + Comment + Inject bogus vendor-id to prevent graphics drivers loading for AMD + + + Device + ATI + Key + device-id + Value + //8AAA== + Comment + Inject bogus device-id to prevent graphics drivers loading for AMD + + + #AddProperties + + + Device + IntelGFX + Key + hda-gfx + Value + b25ib2FyZC0xAA== + Comment + hda-gfx=onboard-1 for HDMI audio + + + Device + HDA + Key + hda-gfx + Value + b25ib2FyZC0xAA== + Comment + hda-gfx=onboard-1 for HDMI audio + + + Device + HDA + Key + layout-id + Value + AwAAAA== + Comment + layout-id=3 + + + Device + HDA + Key + PinConfigurations + Value + + + + Audio + + Inject + 0 + + FakeID + + #Kaby Lake-Comment + To avoid automatic Clover fake device-id (Skylake) injection + IntelGFX + 0x59168086 + + USB + + FixOwnership + + AddClockID + + Inject + + + UseIntelHDMI + + + DisableDrivers + + VBoxHfs + + GUI + + Custom + + Entries + + + Hidden + + Type + OSXRecovery + + + Type + Windows + Title + Windows + + + + Hide + + Preboot + + Mouse + + Enabled + + + Scan + + Entries + + Legacy + + Linux + + Tool + + + #ScreenResolution + 1920x1080 + Theme + BGM + + Graphics + + EDID + + Inject + + + ig-platform-id + 0x591b0000 + Inject + + ATI + + Intel + + NVidia + + + + KernelAndKextPatches + + AppleRTC + + DellSMBIOSPatch + + KernelLapic + + KernelPm + + ForceKextsToLoad + + \System\Library\Extensions\IONetworkingFamily.kext + \System\Library\Extensions\AppleIntelKBLGraphicsFramebuffer.kext + + KextsToPatch + + + Comment + 0x591b0000, 32MB BIOS, 19MB framebuffer 9MB cursor bytes (credit RehabMan) + Disabled + + Name + com.apple.driver.AppleIntelKBLGraphicsFramebuffer + Find + AABgAgAAUAE= + Replace + AAAwAQAAkAA= + + + Comment + 0x591b0000, 0105 instead of 0306, HDMI + Disabled + + Name + com.apple.driver.AppleIntelKBLGraphicsFramebuffer + Find + AgQKAAAIAACHAQAAAwYKAAAEAACHAQAA/wAAAAEAAAAgAAAA + Replace + AQUKAAAIAACHAQAAAgQKAAAIAACHAQAA/wAAAAEAAAAgAAAA + + + Comment + 0x591b0000, 0105 instead of 0204, HDMI + Disabled + + Name + com.apple.driver.AppleIntelKBLGraphicsFramebuffer + Find + AgQKAAAIAACHAQAAAwYKAAAEAACHAQAA/wAAAAEAAAAgAAAA + Replace + AQUKAAAIAACHAQAAAwYKAAAEAACHAQAA/wAAAAEAAAAgAAAA + + + Comment + 0x591b0000, eliminate all external ports (0204 and 0306) + Disabled + + Name + com.apple.driver.AppleIntelKBLGraphicsFramebuffer + Find + AgQKAAAIAACHAQAAAwYKAAAEAACHAQAA/wAAAAEAAAAgAAAA + Replace + /wAAAAEAAAAgAAAA/wAAAAEAAAAgAAAA/wAAAAEAAAAgAAAA + + + KernelToPatch + + + Comment + MSR 0xE2 _xcpm_idle instant reboot(c) Pike R. Alpha + Disabled + + Find + ILniAAAADzA= + Replace + ILniAAAAkJA= + + + + RtVariables + + CsrActiveConfig + 0x67 + BooterConfig + 0x28 + + SMBIOS + + ProductName + MacBookPro14,1 + Trust + + + SystemParameters + + InjectKexts + Detect + + +