mirror of
https://github.com/tylernguyen/x1c6-hackintosh.git
synced 2025-02-05 01:23:14 -06:00
Update TB3 and XHC2
This commit is contained in:
Tyler Nguyen
parent
7c84fa90ea
commit
a07a7f21dc
35 changed files with 6928 additions and 7189 deletions
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EFI-OpenCore/EFI/OC/ACPI/SSDT-PWRB.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-PWRB.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB0.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB0.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB1.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB1.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB2-XHC2.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB2-XHC2.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB2.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB2.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB3.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB3.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB4.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB4.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB5.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB5.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB6.aml
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EFI-OpenCore/EFI/OC/ACPI/SSDT-TB-DSB6.aml
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@ -94,6 +94,14 @@
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<key>Path</key>
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<string>SSDT-Keyboard.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>ACPI-Powerbutton</string>
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-PWRB.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>Fake DMAC (Fix up memory controller)</string>
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@ -116,7 +124,23 @@
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-TB3.aml</string>
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<string>SSDT-TB-DSB0.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>Partition and continuation of Thunderbolt 3 patch.</string>
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-TB-DSB1.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>Partition and continuation of Thunderbolt 3 patch.</string>
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-TB-DSB2.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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@ -124,7 +148,39 @@
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-XHC2.aml</string>
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<string>SSDT-TB-DSB2-XHC2.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>Partition and continuation of Thunderbolt 3 patch.</string>
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-TB-DSB3.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>Partition and continuation of Thunderbolt 3 patch.</string>
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-TB-DSB4.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>Partition and continuation of Thunderbolt 3 patch.</string>
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-TB-DSB5.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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<string>Partition and continuation of Thunderbolt 3 patch.</string>
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<key>Enabled</key>
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<true/>
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<key>Path</key>
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<string>SSDT-TB-DSB6.aml</string>
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</dict>
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<dict>
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<key>Comment</key>
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31
README.md
31
README.md
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@ -1,7 +1,7 @@
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# macOS on Thinkpad X1 Carbon 6th Generation, Model 20KH\*
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[](https://www.apple.com/macos/catalina/)
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[](https://support.apple.com/en-us/HT210642)
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[](https://www.apple.com/macos/big-sur/)
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[](https://www.apple.com/newsroom/2020/11/macos-big-sur-is-here/)
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[](https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-x-series-laptops/thinkpad-x1-carbon-6th-gen-type-20kh-20kg/downloads/driver-list/component?name=BIOS%2FUEFI)
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[](https://github.com/tylernguyen/x1c6-hackintosh/blob/master/docs/references/x1c6-Platform_Specifications.pdf)
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[](https://github.com/acidanthera/OpenCorePkg)
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@ -25,23 +25,19 @@
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##### Recent | [Changelog Archive](https://github.com/tylernguyen/x1c6-hackintosh/blob/master/docs/CHANGELOG.md)
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> ### 2020-11-13
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> ### 2020-11-14
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#### Added
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- `SSDT-PWRB` to patch power button.
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#### Changed
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- Upgraded to Big Sur
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- Upgraded to BIOS-v1.50 and added corresponding ACPI dump.
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- Upgraded `YogaSMC` to stable build `1.3.0`
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- Compatibiltity and improvements on `SSDT-Battery`. Thanks @benbender
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- Experimental TB3 patch by @benbender:
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- Complete hotplug and power management without modded TB3 controller firmware
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- NOTE: Brokenb USB 3.1 Gen2 hotplug still, but everything else is amazing!
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- Everyone thanks @benbender again! This would not have been possible without his hard work and research.
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#### Removed
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- Deprecated legacy keyboard patches. `YogaSMC` is now recommended and preferred.
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- `TbtForcePower.efi` as it is no longer needed.
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- `ThunderboltReset.kext` has it is no longer needed.
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- Parition TB3 patch into smaller, more readable chunks.
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- `SSDT-XHC2` is also now apart of this.
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- Removed experimental stuff from `SSDT-Sleep`
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- Updated to `SSDT-Battery` to rev8, thanks @benbender
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- Updated some documenation, with more detailed documentation coming.
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<details>
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<summary><strong> SUMMARY </strong></summary>
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@ -139,7 +135,7 @@
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- [MountEFI](https://github.com/corpnewt/MountEFI) to quickly mount EFI partitions.
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- [IORegistryExplorer](https://developer.apple.com/downloads), for diagnosis.
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- [Hackintool](https://www.insanelymac.com/forum/topic/335018-hackintool-v286/), for diagnostic ONLY, Hackintool should not be used for patching, it is outdated.
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- [SPI Programmer CH341a and SOIC8 connector](https://www.amazon.com/Organizer-Socket-Adpter-Programmer-CH341A/dp/B07R5LPTYM) are needed if you are going to mod your BIOS/TB3 controller for optimizations and a better and more native macOS experience.
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- [SPI Programmer CH341a and SOIC8 connector](https://www.amazon.com/Organizer-Socket-Adpter-Programmer-CH341A/dp/B07R5LPTYM) are needed if you are going to mod your BIOS for optimizations and a better and more native macOS experience.
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- Patience and time, especially if this is your first time Hackintosh-ing.
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</details>
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@ -211,7 +207,6 @@ https://tylerspaper.com/support/
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- [@MSzturc](https://github.com/MSzturc) for adding my requested features to ThinkpadAssistant.
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paranoidbashthot and \x for the BIOS mod to unlocked Intel Advance Menu.
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- [@zhen-zen](https://github.com/zhen-zen) for YogaSMC
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- [CaseySJ](https://www.tonymacx86.com/members/caseysj.2134452/) for the custom modded Thunderbolt 3 firmware.
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The greatest thank you and appreciation to the [Acidanthera](https://github.com/acidanthera) team.
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@ -43,15 +43,16 @@ See highlighted example:
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> ### SSDT-Darwin - Detects macOS to enable other patches
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> ### SSDT-Battery-Legacy - Enables Battery Status in macOS (Lgeacy)
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**Need `OpenCore Patches/ Battery-Legacy.plist`**
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> ### SSDT-AC - Patch to load AppleACPIACAdapter
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> ### SSDT-Battery - Enables Battery Status in macOS
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- Single battery system: only `BAT0` in ACPI, no `BAT1`.
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> ### SSDT-HWAC - Fix axxess to 16byte-EC-field HWAC
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- Thanks @benbender
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> ### SSDT-PLUG - Enables Native Intel Power Managements
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> ### SSDT-PM - Enables Native Intel Power Managements
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Why?: `Processor` search in DSDT, rename `PR` to other variables as needed.
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@ -93,40 +94,15 @@ Enables:
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> ### SSDT-Keyboard - Remap PS2 Keys, EC Keys are handled by `BrightnessKeys.kext`
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- Configures TrackPoint
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- Configures TrackPad (if handled by `VoodooPS2Controller.kext`)
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- Remap 1: PrtSc to F13
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- Remap 2: Fn + K to Deadkey
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- Remap 3: Fn + P to Deadkey
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For Fn 1-12 functions, check the following option within `Preferences/Keyboard`:
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<details>
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<summary><strong> SSDT-Keyboard-Legacy </strong></summary>
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<br>
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**Needs `OpenCore Patches/ Keyboard-Legacy.plist`**
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- Legacy patch to be used if you prefer [ThinkpadAssisstant](https://github.com/MSzturc/ThinkpadAssistant) over [YogaSMC](https://github.com/zhen-zen/YogaSMC) and `BrightnessKeys.kext`
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- Keyboard path is `\ _SB.PCI0.LPCB.KBD`.
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- For multimedia functions:
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- Remap 1: F4 (Network) to F20 (for use with ThinkpadAssistant)
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- Remap 2: F5 (Brightness Down)
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- Remap 3: F6 (Brightness Up)
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- Remap 4: F7 (Dual Display) to F16 (for use with ThinkpadAssistant)
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- Remap 5: F8 (Network) to F17 (for use with ThinkpadAssistant)
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- Remap 6: F9 (Settings) to F18 (for use with ThinkpadAssistant)
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- Remap 7: F10 (Bluetooth) to [Left Shift + F8] ((for use with ThinkpadAssistant))
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- Remap 8: F11 (Keyboard) to [Shift+Up]
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- Remap 9: F12 (Star) to F19 (for use with ThinkpadAssistant)
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- Remap 10: PrtSc to F13
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- Remap 11: Fn + K to Deadkey
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- Remap 12: Fn + P to Deadkey
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- For Fn 1-12 functions, check the following option within `Preferences/Keyboard`:
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</details>
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> ### SSDT-Sleep - Patch macOS Sleep, S3
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- Comprehensive sleep/wake patch.
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- Fixes restart on shutdown.
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**Needs `OpenCore Patches/ Sleep.plist`**
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> ### SSDT-EC - Alow Reads/Write and Provide an Interface with Embedded Controller via YogaSMC
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@ -137,12 +113,13 @@ Two parts:
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> ### SSDT-XHC1 - USB 2.0/3.0
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**Needs `OpenCore Patches/ XHC1.plist`**
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- Map USB 2.0/3.0
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- Fix Restart on Shutdown
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- Patch USB Power Properties
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> ### SSDT-XHC2 - USB 3.1
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> ### SSDT-TB-DSB0 to SSDT-TB-DSB6
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- Patch USB 3.1
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> ### SSDT-USBX - USB Power Properties
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- Patch Thunderbolt 3 Hotplug
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- Patch Thunderbolt 3 Power Management
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- Patch Thunderbolt 3 native interfacing with macOS's System Report
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> ### SSDT-DMAC - Patch Memory Controller
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@ -155,6 +132,7 @@ Why?: `PMCR`,`APP9876` missing in DSDT.
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> ### SSDT-PWRB
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Why?: `PNP0C0C` missing in DSDT.
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- Patch power button.
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> ### SSDT-ALS0
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@ -3,6 +3,20 @@
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All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/).
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> ### 2020-11-14
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#### Added
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- `SSDT-PWRB` to patch power button.
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#### Changed
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- Parition TB3 patch into smaller, more readable chunks.
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- `SSDT-XHC2` is also now apart of this.
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- Removed experimental stuff from `SSDT-Sleep`
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- Updated to `SSDT-Battery` to rev8, thanks @benbender
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- Updated some documenation, with more detailed documentation coming.
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> ### 2020-11-13
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#### Changed
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@ -1,7 +1,7 @@
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// Depends on /patches/OpenCore Patches/ Battery.plist
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//
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// SSDT-BATX
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// Revision 7
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// Revision 8
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//
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// Copyleft (c) 2020 by bb. No rights reserved.
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//
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@ -32,6 +32,7 @@
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// Additionally, as this implementation is more straight-forward and according to specs, it may reveal bugs and glitches
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// in other parts of the system.
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//
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//
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// Compatibility:
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//
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// - Lenovo Thinkpad X1 Carbon generation 6 (X1C6)
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@ -93,6 +94,7 @@
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//
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// Changelog:
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//
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// Revision 8 - Fix battery-state handling, small corrections
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// Revision 7 - Smaller fixes, adds Notify-patches as EC won't update without them in edge-cases, replaces fake serials with battery-serial
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// Revision 6 - fixes, make the whole system more configureable, adds technical backround-documentation
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// Revision 5 - optimization, bug-fixing. Adds temp, concatenates string-data on combined batteries.
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@ -104,8 +106,7 @@
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//
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// Credits @benbender
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DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
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DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00008000)
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{
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// Please ensure that your LPC bus-device is available at \_SB.PCI0.LPCB (check your DSDT).
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// Some older Thinkpads provide the LPC on \_SB.PCI0.LPC and if thats the case for you,
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@ -124,8 +125,6 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
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External (_SB.PCI0.LPCB.EC.BAT1._STA, MethodObj)
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External (_SB.PCI0.LPCB.EC.BAT1._HID, IntObj)
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External (H8DR, FieldUnitObj)
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Scope (\_SB.PCI0.LPCB.EC)
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{
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@ -168,7 +167,7 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
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//
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// Implicitly disabled if BBIS is disabled
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//
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Name (BDQP, One) // possible values: One / Zero
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Name (BDQP, Zero) // possible values: One / Zero
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/************************* Mutex **********************************/
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@ -198,21 +197,6 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
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// Offset (0x39),
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HB1S, 7, /* Battery 1 state */
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HB1A, 1, /* Battery 1 present */
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Offset (0x46),
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, 1,
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, 1,
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, 1,
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, 1,
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HPAC, 1,
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// Offset (0xC9),
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// HWAT, 8, /* Wattage of AC/DC */
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// Zero on the X1C6. Probably because of the charging is handled by the TI USB-C-PD-chip.
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// Offset (0xCC),
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// PWMH, 8, /* CC : AC Power Consumption (MSB) */
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// PWML, 8, /* CD : AC Power Consumption (LSB) - unit: 100mW */
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}
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//
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@ -686,7 +670,6 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
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}
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||||
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/**
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* Extended Battery Static Information pack layout
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*/
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@ -1017,16 +1000,15 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
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Return (Local0)
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}
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/**
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* Battery Real-time Information pack layout
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*/
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Name (PBST, Package (0x04)
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{
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0x00000000, // 0x00: BSTState - Battery State
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// Bit 0 - discharge
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// Bit 1 - charge
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// Bit 2 - critical state
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// 0 - Not charging / Full
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// 1 - Discharge
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// 2 - Charging
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0, // 0x01: BSTPresentRate - Battery Present Rate [mW], 0xFFFFFFFF if unknown rate
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0, // 0x02: BSTRemainingCapacity - Battery Remaining Capacity [mWh], 0xFFFFFFFF if unknown capacity
|
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0, // 0x03: BSTPresentVoltage - Battery Present Voltage [mV], 0xFFFFFFFF if unknown voltage
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||||
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@ -1076,30 +1058,6 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
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Local0 = 0
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||||
}
|
||||
|
||||
// Set critical flag if battery is empty
|
||||
If ((Local6 & 0x0F) == 0)
|
||||
{
|
||||
Local6 = Local6 | 0x04
|
||||
}
|
||||
|
||||
Store (Zero, Local1)
|
||||
|
||||
// Check if AC is present
|
||||
If (HPAC)
|
||||
{
|
||||
// Set only charging/discharging bits
|
||||
And (Local0, 0x03, Local1)
|
||||
}
|
||||
Else
|
||||
{
|
||||
// Always discharging when on battery power
|
||||
Local0 = One
|
||||
}
|
||||
|
||||
// Flag if the battery level is critical
|
||||
Local4 = Local0 & 0x04
|
||||
Local0 = Local1 | Local4
|
||||
|
||||
|
||||
//
|
||||
// Information Page 1 -
|
||||
|
|
@ -1128,21 +1086,16 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
|
|||
// and negative while discharging.
|
||||
Local1 = SBAC /* \_SB_.PCI0.LPCB.EC__.BATX.SBAC */
|
||||
|
||||
If ((Local1 >= 0x8000))
|
||||
{
|
||||
// If discharging
|
||||
If ((Local0 & 0x01))
|
||||
If (Local0 == 1)
|
||||
{
|
||||
If ((Local1 >= 0x8000))
|
||||
{
|
||||
// Negate present rate
|
||||
Local1 = (0x00010000 - Local1)
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
// Error
|
||||
Local1 = 0x00
|
||||
}
|
||||
}
|
||||
ElseIf (!(Local0 & 0x02))
|
||||
{
|
||||
Local1 = 0x00
|
||||
}
|
||||
|
|
@ -1262,17 +1215,17 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
|
|||
Local4 = DerefOf (BT0P [0x00])
|
||||
Local5 = DerefOf (BT1P [0x00])
|
||||
|
||||
// Discharging
|
||||
// Not charging / Full
|
||||
Local0 [0x00] = 0
|
||||
|
||||
If ((Local4 == 2) || (Local5 == 2))
|
||||
{
|
||||
// 2 = Critical
|
||||
// 2 = Charging
|
||||
Local0 [0x00] = 2
|
||||
}
|
||||
ElseIf ((Local4 == 1) || (Local5 == 1))
|
||||
{
|
||||
// 1 = Charging
|
||||
// 1 = Discharging
|
||||
Local0 [0x00] = 1
|
||||
}
|
||||
|
||||
|
|
@ -1388,11 +1341,6 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
|
|||
Debug = "BATX:CBSS()"
|
||||
}
|
||||
|
||||
If (!H8DR)
|
||||
{
|
||||
Return (PBSS)
|
||||
}
|
||||
|
||||
If (HB0A)
|
||||
{
|
||||
PBS0 = GBSS (0x00, PBSS)
|
||||
|
|
@ -1454,7 +1402,6 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
|
|||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* Battery Information Supplement pack layout
|
||||
*/
|
||||
|
|
@ -1511,6 +1458,13 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Battery", 0x00007000)
|
|||
|
||||
Release (BAXM)
|
||||
|
||||
If (BDBG == One)
|
||||
{
|
||||
Concatenate ("BATX:CBIS:BISConfig BATX ", PBIS [0x00], Debug)
|
||||
Concatenate ("BATX:CBIS:BISManufactureDate BATX ", PBIS [0x01], Debug)
|
||||
Concatenate ("BATX:CBIS:BISPackLotCode BATX ", PBIS [0x02], Debug)
|
||||
}
|
||||
|
||||
Return (PBIS)
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* Fix up memory controller
|
||||
*/
|
||||
// Fix up memory controller
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_DMAC", 0x00001000)
|
||||
{
|
||||
|
|
|
|||
35
patches/SSDT-PWRB.dsl
Normal file
35
patches/SSDT-PWRB.dsl
Normal file
|
|
@ -0,0 +1,35 @@
|
|||
// Fix power-button
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_PWRB", 0x00001000)
|
||||
{
|
||||
// Common utils from SSDT-Darwin.dsl
|
||||
External (DTGP, MethodObj) // 5 Arguments
|
||||
External (OSDW, MethodObj) // 0 Arguments
|
||||
|
||||
Scope (_SB)
|
||||
{
|
||||
// Fix ACPI power-button-device
|
||||
// @See https://github.com/daliansky/OC-little/blob/master/06-%E6%B7%BB%E5%8A%A0%E7%BC%BA%E5%A4%B1%E7%9A%84%E9%83%A8%E4%BB%B6/SSDT-PWRB.dsl
|
||||
// @See https://github.com/khronokernel/DarwinDumped/blob/b6d91cf4a5bdf1d4860add87cf6464839b92d5bb/MacBookPro/MacBookPro14%2C1/ACPI%20Tables/DSL/DSDT.dsl#L8082
|
||||
Device (PWRB)
|
||||
{
|
||||
Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0B)
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
// EOF
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
* Please remove every GPRW-, Name6x-, PTSWAK-, FixShutdown-, WakeScren-Patches or similar prior using.
|
||||
* If you adapt this patches to other models, check the occurence of the used variables and methods on your own DSDT beforehand.
|
||||
*
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_Sleep", 0x00001000)
|
||||
|
|
@ -53,13 +53,16 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Sleep", 0x00001000)
|
|||
External (OSDW, MethodObj) // 0 Arguments
|
||||
|
||||
// Sleep-config from BIOS
|
||||
External (S0ID, FieldUnitObj) // S0 enabled
|
||||
External (S0ID, FieldUnitObj) // BIOS-S0 enabled, "Windows Modern Standby"
|
||||
External (STY0, FieldUnitObj) // S3 Enabled?
|
||||
|
||||
// Package to signal to OS S3-capability. We'll add it if missing.
|
||||
External (SS3, FieldUnitObj) // S3 Enabled?
|
||||
External (_S3)
|
||||
|
||||
Name (DIEN, Zero) // DeepIdle (ACPI-S0) enabled
|
||||
Name (INIB, One) // Initial BootUp
|
||||
|
||||
// This make OSX independent of the BIOS-sleep-setting on X1C6 and force-enable S3
|
||||
If (OSDW ())
|
||||
{
|
||||
|
|
@ -181,8 +184,6 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Sleep", 0x00001000)
|
|||
// Update ac-state
|
||||
\PWRS = \_SB.PCI0.LPCB.EC.AC._PSR ()
|
||||
|
||||
// DYTC (0000000000000002)
|
||||
|
||||
\_SB.SCGE = One
|
||||
}
|
||||
|
||||
|
|
@ -224,17 +225,17 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Sleep", 0x00001000)
|
|||
\_SB.PCI0.HDAS.PMEE = Zero
|
||||
}
|
||||
|
||||
If (CondRefOf (\_SB.PCI0.XHC.USBM))
|
||||
{
|
||||
\_SB.PCI0.XHC.USBM ()
|
||||
}
|
||||
// If (CondRefOf (\_SB.PCI0.XHC.USBM))
|
||||
// {
|
||||
// \_SB.PCI0.XHC.USBM ()
|
||||
// }
|
||||
|
||||
If (CondRefOf (\_SB.PCI0.RP09.UPSB.LSTX))
|
||||
{
|
||||
Debug = "SLEEP:_PTS: Call TB-LSTX"
|
||||
\_SB.PCI0.RP09.UPSB.LSTX (Zero, One)
|
||||
\_SB.PCI0.RP09.UPSB.LSTX (One, One)
|
||||
}
|
||||
// If (CondRefOf (\_SB.PCI0.RP09.UPSB.LSTX))
|
||||
// {
|
||||
// Debug = "SLEEP:_PTS: Call TB-LSTX"
|
||||
// \_SB.PCI0.RP09.UPSB.LSTX (Zero, One)
|
||||
// \_SB.PCI0.RP09.UPSB.LSTX (One, One)
|
||||
// }
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -274,7 +275,7 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Sleep", 0x00001000)
|
|||
|
||||
If (Arg1 >= 0x04)
|
||||
{
|
||||
Debug = Concatenate ("SLEEP: GPRW patched to 0x00: ", Arg1)
|
||||
// Debug = Concatenate ("SLEEP: GPRW patched to 0x00: ", Arg1)
|
||||
|
||||
Local0[0x01] = 0x00
|
||||
}
|
||||
|
|
@ -292,15 +293,20 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Sleep", 0x00001000)
|
|||
{
|
||||
Method (_PS0, 0, Serialized)
|
||||
{
|
||||
If (OSDW () && S0ID == One)
|
||||
If (OSDW () && DIEN == One && INIB == Zero)
|
||||
{
|
||||
\SWAK ()
|
||||
}
|
||||
|
||||
If (INIB == One)
|
||||
{
|
||||
INIB = Zero
|
||||
}
|
||||
}
|
||||
|
||||
Method (_PS3, 0, Serialized)
|
||||
{
|
||||
If (OSDW () && S0ID == One)
|
||||
If (OSDW () && DIEN == One)
|
||||
{
|
||||
\SPTS ()
|
||||
}
|
||||
|
|
@ -310,16 +316,17 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_Sleep", 0x00001000)
|
|||
|
||||
Scope (_SB)
|
||||
{
|
||||
// Enable ACPI-S0-DeepIdle, unused atm
|
||||
// Enable ACPI-S0-DeepIdle
|
||||
Method (LPS0, 0, NotSerialized)
|
||||
{
|
||||
If (S0ID == One)
|
||||
If (DIEN == One)
|
||||
{
|
||||
Debug = "SLEEP: Enable S0-Sleep / DeepSleep"
|
||||
}
|
||||
|
||||
// If S0ID is enabled, enable deep-sleep in OSX. Can be set above.
|
||||
Return (S0ID)
|
||||
// Return (S0ID)
|
||||
Return (DIEN)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
2733
patches/SSDT-TB-DSB0.dsl
Normal file
2733
patches/SSDT-TB-DSB0.dsl
Normal file
File diff suppressed because it is too large
Load diff
759
patches/SSDT-TB-DSB1.dsl
Normal file
759
patches/SSDT-TB-DSB1.dsl
Normal file
|
|
@ -0,0 +1,759 @@
|
|||
/*
|
||||
* Partition and continuation of Thunderbolt 3 patch.
|
||||
* Depends on other TB-DSB* patches as well as /patches/OpenCore Patches/ Thunderbolt3.plist
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_TBDSB1", 0x00001000)
|
||||
{
|
||||
// Common utils from SSDT-Darwin.dsl
|
||||
External (DTGP, MethodObj) // 5 Arguments
|
||||
External (OSDW, MethodObj) // 0 Arguments
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX, DeviceObj)
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
|
||||
|
||||
If (((TBTS == One) && (TBSE == 0x09)))
|
||||
{
|
||||
Scope (\_SB.PCI0.RP09.PXSX)
|
||||
{
|
||||
Device (DSB1)
|
||||
{
|
||||
Name (_ADR, 0x00010000) // _ADR: Address
|
||||
Name (_SUN, One) // _SUN: Slot User Number
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
|
||||
Field (A1E1, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
Offset (0x08),
|
||||
Offset (0x0A),
|
||||
, 5,
|
||||
TPEN, 1,
|
||||
Offset (0x0C),
|
||||
SSPD, 4,
|
||||
, 16,
|
||||
LACR, 1,
|
||||
Offset (0x10),
|
||||
, 4,
|
||||
LDIS, 1,
|
||||
LRTN, 1,
|
||||
Offset (0x12),
|
||||
CSPD, 4,
|
||||
CWDT, 6,
|
||||
, 1,
|
||||
LTRN, 1,
|
||||
, 1,
|
||||
LACT, 1,
|
||||
Offset (0x14),
|
||||
Offset (0x30),
|
||||
TSPD, 4
|
||||
}
|
||||
|
||||
OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
|
||||
Field (A1E2, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
PSTA, 2
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB3.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB3.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB3.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB3.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB3.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB4.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB4.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB4.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB4.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB4.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB1.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
445
patches/SSDT-TB-DSB2-XHC2.dsl
Normal file
445
patches/SSDT-TB-DSB2-XHC2.dsl
Normal file
|
|
@ -0,0 +1,445 @@
|
|||
/*
|
||||
* Patches USB 3.1
|
||||
* Partition and continuation of Thunderbolt 3 patch.
|
||||
* Depends on other TB-DSB* patches as well as /patches/OpenCore Patches/ Thunderbolt3.plist
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_TBXHC2", 0x00003000)
|
||||
{
|
||||
/* Support methods */
|
||||
External (DTGP, MethodObj)
|
||||
External (OSDW, MethodObj) // OS Is Darwin?
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX, DeviceObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB0.NHI0, DeviceObj)
|
||||
External (_SB.PCI0.RP09.PXSX.TBDU, DeviceObj)
|
||||
External (_SB.PCI0.RP09.PXSX.TBDU.XHC, DeviceObj)
|
||||
|
||||
External (_SB.PCI0.RP09.TBST, MethodObj) // 0 Arguments
|
||||
External (_SB.PCI0.RP09.UGIO, MethodObj) // 0 Arguments
|
||||
|
||||
External (_SB.PCI0.RP09.GXCI, IntObj)
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX.MDUV, IntObj)
|
||||
External (_SB.PCI0.RP09.UPN1, IntObj)
|
||||
External (_SB.PCI0.RP09.UPN2, IntObj)
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2, DeviceObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2.PRSR, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2.LACR, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2.LTRN, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2.LACT, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2.IIP3, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2.RUSB, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.PXSX.DSB2.PCIA, FieldUnitObj)
|
||||
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
External (USME, IntObj)
|
||||
|
||||
If (((TBTS == One) && (TBSE == 0x09)))
|
||||
{
|
||||
Scope (\_SB.PCI0.RP09.PXSX.DSB2)
|
||||
{
|
||||
Device (XHC2)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_PS0, 0, Serialized) // _PS0: Power State 0
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:_PS0"
|
||||
|
||||
Sleep (0xC8)
|
||||
|
||||
If (OSDW ())
|
||||
{
|
||||
// PCED ()
|
||||
|
||||
If (CondRefOf (\_SB.PCI0.RP09.TBST))
|
||||
{
|
||||
\_SB.PCI0.RP09.TBST ()
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Method (_PS3, 0, Serialized) // _PS3: Power State 3
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:_PS3"
|
||||
|
||||
Sleep (0xC8)
|
||||
|
||||
If (OSDW ())
|
||||
{
|
||||
If (CondRefOf (\_SB.PCI0.RP09.TBST))
|
||||
{
|
||||
\_SB.PCI0.RP09.TBST ()
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized)
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0F) // Used in OSX
|
||||
}
|
||||
|
||||
Return (0x0F) // hidden for others
|
||||
}
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
Local0 = Package (0x06)
|
||||
{
|
||||
"USBBusNumber",
|
||||
Zero,
|
||||
"AAPL,xhci-clock-id",
|
||||
One,
|
||||
"UsbCompanionControllerPresent",
|
||||
Zero
|
||||
}
|
||||
|
||||
If (CondRefOf (\_SB.PCI0.RP09.PXSX.DSB0.NHI0) && \USME == One)
|
||||
{
|
||||
// Enable companion-setup
|
||||
Local0[0x05] = One
|
||||
}
|
||||
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
}
|
||||
|
||||
If (CondRefOf (\_SB.PCI0.RP09.PXSX.DSB0.NHI0) && \USME == One)
|
||||
{
|
||||
Name (HS, Package (0x01)
|
||||
{
|
||||
"XHC"
|
||||
})
|
||||
|
||||
Name (FS, Package (0x01)
|
||||
{
|
||||
"XHC"
|
||||
})
|
||||
|
||||
Name (LS, Package (0x01)
|
||||
{
|
||||
"XHC"
|
||||
})
|
||||
}
|
||||
|
||||
// Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
|
||||
// {
|
||||
// Return (Package ()
|
||||
// {
|
||||
// 0x6D,
|
||||
// 0x03
|
||||
// })
|
||||
// }
|
||||
|
||||
/**
|
||||
* PCI Enable downstream
|
||||
*/
|
||||
Method (PCED, 0, Serialized)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED"
|
||||
Debug = "TB:DSB2:XHC2:PCED - Request USB-GPIO to be enabled & force TBT-GPIO"
|
||||
\_SB.PCI0.RP09.GXCI = One
|
||||
|
||||
// this powers up both TBT and USB when needed
|
||||
If (\_SB.PCI0.RP09.UGIO () != Zero)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - GPIOs changed, restored = true"
|
||||
^^PRSR = One
|
||||
}
|
||||
|
||||
Local5 = (Timer + 0x00989680)
|
||||
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:PCED - restored flag, THUNDERBOLT_PCI_LINK_MGMT_DEVICE.PRSR: ", ^^PRSR)
|
||||
|
||||
If (^^PRSR != Zero)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for power up"
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for downstream bridge to appear"
|
||||
Local5 = (Timer + 0x00989680)
|
||||
While (Timer <= Local5)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for link training..."
|
||||
If (^^LACR == Zero)
|
||||
{
|
||||
If (^^LTRN != One)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Link training cleared"
|
||||
Break
|
||||
}
|
||||
}
|
||||
ElseIf ((^^LTRN != One) && (^^LACT == One))
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Link training cleared and link is active"
|
||||
Break
|
||||
}
|
||||
|
||||
Sleep (0x0A)
|
||||
}
|
||||
|
||||
Sleep (0x96)
|
||||
}
|
||||
|
||||
^^PRSR = Zero
|
||||
While (Timer <= Local5)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for config space..."
|
||||
If (AVND != 0xFFFFFFFF)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - DSB2 Up - Read VID/DID"
|
||||
^^PCIA = One
|
||||
Break
|
||||
}
|
||||
|
||||
Sleep (0x0A)
|
||||
}
|
||||
|
||||
^^IIP3 = Zero
|
||||
}
|
||||
|
||||
/**
|
||||
* Run Time Power Check
|
||||
* Called by XHC driver when idle
|
||||
*/
|
||||
Method (RTPC, 1, Serialized)
|
||||
{
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:RTPC called with Arg0: ", Arg0)
|
||||
|
||||
// If (Arg0 <= One)
|
||||
// {
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:RTPC setting RUSB to: ", Arg0)
|
||||
|
||||
^^RUSB = Arg0
|
||||
|
||||
// // Force TB on
|
||||
// If (Arg0 == One)
|
||||
// {
|
||||
// Debug = Concatenate ("TB:NHI0:RTPC forcing RTBT to: ", Arg0)
|
||||
// \_SB.PCI0.RP09.RTBT = One
|
||||
// }
|
||||
// }
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
/**
|
||||
* USB cable check
|
||||
* Called by XHC driver to check cable status
|
||||
* Used as idle hint.
|
||||
*
|
||||
* Return:
|
||||
* kUSBTypeCCableTypeNone = 0,
|
||||
* kUSBTypeCCableTypeUSB = 1,
|
||||
*/
|
||||
Method (MODU, 0, Serialized)
|
||||
{
|
||||
If (CondRefOf (\_SB.PCI0.RP09.PXSX.MDUV))
|
||||
{
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:MODU - MDUV - return: ", \_SB.PCI0.RP09.PXSX.MDUV)
|
||||
|
||||
Return (\_SB.PCI0.RP09.PXSX.MDUV)
|
||||
}
|
||||
Else
|
||||
{
|
||||
// WORKING W/O PM
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:MODU - return: ", ^^RUSB)
|
||||
|
||||
Return (^^RUSB)
|
||||
}
|
||||
|
||||
// Debug = "TB:DSB2:XHC2:MODU - force ONE"
|
||||
|
||||
// Return (One)
|
||||
}
|
||||
|
||||
Device (RHUB)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
If ((USME == Zero))
|
||||
{
|
||||
Device (HS01)
|
||||
{
|
||||
Name (_ADR, One) // _ADR: Address
|
||||
|
||||
Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities
|
||||
{
|
||||
Return (Package (0x04) // _UPC: USB Port Capabilities
|
||||
{
|
||||
One,
|
||||
0x08,
|
||||
Zero,
|
||||
Zero
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
Device (HS02)
|
||||
{
|
||||
Name (_ADR, 0x02) // _ADR: Address
|
||||
|
||||
Return (Package (0x04) // _UPC: USB Port Capabilities
|
||||
{
|
||||
One,
|
||||
0x08,
|
||||
Zero,
|
||||
Zero
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
Device (SS01)
|
||||
{
|
||||
Name (_ADR, 0x03) // _ADR: Address
|
||||
|
||||
Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities
|
||||
{
|
||||
Local0 = Package (0x04) // _UPC: USB Port Capabilities
|
||||
{
|
||||
One,
|
||||
0x09,
|
||||
Zero,
|
||||
Zero
|
||||
}
|
||||
|
||||
If ((USME == Zero))
|
||||
{
|
||||
Local0[0x01] = 0x0A
|
||||
}
|
||||
|
||||
Return (Local0)
|
||||
}
|
||||
|
||||
If (CondRefOf (\_SB.PCI0.RP09.PXSX.DSB0.NHI0) && \USME == One)
|
||||
{
|
||||
Name (HS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x03
|
||||
})
|
||||
|
||||
Name (FS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x03
|
||||
})
|
||||
|
||||
Name (LS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x03
|
||||
})
|
||||
}
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
If (CondRefOf (\_SB.PCI0.RP09.PXSX.DSB0.NHI0) && CondRefOf (\_SB.PCI0.RP09.UPN1) && \USME == One)
|
||||
{
|
||||
Local0 = Package ()
|
||||
{
|
||||
"UsbCPortNumber",
|
||||
\_SB.PCI0.RP09.UPN1,
|
||||
"UsbCompanionPortPresent",
|
||||
One
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
Local0 = Package (0x01) {}
|
||||
}
|
||||
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
}
|
||||
}
|
||||
|
||||
Device (SS02)
|
||||
{
|
||||
Name (_ADR, 0x04) // _ADR: Address
|
||||
|
||||
Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities
|
||||
{
|
||||
Local0 = Package (0x04) // _UPC: USB Port Capabilities
|
||||
{
|
||||
One,
|
||||
0x09,
|
||||
Zero,
|
||||
Zero
|
||||
}
|
||||
|
||||
If ((USME == Zero))
|
||||
{
|
||||
Local0[0x01] = 0x0A
|
||||
}
|
||||
|
||||
Return (Local0)
|
||||
}
|
||||
|
||||
If (CondRefOf (\_SB.PCI0.RP09.PXSX.DSB0.NHI0) && \USME == One)
|
||||
{
|
||||
Name (HS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x04
|
||||
})
|
||||
|
||||
Name (FS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x04
|
||||
})
|
||||
|
||||
Name (LS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x04
|
||||
})
|
||||
}
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
If (CondRefOf (\_SB.PCI0.RP09.PXSX.DSB0.NHI0) && CondRefOf (\_SB.PCI0.RP09.UPN1) && \USME == One)
|
||||
{
|
||||
Local0 = Package ()
|
||||
{
|
||||
"UsbCPortNumber",
|
||||
\_SB.PCI0.RP09.UPN1,
|
||||
"UsbCompanionPortPresent",
|
||||
One
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
Local0 = Package (0x01) {}
|
||||
}
|
||||
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
248
patches/SSDT-TB-DSB2.dsl
Normal file
248
patches/SSDT-TB-DSB2.dsl
Normal file
|
|
@ -0,0 +1,248 @@
|
|||
/*
|
||||
* Partition and continuation of Thunderbolt 3 patch.
|
||||
* Depends on other TB-DSB* patches as well as /patches/OpenCore Patches/ Thunderbolt3.plist
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_TBDSB2", 0x00003000)
|
||||
{
|
||||
/* Support methods */
|
||||
External (DTGP, MethodObj)
|
||||
External (OSDW, MethodObj) // OS Is Darwin?
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX, DeviceObj)
|
||||
External (_SB.PCI0.RP09.PXSX.TBDU, DeviceObj)
|
||||
|
||||
External (_SB.PCI0.RP09.TBST, MethodObj) // 0 Arguments
|
||||
External (_SB.PCI0.RP09.UGIO, MethodObj) // 0 Arguments
|
||||
|
||||
External (_SB.PCI0.RP09.GXCI, IntObj)
|
||||
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
|
||||
If (((TBTS == One) && (TBSE == 0x09)))
|
||||
{
|
||||
Scope (\_SB.PCI0.RP09.PXSX)
|
||||
{
|
||||
Scope (TBDU)
|
||||
{
|
||||
Method (_STA, 0, NotSerialized)
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (Zero) // hidden for OSX
|
||||
}
|
||||
|
||||
Return (0x0F) // visible for others
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB2)
|
||||
{
|
||||
Name (_ADR, 0x00020000) // _ADR: Address
|
||||
|
||||
Name (RUSB, One)
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
|
||||
Field (A1E1, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
Offset (0x08),
|
||||
Offset (0x0A),
|
||||
, 5,
|
||||
TPEN, 1,
|
||||
Offset (0x0C),
|
||||
SSPD, 4,
|
||||
, 16,
|
||||
LACR, 1,
|
||||
Offset (0x10),
|
||||
, 4,
|
||||
LDIS, 1,
|
||||
LRTN, 1,
|
||||
Offset (0x12),
|
||||
CSPD, 4,
|
||||
CWDT, 6,
|
||||
, 1,
|
||||
LTRN, 1,
|
||||
, 1,
|
||||
LACT, 1,
|
||||
Offset (0x14),
|
||||
Offset (0x30),
|
||||
TSPD, 4
|
||||
}
|
||||
|
||||
OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
|
||||
Field (A1E2, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
PSTA, 2
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized)
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0F) // Used in OSX
|
||||
}
|
||||
|
||||
Return (0x0F) // hidden for others
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Name (IIP3, Zero)
|
||||
Name (PRSR, Zero)
|
||||
Name (PCIA, One)
|
||||
|
||||
/**
|
||||
* Enable upstream link
|
||||
*/
|
||||
Method (PCEU, 0, Serialized)
|
||||
{
|
||||
Debug = "TB:DSB2:PCEU"
|
||||
|
||||
PRSR = Zero
|
||||
Debug = "TB:DSB2:PCEU - Put upstream bridge back into D0 "
|
||||
|
||||
If (PSTA != Zero)
|
||||
{
|
||||
Debug = "TB:DSB2:PCEU - exit D0, restored = true"
|
||||
PRSR = One
|
||||
PSTA = Zero
|
||||
}
|
||||
|
||||
If (LDIS == One)
|
||||
{
|
||||
Debug = "TB:DSB2:PCEU - Clear link disable on upstream bridge"
|
||||
Debug = "TB:DSB2:PCEU - clear link disable, restored = true"
|
||||
PRSR = One
|
||||
LDIS = Zero
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* PCI disable link
|
||||
*/
|
||||
Method (PCDA, 0, Serialized)
|
||||
{
|
||||
Debug = "TB:DSB2:PCDA"
|
||||
|
||||
If (POFX () != Zero)
|
||||
{
|
||||
PCIA = Zero
|
||||
|
||||
Debug = "TB:DSB2:PCDA - Put upstream bridge into D3"
|
||||
PSTA = 0x03
|
||||
|
||||
Debug = "TB:DSB2:PCDA - Set link disable on upstream bridge"
|
||||
LDIS = One
|
||||
|
||||
Local5 = (Timer + 0x00989680)
|
||||
While (Timer <= Local5)
|
||||
{
|
||||
Debug = "TB:DSB2:PCDA - Wait for link to drop..."
|
||||
If (LACR == One)
|
||||
{
|
||||
If (LACT == Zero)
|
||||
{
|
||||
Debug = "TB:DSB2:PCDA - No link activity"
|
||||
Break
|
||||
}
|
||||
}
|
||||
ElseIf (AVND == 0xFFFFFFFF)
|
||||
{
|
||||
Debug = "TB:DSB2:PCDA - VID/DID is -1"
|
||||
Break
|
||||
}
|
||||
|
||||
Sleep (0x0A)
|
||||
}
|
||||
|
||||
Debug = "TB:DSB2:PCDA - Request USB-GPIO to be disabled"
|
||||
\_SB.PCI0.RP09.GXCI = Zero
|
||||
\_SB.PCI0.RP09.UGIO ()
|
||||
}
|
||||
Else
|
||||
{
|
||||
Debug = "TB:DSB2:PCDA - Not disabling"
|
||||
}
|
||||
|
||||
IIP3 = One
|
||||
}
|
||||
|
||||
/**
|
||||
* Is power saving requested?
|
||||
*/
|
||||
Method (POFX, 0, Serialized)
|
||||
{
|
||||
Debug = Concatenate ("TB:DSB2:POFX - Result (!RUSB): ", (!RUSB))
|
||||
|
||||
Return (!RUSB)
|
||||
}
|
||||
|
||||
Method (_PS0, 0, Serialized) // _PS0: Power State 0
|
||||
{
|
||||
Debug = "TB:DSB2:_PS0"
|
||||
|
||||
PCEU ()
|
||||
|
||||
// \_SB.PCI0.RP09.TBST ()
|
||||
}
|
||||
|
||||
Method (_PS3, 0, Serialized) // _PS3: Power State 3
|
||||
{
|
||||
Debug = "TB:DSB2:_PS3"
|
||||
|
||||
PCDA ()
|
||||
|
||||
// \_SB.PCI0.RP09.TBST ()
|
||||
}
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
If (Arg0 == ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b"))
|
||||
{
|
||||
Local0 = Package ()
|
||||
{
|
||||
"PCIHotplugCapable",
|
||||
Zero
|
||||
}
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
733
patches/SSDT-TB-DSB3.dsl
Normal file
733
patches/SSDT-TB-DSB3.dsl
Normal file
|
|
@ -0,0 +1,733 @@
|
|||
/*
|
||||
* Partition and continuation of Thunderbolt 3 patch.
|
||||
* Depends on other TB-DSB* patches as well as /patches/OpenCore Patches/ Thunderbolt3.plist
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_TBDSB3", 0x00001000)
|
||||
{
|
||||
// Common utils from SSDT-Darwin.dsl
|
||||
External (DTGP, MethodObj) // 5 Arguments
|
||||
External (OSDW, MethodObj) // 0 Arguments
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX, DeviceObj)
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
|
||||
|
||||
If (((TBTS == One) && (TBSE == 0x09)))
|
||||
{
|
||||
Scope (\_SB.PCI0.RP09.PXSX)
|
||||
{
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
|
||||
Field (A1E1, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
Offset (0x08),
|
||||
Offset (0x0A),
|
||||
, 5,
|
||||
TPEN, 1,
|
||||
Offset (0x0C),
|
||||
SSPD, 4,
|
||||
, 16,
|
||||
LACR, 1,
|
||||
Offset (0x10),
|
||||
, 4,
|
||||
LDIS, 1,
|
||||
LRTN, 1,
|
||||
Offset (0x12),
|
||||
CSPD, 4,
|
||||
CWDT, 6,
|
||||
, 1,
|
||||
LTRN, 1,
|
||||
, 1,
|
||||
LACT, 1,
|
||||
Offset (0x14),
|
||||
Offset (0x30),
|
||||
TSPD, 4
|
||||
}
|
||||
|
||||
OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
|
||||
Field (A1E2, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
PSTA, 2
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB3.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB3.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB3.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB3.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB3.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB4.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB4.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB4.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB4.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB4.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB3.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
734
patches/SSDT-TB-DSB4.dsl
Normal file
734
patches/SSDT-TB-DSB4.dsl
Normal file
|
|
@ -0,0 +1,734 @@
|
|||
/*
|
||||
* Partition and continuation of Thunderbolt 3 patch.
|
||||
* Depends on other TB-DSB* patches as well as /patches/OpenCore Patches/ Thunderbolt3.plist
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_TBDSB4", 0x00001000)
|
||||
{
|
||||
// Common utils from SSDT-Darwin.dsl
|
||||
External (DTGP, MethodObj) // 5 Arguments
|
||||
External (OSDW, MethodObj) // 0 Arguments
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX, DeviceObj)
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
|
||||
|
||||
If (((TBTS == One) && (TBSE == 0x09)))
|
||||
{
|
||||
Scope (\_SB.PCI0.RP09.PXSX)
|
||||
{
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
Name (_SUN, 0x02) // _SUN: Slot User Number
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
|
||||
Field (A1E1, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
Offset (0x08),
|
||||
Offset (0x0A),
|
||||
, 5,
|
||||
TPEN, 1,
|
||||
Offset (0x0C),
|
||||
SSPD, 4,
|
||||
, 16,
|
||||
LACR, 1,
|
||||
Offset (0x10),
|
||||
, 4,
|
||||
LDIS, 1,
|
||||
LRTN, 1,
|
||||
Offset (0x12),
|
||||
CSPD, 4,
|
||||
CWDT, 6,
|
||||
, 1,
|
||||
LTRN, 1,
|
||||
, 1,
|
||||
LACT, 1,
|
||||
Offset (0x14),
|
||||
Offset (0x30),
|
||||
TSPD, 4
|
||||
}
|
||||
|
||||
OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
|
||||
Field (A1E2, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
PSTA, 2
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB3.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB3.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB3.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB3.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB3.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB4.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB4.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB4.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB4.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB4.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB4.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
733
patches/SSDT-TB-DSB5.dsl
Normal file
733
patches/SSDT-TB-DSB5.dsl
Normal file
|
|
@ -0,0 +1,733 @@
|
|||
/*
|
||||
* Partition and continuation of Thunderbolt 3 patch.
|
||||
* Depends on other TB-DSB* patches as well as /patches/OpenCore Patches/ Thunderbolt3.plist
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_TBDSB5", 0x00001000)
|
||||
{
|
||||
// Common utils from SSDT-Darwin.dsl
|
||||
External (DTGP, MethodObj) // 5 Arguments
|
||||
External (OSDW, MethodObj) // 0 Arguments
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX, DeviceObj)
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
|
||||
|
||||
If (((TBTS == One) && (TBSE == 0x09)))
|
||||
{
|
||||
Scope (\_SB.PCI0.RP09.PXSX)
|
||||
{
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
|
||||
Field (A1E1, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
Offset (0x08),
|
||||
Offset (0x0A),
|
||||
, 5,
|
||||
TPEN, 1,
|
||||
Offset (0x0C),
|
||||
SSPD, 4,
|
||||
, 16,
|
||||
LACR, 1,
|
||||
Offset (0x10),
|
||||
, 4,
|
||||
LDIS, 1,
|
||||
LRTN, 1,
|
||||
Offset (0x12),
|
||||
CSPD, 4,
|
||||
CWDT, 6,
|
||||
, 1,
|
||||
LTRN, 1,
|
||||
, 1,
|
||||
LACT, 1,
|
||||
Offset (0x14),
|
||||
Offset (0x30),
|
||||
TSPD, 4
|
||||
}
|
||||
|
||||
OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
|
||||
Field (A1E2, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
PSTA, 2
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB3.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB3.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB3.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB3.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB3.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (UPS0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (ARE0, PCI_Config, Zero, 0x04)
|
||||
Field (ARE0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 16
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DSB0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1,
|
||||
Offset (0x3E),
|
||||
, 6,
|
||||
SBRS, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB4.UPS0.DSB0.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB3)
|
||||
{
|
||||
Name (_ADR, 0x00030000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB4.UPS0.DSB3.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB4)
|
||||
{
|
||||
Name (_ADR, 0x00040000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB4.UPS0.DSB4.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
|
||||
Device (DEV0)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB4.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB4.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB5)
|
||||
{
|
||||
Name (_ADR, 0x00050000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB5.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB5.UPS0.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (One)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
102
patches/SSDT-TB-DSB6.dsl
Normal file
102
patches/SSDT-TB-DSB6.dsl
Normal file
|
|
@ -0,0 +1,102 @@
|
|||
/*
|
||||
* Partition and continuation of Thunderbolt 3 patch.
|
||||
* Depends on other TB-DSB* patches as well as /patches/OpenCore Patches/ Thunderbolt3.plist
|
||||
*
|
||||
* Credits @benbender
|
||||
*/
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_TBDSB6", 0x00001000)
|
||||
{
|
||||
// Common utils from SSDT-Darwin.dsl
|
||||
External (DTGP, MethodObj) // 5 Arguments
|
||||
External (OSDW, MethodObj) // 0 Arguments
|
||||
|
||||
External (_SB.PCI0.RP09.PXSX, DeviceObj)
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
|
||||
|
||||
If (((TBTS == One) && (TBSE == 0x09)))
|
||||
{
|
||||
Scope (\_SB.PCI0.RP09.PXSX)
|
||||
{
|
||||
Device (DSB6)
|
||||
{
|
||||
Name (_ADR, 0x00060000) // _ADR: Address
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
|
||||
Field (A1E1, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
Offset (0x08),
|
||||
Offset (0x0A),
|
||||
, 5,
|
||||
TPEN, 1,
|
||||
Offset (0x0C),
|
||||
SSPD, 4,
|
||||
, 16,
|
||||
LACR, 1,
|
||||
Offset (0x10),
|
||||
, 4,
|
||||
LDIS, 1,
|
||||
LRTN, 1,
|
||||
Offset (0x12),
|
||||
CSPD, 4,
|
||||
CWDT, 6,
|
||||
, 1,
|
||||
LTRN, 1,
|
||||
, 1,
|
||||
LACT, 1,
|
||||
Offset (0x14),
|
||||
Offset (0x30),
|
||||
TSPD, 4
|
||||
}
|
||||
|
||||
OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
|
||||
Field (A1E2, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x01),
|
||||
Offset (0x02),
|
||||
Offset (0x04),
|
||||
PSTA, 2
|
||||
}
|
||||
|
||||
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
|
||||
{
|
||||
Return (SECB) /* \_SB_.PCI0.RP09.UPSB.DSB6.SECB */
|
||||
}
|
||||
|
||||
Method (_STA, 0, NotSerialized) // _STA: Status
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
|
||||
{
|
||||
Return (Zero)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
6478
patches/SSDT-TB3.dsl
6478
patches/SSDT-TB3.dsl
File diff suppressed because it is too large
Load diff
|
|
@ -1,6 +1,5 @@
|
|||
// Depends on /patches/OpenCore Patches/ XHC1.plist
|
||||
//
|
||||
//
|
||||
// Native ACPI-setup for the USB2/3-controller on x80-series Thinkpads
|
||||
//
|
||||
// This enables all ports to be as native as possible on OSX and only disables those devices which
|
||||
|
|
@ -63,6 +62,7 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
|
||||
Scope (\_SB)
|
||||
{
|
||||
// kUSBPlatformProperties
|
||||
Device (USBX)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
|
@ -75,10 +75,10 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
3000,
|
||||
"kUSBWakePortCurrentLimit",
|
||||
3000,
|
||||
// "kUSBSleepPowerSupply",
|
||||
// 9600,
|
||||
// "kUSBWakePowerSupply",
|
||||
// 9600,
|
||||
"kUSBSleepPowerSupply",
|
||||
9600,
|
||||
"kUSBWakePowerSupply",
|
||||
9600,
|
||||
}
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
|
|
@ -97,50 +97,51 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
|
||||
Scope (PCI0.XHC_)
|
||||
{
|
||||
Name (SDPC, Zero)
|
||||
// Name (SDPC, Zero)
|
||||
Name (_GPE, 0x6D) // _GPE: General Purpose Events
|
||||
|
||||
Name (SBAR, Zero)
|
||||
OperationRegion (XPRX, PCI_Config, Zero, 0x0100)
|
||||
Field (XPRX, AnyAcc, NoLock, Preserve)
|
||||
{
|
||||
DVIX, 16,
|
||||
Offset (0x40),
|
||||
, 11,
|
||||
SWAI, 1,
|
||||
Offset (0x44),
|
||||
, 12,
|
||||
SAIP, 2,
|
||||
Offset (0x48),
|
||||
Offset (0x50),
|
||||
, 2,
|
||||
STGX, 1,
|
||||
Offset (0x74),
|
||||
D03X, 2,
|
||||
Offset (0x75),
|
||||
PXEE, 1,
|
||||
, 6,
|
||||
PXES, 1,
|
||||
Offset (0xA2),
|
||||
, 2,
|
||||
D3HX, 1,
|
||||
Offset (0xA8),
|
||||
, 13,
|
||||
MW13, 1,
|
||||
MW14, 1,
|
||||
Offset (0xAC),
|
||||
Offset (0xB0),
|
||||
, 13,
|
||||
MB13, 1,
|
||||
MB14, 1,
|
||||
Offset (0xB4),
|
||||
Offset (0xD0),
|
||||
PR2, 32,
|
||||
PR2M, 32,
|
||||
PR3, 32,
|
||||
PR3M, 32
|
||||
}
|
||||
// Name (SBAR, Zero)
|
||||
// OperationRegion (XPRX, PCI_Config, Zero, 0x0100)
|
||||
// Field (XPRX, AnyAcc, NoLock, Preserve)
|
||||
// {
|
||||
// DVIX, 16,
|
||||
// Offset (0x40),
|
||||
// , 11,
|
||||
// SWAI, 1,
|
||||
// Offset (0x44),
|
||||
// , 12,
|
||||
// SAIP, 2,
|
||||
// Offset (0x48),
|
||||
// Offset (0x50),
|
||||
// , 2,
|
||||
// STGX, 1,
|
||||
// Offset (0x74),
|
||||
// D03X, 2,
|
||||
// Offset (0x75),
|
||||
// PXEE, 1,
|
||||
// , 6,
|
||||
// PXES, 1,
|
||||
// Offset (0xA2),
|
||||
// , 2,
|
||||
// D3HX, 1,
|
||||
// Offset (0xA8),
|
||||
// , 13,
|
||||
// MW13, 1,
|
||||
// MW14, 1,
|
||||
// Offset (0xAC),
|
||||
// Offset (0xB0),
|
||||
// , 13,
|
||||
// MB13, 1,
|
||||
// MB14, 1,
|
||||
// Offset (0xB4),
|
||||
// Offset (0xD0),
|
||||
// PR2, 32,
|
||||
// PR2M, 32,
|
||||
// PR3, 32,
|
||||
// PR3M, 32
|
||||
// }
|
||||
|
||||
// kUSBTypeCCableDetectACPIMethodSupported
|
||||
Method (RTPC, 1, Serialized)
|
||||
{
|
||||
Debug = Concatenate ("XHC:RTPC called with args: ", Arg0)
|
||||
|
|
@ -149,6 +150,8 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
}
|
||||
|
||||
/**
|
||||
* kUSBTypeCCableDetectACPIMethod
|
||||
*
|
||||
* Return:
|
||||
* kUSBTypeCCableTypeNone = 0,
|
||||
* kUSBTypeCCableTypeUSB = 1,
|
||||
|
|
@ -191,197 +194,197 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
Return (Local0)
|
||||
}
|
||||
|
||||
Method (USBM, 0, Serialized)
|
||||
{
|
||||
^D03X = Zero
|
||||
Local1 = ^PDBM /* \_SB_.PCI0.XHC1.PDBM */
|
||||
Local2 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
^PDBM = (Local1 | 0x02)
|
||||
Local0 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
Local0 &= 0xFFFFFFFFFFFFFFF0
|
||||
OperationRegion (PSCA, SystemMemory, Local0, 0x0600)
|
||||
Field (PSCA, DWordAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x480),
|
||||
PC01, 32,
|
||||
Offset (0x490),
|
||||
PC02, 32,
|
||||
Offset (0x4A0),
|
||||
PC03, 32,
|
||||
Offset (0x4B0),
|
||||
PC04, 32
|
||||
}
|
||||
// Method (USBM, 0, Serialized)
|
||||
// {
|
||||
// ^D03X = Zero
|
||||
// Local1 = ^PDBM /* \_SB_.PCI0.XHC1.PDBM */
|
||||
// Local2 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// ^PDBM = (Local1 | 0x02)
|
||||
// Local0 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// Local0 &= 0xFFFFFFFFFFFFFFF0
|
||||
// OperationRegion (PSCA, SystemMemory, Local0, 0x0600)
|
||||
// Field (PSCA, DWordAcc, NoLock, Preserve)
|
||||
// {
|
||||
// Offset (0x480),
|
||||
// PC01, 32,
|
||||
// Offset (0x490),
|
||||
// PC02, 32,
|
||||
// Offset (0x4A0),
|
||||
// PC03, 32,
|
||||
// Offset (0x4B0),
|
||||
// PC04, 32
|
||||
// }
|
||||
|
||||
Local6 = PC03 /* \_SB_.PCI0.XHC1.USBM.PC03 */
|
||||
Local6 = (PC03 & 0xFFFFFFFFFFFFFFFD)
|
||||
PC03 = (Local6 & 0xFFFFFFFFFFFFFDFF)
|
||||
Sleep (0x32)
|
||||
Local6 = PC03 /* \_SB_.PCI0.XHC1.USBM.PC03 */
|
||||
^PDBM &= 0xFFFFFFFFFFFFFFF9
|
||||
^D03X = 0x03
|
||||
^MEMB = Local2
|
||||
^PDBM = Local1
|
||||
Return (Zero)
|
||||
}
|
||||
// Local6 = PC03 /* \_SB_.PCI0.XHC1.USBM.PC03 */
|
||||
// Local6 = (PC03 & 0xFFFFFFFFFFFFFFFD)
|
||||
// PC03 = (Local6 & 0xFFFFFFFFFFFFFDFF)
|
||||
// Sleep (0x32)
|
||||
// Local6 = PC03 /* \_SB_.PCI0.XHC1.USBM.PC03 */
|
||||
// ^PDBM &= 0xFFFFFFFFFFFFFFF9
|
||||
// ^D03X = 0x03
|
||||
// ^MEMB = Local2
|
||||
// ^PDBM = Local1
|
||||
// Return (Zero)
|
||||
// }
|
||||
|
||||
Method (_PS0, 0, Serialized) // _PS0: Power State 0
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Local2 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
Local1 = ^PDBM /* \_SB_.PCI0.XHC1.PDBM */
|
||||
^PDBM &= 0xFFFFFFFFFFFFFFF9
|
||||
^D03X = Zero
|
||||
// Method (_PS0, 0, Serialized) // _PS0: Power State 0
|
||||
// {
|
||||
// If (OSDW ())
|
||||
// {
|
||||
// Local2 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// Local1 = ^PDBM /* \_SB_.PCI0.XHC1.PDBM */
|
||||
// ^PDBM &= 0xFFFFFFFFFFFFFFF9
|
||||
// ^D03X = Zero
|
||||
|
||||
If (SBAR == Zero)
|
||||
{
|
||||
Local7 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
Local7 &= 0xFFFFFFFFFFFFFFF0
|
||||
// If (SBAR == Zero)
|
||||
// {
|
||||
// Local7 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// Local7 &= 0xFFFFFFFFFFFFFFF0
|
||||
|
||||
If ((Local7 == Zero) || (Local7 == 0xFFFFFFFFFFFFFFF0))
|
||||
{
|
||||
^MEMB = 0xFEAF0000
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
^MEMB = SBAR /* \_SB_.PCI0.XHC1.SBAR */
|
||||
}
|
||||
// If ((Local7 == Zero) || (Local7 == 0xFFFFFFFFFFFFFFF0))
|
||||
// {
|
||||
// ^MEMB = 0xFEAF0000
|
||||
// }
|
||||
// }
|
||||
// Else
|
||||
// {
|
||||
// ^MEMB = SBAR /* \_SB_.PCI0.XHC1.SBAR */
|
||||
// }
|
||||
|
||||
^PDBM = (Local1 | 0x02)
|
||||
Local0 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
Local0 &= 0xFFFFFFFFFFFFFFF0
|
||||
// ^PDBM = (Local1 | 0x02)
|
||||
// Local0 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// Local0 &= 0xFFFFFFFFFFFFFFF0
|
||||
|
||||
OperationRegion (MCA1, SystemMemory, Local0, 0x9000)
|
||||
Field (MCA1, DWordAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x80A4),
|
||||
, 28,
|
||||
AX28, 1,
|
||||
Offset (0x80C0),
|
||||
, 10,
|
||||
S0IX, 1,
|
||||
Offset (0x81C4),
|
||||
, 2,
|
||||
CLK0, 1,
|
||||
, 3,
|
||||
CLK1, 1
|
||||
}
|
||||
// OperationRegion (MCA1, SystemMemory, Local0, 0x9000)
|
||||
// Field (MCA1, DWordAcc, NoLock, Preserve)
|
||||
// {
|
||||
// Offset (0x80A4),
|
||||
// , 28,
|
||||
// AX28, 1,
|
||||
// Offset (0x80C0),
|
||||
// , 10,
|
||||
// S0IX, 1,
|
||||
// Offset (0x81C4),
|
||||
// , 2,
|
||||
// CLK0, 1,
|
||||
// , 3,
|
||||
// CLK1, 1
|
||||
// }
|
||||
|
||||
S0IX = Zero
|
||||
// S0IX = Zero
|
||||
|
||||
AX28 = One
|
||||
Stall (0x33)
|
||||
AX28 = Zero
|
||||
CLK0 = Zero
|
||||
CLK1 = Zero
|
||||
^PDBM &= 0xFFFFFFFFFFFFFFFD
|
||||
^MEMB = Local2
|
||||
^PDBM = Local1
|
||||
// AX28 = One
|
||||
// Stall (0x33)
|
||||
// AX28 = Zero
|
||||
// CLK0 = Zero
|
||||
// CLK1 = Zero
|
||||
// ^PDBM &= 0xFFFFFFFFFFFFFFFD
|
||||
// ^MEMB = Local2
|
||||
// ^PDBM = Local1
|
||||
|
||||
If (UWAB && (D03X == Zero))
|
||||
{
|
||||
MPMC = One
|
||||
Local0 = (Timer + 0x00989680)
|
||||
While (Timer <= Local0)
|
||||
{
|
||||
If (PMFS == Zero)
|
||||
{
|
||||
Break
|
||||
}
|
||||
// If (UWAB && (D03X == Zero))
|
||||
// {
|
||||
// MPMC = One
|
||||
// Local0 = (Timer + 0x00989680)
|
||||
// While (Timer <= Local0)
|
||||
// {
|
||||
// If (PMFS == Zero)
|
||||
// {
|
||||
// Break
|
||||
// }
|
||||
|
||||
Sleep (0x0A)
|
||||
}
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
// NON-OSX
|
||||
\_SB.PCI0.XHC_.XPS0 ()
|
||||
}
|
||||
}
|
||||
// Sleep (0x0A)
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
// Else
|
||||
// {
|
||||
// // NON-OSX
|
||||
// \_SB.PCI0.XHC_.XPS0 ()
|
||||
// }
|
||||
// }
|
||||
|
||||
Method (_PS3, 0, Serialized) // _PS3: Power State 3
|
||||
{
|
||||
If (OSDW ())
|
||||
{
|
||||
Local1 = ^PDBM /* \_SB_.PCI0.XHC1.PDBM */
|
||||
Local2 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
^PDBM &= 0xFFFFFFFFFFFFFFF9
|
||||
// Method (_PS3, 0, Serialized) // _PS3: Power State 3
|
||||
// {
|
||||
// If (OSDW ())
|
||||
// {
|
||||
// Local1 = ^PDBM /* \_SB_.PCI0.XHC1.PDBM */
|
||||
// Local2 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// ^PDBM &= 0xFFFFFFFFFFFFFFF9
|
||||
|
||||
If (XLTP == Zero)
|
||||
{
|
||||
^D03X = 0x03
|
||||
Stall (0x1E)
|
||||
}
|
||||
// If (XLTP == Zero)
|
||||
// {
|
||||
// ^D03X = 0x03
|
||||
// Stall (0x1E)
|
||||
// }
|
||||
|
||||
^D03X = Zero
|
||||
^PDBM = (Local1 | 0x02)
|
||||
SBAR = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
If (SBAR == Zero)
|
||||
{
|
||||
Local7 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
Local7 &= 0xFFFFFFFFFFFFFFF0
|
||||
// ^D03X = Zero
|
||||
// ^PDBM = (Local1 | 0x02)
|
||||
// SBAR = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// If (SBAR == Zero)
|
||||
// {
|
||||
// Local7 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// Local7 &= 0xFFFFFFFFFFFFFFF0
|
||||
|
||||
If ((Local7 == Zero) || (Local7 == 0xFFFFFFFFFFFFFFF0))
|
||||
{
|
||||
^MEMB = 0xFEAF0000
|
||||
}
|
||||
}
|
||||
// If ((Local7 == Zero) || (Local7 == 0xFFFFFFFFFFFFFFF0))
|
||||
// {
|
||||
// ^MEMB = 0xFEAF0000
|
||||
// }
|
||||
// }
|
||||
|
||||
Local0 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
Local0 &= 0xFFFFFFFFFFFFFFF0
|
||||
// Local0 = ^MEMB /* \_SB_.PCI0.XHC1.MEMB */
|
||||
// Local0 &= 0xFFFFFFFFFFFFFFF0
|
||||
|
||||
OperationRegion (MCA1, SystemMemory, Local0, 0x9000)
|
||||
Field (MCA1, DWordAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x80A4),
|
||||
, 28,
|
||||
AX28, 1,
|
||||
Offset (0x80C0),
|
||||
, 10,
|
||||
S0IX, 1,
|
||||
Offset (0x81C4),
|
||||
, 2,
|
||||
CLK0, 1,
|
||||
, 3,
|
||||
CLK1, 1
|
||||
}
|
||||
// OperationRegion (MCA1, SystemMemory, Local0, 0x9000)
|
||||
// Field (MCA1, DWordAcc, NoLock, Preserve)
|
||||
// {
|
||||
// Offset (0x80A4),
|
||||
// , 28,
|
||||
// AX28, 1,
|
||||
// Offset (0x80C0),
|
||||
// , 10,
|
||||
// S0IX, 1,
|
||||
// Offset (0x81C4),
|
||||
// , 2,
|
||||
// CLK0, 1,
|
||||
// , 3,
|
||||
// CLK1, 1
|
||||
// }
|
||||
|
||||
If (XLTP == Zero)
|
||||
{
|
||||
S0IX = One
|
||||
Stall (0x14)
|
||||
}
|
||||
// If (XLTP == Zero)
|
||||
// {
|
||||
// S0IX = One
|
||||
// Stall (0x14)
|
||||
// }
|
||||
|
||||
CLK0 = Zero
|
||||
CLK1 = One
|
||||
^PDBM = Local1
|
||||
^D03X = 0x03
|
||||
^MEMB = Local2
|
||||
^PDBM = Local1
|
||||
// CLK0 = Zero
|
||||
// CLK1 = One
|
||||
// ^PDBM = Local1
|
||||
// ^D03X = 0x03
|
||||
// ^MEMB = Local2
|
||||
// ^PDBM = Local1
|
||||
|
||||
If (UWAB && (D03X == 0x03))
|
||||
{
|
||||
MPMC = 0x03
|
||||
Local0 = (Timer + 0x00989680)
|
||||
While (Timer <= Local0)
|
||||
{
|
||||
If (PMFS == Zero)
|
||||
{
|
||||
Break
|
||||
}
|
||||
// If (UWAB && (D03X == 0x03))
|
||||
// {
|
||||
// MPMC = 0x03
|
||||
// Local0 = (Timer + 0x00989680)
|
||||
// While (Timer <= Local0)
|
||||
// {
|
||||
// If (PMFS == Zero)
|
||||
// {
|
||||
// Break
|
||||
// }
|
||||
|
||||
Sleep (0x0A)
|
||||
}
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
// NON-OSX
|
||||
\_SB.PCI0.XHC_.XPS3 ()
|
||||
}
|
||||
}
|
||||
// Sleep (0x0A)
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
// Else
|
||||
// {
|
||||
// // NON-OSX
|
||||
// \_SB.PCI0.XHC_.XPS3 ()
|
||||
// }
|
||||
// }
|
||||
|
||||
Scope (RHUB)
|
||||
{
|
||||
|
|
@ -430,12 +433,24 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
Debug = "XHC:U2OP - companion ports enabled"
|
||||
}
|
||||
|
||||
If (\TBAS)
|
||||
{
|
||||
Local0 = Package (0x04) {
|
||||
0xFF,
|
||||
0x08,
|
||||
Zero,
|
||||
Zero
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
Local0 = Package (0x04) {
|
||||
One,
|
||||
0x09,
|
||||
Zero,
|
||||
Zero
|
||||
}
|
||||
}
|
||||
|
||||
Return (Local0)
|
||||
}
|
||||
|
|
@ -474,13 +489,25 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
Scope (HS04) // Lower USB-C-Port, weired config, needs investigation
|
||||
{
|
||||
Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities
|
||||
{
|
||||
If (\TBAS)
|
||||
{
|
||||
Local0 = Package (0x04) {
|
||||
0xFF,
|
||||
0x08,
|
||||
Zero,
|
||||
Zero
|
||||
}
|
||||
}
|
||||
Else
|
||||
{
|
||||
Local0 = Package (0x04) {
|
||||
One,
|
||||
0x09,
|
||||
Zero,
|
||||
Zero
|
||||
}
|
||||
}
|
||||
|
||||
Return (Local0)
|
||||
}
|
||||
|
|
@ -708,8 +735,8 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
Return (0x00)
|
||||
}
|
||||
|
||||
Name (BERT, 0x0C)
|
||||
Name (IGNR, 0x00)
|
||||
|
||||
Method (SBHV, 1, Serialized)
|
||||
{
|
||||
If (Arg0)
|
||||
|
|
@ -722,16 +749,14 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
}
|
||||
}
|
||||
|
||||
// kGetBehaviorACPIMethod
|
||||
Method (GBHV, 0, Serialized)
|
||||
{
|
||||
Return (IGNR)
|
||||
}
|
||||
|
||||
// kSDControllerCaptiveUSB3ReaderKey
|
||||
Name (U3SD, 0x0FBE)
|
||||
Name (S104, 0x00)
|
||||
Name (S050, 0x00)
|
||||
Name (S025, 0x00)
|
||||
Name (_GPE, 0x3B) // _GPE: General Purpose Events
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
|
|
@ -796,6 +821,7 @@ DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC1", 0x00001000)
|
|||
}
|
||||
}
|
||||
|
||||
// system support SuperDrive
|
||||
Method (MBSD, 0, NotSerialized)
|
||||
{
|
||||
Return (One)
|
||||
|
|
|
|||
|
|
@ -1,333 +0,0 @@
|
|||
//
|
||||
// USB-C 3.1 Gen2-controller
|
||||
//
|
||||
// The controller is part of the alpine ridge Thunderbolt-controller.
|
||||
//
|
||||
// At the moment there is no known way to have - or at least I haven't found it yet -
|
||||
// to have native Thunderbolt incl. power-management and USB-C 3.1 Gen2-hotplug at the
|
||||
// same time. For the moment I opted for thunderbolt and the runtime power saving.
|
||||
//
|
||||
// So sadly, this is broken on runtime for the moment :(
|
||||
//
|
||||
// Credits @benbender
|
||||
|
||||
DefinitionBlock ("", "SSDT", 2, "tyler", "_XHC2", 0x00001000)
|
||||
{
|
||||
/* Support methods */
|
||||
External (DTGP, MethodObj)
|
||||
External (OSDW, MethodObj) // OS Is Darwin?
|
||||
|
||||
External (_SB.PCI0.RP09.RUSB, IntObj)
|
||||
External (_SB.PCI0.RP09.RTBT, IntObj)
|
||||
External (_SB.PCI0.RP09.GXCI, IntObj)
|
||||
External (_SB.PCI0.RP09.GNHI, IntObj)
|
||||
External (_SB.PCI0.RP09.UGIO, MethodObj)
|
||||
External (_SB.PCI0.RP09.TBST, MethodObj)
|
||||
External (_SB.PCI0.RP09.UPSB.DSB2, DeviceObj)
|
||||
External (_SB.PCI0.RP09.UPSB.PCED, MethodObj)
|
||||
External (_SB.PCI0.RP09.UPSB.MDUV, IntObj)
|
||||
External (_SB.PCI0.RP09.UPSB.DSB2.PCIA, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.UPSB.DSB2.IIP3, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.UPSB.DSB2.PRSR, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.UPSB.DSB2.LACR, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.UPSB.DSB2.LACT, FieldUnitObj)
|
||||
External (_SB.PCI0.RP09.UPSB.DSB2.LTRN, FieldUnitObj)
|
||||
|
||||
External (_SB.PCI0.RP09.UPN1, IntObj)
|
||||
External (_SB.PCI0.RP09.UPN2, IntObj)
|
||||
|
||||
External (TBSE, IntObj)
|
||||
External (TBTS, IntObj)
|
||||
External (TBAS, IntObj)
|
||||
External (USME, IntObj)
|
||||
|
||||
Name (U2OP, One) // Companion controller present?
|
||||
|
||||
Scope (_SB.PCI0.RP09.UPSB.DSB2)
|
||||
{
|
||||
Device (XHC2)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
Name (SDPC, Zero)
|
||||
|
||||
OperationRegion (A1E0, PCI_Config, Zero, 0x40)
|
||||
Field (A1E0, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
AVND, 32,
|
||||
BMIE, 3,
|
||||
Offset (0x18),
|
||||
PRIB, 8,
|
||||
SECB, 8,
|
||||
SUBB, 8,
|
||||
Offset (0x1E),
|
||||
, 13,
|
||||
MABT, 1
|
||||
}
|
||||
|
||||
/**
|
||||
* PCI Enable downstream
|
||||
*/
|
||||
Method (PCED, 0, Serialized)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED"
|
||||
Debug = "TB:DSB2:XHC2:PCED - Request USB-GPIO to be enabled & force TBT-GPIO"
|
||||
\_SB.PCI0.RP09.GXCI = One
|
||||
\_SB.PCI0.RP09.GNHI = One
|
||||
|
||||
// this powers up both TBT and USB when needed
|
||||
If (\_SB.PCI0.RP09.UGIO () != Zero)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - GPIOs changed, restored = true"
|
||||
\_SB.PCI0.RP09.UPSB.DSB2.PRSR = One
|
||||
}
|
||||
|
||||
// Local0 = Zero
|
||||
// Local1 = Zero
|
||||
Local5 = (Timer + 0x00989680)
|
||||
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:PCED - restored flag, THUNDERBOLT_PCI_LINK_MGMT_DEVICE.PRSR: ", \_SB.PCI0.RP09.UPSB.DSB2.PRSR)
|
||||
|
||||
If (\_SB.PCI0.RP09.UPSB.DSB2.PRSR != Zero)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for power up"
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for downstream bridge to appear"
|
||||
Local5 = (Timer + 0x00989680)
|
||||
While (Timer <= Local5)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for link training..."
|
||||
If (\_SB.PCI0.RP09.UPSB.DSB2.LACR == Zero)
|
||||
{
|
||||
If (\_SB.PCI0.RP09.UPSB.DSB2.LTRN != One)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Link training cleared"
|
||||
Break
|
||||
}
|
||||
}
|
||||
ElseIf ((\_SB.PCI0.RP09.UPSB.DSB2.LTRN != One) && (\_SB.PCI0.RP09.UPSB.DSB2.LACT == One))
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Link training cleared and link is active"
|
||||
Break
|
||||
}
|
||||
|
||||
Sleep (0x0A)
|
||||
}
|
||||
|
||||
Sleep (0x96)
|
||||
}
|
||||
|
||||
\_SB.PCI0.RP09.UPSB.DSB2.PRSR = Zero
|
||||
While (Timer <= Local5)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - Wait for config space..."
|
||||
If (\_SB.PCI0.RP09.UPSB.DSB2.XHC2.AVND != 0xFFFFFFFF)
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:PCED - DSB2 Up - Read VID/DID"
|
||||
\_SB.PCI0.RP09.UPSB.DSB2.PCIA = One
|
||||
Break
|
||||
}
|
||||
|
||||
Sleep (0x0A)
|
||||
}
|
||||
|
||||
\_SB.PCI0.RP09.UPSB.DSB2.IIP3 = Zero
|
||||
}
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
Local0 = Package (0x06)
|
||||
{
|
||||
"USBBusNumber",
|
||||
Zero,
|
||||
"AAPL,xhci-clock-id",
|
||||
One,
|
||||
"UsbCompanionControllerPresent",
|
||||
One
|
||||
}
|
||||
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
}
|
||||
|
||||
Name (HS, Package (0x01)
|
||||
{
|
||||
"XHC"
|
||||
})
|
||||
|
||||
Name (FS, Package (0x01)
|
||||
{
|
||||
"XHC"
|
||||
})
|
||||
|
||||
Name (LS, Package (0x01)
|
||||
{
|
||||
"XHC"
|
||||
})
|
||||
|
||||
Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
|
||||
{
|
||||
Return (Package ()
|
||||
{
|
||||
0x6D,
|
||||
0x03
|
||||
})
|
||||
}
|
||||
|
||||
Method (_PS0, 0, Serialized) // _PS0: Power State 0
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:_PS0"
|
||||
|
||||
If (OSDW ())
|
||||
{
|
||||
PCED ()
|
||||
|
||||
\_SB.PCI0.RP09.TBST ()
|
||||
}
|
||||
}
|
||||
|
||||
Method (_PS3, 0, Serialized) // _PS3: Power State 3
|
||||
{
|
||||
Debug = "TB:DSB2:XHC2:_PS3"
|
||||
|
||||
If (OSDW ())
|
||||
{
|
||||
\_SB.PCI0.RP09.TBST ()
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Run Time Power Check
|
||||
* Called by XHC driver when idle
|
||||
*/
|
||||
Method (RTPC, 1, Serialized)
|
||||
{
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:RTPC called with Arg0: ", Arg0)
|
||||
|
||||
If (Arg0 <= One)
|
||||
{
|
||||
Debug = Concatenate ("TB:NHI0:RTPC setting RUSB to: ", Arg0)
|
||||
|
||||
\_SB.PCI0.RP09.RUSB = Arg0
|
||||
|
||||
// Force TB on
|
||||
If (Arg0 == One)
|
||||
{
|
||||
Debug = Concatenate ("TB:NHI0:RTPC forcing RTBT to: ", Arg0)
|
||||
\_SB.PCI0.RP09.RTBT = One
|
||||
}
|
||||
}
|
||||
|
||||
Return (Zero)
|
||||
}
|
||||
|
||||
/**
|
||||
* USB cable check
|
||||
* Called by XHC driver to check cable status
|
||||
* Used as idle hint.
|
||||
*
|
||||
* Return:
|
||||
* kUSBTypeCCableTypeNone = 0,
|
||||
* kUSBTypeCCableTypeUSB = 1,
|
||||
*/
|
||||
Method (MODU, 0, Serialized)
|
||||
{
|
||||
Debug = Concatenate ("TB:DSB2:XHC2:MODU - return: ", \_SB.PCI0.RP09.UPSB.MDUV)
|
||||
|
||||
Return (\_SB.PCI0.RP09.UPSB.MDUV)
|
||||
}
|
||||
|
||||
Device (RHUB)
|
||||
{
|
||||
Name (_ADR, Zero) // _ADR: Address
|
||||
|
||||
Device (SSP1)
|
||||
{
|
||||
Name (_ADR, 0x03) // _ADR: Address
|
||||
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
|
||||
{
|
||||
0xFF,
|
||||
0x09,
|
||||
Zero,
|
||||
Zero
|
||||
})
|
||||
|
||||
Name (HS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x03
|
||||
})
|
||||
|
||||
Name (FS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x03
|
||||
})
|
||||
|
||||
Name (LS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x03
|
||||
})
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
Local0 = Package ()
|
||||
{
|
||||
"UsbCPortNumber",
|
||||
\_SB.PCI0.RP09.UPN1,
|
||||
"UsbCompanionPortPresent",
|
||||
One
|
||||
}
|
||||
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
}
|
||||
}
|
||||
|
||||
Device (SSP2)
|
||||
{
|
||||
Name (_ADR, 0x04) // _ADR: Address
|
||||
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
|
||||
{
|
||||
0xFF,
|
||||
0x09,
|
||||
Zero,
|
||||
Zero
|
||||
})
|
||||
|
||||
Name (HS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x04
|
||||
})
|
||||
|
||||
Name (FS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x04
|
||||
})
|
||||
|
||||
Name (LS, Package ()
|
||||
{
|
||||
"XHC",
|
||||
0x04
|
||||
})
|
||||
|
||||
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
||||
{
|
||||
Local0 = Package ()
|
||||
{
|
||||
"UsbCPortNumber",
|
||||
\_SB.PCI0.RP09.UPN2,
|
||||
"UsbCompanionPortPresent",
|
||||
One
|
||||
}
|
||||
|
||||
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
|
||||
Return (Local0)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
Loading…
Reference in a new issue